ste-u300.dts 7.4 KB

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  1. /*
  2. * Device Tree for the ST-Ericsson U300 Machine and SoC
  3. */
  4. /dts-v1/;
  5. /include/ "skeleton.dtsi"
  6. / {
  7. model = "ST-Ericsson U300";
  8. compatible = "stericsson,u300";
  9. #address-cells = <1>;
  10. #size-cells = <1>;
  11. chosen {
  12. bootargs = "root=/dev/ram0 console=ttyAMA0,115200n8 earlyprintk";
  13. };
  14. aliases {
  15. serial0 = &uart0;
  16. serial1 = &uart1;
  17. };
  18. memory {
  19. reg = <0x48000000 0x03c00000>;
  20. };
  21. s365 {
  22. compatible = "stericsson,s365";
  23. vana15-supply = <&ab3100_ldo_d_reg>;
  24. syscon = <&syscon>;
  25. };
  26. syscon: syscon@c0011000 {
  27. compatible = "stericsson,u300-syscon";
  28. reg = <0xc0011000 0x1000>;
  29. clk32: app_32_clk@32k {
  30. #clock-cells = <0>;
  31. compatible = "fixed-clock";
  32. clock-frequency = <32768>;
  33. };
  34. pll13: pll13@13M {
  35. #clock-cells = <0>;
  36. compatible = "fixed-clock";
  37. clock-frequency = <13000000>;
  38. };
  39. pll208: pll208@208M {
  40. #clock-cells = <0>;
  41. compatible = "fixed-clock";
  42. clock-frequency = <208000000>;
  43. };
  44. app208: app_208_clk@208M {
  45. #clock-cells = <0>;
  46. compatible = "fixed-factor-clock";
  47. clock-div = <1>;
  48. clock-mult = <1>;
  49. clocks = <&pll208>;
  50. };
  51. app104: app_104_clk@104M {
  52. #clock-cells = <0>;
  53. compatible = "fixed-factor-clock";
  54. clock-div = <2>;
  55. clock-mult = <1>;
  56. clocks = <&pll208>;
  57. };
  58. app52: app_52_clk@52M {
  59. #clock-cells = <0>;
  60. compatible = "fixed-factor-clock";
  61. clock-div = <4>;
  62. clock-mult = <1>;
  63. clocks = <&pll208>;
  64. };
  65. app26: app_26_clk@26M {
  66. #clock-cells = <0>;
  67. compatible = "fixed-factor-clock";
  68. clock-div = <2>;
  69. clock-mult = <1>;
  70. clocks = <&app52>;
  71. };
  72. };
  73. timer: timer@c0014000 {
  74. compatible = "stericsson,u300-apptimer";
  75. reg = <0xc0014000 0x1000>;
  76. interrupt-parent = <&vica>;
  77. interrupts = <24 25 26 27>;
  78. };
  79. gpio: gpio@c0016000 {
  80. compatible = "stericsson,gpio-coh901";
  81. reg = <0xc0016000 0x1000>;
  82. interrupt-parent = <&vicb>;
  83. interrupts = <0 1 2 18 21 22 23>;
  84. interrupt-names = "gpio0", "gpio1", "gpio2", "gpio3",
  85. "gpio4", "gpio5", "gpio6";
  86. interrupt-controller;
  87. #interrupt-cells = <2>;
  88. gpio-controller;
  89. #gpio-cells = <2>;
  90. };
  91. pinctrl: pinctrl@c0011000 {
  92. compatible = "stericsson,pinctrl-u300";
  93. reg = <0xc0011000 0x1000>;
  94. };
  95. watchdog: watchdog@c0012000 {
  96. compatible = "stericsson,coh901327";
  97. reg = <0xc0012000 0x1000>;
  98. interrupt-parent = <&vicb>;
  99. interrupts = <3>;
  100. clocks = <&clk32>;
  101. };
  102. rtc: rtc@c0017000 {
  103. compatible = "stericsson,coh901331";
  104. reg = <0xc0017000 0x1000>;
  105. interrupt-parent = <&vicb>;
  106. interrupts = <10>;
  107. };
  108. dmac: dma-controller@c00020000 {
  109. compatible = "stericsson,coh901318";
  110. reg = <0xc0020000 0x1000>;
  111. interrupt-parent = <&vica>;
  112. interrupts = <2>;
  113. #dma-cells = <1>;
  114. dma-channels = <40>;
  115. };
  116. /* A NAND flash of 128 MiB */
  117. fsmc: flash@40000000 {
  118. compatible = "stericsson,fsmc-nand";
  119. #address-cells = <1>;
  120. #size-cells = <1>;
  121. reg = <0x9f800000 0x1000>, /* FSMC Register*/
  122. <0x80000000 0x4000>, /* NAND Base DATA */
  123. <0x80020000 0x4000>, /* NAND Base ADDR */
  124. <0x80010000 0x4000>; /* NAND Base CMD */
  125. reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
  126. nand-skip-bbtscan;
  127. partition@0 {
  128. label = "boot records";
  129. reg = <0x0 0x20000>;
  130. };
  131. partition@20000 {
  132. label = "free";
  133. reg = <0x20000 0x7e0000>;
  134. };
  135. partition@800000 {
  136. label = "platform";
  137. reg = <0x800000 0xf800000>;
  138. };
  139. };
  140. i2c0: i2c@c0004000 {
  141. compatible = "st,ddci2c";
  142. reg = <0xc0004000 0x1000>;
  143. interrupt-parent = <&vicb>;
  144. interrupts = <8>;
  145. #address-cells = <1>;
  146. #size-cells = <0>;
  147. ab3100: ab3100@0x48 {
  148. compatible = "stericsson,ab3100";
  149. reg = <0x48>;
  150. interrupt-parent = <&vica>;
  151. interrupts = <0>; /* EXT0 IRQ */
  152. ab3100-regulators {
  153. compatible = "stericsson,ab3100-regulators";
  154. ab3100_ldo_a_reg: ab3100_ldo_a {
  155. regulator-compatible = "ab3100_ldo_a";
  156. startup-delay-us = <200>;
  157. regulator-always-on;
  158. regulator-boot-on;
  159. };
  160. ab3100_ldo_c_reg: ab3100_ldo_c {
  161. regulator-compatible = "ab3100_ldo_c";
  162. startup-delay-us = <200>;
  163. };
  164. ab3100_ldo_d_reg: ab3100_ldo_d {
  165. regulator-compatible = "ab3100_ldo_d";
  166. startup-delay-us = <200>;
  167. };
  168. ab3100_ldo_e_reg: ab3100_ldo_e {
  169. regulator-compatible = "ab3100_ldo_e";
  170. regulator-min-microvolt = <1800000>;
  171. regulator-max-microvolt = <1800000>;
  172. startup-delay-us = <200>;
  173. regulator-always-on;
  174. regulator-boot-on;
  175. };
  176. ab3100_ldo_f_reg: ab3100_ldo_f {
  177. regulator-compatible = "ab3100_ldo_f";
  178. regulator-min-microvolt = <2500000>;
  179. regulator-max-microvolt = <2500000>;
  180. startup-delay-us = <600>;
  181. regulator-always-on;
  182. regulator-boot-on;
  183. };
  184. ab3100_ldo_g_reg: ab3100_ldo_g {
  185. regulator-compatible = "ab3100_ldo_g";
  186. regulator-min-microvolt = <1500000>;
  187. regulator-max-microvolt = <2850000>;
  188. startup-delay-us = <400>;
  189. };
  190. ab3100_ldo_h_reg: ab3100_ldo_h {
  191. regulator-compatible = "ab3100_ldo_h";
  192. regulator-min-microvolt = <1200000>;
  193. regulator-max-microvolt = <2750000>;
  194. startup-delay-us = <200>;
  195. };
  196. ab3100_ldo_k_reg: ab3100_ldo_k {
  197. regulator-compatible = "ab3100_ldo_k";
  198. regulator-min-microvolt = <1800000>;
  199. regulator-max-microvolt = <2750000>;
  200. startup-delay-us = <200>;
  201. };
  202. ab3100_ext_reg: ab3100_ext {
  203. regulator-compatible = "ab3100_ext";
  204. };
  205. ab3100_buck_reg: ab3100_buck {
  206. regulator-compatible = "ab3100_buck";
  207. regulator-min-microvolt = <1200000>;
  208. regulator-max-microvolt = <1800000>;
  209. startup-delay-us = <1000>;
  210. regulator-always-on;
  211. regulator-boot-on;
  212. };
  213. };
  214. };
  215. };
  216. i2c1: i2c@c0005000 {
  217. compatible = "st,ddci2c";
  218. reg = <0xc0005000 0x1000>;
  219. interrupt-parent = <&vicb>;
  220. interrupts = <9>;
  221. #address-cells = <1>;
  222. #size-cells = <0>;
  223. fwcam0: fwcam@0x10 {
  224. reg = <0x10>;
  225. };
  226. fwcam1: fwcam@0x5d {
  227. reg = <0x5d>;
  228. };
  229. };
  230. amba {
  231. compatible = "arm,amba-bus";
  232. #address-cells = <1>;
  233. #size-cells = <1>;
  234. ranges;
  235. vica: interrupt-controller@a0001000 {
  236. compatible = "arm,versatile-vic";
  237. interrupt-controller;
  238. #interrupt-cells = <1>;
  239. reg = <0xa0001000 0x20>;
  240. };
  241. vicb: interrupt-controller@a0002000 {
  242. compatible = "arm,versatile-vic";
  243. interrupt-controller;
  244. #interrupt-cells = <1>;
  245. reg = <0xa0002000 0x20>;
  246. };
  247. uart0: serial@c0013000 {
  248. compatible = "arm,pl011", "arm,primecell";
  249. reg = <0xc0013000 0x1000>;
  250. interrupt-parent = <&vica>;
  251. interrupts = <22>;
  252. dmas = <&dmac 17 &dmac 18>;
  253. dma-names = "tx", "rx";
  254. };
  255. uart1: serial@c0007000 {
  256. compatible = "arm,pl011", "arm,primecell";
  257. reg = <0xc0007000 0x1000>;
  258. interrupt-parent = <&vicb>;
  259. interrupts = <20>;
  260. dmas = <&dmac 38 &dmac 39>;
  261. dma-names = "tx", "rx";
  262. };
  263. mmcsd: mmcsd@c0001000 {
  264. compatible = "arm,pl18x", "arm,primecell";
  265. reg = <0xc0001000 0x1000>;
  266. interrupt-parent = <&vicb>;
  267. interrupts = <6 7>;
  268. max-frequency = <24000000>;
  269. bus-width = <4>; // SD-card slot
  270. mmc-cap-mmc-highspeed;
  271. mmc-cap-sd-highspeed;
  272. cd-gpios = <&gpio 12 0x4>;
  273. cd-inverted;
  274. vmmc-supply = <&ab3100_ldo_g_reg>;
  275. dmas = <&dmac 14>;
  276. dma-names = "rx";
  277. };
  278. spi: ssp@c0006000 {
  279. compatible = "arm,pl022", "arm,primecell";
  280. reg = <0xc0006000 0x1000>;
  281. interrupt-parent = <&vica>;
  282. interrupts = <23>;
  283. dmas = <&dmac 27 &dmac 28>;
  284. dma-names = "tx", "rx";
  285. num-cs = <3>;
  286. #address-cells = <1>;
  287. #size-cells = <0>;
  288. spi-dummy@1 {
  289. compatible = "arm,pl022-dummy";
  290. reg = <1>;
  291. spi-max-frequency = <20000000>;
  292. };
  293. };
  294. };
  295. };