setup.c 25 KB

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  1. /*
  2. * linux/arch/arm/kernel/setup.c
  3. *
  4. * Copyright (C) 1995-2001 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/kernel.h>
  12. #include <linux/stddef.h>
  13. #include <linux/ioport.h>
  14. #include <linux/delay.h>
  15. #include <linux/utsname.h>
  16. #include <linux/initrd.h>
  17. #include <linux/console.h>
  18. #include <linux/bootmem.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/screen_info.h>
  21. #include <linux/init.h>
  22. #include <linux/kexec.h>
  23. #include <linux/of_fdt.h>
  24. #include <linux/crash_dump.h>
  25. #include <linux/root_dev.h>
  26. #include <linux/cpu.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/smp.h>
  29. #include <linux/fs.h>
  30. #include <linux/proc_fs.h>
  31. #include <linux/memblock.h>
  32. #include <asm/unified.h>
  33. #include <asm/cpu.h>
  34. #include <asm/cputype.h>
  35. #include <asm/elf.h>
  36. #include <asm/procinfo.h>
  37. #include <asm/sections.h>
  38. #include <asm/setup.h>
  39. #include <asm/smp_plat.h>
  40. #include <asm/mach-types.h>
  41. #include <asm/cacheflush.h>
  42. #include <asm/cachetype.h>
  43. #include <asm/tlbflush.h>
  44. #include <asm/prom.h>
  45. #include <asm/mach/arch.h>
  46. #include <asm/mach/irq.h>
  47. #include <asm/mach/time.h>
  48. #include <asm/traps.h>
  49. #include <asm/unwind.h>
  50. #if defined(CONFIG_DEPRECATED_PARAM_STRUCT)
  51. #include "compat.h"
  52. #endif
  53. #include "atags.h"
  54. #include "tcm.h"
  55. #ifndef MEM_SIZE
  56. #define MEM_SIZE (16*1024*1024)
  57. #endif
  58. #if defined(CONFIG_FPE_NWFPE) || defined(CONFIG_FPE_FASTFPE)
  59. char fpe_type[8];
  60. static int __init fpe_setup(char *line)
  61. {
  62. memcpy(fpe_type, line, 8);
  63. return 1;
  64. }
  65. __setup("fpe=", fpe_setup);
  66. #endif
  67. extern void paging_init(struct machine_desc *desc);
  68. extern void reboot_setup(char *str);
  69. unsigned int processor_id;
  70. EXPORT_SYMBOL(processor_id);
  71. unsigned int __machine_arch_type __read_mostly;
  72. EXPORT_SYMBOL(__machine_arch_type);
  73. unsigned int cacheid __read_mostly;
  74. EXPORT_SYMBOL(cacheid);
  75. unsigned int __atags_pointer __initdata;
  76. unsigned int system_rev;
  77. EXPORT_SYMBOL(system_rev);
  78. unsigned int system_serial_low;
  79. EXPORT_SYMBOL(system_serial_low);
  80. unsigned int system_serial_high;
  81. EXPORT_SYMBOL(system_serial_high);
  82. unsigned int elf_hwcap __read_mostly;
  83. EXPORT_SYMBOL(elf_hwcap);
  84. #ifdef MULTI_CPU
  85. struct processor processor __read_mostly;
  86. #endif
  87. #ifdef MULTI_TLB
  88. struct cpu_tlb_fns cpu_tlb __read_mostly;
  89. #endif
  90. #ifdef MULTI_USER
  91. struct cpu_user_fns cpu_user __read_mostly;
  92. #endif
  93. #ifdef MULTI_CACHE
  94. struct cpu_cache_fns cpu_cache __read_mostly;
  95. #endif
  96. #ifdef CONFIG_OUTER_CACHE
  97. struct outer_cache_fns outer_cache __read_mostly;
  98. EXPORT_SYMBOL(outer_cache);
  99. #endif
  100. struct stack {
  101. u32 irq[3];
  102. u32 abt[3];
  103. u32 und[3];
  104. } ____cacheline_aligned;
  105. static struct stack stacks[NR_CPUS];
  106. char elf_platform[ELF_PLATFORM_SIZE];
  107. EXPORT_SYMBOL(elf_platform);
  108. static const char *cpu_name;
  109. static const char *machine_name;
  110. static char __initdata cmd_line[COMMAND_LINE_SIZE];
  111. struct machine_desc *machine_desc __initdata;
  112. static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
  113. static union { char c[4]; unsigned long l; } endian_test __initdata = { { 'l', '?', '?', 'b' } };
  114. #define ENDIANNESS ((char)endian_test.l)
  115. DEFINE_PER_CPU(struct cpuinfo_arm, cpu_data);
  116. /*
  117. * Standard memory resources
  118. */
  119. static struct resource mem_res[] = {
  120. {
  121. .name = "Video RAM",
  122. .start = 0,
  123. .end = 0,
  124. .flags = IORESOURCE_MEM
  125. },
  126. {
  127. .name = "Kernel text",
  128. .start = 0,
  129. .end = 0,
  130. .flags = IORESOURCE_MEM
  131. },
  132. {
  133. .name = "Kernel data",
  134. .start = 0,
  135. .end = 0,
  136. .flags = IORESOURCE_MEM
  137. }
  138. };
  139. #define video_ram mem_res[0]
  140. #define kernel_code mem_res[1]
  141. #define kernel_data mem_res[2]
  142. static struct resource io_res[] = {
  143. {
  144. .name = "reserved",
  145. .start = 0x3bc,
  146. .end = 0x3be,
  147. .flags = IORESOURCE_IO | IORESOURCE_BUSY
  148. },
  149. {
  150. .name = "reserved",
  151. .start = 0x378,
  152. .end = 0x37f,
  153. .flags = IORESOURCE_IO | IORESOURCE_BUSY
  154. },
  155. {
  156. .name = "reserved",
  157. .start = 0x278,
  158. .end = 0x27f,
  159. .flags = IORESOURCE_IO | IORESOURCE_BUSY
  160. }
  161. };
  162. #define lp0 io_res[0]
  163. #define lp1 io_res[1]
  164. #define lp2 io_res[2]
  165. static const char *proc_arch[] = {
  166. "undefined/unknown",
  167. "3",
  168. "4",
  169. "4T",
  170. "5",
  171. "5T",
  172. "5TE",
  173. "5TEJ",
  174. "6TEJ",
  175. "7",
  176. "?(11)",
  177. "?(12)",
  178. "?(13)",
  179. "?(14)",
  180. "?(15)",
  181. "?(16)",
  182. "?(17)",
  183. };
  184. int cpu_architecture(void)
  185. {
  186. int cpu_arch;
  187. if ((read_cpuid_id() & 0x0008f000) == 0) {
  188. cpu_arch = CPU_ARCH_UNKNOWN;
  189. } else if ((read_cpuid_id() & 0x0008f000) == 0x00007000) {
  190. cpu_arch = (read_cpuid_id() & (1 << 23)) ? CPU_ARCH_ARMv4T : CPU_ARCH_ARMv3;
  191. } else if ((read_cpuid_id() & 0x00080000) == 0x00000000) {
  192. cpu_arch = (read_cpuid_id() >> 16) & 7;
  193. if (cpu_arch)
  194. cpu_arch += CPU_ARCH_ARMv3;
  195. } else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
  196. unsigned int mmfr0;
  197. /* Revised CPUID format. Read the Memory Model Feature
  198. * Register 0 and check for VMSAv7 or PMSAv7 */
  199. asm("mrc p15, 0, %0, c0, c1, 4"
  200. : "=r" (mmfr0));
  201. if ((mmfr0 & 0x0000000f) >= 0x00000003 ||
  202. (mmfr0 & 0x000000f0) >= 0x00000030)
  203. cpu_arch = CPU_ARCH_ARMv7;
  204. else if ((mmfr0 & 0x0000000f) == 0x00000002 ||
  205. (mmfr0 & 0x000000f0) == 0x00000020)
  206. cpu_arch = CPU_ARCH_ARMv6;
  207. else
  208. cpu_arch = CPU_ARCH_UNKNOWN;
  209. } else
  210. cpu_arch = CPU_ARCH_UNKNOWN;
  211. return cpu_arch;
  212. }
  213. static int cpu_has_aliasing_icache(unsigned int arch)
  214. {
  215. int aliasing_icache;
  216. unsigned int id_reg, num_sets, line_size;
  217. /* arch specifies the register format */
  218. switch (arch) {
  219. case CPU_ARCH_ARMv7:
  220. asm("mcr p15, 2, %0, c0, c0, 0 @ set CSSELR"
  221. : /* No output operands */
  222. : "r" (1));
  223. isb();
  224. asm("mrc p15, 1, %0, c0, c0, 0 @ read CCSIDR"
  225. : "=r" (id_reg));
  226. line_size = 4 << ((id_reg & 0x7) + 2);
  227. num_sets = ((id_reg >> 13) & 0x7fff) + 1;
  228. aliasing_icache = (line_size * num_sets) > PAGE_SIZE;
  229. break;
  230. case CPU_ARCH_ARMv6:
  231. aliasing_icache = read_cpuid_cachetype() & (1 << 11);
  232. break;
  233. default:
  234. /* I-cache aliases will be handled by D-cache aliasing code */
  235. aliasing_icache = 0;
  236. }
  237. return aliasing_icache;
  238. }
  239. static void __init cacheid_init(void)
  240. {
  241. unsigned int cachetype = read_cpuid_cachetype();
  242. unsigned int arch = cpu_architecture();
  243. if (arch >= CPU_ARCH_ARMv6) {
  244. if ((cachetype & (7 << 29)) == 4 << 29) {
  245. /* ARMv7 register format */
  246. cacheid = CACHEID_VIPT_NONALIASING;
  247. if ((cachetype & (3 << 14)) == 1 << 14)
  248. cacheid |= CACHEID_ASID_TAGGED;
  249. else if (cpu_has_aliasing_icache(CPU_ARCH_ARMv7))
  250. cacheid |= CACHEID_VIPT_I_ALIASING;
  251. } else if (cachetype & (1 << 23)) {
  252. cacheid = CACHEID_VIPT_ALIASING;
  253. } else {
  254. cacheid = CACHEID_VIPT_NONALIASING;
  255. if (cpu_has_aliasing_icache(CPU_ARCH_ARMv6))
  256. cacheid |= CACHEID_VIPT_I_ALIASING;
  257. }
  258. } else {
  259. cacheid = CACHEID_VIVT;
  260. }
  261. printk("CPU: %s data cache, %s instruction cache\n",
  262. cache_is_vivt() ? "VIVT" :
  263. cache_is_vipt_aliasing() ? "VIPT aliasing" :
  264. cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown",
  265. cache_is_vivt() ? "VIVT" :
  266. icache_is_vivt_asid_tagged() ? "VIVT ASID tagged" :
  267. icache_is_vipt_aliasing() ? "VIPT aliasing" :
  268. cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown");
  269. }
  270. /*
  271. * These functions re-use the assembly code in head.S, which
  272. * already provide the required functionality.
  273. */
  274. extern struct proc_info_list *lookup_processor_type(unsigned int);
  275. void __init early_print(const char *str, ...)
  276. {
  277. extern void printascii(const char *);
  278. char buf[256];
  279. va_list ap;
  280. va_start(ap, str);
  281. vsnprintf(buf, sizeof(buf), str, ap);
  282. va_end(ap);
  283. #ifdef CONFIG_DEBUG_LL
  284. printascii(buf);
  285. #endif
  286. printk("%s", buf);
  287. }
  288. static void __init feat_v6_fixup(void)
  289. {
  290. int id = read_cpuid_id();
  291. if ((id & 0xff0f0000) != 0x41070000)
  292. return;
  293. /*
  294. * HWCAP_TLS is available only on 1136 r1p0 and later,
  295. * see also kuser_get_tls_init.
  296. */
  297. if ((((id >> 4) & 0xfff) == 0xb36) && (((id >> 20) & 3) == 0))
  298. elf_hwcap &= ~HWCAP_TLS;
  299. }
  300. static void __init setup_processor(void)
  301. {
  302. struct proc_info_list *list;
  303. /*
  304. * locate processor in the list of supported processor
  305. * types. The linker builds this table for us from the
  306. * entries in arch/arm/mm/proc-*.S
  307. */
  308. list = lookup_processor_type(read_cpuid_id());
  309. if (!list) {
  310. printk("CPU configuration botched (ID %08x), unable "
  311. "to continue.\n", read_cpuid_id());
  312. while (1);
  313. }
  314. cpu_name = list->cpu_name;
  315. #ifdef MULTI_CPU
  316. processor = *list->proc;
  317. #endif
  318. #ifdef MULTI_TLB
  319. cpu_tlb = *list->tlb;
  320. #endif
  321. #ifdef MULTI_USER
  322. cpu_user = *list->user;
  323. #endif
  324. #ifdef MULTI_CACHE
  325. cpu_cache = *list->cache;
  326. #endif
  327. printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n",
  328. cpu_name, read_cpuid_id(), read_cpuid_id() & 15,
  329. proc_arch[cpu_architecture()], cr_alignment);
  330. sprintf(init_utsname()->machine, "%s%c", list->arch_name, ENDIANNESS);
  331. sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS);
  332. elf_hwcap = list->elf_hwcap;
  333. #ifndef CONFIG_ARM_THUMB
  334. elf_hwcap &= ~HWCAP_THUMB;
  335. #endif
  336. feat_v6_fixup();
  337. cacheid_init();
  338. cpu_proc_init();
  339. }
  340. /*
  341. * cpu_init - initialise one CPU.
  342. *
  343. * cpu_init sets up the per-CPU stacks.
  344. */
  345. void cpu_init(void)
  346. {
  347. unsigned int cpu = smp_processor_id();
  348. struct stack *stk = &stacks[cpu];
  349. if (cpu >= NR_CPUS) {
  350. printk(KERN_CRIT "CPU%u: bad primary CPU number\n", cpu);
  351. BUG();
  352. }
  353. /*
  354. * Define the placement constraint for the inline asm directive below.
  355. * In Thumb-2, msr with an immediate value is not allowed.
  356. */
  357. #ifdef CONFIG_THUMB2_KERNEL
  358. #define PLC "r"
  359. #else
  360. #define PLC "I"
  361. #endif
  362. /*
  363. * setup stacks for re-entrant exception handlers
  364. */
  365. __asm__ (
  366. "msr cpsr_c, %1\n\t"
  367. "add r14, %0, %2\n\t"
  368. "mov sp, r14\n\t"
  369. "msr cpsr_c, %3\n\t"
  370. "add r14, %0, %4\n\t"
  371. "mov sp, r14\n\t"
  372. "msr cpsr_c, %5\n\t"
  373. "add r14, %0, %6\n\t"
  374. "mov sp, r14\n\t"
  375. "msr cpsr_c, %7"
  376. :
  377. : "r" (stk),
  378. PLC (PSR_F_BIT | PSR_I_BIT | IRQ_MODE),
  379. "I" (offsetof(struct stack, irq[0])),
  380. PLC (PSR_F_BIT | PSR_I_BIT | ABT_MODE),
  381. "I" (offsetof(struct stack, abt[0])),
  382. PLC (PSR_F_BIT | PSR_I_BIT | UND_MODE),
  383. "I" (offsetof(struct stack, und[0])),
  384. PLC (PSR_F_BIT | PSR_I_BIT | SVC_MODE)
  385. : "r14");
  386. }
  387. void __init dump_machine_table(void)
  388. {
  389. struct machine_desc *p;
  390. early_print("Available machine support:\n\nID (hex)\tNAME\n");
  391. for_each_machine_desc(p)
  392. early_print("%08x\t%s\n", p->nr, p->name);
  393. early_print("\nPlease check your kernel config and/or bootloader.\n");
  394. while (true)
  395. /* can't use cpu_relax() here as it may require MMU setup */;
  396. }
  397. int __init arm_add_memory(phys_addr_t start, unsigned long size)
  398. {
  399. struct membank *bank = &meminfo.bank[meminfo.nr_banks];
  400. if (meminfo.nr_banks >= NR_BANKS) {
  401. printk(KERN_CRIT "NR_BANKS too low, "
  402. "ignoring memory at 0x%08llx\n", (long long)start);
  403. return -EINVAL;
  404. }
  405. /*
  406. * Ensure that start/size are aligned to a page boundary.
  407. * Size is appropriately rounded down, start is rounded up.
  408. */
  409. size -= start & ~PAGE_MASK;
  410. bank->start = PAGE_ALIGN(start);
  411. bank->size = size & PAGE_MASK;
  412. /*
  413. * Check whether this memory region has non-zero size or
  414. * invalid node number.
  415. */
  416. if (bank->size == 0)
  417. return -EINVAL;
  418. meminfo.nr_banks++;
  419. return 0;
  420. }
  421. /*
  422. * Pick out the memory size. We look for mem=size@start,
  423. * where start and size are "size[KkMm]"
  424. */
  425. static int __init early_mem(char *p)
  426. {
  427. static int usermem __initdata = 0;
  428. unsigned long size;
  429. phys_addr_t start;
  430. char *endp;
  431. /*
  432. * If the user specifies memory size, we
  433. * blow away any automatically generated
  434. * size.
  435. */
  436. if (usermem == 0) {
  437. usermem = 1;
  438. meminfo.nr_banks = 0;
  439. }
  440. start = PHYS_OFFSET;
  441. size = memparse(p, &endp);
  442. if (*endp == '@')
  443. start = memparse(endp + 1, NULL);
  444. arm_add_memory(start, size);
  445. return 0;
  446. }
  447. early_param("mem", early_mem);
  448. static void __init
  449. setup_ramdisk(int doload, int prompt, int image_start, unsigned int rd_sz)
  450. {
  451. #ifdef CONFIG_BLK_DEV_RAM
  452. extern int rd_size, rd_image_start, rd_prompt, rd_doload;
  453. rd_image_start = image_start;
  454. rd_prompt = prompt;
  455. rd_doload = doload;
  456. if (rd_sz)
  457. rd_size = rd_sz;
  458. #endif
  459. }
  460. static void __init request_standard_resources(struct machine_desc *mdesc)
  461. {
  462. struct memblock_region *region;
  463. struct resource *res;
  464. kernel_code.start = virt_to_phys(_text);
  465. kernel_code.end = virt_to_phys(_etext - 1);
  466. kernel_data.start = virt_to_phys(_sdata);
  467. kernel_data.end = virt_to_phys(_end - 1);
  468. for_each_memblock(memory, region) {
  469. res = alloc_bootmem_low(sizeof(*res));
  470. res->name = "System RAM";
  471. res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
  472. res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
  473. res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
  474. request_resource(&iomem_resource, res);
  475. if (kernel_code.start >= res->start &&
  476. kernel_code.end <= res->end)
  477. request_resource(res, &kernel_code);
  478. if (kernel_data.start >= res->start &&
  479. kernel_data.end <= res->end)
  480. request_resource(res, &kernel_data);
  481. }
  482. if (mdesc->video_start) {
  483. video_ram.start = mdesc->video_start;
  484. video_ram.end = mdesc->video_end;
  485. request_resource(&iomem_resource, &video_ram);
  486. }
  487. /*
  488. * Some machines don't have the possibility of ever
  489. * possessing lp0, lp1 or lp2
  490. */
  491. if (mdesc->reserve_lp0)
  492. request_resource(&ioport_resource, &lp0);
  493. if (mdesc->reserve_lp1)
  494. request_resource(&ioport_resource, &lp1);
  495. if (mdesc->reserve_lp2)
  496. request_resource(&ioport_resource, &lp2);
  497. }
  498. /*
  499. * Tag parsing.
  500. *
  501. * This is the new way of passing data to the kernel at boot time. Rather
  502. * than passing a fixed inflexible structure to the kernel, we pass a list
  503. * of variable-sized tags to the kernel. The first tag must be a ATAG_CORE
  504. * tag for the list to be recognised (to distinguish the tagged list from
  505. * a param_struct). The list is terminated with a zero-length tag (this tag
  506. * is not parsed in any way).
  507. */
  508. static int __init parse_tag_core(const struct tag *tag)
  509. {
  510. if (tag->hdr.size > 2) {
  511. if ((tag->u.core.flags & 1) == 0)
  512. root_mountflags &= ~MS_RDONLY;
  513. ROOT_DEV = old_decode_dev(tag->u.core.rootdev);
  514. }
  515. return 0;
  516. }
  517. __tagtable(ATAG_CORE, parse_tag_core);
  518. static int __init parse_tag_mem32(const struct tag *tag)
  519. {
  520. return arm_add_memory(tag->u.mem.start, tag->u.mem.size);
  521. }
  522. __tagtable(ATAG_MEM, parse_tag_mem32);
  523. #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
  524. struct screen_info screen_info = {
  525. .orig_video_lines = 30,
  526. .orig_video_cols = 80,
  527. .orig_video_mode = 0,
  528. .orig_video_ega_bx = 0,
  529. .orig_video_isVGA = 1,
  530. .orig_video_points = 8
  531. };
  532. static int __init parse_tag_videotext(const struct tag *tag)
  533. {
  534. screen_info.orig_x = tag->u.videotext.x;
  535. screen_info.orig_y = tag->u.videotext.y;
  536. screen_info.orig_video_page = tag->u.videotext.video_page;
  537. screen_info.orig_video_mode = tag->u.videotext.video_mode;
  538. screen_info.orig_video_cols = tag->u.videotext.video_cols;
  539. screen_info.orig_video_ega_bx = tag->u.videotext.video_ega_bx;
  540. screen_info.orig_video_lines = tag->u.videotext.video_lines;
  541. screen_info.orig_video_isVGA = tag->u.videotext.video_isvga;
  542. screen_info.orig_video_points = tag->u.videotext.video_points;
  543. return 0;
  544. }
  545. __tagtable(ATAG_VIDEOTEXT, parse_tag_videotext);
  546. #endif
  547. static int __init parse_tag_ramdisk(const struct tag *tag)
  548. {
  549. setup_ramdisk((tag->u.ramdisk.flags & 1) == 0,
  550. (tag->u.ramdisk.flags & 2) == 0,
  551. tag->u.ramdisk.start, tag->u.ramdisk.size);
  552. return 0;
  553. }
  554. __tagtable(ATAG_RAMDISK, parse_tag_ramdisk);
  555. static int __init parse_tag_serialnr(const struct tag *tag)
  556. {
  557. system_serial_low = tag->u.serialnr.low;
  558. system_serial_high = tag->u.serialnr.high;
  559. return 0;
  560. }
  561. __tagtable(ATAG_SERIAL, parse_tag_serialnr);
  562. static int __init parse_tag_revision(const struct tag *tag)
  563. {
  564. system_rev = tag->u.revision.rev;
  565. return 0;
  566. }
  567. __tagtable(ATAG_REVISION, parse_tag_revision);
  568. static int __init parse_tag_cmdline(const struct tag *tag)
  569. {
  570. #if defined(CONFIG_CMDLINE_EXTEND)
  571. strlcat(default_command_line, " ", COMMAND_LINE_SIZE);
  572. strlcat(default_command_line, tag->u.cmdline.cmdline,
  573. COMMAND_LINE_SIZE);
  574. #elif defined(CONFIG_CMDLINE_FORCE)
  575. pr_warning("Ignoring tag cmdline (using the default kernel command line)\n");
  576. #else
  577. strlcpy(default_command_line, tag->u.cmdline.cmdline,
  578. COMMAND_LINE_SIZE);
  579. #endif
  580. return 0;
  581. }
  582. __tagtable(ATAG_CMDLINE, parse_tag_cmdline);
  583. /*
  584. * Scan the tag table for this tag, and call its parse function.
  585. * The tag table is built by the linker from all the __tagtable
  586. * declarations.
  587. */
  588. static int __init parse_tag(const struct tag *tag)
  589. {
  590. extern struct tagtable __tagtable_begin, __tagtable_end;
  591. struct tagtable *t;
  592. for (t = &__tagtable_begin; t < &__tagtable_end; t++)
  593. if (tag->hdr.tag == t->tag) {
  594. t->parse(tag);
  595. break;
  596. }
  597. return t < &__tagtable_end;
  598. }
  599. /*
  600. * Parse all tags in the list, checking both the global and architecture
  601. * specific tag tables.
  602. */
  603. static void __init parse_tags(const struct tag *t)
  604. {
  605. for (; t->hdr.size; t = tag_next(t))
  606. if (!parse_tag(t))
  607. printk(KERN_WARNING
  608. "Ignoring unrecognised tag 0x%08x\n",
  609. t->hdr.tag);
  610. }
  611. /*
  612. * This holds our defaults.
  613. */
  614. static struct init_tags {
  615. struct tag_header hdr1;
  616. struct tag_core core;
  617. struct tag_header hdr2;
  618. struct tag_mem32 mem;
  619. struct tag_header hdr3;
  620. } init_tags __initdata = {
  621. { tag_size(tag_core), ATAG_CORE },
  622. { 1, PAGE_SIZE, 0xff },
  623. { tag_size(tag_mem32), ATAG_MEM },
  624. { MEM_SIZE },
  625. { 0, ATAG_NONE }
  626. };
  627. static int __init customize_machine(void)
  628. {
  629. /* customizes platform devices, or adds new ones */
  630. if (machine_desc->init_machine)
  631. machine_desc->init_machine();
  632. return 0;
  633. }
  634. arch_initcall(customize_machine);
  635. #ifdef CONFIG_KEXEC
  636. static inline unsigned long long get_total_mem(void)
  637. {
  638. unsigned long total;
  639. total = max_low_pfn - min_low_pfn;
  640. return total << PAGE_SHIFT;
  641. }
  642. /**
  643. * reserve_crashkernel() - reserves memory are for crash kernel
  644. *
  645. * This function reserves memory area given in "crashkernel=" kernel command
  646. * line parameter. The memory reserved is used by a dump capture kernel when
  647. * primary kernel is crashing.
  648. */
  649. static void __init reserve_crashkernel(void)
  650. {
  651. unsigned long long crash_size, crash_base;
  652. unsigned long long total_mem;
  653. int ret;
  654. total_mem = get_total_mem();
  655. ret = parse_crashkernel(boot_command_line, total_mem,
  656. &crash_size, &crash_base);
  657. if (ret)
  658. return;
  659. ret = reserve_bootmem(crash_base, crash_size, BOOTMEM_EXCLUSIVE);
  660. if (ret < 0) {
  661. printk(KERN_WARNING "crashkernel reservation failed - "
  662. "memory is in use (0x%lx)\n", (unsigned long)crash_base);
  663. return;
  664. }
  665. printk(KERN_INFO "Reserving %ldMB of memory at %ldMB "
  666. "for crashkernel (System RAM: %ldMB)\n",
  667. (unsigned long)(crash_size >> 20),
  668. (unsigned long)(crash_base >> 20),
  669. (unsigned long)(total_mem >> 20));
  670. crashk_res.start = crash_base;
  671. crashk_res.end = crash_base + crash_size - 1;
  672. insert_resource(&iomem_resource, &crashk_res);
  673. }
  674. #else
  675. static inline void reserve_crashkernel(void) {}
  676. #endif /* CONFIG_KEXEC */
  677. static void __init squash_mem_tags(struct tag *tag)
  678. {
  679. for (; tag->hdr.size; tag = tag_next(tag))
  680. if (tag->hdr.tag == ATAG_MEM)
  681. tag->hdr.tag = ATAG_NONE;
  682. }
  683. static struct machine_desc * __init setup_machine_tags(unsigned int nr)
  684. {
  685. struct tag *tags = (struct tag *)&init_tags;
  686. struct machine_desc *mdesc = NULL, *p;
  687. char *from = default_command_line;
  688. init_tags.mem.start = PHYS_OFFSET;
  689. /*
  690. * locate machine in the list of supported machines.
  691. */
  692. for_each_machine_desc(p)
  693. if (nr == p->nr) {
  694. printk("Machine: %s\n", p->name);
  695. mdesc = p;
  696. break;
  697. }
  698. if (!mdesc) {
  699. early_print("\nError: unrecognized/unsupported machine ID"
  700. " (r1 = 0x%08x).\n\n", nr);
  701. dump_machine_table(); /* does not return */
  702. }
  703. if (__atags_pointer)
  704. tags = phys_to_virt(__atags_pointer);
  705. else if (mdesc->boot_params) {
  706. #ifdef CONFIG_MMU
  707. /*
  708. * We still are executing with a minimal MMU mapping created
  709. * with the presumption that the machine default for this
  710. * is located in the first MB of RAM. Anything else will
  711. * fault and silently hang the kernel at this point.
  712. */
  713. if (mdesc->boot_params < PHYS_OFFSET ||
  714. mdesc->boot_params >= PHYS_OFFSET + SZ_1M) {
  715. printk(KERN_WARNING
  716. "Default boot params at physical 0x%08lx out of reach\n",
  717. mdesc->boot_params);
  718. } else
  719. #endif
  720. {
  721. tags = phys_to_virt(mdesc->boot_params);
  722. }
  723. }
  724. #if defined(CONFIG_DEPRECATED_PARAM_STRUCT)
  725. /*
  726. * If we have the old style parameters, convert them to
  727. * a tag list.
  728. */
  729. if (tags->hdr.tag != ATAG_CORE)
  730. convert_to_tag_list(tags);
  731. #endif
  732. if (tags->hdr.tag != ATAG_CORE) {
  733. #if defined(CONFIG_OF)
  734. /*
  735. * If CONFIG_OF is set, then assume this is a reasonably
  736. * modern system that should pass boot parameters
  737. */
  738. early_print("Warning: Neither atags nor dtb found\n");
  739. #endif
  740. tags = (struct tag *)&init_tags;
  741. }
  742. if (mdesc->fixup)
  743. mdesc->fixup(mdesc, tags, &from, &meminfo);
  744. if (tags->hdr.tag == ATAG_CORE) {
  745. if (meminfo.nr_banks != 0)
  746. squash_mem_tags(tags);
  747. save_atags(tags);
  748. parse_tags(tags);
  749. }
  750. /* parse_early_param needs a boot_command_line */
  751. strlcpy(boot_command_line, from, COMMAND_LINE_SIZE);
  752. return mdesc;
  753. }
  754. void __init setup_arch(char **cmdline_p)
  755. {
  756. struct machine_desc *mdesc;
  757. unwind_init();
  758. setup_processor();
  759. mdesc = setup_machine_fdt(__atags_pointer);
  760. if (!mdesc)
  761. mdesc = setup_machine_tags(machine_arch_type);
  762. machine_desc = mdesc;
  763. machine_name = mdesc->name;
  764. if (mdesc->soft_reboot)
  765. reboot_setup("s");
  766. init_mm.start_code = (unsigned long) _text;
  767. init_mm.end_code = (unsigned long) _etext;
  768. init_mm.end_data = (unsigned long) _edata;
  769. init_mm.brk = (unsigned long) _end;
  770. /* populate cmd_line too for later use, preserving boot_command_line */
  771. strlcpy(cmd_line, boot_command_line, COMMAND_LINE_SIZE);
  772. *cmdline_p = cmd_line;
  773. parse_early_param();
  774. arm_memblock_init(&meminfo, mdesc);
  775. paging_init(mdesc);
  776. request_standard_resources(mdesc);
  777. unflatten_device_tree();
  778. #ifdef CONFIG_SMP
  779. if (is_smp())
  780. smp_init_cpus();
  781. #endif
  782. reserve_crashkernel();
  783. cpu_init();
  784. tcm_init();
  785. #ifdef CONFIG_MULTI_IRQ_HANDLER
  786. handle_arch_irq = mdesc->handle_irq;
  787. #endif
  788. #ifdef CONFIG_VT
  789. #if defined(CONFIG_VGA_CONSOLE)
  790. conswitchp = &vga_con;
  791. #elif defined(CONFIG_DUMMY_CONSOLE)
  792. conswitchp = &dummy_con;
  793. #endif
  794. #endif
  795. early_trap_init();
  796. if (mdesc->init_early)
  797. mdesc->init_early();
  798. }
  799. static int __init topology_init(void)
  800. {
  801. int cpu;
  802. for_each_possible_cpu(cpu) {
  803. struct cpuinfo_arm *cpuinfo = &per_cpu(cpu_data, cpu);
  804. cpuinfo->cpu.hotpluggable = 1;
  805. register_cpu(&cpuinfo->cpu, cpu);
  806. }
  807. return 0;
  808. }
  809. subsys_initcall(topology_init);
  810. #ifdef CONFIG_HAVE_PROC_CPU
  811. static int __init proc_cpu_init(void)
  812. {
  813. struct proc_dir_entry *res;
  814. res = proc_mkdir("cpu", NULL);
  815. if (!res)
  816. return -ENOMEM;
  817. return 0;
  818. }
  819. fs_initcall(proc_cpu_init);
  820. #endif
  821. static const char *hwcap_str[] = {
  822. "swp",
  823. "half",
  824. "thumb",
  825. "26bit",
  826. "fastmult",
  827. "fpa",
  828. "vfp",
  829. "edsp",
  830. "java",
  831. "iwmmxt",
  832. "crunch",
  833. "thumbee",
  834. "neon",
  835. "vfpv3",
  836. "vfpv3d16",
  837. "tls",
  838. "vfpv4",
  839. "idiva",
  840. "idivt",
  841. NULL
  842. };
  843. static int c_show(struct seq_file *m, void *v)
  844. {
  845. int i;
  846. seq_printf(m, "Processor\t: %s rev %d (%s)\n",
  847. cpu_name, read_cpuid_id() & 15, elf_platform);
  848. #if defined(CONFIG_SMP)
  849. for_each_online_cpu(i) {
  850. /*
  851. * glibc reads /proc/cpuinfo to determine the number of
  852. * online processors, looking for lines beginning with
  853. * "processor". Give glibc what it expects.
  854. */
  855. seq_printf(m, "processor\t: %d\n", i);
  856. seq_printf(m, "BogoMIPS\t: %lu.%02lu\n\n",
  857. per_cpu(cpu_data, i).loops_per_jiffy / (500000UL/HZ),
  858. (per_cpu(cpu_data, i).loops_per_jiffy / (5000UL/HZ)) % 100);
  859. }
  860. #else /* CONFIG_SMP */
  861. seq_printf(m, "BogoMIPS\t: %lu.%02lu\n",
  862. loops_per_jiffy / (500000/HZ),
  863. (loops_per_jiffy / (5000/HZ)) % 100);
  864. #endif
  865. /* dump out the processor features */
  866. seq_puts(m, "Features\t: ");
  867. for (i = 0; hwcap_str[i]; i++)
  868. if (elf_hwcap & (1 << i))
  869. seq_printf(m, "%s ", hwcap_str[i]);
  870. seq_printf(m, "\nCPU implementer\t: 0x%02x\n", read_cpuid_id() >> 24);
  871. seq_printf(m, "CPU architecture: %s\n", proc_arch[cpu_architecture()]);
  872. if ((read_cpuid_id() & 0x0008f000) == 0x00000000) {
  873. /* pre-ARM7 */
  874. seq_printf(m, "CPU part\t: %07x\n", read_cpuid_id() >> 4);
  875. } else {
  876. if ((read_cpuid_id() & 0x0008f000) == 0x00007000) {
  877. /* ARM7 */
  878. seq_printf(m, "CPU variant\t: 0x%02x\n",
  879. (read_cpuid_id() >> 16) & 127);
  880. } else {
  881. /* post-ARM7 */
  882. seq_printf(m, "CPU variant\t: 0x%x\n",
  883. (read_cpuid_id() >> 20) & 15);
  884. }
  885. seq_printf(m, "CPU part\t: 0x%03x\n",
  886. (read_cpuid_id() >> 4) & 0xfff);
  887. }
  888. seq_printf(m, "CPU revision\t: %d\n", read_cpuid_id() & 15);
  889. seq_puts(m, "\n");
  890. seq_printf(m, "Hardware\t: %s\n", machine_name);
  891. seq_printf(m, "Revision\t: %04x\n", system_rev);
  892. seq_printf(m, "Serial\t\t: %08x%08x\n",
  893. system_serial_high, system_serial_low);
  894. return 0;
  895. }
  896. static void *c_start(struct seq_file *m, loff_t *pos)
  897. {
  898. return *pos < 1 ? (void *)1 : NULL;
  899. }
  900. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  901. {
  902. ++*pos;
  903. return NULL;
  904. }
  905. static void c_stop(struct seq_file *m, void *v)
  906. {
  907. }
  908. const struct seq_operations cpuinfo_op = {
  909. .start = c_start,
  910. .next = c_next,
  911. .stop = c_stop,
  912. .show = c_show
  913. };