cper.h 11 KB

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  1. /*
  2. * UEFI Common Platform Error Record
  3. *
  4. * Copyright (C) 2010, Intel Corp.
  5. * Author: Huang Ying <ying.huang@intel.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License version
  9. * 2 as published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. */
  20. #ifndef LINUX_CPER_H
  21. #define LINUX_CPER_H
  22. #include <linux/uuid.h>
  23. /* CPER record signature and the size */
  24. #define CPER_SIG_RECORD "CPER"
  25. #define CPER_SIG_SIZE 4
  26. /* Used in signature_end field in struct cper_record_header */
  27. #define CPER_SIG_END 0xffffffff
  28. /*
  29. * CPER record header revision, used in revision field in struct
  30. * cper_record_header
  31. */
  32. #define CPER_RECORD_REV 0x0100
  33. /*
  34. * Severity difinition for error_severity in struct cper_record_header
  35. * and section_severity in struct cper_section_descriptor
  36. */
  37. enum {
  38. CPER_SEV_RECOVERABLE,
  39. CPER_SEV_FATAL,
  40. CPER_SEV_CORRECTED,
  41. CPER_SEV_INFORMATIONAL,
  42. };
  43. /*
  44. * Validation bits difinition for validation_bits in struct
  45. * cper_record_header. If set, corresponding fields in struct
  46. * cper_record_header contain valid information.
  47. *
  48. * corresponds platform_id
  49. */
  50. #define CPER_VALID_PLATFORM_ID 0x0001
  51. /* corresponds timestamp */
  52. #define CPER_VALID_TIMESTAMP 0x0002
  53. /* corresponds partition_id */
  54. #define CPER_VALID_PARTITION_ID 0x0004
  55. /*
  56. * Notification type used to generate error record, used in
  57. * notification_type in struct cper_record_header
  58. *
  59. * Corrected Machine Check
  60. */
  61. #define CPER_NOTIFY_CMC \
  62. UUID_LE(0x2DCE8BB1, 0xBDD7, 0x450e, 0xB9, 0xAD, 0x9C, 0xF4, \
  63. 0xEB, 0xD4, 0xF8, 0x90)
  64. /* Corrected Platform Error */
  65. #define CPER_NOTIFY_CPE \
  66. UUID_LE(0x4E292F96, 0xD843, 0x4a55, 0xA8, 0xC2, 0xD4, 0x81, \
  67. 0xF2, 0x7E, 0xBE, 0xEE)
  68. /* Machine Check Exception */
  69. #define CPER_NOTIFY_MCE \
  70. UUID_LE(0xE8F56FFE, 0x919C, 0x4cc5, 0xBA, 0x88, 0x65, 0xAB, \
  71. 0xE1, 0x49, 0x13, 0xBB)
  72. /* PCI Express Error */
  73. #define CPER_NOTIFY_PCIE \
  74. UUID_LE(0xCF93C01F, 0x1A16, 0x4dfc, 0xB8, 0xBC, 0x9C, 0x4D, \
  75. 0xAF, 0x67, 0xC1, 0x04)
  76. /* INIT Record (for IPF) */
  77. #define CPER_NOTIFY_INIT \
  78. UUID_LE(0xCC5263E8, 0x9308, 0x454a, 0x89, 0xD0, 0x34, 0x0B, \
  79. 0xD3, 0x9B, 0xC9, 0x8E)
  80. /* Non-Maskable Interrupt */
  81. #define CPER_NOTIFY_NMI \
  82. UUID_LE(0x5BAD89FF, 0xB7E6, 0x42c9, 0x81, 0x4A, 0xCF, 0x24, \
  83. 0x85, 0xD6, 0xE9, 0x8A)
  84. /* BOOT Error Record */
  85. #define CPER_NOTIFY_BOOT \
  86. UUID_LE(0x3D61A466, 0xAB40, 0x409a, 0xA6, 0x98, 0xF3, 0x62, \
  87. 0xD4, 0x64, 0xB3, 0x8F)
  88. /* DMA Remapping Error */
  89. #define CPER_NOTIFY_DMAR \
  90. UUID_LE(0x667DD791, 0xC6B3, 0x4c27, 0x8A, 0x6B, 0x0F, 0x8E, \
  91. 0x72, 0x2D, 0xEB, 0x41)
  92. /*
  93. * Flags bits definitions for flags in struct cper_record_header
  94. * If set, the error has been recovered
  95. */
  96. #define CPER_HW_ERROR_FLAGS_RECOVERED 0x1
  97. /* If set, the error is for previous boot */
  98. #define CPER_HW_ERROR_FLAGS_PREVERR 0x2
  99. /* If set, the error is injected for testing */
  100. #define CPER_HW_ERROR_FLAGS_SIMULATED 0x4
  101. /*
  102. * CPER section header revision, used in revision field in struct
  103. * cper_section_descriptor
  104. */
  105. #define CPER_SEC_REV 0x0100
  106. /*
  107. * Validation bits difinition for validation_bits in struct
  108. * cper_section_descriptor. If set, corresponding fields in struct
  109. * cper_section_descriptor contain valid information.
  110. *
  111. * corresponds fru_id
  112. */
  113. #define CPER_SEC_VALID_FRU_ID 0x1
  114. /* corresponds fru_text */
  115. #define CPER_SEC_VALID_FRU_TEXT 0x2
  116. /*
  117. * Flags bits definitions for flags in struct cper_section_descriptor
  118. *
  119. * If set, the section is associated with the error condition
  120. * directly, and should be focused on
  121. */
  122. #define CPER_SEC_PRIMARY 0x0001
  123. /*
  124. * If set, the error was not contained within the processor or memory
  125. * hierarchy and the error may have propagated to persistent storage
  126. * or network
  127. */
  128. #define CPER_SEC_CONTAINMENT_WARNING 0x0002
  129. /* If set, the component must be re-initialized or re-enabled prior to use */
  130. #define CPER_SEC_RESET 0x0004
  131. /* If set, Linux may choose to discontinue use of the resource */
  132. #define CPER_SEC_ERROR_THRESHOLD_EXCEEDED 0x0008
  133. /*
  134. * If set, resource could not be queried for error information due to
  135. * conflicts with other system software or resources. Some fields of
  136. * the section will be invalid
  137. */
  138. #define CPER_SEC_RESOURCE_NOT_ACCESSIBLE 0x0010
  139. /*
  140. * If set, action has been taken to ensure error containment (such as
  141. * poisoning data), but the error has not been fully corrected and the
  142. * data has not been consumed. Linux may choose to take further
  143. * corrective action before the data is consumed
  144. */
  145. #define CPER_SEC_LATENT_ERROR 0x0020
  146. /*
  147. * Section type definitions, used in section_type field in struct
  148. * cper_section_descriptor
  149. *
  150. * Processor Generic
  151. */
  152. #define CPER_SEC_PROC_GENERIC \
  153. UUID_LE(0x9876CCAD, 0x47B4, 0x4bdb, 0xB6, 0x5E, 0x16, 0xF1, \
  154. 0x93, 0xC4, 0xF3, 0xDB)
  155. /* Processor Specific: X86/X86_64 */
  156. #define CPER_SEC_PROC_IA \
  157. UUID_LE(0xDC3EA0B0, 0xA144, 0x4797, 0xB9, 0x5B, 0x53, 0xFA, \
  158. 0x24, 0x2B, 0x6E, 0x1D)
  159. /* Processor Specific: IA64 */
  160. #define CPER_SEC_PROC_IPF \
  161. UUID_LE(0xE429FAF1, 0x3CB7, 0x11D4, 0x0B, 0xCA, 0x07, 0x00, \
  162. 0x80, 0xC7, 0x3C, 0x88, 0x81)
  163. /* Platform Memory */
  164. #define CPER_SEC_PLATFORM_MEM \
  165. UUID_LE(0xA5BC1114, 0x6F64, 0x4EDE, 0xB8, 0x63, 0x3E, 0x83, \
  166. 0xED, 0x7C, 0x83, 0xB1)
  167. #define CPER_SEC_PCIE \
  168. UUID_LE(0xD995E954, 0xBBC1, 0x430F, 0xAD, 0x91, 0xB4, 0x4D, \
  169. 0xCB, 0x3C, 0x6F, 0x35)
  170. /* Firmware Error Record Reference */
  171. #define CPER_SEC_FW_ERR_REC_REF \
  172. UUID_LE(0x81212A96, 0x09ED, 0x4996, 0x94, 0x71, 0x8D, 0x72, \
  173. 0x9C, 0x8E, 0x69, 0xED)
  174. /* PCI/PCI-X Bus */
  175. #define CPER_SEC_PCI_X_BUS \
  176. UUID_LE(0xC5753963, 0x3B84, 0x4095, 0xBF, 0x78, 0xED, 0xDA, \
  177. 0xD3, 0xF9, 0xC9, 0xDD)
  178. /* PCI Component/Device */
  179. #define CPER_SEC_PCI_DEV \
  180. UUID_LE(0xEB5E4685, 0xCA66, 0x4769, 0xB6, 0xA2, 0x26, 0x06, \
  181. 0x8B, 0x00, 0x13, 0x26)
  182. #define CPER_SEC_DMAR_GENERIC \
  183. UUID_LE(0x5B51FEF7, 0xC79D, 0x4434, 0x8F, 0x1B, 0xAA, 0x62, \
  184. 0xDE, 0x3E, 0x2C, 0x64)
  185. /* Intel VT for Directed I/O specific DMAr */
  186. #define CPER_SEC_DMAR_VT \
  187. UUID_LE(0x71761D37, 0x32B2, 0x45cd, 0xA7, 0xD0, 0xB0, 0xFE, \
  188. 0xDD, 0x93, 0xE8, 0xCF)
  189. /* IOMMU specific DMAr */
  190. #define CPER_SEC_DMAR_IOMMU \
  191. UUID_LE(0x036F84E1, 0x7F37, 0x428c, 0xA7, 0x9E, 0x57, 0x5F, \
  192. 0xDF, 0xAA, 0x84, 0xEC)
  193. #define CPER_PROC_VALID_TYPE 0x0001
  194. #define CPER_PROC_VALID_ISA 0x0002
  195. #define CPER_PROC_VALID_ERROR_TYPE 0x0004
  196. #define CPER_PROC_VALID_OPERATION 0x0008
  197. #define CPER_PROC_VALID_FLAGS 0x0010
  198. #define CPER_PROC_VALID_LEVEL 0x0020
  199. #define CPER_PROC_VALID_VERSION 0x0040
  200. #define CPER_PROC_VALID_BRAND_INFO 0x0080
  201. #define CPER_PROC_VALID_ID 0x0100
  202. #define CPER_PROC_VALID_TARGET_ADDRESS 0x0200
  203. #define CPER_PROC_VALID_REQUESTOR_ID 0x0400
  204. #define CPER_PROC_VALID_RESPONDER_ID 0x0800
  205. #define CPER_PROC_VALID_IP 0x1000
  206. #define CPER_MEM_VALID_ERROR_STATUS 0x0001
  207. #define CPER_MEM_VALID_PA 0x0002
  208. #define CPER_MEM_VALID_PA_MASK 0x0004
  209. #define CPER_MEM_VALID_NODE 0x0008
  210. #define CPER_MEM_VALID_CARD 0x0010
  211. #define CPER_MEM_VALID_MODULE 0x0020
  212. #define CPER_MEM_VALID_BANK 0x0040
  213. #define CPER_MEM_VALID_DEVICE 0x0080
  214. #define CPER_MEM_VALID_ROW 0x0100
  215. #define CPER_MEM_VALID_COLUMN 0x0200
  216. #define CPER_MEM_VALID_BIT_POSITION 0x0400
  217. #define CPER_MEM_VALID_REQUESTOR_ID 0x0800
  218. #define CPER_MEM_VALID_RESPONDER_ID 0x1000
  219. #define CPER_MEM_VALID_TARGET_ID 0x2000
  220. #define CPER_MEM_VALID_ERROR_TYPE 0x4000
  221. #define CPER_MEM_VALID_RANK_NUMBER 0x8000
  222. #define CPER_MEM_VALID_CARD_HANDLE 0x10000
  223. #define CPER_MEM_VALID_MODULE_HANDLE 0x20000
  224. #define CPER_PCIE_VALID_PORT_TYPE 0x0001
  225. #define CPER_PCIE_VALID_VERSION 0x0002
  226. #define CPER_PCIE_VALID_COMMAND_STATUS 0x0004
  227. #define CPER_PCIE_VALID_DEVICE_ID 0x0008
  228. #define CPER_PCIE_VALID_SERIAL_NUMBER 0x0010
  229. #define CPER_PCIE_VALID_BRIDGE_CONTROL_STATUS 0x0020
  230. #define CPER_PCIE_VALID_CAPABILITY 0x0040
  231. #define CPER_PCIE_VALID_AER_INFO 0x0080
  232. #define CPER_PCIE_SLOT_SHIFT 3
  233. /*
  234. * All tables and structs must be byte-packed to match CPER
  235. * specification, since the tables are provided by the system BIOS
  236. */
  237. #pragma pack(1)
  238. struct cper_record_header {
  239. char signature[CPER_SIG_SIZE]; /* must be CPER_SIG_RECORD */
  240. __u16 revision; /* must be CPER_RECORD_REV */
  241. __u32 signature_end; /* must be CPER_SIG_END */
  242. __u16 section_count;
  243. __u32 error_severity;
  244. __u32 validation_bits;
  245. __u32 record_length;
  246. __u64 timestamp;
  247. uuid_le platform_id;
  248. uuid_le partition_id;
  249. uuid_le creator_id;
  250. uuid_le notification_type;
  251. __u64 record_id;
  252. __u32 flags;
  253. __u64 persistence_information;
  254. __u8 reserved[12]; /* must be zero */
  255. };
  256. struct cper_section_descriptor {
  257. __u32 section_offset; /* Offset in bytes of the
  258. * section body from the base
  259. * of the record header */
  260. __u32 section_length;
  261. __u16 revision; /* must be CPER_RECORD_REV */
  262. __u8 validation_bits;
  263. __u8 reserved; /* must be zero */
  264. __u32 flags;
  265. uuid_le section_type;
  266. uuid_le fru_id;
  267. __u32 section_severity;
  268. __u8 fru_text[20];
  269. };
  270. /* Generic Processor Error Section */
  271. struct cper_sec_proc_generic {
  272. __u64 validation_bits;
  273. __u8 proc_type;
  274. __u8 proc_isa;
  275. __u8 proc_error_type;
  276. __u8 operation;
  277. __u8 flags;
  278. __u8 level;
  279. __u16 reserved;
  280. __u64 cpu_version;
  281. char cpu_brand[128];
  282. __u64 proc_id;
  283. __u64 target_addr;
  284. __u64 requestor_id;
  285. __u64 responder_id;
  286. __u64 ip;
  287. };
  288. /* IA32/X64 Processor Error Section */
  289. struct cper_sec_proc_ia {
  290. __u64 validation_bits;
  291. __u8 lapic_id;
  292. __u8 cpuid[48];
  293. };
  294. /* IA32/X64 Processor Error Information Structure */
  295. struct cper_ia_err_info {
  296. uuid_le err_type;
  297. __u64 validation_bits;
  298. __u64 check_info;
  299. __u64 target_id;
  300. __u64 requestor_id;
  301. __u64 responder_id;
  302. __u64 ip;
  303. };
  304. /* IA32/X64 Processor Context Information Structure */
  305. struct cper_ia_proc_ctx {
  306. __u16 reg_ctx_type;
  307. __u16 reg_arr_size;
  308. __u32 msr_addr;
  309. __u64 mm_reg_addr;
  310. };
  311. /* Memory Error Section */
  312. struct cper_sec_mem_err {
  313. __u64 validation_bits;
  314. __u64 error_status;
  315. __u64 physical_addr;
  316. __u64 physical_addr_mask;
  317. __u16 node;
  318. __u16 card;
  319. __u16 module;
  320. __u16 bank;
  321. __u16 device;
  322. __u16 row;
  323. __u16 column;
  324. __u16 bit_pos;
  325. __u64 requestor_id;
  326. __u64 responder_id;
  327. __u64 target_id;
  328. __u8 error_type;
  329. __u8 reserved;
  330. __u16 rank;
  331. __u16 mem_array_handle; /* card handle in UEFI 2.4 */
  332. __u16 mem_dev_handle; /* module handle in UEFI 2.4 */
  333. };
  334. struct cper_sec_pcie {
  335. __u64 validation_bits;
  336. __u32 port_type;
  337. struct {
  338. __u8 minor;
  339. __u8 major;
  340. __u8 reserved[2];
  341. } version;
  342. __u16 command;
  343. __u16 status;
  344. __u32 reserved;
  345. struct {
  346. __u16 vendor_id;
  347. __u16 device_id;
  348. __u8 class_code[3];
  349. __u8 function;
  350. __u8 device;
  351. __u16 segment;
  352. __u8 bus;
  353. __u8 secondary_bus;
  354. __u16 slot;
  355. __u8 reserved;
  356. } device_id;
  357. struct {
  358. __u32 lower;
  359. __u32 upper;
  360. } serial_number;
  361. struct {
  362. __u16 secondary_status;
  363. __u16 control;
  364. } bridge;
  365. __u8 capability[60];
  366. __u8 aer_info[96];
  367. };
  368. /* Reset to default packing */
  369. #pragma pack()
  370. u64 cper_next_record_id(void);
  371. void cper_print_bits(const char *prefix, unsigned int bits,
  372. const char * const strs[], unsigned int strs_size);
  373. #endif