mtd.c 17 KB

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  1. /****************************************************************************
  2. * Driver for Solarflare Solarstorm network controllers and boards
  3. * Copyright 2005-2006 Fen Systems Ltd.
  4. * Copyright 2006-2010 Solarflare Communications Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published
  8. * by the Free Software Foundation, incorporated herein by reference.
  9. */
  10. #include <linux/bitops.h>
  11. #include <linux/module.h>
  12. #include <linux/mtd/mtd.h>
  13. #include <linux/delay.h>
  14. #include <linux/slab.h>
  15. #include <linux/rtnetlink.h>
  16. #include "net_driver.h"
  17. #include "spi.h"
  18. #include "efx.h"
  19. #include "nic.h"
  20. #include "mcdi.h"
  21. #include "mcdi_pcol.h"
  22. #define FALCON_SPI_VERIFY_BUF_LEN 16
  23. struct efx_mtd_partition {
  24. struct list_head node;
  25. struct mtd_info mtd;
  26. const char *dev_type_name;
  27. const char *type_name;
  28. char name[IFNAMSIZ + 20];
  29. };
  30. struct falcon_mtd_partition {
  31. struct efx_mtd_partition common;
  32. const struct falcon_spi_device *spi;
  33. size_t offset;
  34. };
  35. struct efx_mtd_ops {
  36. void (*rename)(struct efx_mtd_partition *part);
  37. int (*read)(struct mtd_info *mtd, loff_t start, size_t len,
  38. size_t *retlen, u8 *buffer);
  39. int (*erase)(struct mtd_info *mtd, loff_t start, size_t len);
  40. int (*write)(struct mtd_info *mtd, loff_t start, size_t len,
  41. size_t *retlen, const u8 *buffer);
  42. int (*sync)(struct mtd_info *mtd);
  43. };
  44. #define to_efx_mtd_partition(mtd) \
  45. container_of(mtd, struct efx_mtd_partition, mtd)
  46. #define to_falcon_mtd_partition(mtd) \
  47. container_of(mtd, struct falcon_mtd_partition, common.mtd)
  48. static int falcon_mtd_probe(struct efx_nic *efx);
  49. static int siena_mtd_probe(struct efx_nic *efx);
  50. /* SPI utilities */
  51. static int
  52. falcon_spi_slow_wait(struct falcon_mtd_partition *part, bool uninterruptible)
  53. {
  54. const struct falcon_spi_device *spi = part->spi;
  55. struct efx_nic *efx = part->common.mtd.priv;
  56. u8 status;
  57. int rc, i;
  58. /* Wait up to 4s for flash/EEPROM to finish a slow operation. */
  59. for (i = 0; i < 40; i++) {
  60. __set_current_state(uninterruptible ?
  61. TASK_UNINTERRUPTIBLE : TASK_INTERRUPTIBLE);
  62. schedule_timeout(HZ / 10);
  63. rc = falcon_spi_cmd(efx, spi, SPI_RDSR, -1, NULL,
  64. &status, sizeof(status));
  65. if (rc)
  66. return rc;
  67. if (!(status & SPI_STATUS_NRDY))
  68. return 0;
  69. if (signal_pending(current))
  70. return -EINTR;
  71. }
  72. pr_err("%s: timed out waiting for %s\n",
  73. part->common.name, part->common.dev_type_name);
  74. return -ETIMEDOUT;
  75. }
  76. static int
  77. falcon_spi_unlock(struct efx_nic *efx, const struct falcon_spi_device *spi)
  78. {
  79. const u8 unlock_mask = (SPI_STATUS_BP2 | SPI_STATUS_BP1 |
  80. SPI_STATUS_BP0);
  81. u8 status;
  82. int rc;
  83. rc = falcon_spi_cmd(efx, spi, SPI_RDSR, -1, NULL,
  84. &status, sizeof(status));
  85. if (rc)
  86. return rc;
  87. if (!(status & unlock_mask))
  88. return 0; /* already unlocked */
  89. rc = falcon_spi_cmd(efx, spi, SPI_WREN, -1, NULL, NULL, 0);
  90. if (rc)
  91. return rc;
  92. rc = falcon_spi_cmd(efx, spi, SPI_SST_EWSR, -1, NULL, NULL, 0);
  93. if (rc)
  94. return rc;
  95. status &= ~unlock_mask;
  96. rc = falcon_spi_cmd(efx, spi, SPI_WRSR, -1, &status,
  97. NULL, sizeof(status));
  98. if (rc)
  99. return rc;
  100. rc = falcon_spi_wait_write(efx, spi);
  101. if (rc)
  102. return rc;
  103. return 0;
  104. }
  105. static int
  106. falcon_spi_erase(struct falcon_mtd_partition *part, loff_t start, size_t len)
  107. {
  108. const struct falcon_spi_device *spi = part->spi;
  109. struct efx_nic *efx = part->common.mtd.priv;
  110. unsigned pos, block_len;
  111. u8 empty[FALCON_SPI_VERIFY_BUF_LEN];
  112. u8 buffer[FALCON_SPI_VERIFY_BUF_LEN];
  113. int rc;
  114. if (len != spi->erase_size)
  115. return -EINVAL;
  116. if (spi->erase_command == 0)
  117. return -EOPNOTSUPP;
  118. rc = falcon_spi_unlock(efx, spi);
  119. if (rc)
  120. return rc;
  121. rc = falcon_spi_cmd(efx, spi, SPI_WREN, -1, NULL, NULL, 0);
  122. if (rc)
  123. return rc;
  124. rc = falcon_spi_cmd(efx, spi, spi->erase_command, start, NULL,
  125. NULL, 0);
  126. if (rc)
  127. return rc;
  128. rc = falcon_spi_slow_wait(part, false);
  129. /* Verify the entire region has been wiped */
  130. memset(empty, 0xff, sizeof(empty));
  131. for (pos = 0; pos < len; pos += block_len) {
  132. block_len = min(len - pos, sizeof(buffer));
  133. rc = falcon_spi_read(efx, spi, start + pos, block_len,
  134. NULL, buffer);
  135. if (rc)
  136. return rc;
  137. if (memcmp(empty, buffer, block_len))
  138. return -EIO;
  139. /* Avoid locking up the system */
  140. cond_resched();
  141. if (signal_pending(current))
  142. return -EINTR;
  143. }
  144. return rc;
  145. }
  146. /* MTD interface */
  147. static int efx_mtd_erase(struct mtd_info *mtd, struct erase_info *erase)
  148. {
  149. struct efx_nic *efx = mtd->priv;
  150. int rc;
  151. rc = efx->mtd_ops->erase(mtd, erase->addr, erase->len);
  152. if (rc == 0) {
  153. erase->state = MTD_ERASE_DONE;
  154. } else {
  155. erase->state = MTD_ERASE_FAILED;
  156. erase->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
  157. }
  158. mtd_erase_callback(erase);
  159. return rc;
  160. }
  161. static void efx_mtd_sync(struct mtd_info *mtd)
  162. {
  163. struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
  164. struct efx_nic *efx = mtd->priv;
  165. int rc;
  166. rc = efx->mtd_ops->sync(mtd);
  167. if (rc)
  168. pr_err("%s: %s sync failed (%d)\n",
  169. part->name, part->dev_type_name, rc);
  170. }
  171. static void efx_mtd_remove_partition(struct efx_mtd_partition *part)
  172. {
  173. int rc;
  174. for (;;) {
  175. rc = mtd_device_unregister(&part->mtd);
  176. if (rc != -EBUSY)
  177. break;
  178. ssleep(1);
  179. }
  180. WARN_ON(rc);
  181. list_del(&part->node);
  182. }
  183. static void efx_mtd_rename_partition(struct efx_mtd_partition *part)
  184. {
  185. struct efx_nic *efx = part->mtd.priv;
  186. efx->mtd_ops->rename(part);
  187. }
  188. static int efx_mtd_add(struct efx_nic *efx, struct efx_mtd_partition *parts,
  189. size_t n_parts, size_t sizeof_part)
  190. {
  191. struct efx_mtd_partition *part;
  192. size_t i;
  193. for (i = 0; i < n_parts; i++) {
  194. part = (struct efx_mtd_partition *)((char *)parts +
  195. i * sizeof_part);
  196. part->mtd.writesize = 1;
  197. part->mtd.owner = THIS_MODULE;
  198. part->mtd.priv = efx;
  199. part->mtd.name = part->name;
  200. part->mtd._erase = efx_mtd_erase;
  201. part->mtd._read = efx->mtd_ops->read;
  202. part->mtd._write = efx->mtd_ops->write;
  203. part->mtd._sync = efx_mtd_sync;
  204. efx_mtd_rename_partition(part);
  205. if (mtd_device_register(&part->mtd, NULL, 0))
  206. goto fail;
  207. /* Add to list in order - efx_mtd_remove() depends on this */
  208. list_add_tail(&part->node, &efx->mtd_list);
  209. }
  210. return 0;
  211. fail:
  212. while (i--) {
  213. part = (struct efx_mtd_partition *)((char *)parts +
  214. i * sizeof_part);
  215. efx_mtd_remove_partition(part);
  216. }
  217. /* Failure is unlikely here, but probably means we're out of memory */
  218. return -ENOMEM;
  219. }
  220. void efx_mtd_remove(struct efx_nic *efx)
  221. {
  222. struct efx_mtd_partition *parts, *part, *next;
  223. WARN_ON(efx_dev_registered(efx));
  224. if (list_empty(&efx->mtd_list))
  225. return;
  226. parts = list_first_entry(&efx->mtd_list, struct efx_mtd_partition,
  227. node);
  228. list_for_each_entry_safe(part, next, &efx->mtd_list, node)
  229. efx_mtd_remove_partition(part);
  230. kfree(parts);
  231. }
  232. void efx_mtd_rename(struct efx_nic *efx)
  233. {
  234. struct efx_mtd_partition *part;
  235. ASSERT_RTNL();
  236. list_for_each_entry(part, &efx->mtd_list, node)
  237. efx_mtd_rename_partition(part);
  238. }
  239. int efx_mtd_probe(struct efx_nic *efx)
  240. {
  241. if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0)
  242. return siena_mtd_probe(efx);
  243. else
  244. return falcon_mtd_probe(efx);
  245. }
  246. /* Implementation of MTD operations for Falcon */
  247. static void falcon_mtd_rename(struct efx_mtd_partition *part)
  248. {
  249. struct efx_nic *efx = part->mtd.priv;
  250. snprintf(part->name, sizeof(part->name), "%s %s",
  251. efx->name, part->type_name);
  252. }
  253. static int falcon_mtd_read(struct mtd_info *mtd, loff_t start,
  254. size_t len, size_t *retlen, u8 *buffer)
  255. {
  256. struct falcon_mtd_partition *part = to_falcon_mtd_partition(mtd);
  257. struct efx_nic *efx = mtd->priv;
  258. struct falcon_nic_data *nic_data = efx->nic_data;
  259. int rc;
  260. rc = mutex_lock_interruptible(&nic_data->spi_lock);
  261. if (rc)
  262. return rc;
  263. rc = falcon_spi_read(efx, part->spi, part->offset + start,
  264. len, retlen, buffer);
  265. mutex_unlock(&nic_data->spi_lock);
  266. return rc;
  267. }
  268. static int falcon_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
  269. {
  270. struct falcon_mtd_partition *part = to_falcon_mtd_partition(mtd);
  271. struct efx_nic *efx = mtd->priv;
  272. struct falcon_nic_data *nic_data = efx->nic_data;
  273. int rc;
  274. rc = mutex_lock_interruptible(&nic_data->spi_lock);
  275. if (rc)
  276. return rc;
  277. rc = falcon_spi_erase(part, part->offset + start, len);
  278. mutex_unlock(&nic_data->spi_lock);
  279. return rc;
  280. }
  281. static int falcon_mtd_write(struct mtd_info *mtd, loff_t start,
  282. size_t len, size_t *retlen, const u8 *buffer)
  283. {
  284. struct falcon_mtd_partition *part = to_falcon_mtd_partition(mtd);
  285. struct efx_nic *efx = mtd->priv;
  286. struct falcon_nic_data *nic_data = efx->nic_data;
  287. int rc;
  288. rc = mutex_lock_interruptible(&nic_data->spi_lock);
  289. if (rc)
  290. return rc;
  291. rc = falcon_spi_write(efx, part->spi, part->offset + start,
  292. len, retlen, buffer);
  293. mutex_unlock(&nic_data->spi_lock);
  294. return rc;
  295. }
  296. static int falcon_mtd_sync(struct mtd_info *mtd)
  297. {
  298. struct falcon_mtd_partition *part = to_falcon_mtd_partition(mtd);
  299. struct efx_nic *efx = mtd->priv;
  300. struct falcon_nic_data *nic_data = efx->nic_data;
  301. int rc;
  302. mutex_lock(&nic_data->spi_lock);
  303. rc = falcon_spi_slow_wait(part, true);
  304. mutex_unlock(&nic_data->spi_lock);
  305. return rc;
  306. }
  307. static const struct efx_mtd_ops falcon_mtd_ops = {
  308. .rename = falcon_mtd_rename,
  309. .read = falcon_mtd_read,
  310. .erase = falcon_mtd_erase,
  311. .write = falcon_mtd_write,
  312. .sync = falcon_mtd_sync,
  313. };
  314. static int falcon_mtd_probe(struct efx_nic *efx)
  315. {
  316. struct falcon_nic_data *nic_data = efx->nic_data;
  317. struct falcon_mtd_partition *parts;
  318. struct falcon_spi_device *spi;
  319. size_t n_parts;
  320. int rc = -ENODEV;
  321. ASSERT_RTNL();
  322. efx->mtd_ops = &falcon_mtd_ops;
  323. /* Allocate space for maximum number of partitions */
  324. parts = kcalloc(2, sizeof(*parts), GFP_KERNEL);
  325. n_parts = 0;
  326. spi = &nic_data->spi_flash;
  327. if (falcon_spi_present(spi) && spi->size > FALCON_FLASH_BOOTCODE_START) {
  328. parts[n_parts].spi = spi;
  329. parts[n_parts].offset = FALCON_FLASH_BOOTCODE_START;
  330. parts[n_parts].common.dev_type_name = "flash";
  331. parts[n_parts].common.type_name = "sfc_flash_bootrom";
  332. parts[n_parts].common.mtd.type = MTD_NORFLASH;
  333. parts[n_parts].common.mtd.flags = MTD_CAP_NORFLASH;
  334. parts[n_parts].common.mtd.size = spi->size - FALCON_FLASH_BOOTCODE_START;
  335. parts[n_parts].common.mtd.erasesize = spi->erase_size;
  336. n_parts++;
  337. }
  338. spi = &nic_data->spi_eeprom;
  339. if (falcon_spi_present(spi) && spi->size > FALCON_EEPROM_BOOTCONFIG_START) {
  340. parts[n_parts].spi = spi;
  341. parts[n_parts].offset = FALCON_EEPROM_BOOTCONFIG_START;
  342. parts[n_parts].common.dev_type_name = "EEPROM";
  343. parts[n_parts].common.type_name = "sfc_bootconfig";
  344. parts[n_parts].common.mtd.type = MTD_RAM;
  345. parts[n_parts].common.mtd.flags = MTD_CAP_RAM;
  346. parts[n_parts].common.mtd.size =
  347. min(spi->size, FALCON_EEPROM_BOOTCONFIG_END) -
  348. FALCON_EEPROM_BOOTCONFIG_START;
  349. parts[n_parts].common.mtd.erasesize = spi->erase_size;
  350. n_parts++;
  351. }
  352. rc = efx_mtd_add(efx, &parts[0].common, n_parts, sizeof(*parts));
  353. if (rc)
  354. kfree(parts);
  355. return rc;
  356. }
  357. /* Implementation of MTD operations for Siena */
  358. struct efx_mcdi_mtd_partition {
  359. struct efx_mtd_partition common;
  360. bool updating;
  361. u8 nvram_type;
  362. u16 fw_subtype;
  363. };
  364. #define to_efx_mcdi_mtd_partition(mtd) \
  365. container_of(mtd, struct efx_mcdi_mtd_partition, common.mtd)
  366. static void siena_mtd_rename(struct efx_mtd_partition *part)
  367. {
  368. struct efx_mcdi_mtd_partition *mcdi_part =
  369. container_of(part, struct efx_mcdi_mtd_partition, common);
  370. struct efx_nic *efx = part->mtd.priv;
  371. snprintf(part->name, sizeof(part->name), "%s %s:%02x",
  372. efx->name, part->type_name, mcdi_part->fw_subtype);
  373. }
  374. static int siena_mtd_read(struct mtd_info *mtd, loff_t start,
  375. size_t len, size_t *retlen, u8 *buffer)
  376. {
  377. struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
  378. struct efx_nic *efx = mtd->priv;
  379. loff_t offset = start;
  380. loff_t end = min_t(loff_t, start + len, mtd->size);
  381. size_t chunk;
  382. int rc = 0;
  383. while (offset < end) {
  384. chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
  385. rc = efx_mcdi_nvram_read(efx, part->nvram_type, offset,
  386. buffer, chunk);
  387. if (rc)
  388. goto out;
  389. offset += chunk;
  390. buffer += chunk;
  391. }
  392. out:
  393. *retlen = offset - start;
  394. return rc;
  395. }
  396. static int siena_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
  397. {
  398. struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
  399. struct efx_nic *efx = mtd->priv;
  400. loff_t offset = start & ~((loff_t)(mtd->erasesize - 1));
  401. loff_t end = min_t(loff_t, start + len, mtd->size);
  402. size_t chunk = part->common.mtd.erasesize;
  403. int rc = 0;
  404. if (!part->updating) {
  405. rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
  406. if (rc)
  407. goto out;
  408. part->updating = true;
  409. }
  410. /* The MCDI interface can in fact do multiple erase blocks at once;
  411. * but erasing may be slow, so we make multiple calls here to avoid
  412. * tripping the MCDI RPC timeout. */
  413. while (offset < end) {
  414. rc = efx_mcdi_nvram_erase(efx, part->nvram_type, offset,
  415. chunk);
  416. if (rc)
  417. goto out;
  418. offset += chunk;
  419. }
  420. out:
  421. return rc;
  422. }
  423. static int siena_mtd_write(struct mtd_info *mtd, loff_t start,
  424. size_t len, size_t *retlen, const u8 *buffer)
  425. {
  426. struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
  427. struct efx_nic *efx = mtd->priv;
  428. loff_t offset = start;
  429. loff_t end = min_t(loff_t, start + len, mtd->size);
  430. size_t chunk;
  431. int rc = 0;
  432. if (!part->updating) {
  433. rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
  434. if (rc)
  435. goto out;
  436. part->updating = true;
  437. }
  438. while (offset < end) {
  439. chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
  440. rc = efx_mcdi_nvram_write(efx, part->nvram_type, offset,
  441. buffer, chunk);
  442. if (rc)
  443. goto out;
  444. offset += chunk;
  445. buffer += chunk;
  446. }
  447. out:
  448. *retlen = offset - start;
  449. return rc;
  450. }
  451. static int siena_mtd_sync(struct mtd_info *mtd)
  452. {
  453. struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
  454. struct efx_nic *efx = mtd->priv;
  455. int rc = 0;
  456. if (part->updating) {
  457. part->updating = false;
  458. rc = efx_mcdi_nvram_update_finish(efx, part->nvram_type);
  459. }
  460. return rc;
  461. }
  462. static const struct efx_mtd_ops siena_mtd_ops = {
  463. .rename = siena_mtd_rename,
  464. .read = siena_mtd_read,
  465. .erase = siena_mtd_erase,
  466. .write = siena_mtd_write,
  467. .sync = siena_mtd_sync,
  468. };
  469. struct siena_nvram_type_info {
  470. int port;
  471. const char *name;
  472. };
  473. static const struct siena_nvram_type_info siena_nvram_types[] = {
  474. [MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO] = { 0, "sfc_dummy_phy" },
  475. [MC_CMD_NVRAM_TYPE_MC_FW] = { 0, "sfc_mcfw" },
  476. [MC_CMD_NVRAM_TYPE_MC_FW_BACKUP] = { 0, "sfc_mcfw_backup" },
  477. [MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT0] = { 0, "sfc_static_cfg" },
  478. [MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT1] = { 1, "sfc_static_cfg" },
  479. [MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0] = { 0, "sfc_dynamic_cfg" },
  480. [MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1] = { 1, "sfc_dynamic_cfg" },
  481. [MC_CMD_NVRAM_TYPE_EXP_ROM] = { 0, "sfc_exp_rom" },
  482. [MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT0] = { 0, "sfc_exp_rom_cfg" },
  483. [MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT1] = { 1, "sfc_exp_rom_cfg" },
  484. [MC_CMD_NVRAM_TYPE_PHY_PORT0] = { 0, "sfc_phy_fw" },
  485. [MC_CMD_NVRAM_TYPE_PHY_PORT1] = { 1, "sfc_phy_fw" },
  486. [MC_CMD_NVRAM_TYPE_FPGA] = { 0, "sfc_fpga" },
  487. };
  488. static int siena_mtd_probe_partition(struct efx_nic *efx,
  489. struct efx_mcdi_mtd_partition *part,
  490. unsigned int type)
  491. {
  492. const struct siena_nvram_type_info *info;
  493. size_t size, erase_size;
  494. bool protected;
  495. int rc;
  496. if (type >= ARRAY_SIZE(siena_nvram_types) ||
  497. siena_nvram_types[type].name == NULL)
  498. return -ENODEV;
  499. info = &siena_nvram_types[type];
  500. if (info->port != efx_port_num(efx))
  501. return -ENODEV;
  502. rc = efx_mcdi_nvram_info(efx, type, &size, &erase_size, &protected);
  503. if (rc)
  504. return rc;
  505. if (protected)
  506. return -ENODEV; /* hide it */
  507. part->nvram_type = type;
  508. part->common.dev_type_name = "Siena NVRAM manager";
  509. part->common.type_name = info->name;
  510. part->common.mtd.type = MTD_NORFLASH;
  511. part->common.mtd.flags = MTD_CAP_NORFLASH;
  512. part->common.mtd.size = size;
  513. part->common.mtd.erasesize = erase_size;
  514. return 0;
  515. }
  516. static int siena_mtd_get_fw_subtypes(struct efx_nic *efx,
  517. struct efx_mcdi_mtd_partition *parts,
  518. size_t n_parts)
  519. {
  520. uint16_t fw_subtype_list[
  521. MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM];
  522. size_t i;
  523. int rc;
  524. rc = efx_mcdi_get_board_cfg(efx, NULL, fw_subtype_list, NULL);
  525. if (rc)
  526. return rc;
  527. for (i = 0; i < n_parts; i++)
  528. parts[i].fw_subtype = fw_subtype_list[parts[i].nvram_type];
  529. return 0;
  530. }
  531. static int siena_mtd_probe(struct efx_nic *efx)
  532. {
  533. struct efx_mcdi_mtd_partition *parts;
  534. u32 nvram_types;
  535. unsigned int type;
  536. size_t n_parts;
  537. int rc;
  538. ASSERT_RTNL();
  539. efx->mtd_ops = &siena_mtd_ops;
  540. rc = efx_mcdi_nvram_types(efx, &nvram_types);
  541. if (rc)
  542. return rc;
  543. parts = kcalloc(hweight32(nvram_types), sizeof(*parts), GFP_KERNEL);
  544. if (!parts)
  545. return -ENOMEM;
  546. type = 0;
  547. n_parts = 0;
  548. while (nvram_types != 0) {
  549. if (nvram_types & 1) {
  550. rc = siena_mtd_probe_partition(efx, &parts[n_parts],
  551. type);
  552. if (rc == 0)
  553. n_parts++;
  554. else if (rc != -ENODEV)
  555. goto fail;
  556. }
  557. type++;
  558. nvram_types >>= 1;
  559. }
  560. rc = siena_mtd_get_fw_subtypes(efx, parts, n_parts);
  561. if (rc)
  562. goto fail;
  563. rc = efx_mtd_add(efx, &parts[0].common, n_parts, sizeof(*parts));
  564. fail:
  565. if (rc)
  566. kfree(parts);
  567. return rc;
  568. }