dcscb.c 5.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208
  1. /*
  2. * arch/arm/mach-vexpress/dcscb.c - Dual Cluster System Configuration Block
  3. *
  4. * Created by: Nicolas Pitre, May 2012
  5. * Copyright: (C) 2012-2013 Linaro Limited
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/kernel.h>
  13. #include <linux/io.h>
  14. #include <linux/spinlock.h>
  15. #include <linux/errno.h>
  16. #include <linux/of_address.h>
  17. #include <linux/vexpress.h>
  18. #include <asm/mcpm.h>
  19. #include <asm/proc-fns.h>
  20. #include <asm/cacheflush.h>
  21. #include <asm/cputype.h>
  22. #include <asm/cp15.h>
  23. #define RST_HOLD0 0x0
  24. #define RST_HOLD1 0x4
  25. #define SYS_SWRESET 0x8
  26. #define RST_STAT0 0xc
  27. #define RST_STAT1 0x10
  28. #define EAG_CFG_R 0x20
  29. #define EAG_CFG_W 0x24
  30. #define KFC_CFG_R 0x28
  31. #define KFC_CFG_W 0x2c
  32. #define DCS_CFG_R 0x30
  33. /*
  34. * We can't use regular spinlocks. In the switcher case, it is possible
  35. * for an outbound CPU to call power_down() while its inbound counterpart
  36. * is already live using the same logical CPU number which trips lockdep
  37. * debugging.
  38. */
  39. static arch_spinlock_t dcscb_lock = __ARCH_SPIN_LOCK_UNLOCKED;
  40. static void __iomem *dcscb_base;
  41. static int dcscb_use_count[4][2];
  42. static int dcscb_power_up(unsigned int cpu, unsigned int cluster)
  43. {
  44. unsigned int rst_hold, cpumask = (1 << cpu);
  45. pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);
  46. if (cpu >= 4 || cluster >= 2)
  47. return -EINVAL;
  48. /*
  49. * Since this is called with IRQs enabled, and no arch_spin_lock_irq
  50. * variant exists, we need to disable IRQs manually here.
  51. */
  52. local_irq_disable();
  53. arch_spin_lock(&dcscb_lock);
  54. dcscb_use_count[cpu][cluster]++;
  55. if (dcscb_use_count[cpu][cluster] == 1) {
  56. rst_hold = readl_relaxed(dcscb_base + RST_HOLD0 + cluster * 4);
  57. if (rst_hold & (1 << 8)) {
  58. /* remove cluster reset and add individual CPU's reset */
  59. rst_hold &= ~(1 << 8);
  60. rst_hold |= 0xf;
  61. }
  62. rst_hold &= ~(cpumask | (cpumask << 4));
  63. writel_relaxed(rst_hold, dcscb_base + RST_HOLD0 + cluster * 4);
  64. } else if (dcscb_use_count[cpu][cluster] != 2) {
  65. /*
  66. * The only possible values are:
  67. * 0 = CPU down
  68. * 1 = CPU (still) up
  69. * 2 = CPU requested to be up before it had a chance
  70. * to actually make itself down.
  71. * Any other value is a bug.
  72. */
  73. BUG();
  74. }
  75. arch_spin_unlock(&dcscb_lock);
  76. local_irq_enable();
  77. return 0;
  78. }
  79. static void dcscb_power_down(void)
  80. {
  81. unsigned int mpidr, cpu, cluster, rst_hold, cpumask;
  82. bool last_man = false, skip_wfi = false;
  83. mpidr = read_cpuid_mpidr();
  84. cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
  85. cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
  86. cpumask = (1 << cpu);
  87. pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);
  88. BUG_ON(cpu >= 4 || cluster >= 2);
  89. arch_spin_lock(&dcscb_lock);
  90. dcscb_use_count[cpu][cluster]--;
  91. if (dcscb_use_count[cpu][cluster] == 0) {
  92. rst_hold = readl_relaxed(dcscb_base + RST_HOLD0 + cluster * 4);
  93. rst_hold |= cpumask;
  94. if (((rst_hold | (rst_hold >> 4)) & 0xf) == 0xf) {
  95. rst_hold |= (1 << 8);
  96. last_man = true;
  97. }
  98. writel_relaxed(rst_hold, dcscb_base + RST_HOLD0 + cluster * 4);
  99. } else if (dcscb_use_count[cpu][cluster] == 1) {
  100. /*
  101. * A power_up request went ahead of us.
  102. * Even if we do not want to shut this CPU down,
  103. * the caller expects a certain state as if the WFI
  104. * was aborted. So let's continue with cache cleaning.
  105. */
  106. skip_wfi = true;
  107. } else
  108. BUG();
  109. arch_spin_unlock(&dcscb_lock);
  110. /*
  111. * Now let's clean our L1 cache and shut ourself down.
  112. * If we're the last CPU in this cluster then clean L2 too.
  113. */
  114. /*
  115. * A15/A7 can hit in the cache with SCTLR.C=0, so we don't need
  116. * a preliminary flush here for those CPUs. At least, that's
  117. * the theory -- without the extra flush, Linux explodes on
  118. * RTSM (to be investigated)..
  119. */
  120. flush_cache_louis();
  121. set_cr(get_cr() & ~CR_C);
  122. if (!last_man) {
  123. flush_cache_louis();
  124. } else {
  125. flush_cache_all();
  126. outer_flush_all();
  127. }
  128. /* Disable local coherency by clearing the ACTLR "SMP" bit: */
  129. set_auxcr(get_auxcr() & ~(1 << 6));
  130. /* Now we are prepared for power-down, do it: */
  131. dsb();
  132. if (!skip_wfi)
  133. wfi();
  134. /* Not dead at this point? Let our caller cope. */
  135. }
  136. static const struct mcpm_platform_ops dcscb_power_ops = {
  137. .power_up = dcscb_power_up,
  138. .power_down = dcscb_power_down,
  139. };
  140. static void __init dcscb_usage_count_init(void)
  141. {
  142. unsigned int mpidr, cpu, cluster;
  143. mpidr = read_cpuid_mpidr();
  144. cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
  145. cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
  146. pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);
  147. BUG_ON(cpu >= 4 || cluster >= 2);
  148. dcscb_use_count[cpu][cluster] = 1;
  149. }
  150. static int __init dcscb_init(void)
  151. {
  152. struct device_node *node;
  153. int ret;
  154. node = of_find_compatible_node(NULL, NULL, "arm,rtsm,dcscb");
  155. if (!node)
  156. return -ENODEV;
  157. dcscb_base = of_iomap(node, 0);
  158. if (!dcscb_base)
  159. return -EADDRNOTAVAIL;
  160. dcscb_usage_count_init();
  161. ret = mcpm_platform_register(&dcscb_power_ops);
  162. if (ret) {
  163. iounmap(dcscb_base);
  164. return ret;
  165. }
  166. pr_info("VExpress DCSCB support installed\n");
  167. /*
  168. * Future entries into the kernel can now go
  169. * through the cluster entry vectors.
  170. */
  171. vexpress_flags_set(virt_to_phys(mcpm_entry_point));
  172. return 0;
  173. }
  174. early_initcall(dcscb_init);