nvc0_fence.c 6.6 KB

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  1. /*
  2. * Copyright 2012 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Ben Skeggs
  23. */
  24. #include <core/object.h>
  25. #include <core/client.h>
  26. #include <core/class.h>
  27. #include <engine/fifo.h>
  28. #include "nouveau_drm.h"
  29. #include "nouveau_dma.h"
  30. #include "nouveau_fence.h"
  31. #include "nv50_display.h"
  32. struct nvc0_fence_priv {
  33. struct nouveau_fence_priv base;
  34. struct nouveau_bo *bo;
  35. u32 *suspend;
  36. };
  37. struct nvc0_fence_chan {
  38. struct nouveau_fence_chan base;
  39. struct nouveau_vma vma;
  40. struct nouveau_vma dispc_vma[4];
  41. };
  42. u64
  43. nvc0_fence_crtc(struct nouveau_channel *chan, int crtc)
  44. {
  45. struct nvc0_fence_chan *fctx = chan->fence;
  46. return fctx->dispc_vma[crtc].offset;
  47. }
  48. static int
  49. nvc0_fence_emit(struct nouveau_fence *fence)
  50. {
  51. struct nouveau_channel *chan = fence->channel;
  52. struct nvc0_fence_chan *fctx = chan->fence;
  53. struct nouveau_fifo_chan *fifo = (void *)chan->object;
  54. u64 addr = fctx->vma.offset + fifo->chid * 16;
  55. int ret;
  56. ret = RING_SPACE(chan, 5);
  57. if (ret == 0) {
  58. BEGIN_NVC0(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);
  59. OUT_RING (chan, upper_32_bits(addr));
  60. OUT_RING (chan, lower_32_bits(addr));
  61. OUT_RING (chan, fence->sequence);
  62. OUT_RING (chan, NV84_SUBCHAN_SEMAPHORE_TRIGGER_WRITE_LONG);
  63. FIRE_RING (chan);
  64. }
  65. return ret;
  66. }
  67. static int
  68. nvc0_fence_sync(struct nouveau_fence *fence,
  69. struct nouveau_channel *prev, struct nouveau_channel *chan)
  70. {
  71. struct nvc0_fence_chan *fctx = chan->fence;
  72. struct nouveau_fifo_chan *fifo = (void *)prev->object;
  73. u64 addr = fctx->vma.offset + fifo->chid * 16;
  74. int ret;
  75. ret = RING_SPACE(chan, 5);
  76. if (ret == 0) {
  77. BEGIN_NVC0(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);
  78. OUT_RING (chan, upper_32_bits(addr));
  79. OUT_RING (chan, lower_32_bits(addr));
  80. OUT_RING (chan, fence->sequence);
  81. OUT_RING (chan, NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_GEQUAL |
  82. NVC0_SUBCHAN_SEMAPHORE_TRIGGER_YIELD);
  83. FIRE_RING (chan);
  84. }
  85. return ret;
  86. }
  87. static u32
  88. nvc0_fence_read(struct nouveau_channel *chan)
  89. {
  90. struct nouveau_fifo_chan *fifo = (void *)chan->object;
  91. struct nvc0_fence_priv *priv = chan->drm->fence;
  92. return nouveau_bo_rd32(priv->bo, fifo->chid * 16/4);
  93. }
  94. static void
  95. nvc0_fence_context_del(struct nouveau_channel *chan)
  96. {
  97. struct drm_device *dev = chan->drm->dev;
  98. struct nvc0_fence_priv *priv = chan->drm->fence;
  99. struct nvc0_fence_chan *fctx = chan->fence;
  100. int i;
  101. if (nv_device(chan->drm->device)->card_type >= NV_D0) {
  102. for (i = 0; i < dev->mode_config.num_crtc; i++) {
  103. struct nouveau_bo *bo = nvd0_display_crtc_sema(dev, i);
  104. nouveau_bo_vma_del(bo, &fctx->dispc_vma[i]);
  105. }
  106. } else
  107. if (nv_device(chan->drm->device)->card_type >= NV_50) {
  108. for (i = 0; i < dev->mode_config.num_crtc; i++) {
  109. struct nouveau_bo *bo = nv50_display_crtc_sema(dev, i);
  110. nouveau_bo_vma_del(bo, &fctx->dispc_vma[i]);
  111. }
  112. }
  113. nouveau_bo_vma_del(priv->bo, &fctx->vma);
  114. nouveau_fence_context_del(&fctx->base);
  115. chan->fence = NULL;
  116. kfree(fctx);
  117. }
  118. static int
  119. nvc0_fence_context_new(struct nouveau_channel *chan)
  120. {
  121. struct nouveau_fifo_chan *fifo = (void *)chan->object;
  122. struct nouveau_client *client = nouveau_client(fifo);
  123. struct nvc0_fence_priv *priv = chan->drm->fence;
  124. struct nvc0_fence_chan *fctx;
  125. int ret, i;
  126. fctx = chan->fence = kzalloc(sizeof(*fctx), GFP_KERNEL);
  127. if (!fctx)
  128. return -ENOMEM;
  129. nouveau_fence_context_new(&fctx->base);
  130. ret = nouveau_bo_vma_add(priv->bo, client->vm, &fctx->vma);
  131. if (ret)
  132. nvc0_fence_context_del(chan);
  133. /* map display semaphore buffers into channel's vm */
  134. for (i = 0; !ret && i < chan->drm->dev->mode_config.num_crtc; i++) {
  135. struct nouveau_bo *bo;
  136. if (nv_device(chan->drm->device)->card_type >= NV_D0)
  137. bo = nvd0_display_crtc_sema(chan->drm->dev, i);
  138. else
  139. bo = nv50_display_crtc_sema(chan->drm->dev, i);
  140. ret = nouveau_bo_vma_add(bo, client->vm, &fctx->dispc_vma[i]);
  141. }
  142. nouveau_bo_wr32(priv->bo, fifo->chid * 16/4, 0x00000000);
  143. return ret;
  144. }
  145. static bool
  146. nvc0_fence_suspend(struct nouveau_drm *drm)
  147. {
  148. struct nouveau_fifo *pfifo = nouveau_fifo(drm->device);
  149. struct nvc0_fence_priv *priv = drm->fence;
  150. int i;
  151. priv->suspend = vmalloc((pfifo->max + 1) * sizeof(u32));
  152. if (priv->suspend) {
  153. for (i = 0; i <= pfifo->max; i++)
  154. priv->suspend[i] = nouveau_bo_rd32(priv->bo, i);
  155. }
  156. return priv->suspend != NULL;
  157. }
  158. static void
  159. nvc0_fence_resume(struct nouveau_drm *drm)
  160. {
  161. struct nouveau_fifo *pfifo = nouveau_fifo(drm->device);
  162. struct nvc0_fence_priv *priv = drm->fence;
  163. int i;
  164. if (priv->suspend) {
  165. for (i = 0; i <= pfifo->max; i++)
  166. nouveau_bo_wr32(priv->bo, i, priv->suspend[i]);
  167. vfree(priv->suspend);
  168. priv->suspend = NULL;
  169. }
  170. }
  171. static void
  172. nvc0_fence_destroy(struct nouveau_drm *drm)
  173. {
  174. struct nvc0_fence_priv *priv = drm->fence;
  175. nouveau_bo_unmap(priv->bo);
  176. nouveau_bo_ref(NULL, &priv->bo);
  177. drm->fence = NULL;
  178. kfree(priv);
  179. }
  180. int
  181. nvc0_fence_create(struct nouveau_drm *drm)
  182. {
  183. struct nouveau_fifo *pfifo = nouveau_fifo(drm->device);
  184. struct nvc0_fence_priv *priv;
  185. int ret;
  186. priv = drm->fence = kzalloc(sizeof(*priv), GFP_KERNEL);
  187. if (!priv)
  188. return -ENOMEM;
  189. priv->base.dtor = nvc0_fence_destroy;
  190. priv->base.suspend = nvc0_fence_suspend;
  191. priv->base.resume = nvc0_fence_resume;
  192. priv->base.context_new = nvc0_fence_context_new;
  193. priv->base.context_del = nvc0_fence_context_del;
  194. priv->base.emit = nvc0_fence_emit;
  195. priv->base.sync = nvc0_fence_sync;
  196. priv->base.read = nvc0_fence_read;
  197. ret = nouveau_bo_new(drm->dev, 16 * (pfifo->max + 1), 0,
  198. TTM_PL_FLAG_VRAM, 0, 0, NULL, &priv->bo);
  199. if (ret == 0) {
  200. ret = nouveau_bo_pin(priv->bo, TTM_PL_FLAG_VRAM);
  201. if (ret == 0)
  202. ret = nouveau_bo_map(priv->bo);
  203. if (ret)
  204. nouveau_bo_ref(NULL, &priv->bo);
  205. }
  206. if (ret)
  207. nvc0_fence_destroy(drm);
  208. return ret;
  209. }