intel_sdvo.c 82 KB

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  1. /*
  2. * Copyright 2006 Dave Airlie <airlied@linux.ie>
  3. * Copyright © 2006-2007 Intel Corporation
  4. * Jesse Barnes <jesse.barnes@intel.com>
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the next
  14. * paragraph) shall be included in all copies or substantial portions of the
  15. * Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23. * DEALINGS IN THE SOFTWARE.
  24. *
  25. * Authors:
  26. * Eric Anholt <eric@anholt.net>
  27. */
  28. #include <linux/i2c.h>
  29. #include <linux/slab.h>
  30. #include <linux/delay.h>
  31. #include <linux/export.h>
  32. #include <drm/drmP.h>
  33. #include <drm/drm_crtc.h>
  34. #include <drm/drm_edid.h>
  35. #include "intel_drv.h"
  36. #include <drm/i915_drm.h>
  37. #include "i915_drv.h"
  38. #include "intel_sdvo_regs.h"
  39. #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  40. #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  41. #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  42. #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  43. #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  44. SDVO_TV_MASK)
  45. #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
  46. #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
  47. #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
  48. #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  49. #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  50. static const char *tv_format_names[] = {
  51. "NTSC_M" , "NTSC_J" , "NTSC_443",
  52. "PAL_B" , "PAL_D" , "PAL_G" ,
  53. "PAL_H" , "PAL_I" , "PAL_M" ,
  54. "PAL_N" , "PAL_NC" , "PAL_60" ,
  55. "SECAM_B" , "SECAM_D" , "SECAM_G" ,
  56. "SECAM_K" , "SECAM_K1", "SECAM_L" ,
  57. "SECAM_60"
  58. };
  59. #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
  60. struct intel_sdvo {
  61. struct intel_encoder base;
  62. struct i2c_adapter *i2c;
  63. u8 slave_addr;
  64. struct i2c_adapter ddc;
  65. /* Register for the SDVO device: SDVOB or SDVOC */
  66. uint32_t sdvo_reg;
  67. /* Active outputs controlled by this SDVO output */
  68. uint16_t controlled_output;
  69. /*
  70. * Capabilities of the SDVO device returned by
  71. * i830_sdvo_get_capabilities()
  72. */
  73. struct intel_sdvo_caps caps;
  74. /* Pixel clock limitations reported by the SDVO device, in kHz */
  75. int pixel_clock_min, pixel_clock_max;
  76. /*
  77. * For multiple function SDVO device,
  78. * this is for current attached outputs.
  79. */
  80. uint16_t attached_output;
  81. /*
  82. * Hotplug activation bits for this device
  83. */
  84. uint16_t hotplug_active;
  85. /**
  86. * This is used to select the color range of RBG outputs in HDMI mode.
  87. * It is only valid when using TMDS encoding and 8 bit per color mode.
  88. */
  89. uint32_t color_range;
  90. /**
  91. * This is set if we're going to treat the device as TV-out.
  92. *
  93. * While we have these nice friendly flags for output types that ought
  94. * to decide this for us, the S-Video output on our HDMI+S-Video card
  95. * shows up as RGB1 (VGA).
  96. */
  97. bool is_tv;
  98. /* On different gens SDVOB is at different places. */
  99. bool is_sdvob;
  100. /* This is for current tv format name */
  101. int tv_format_index;
  102. /**
  103. * This is set if we treat the device as HDMI, instead of DVI.
  104. */
  105. bool is_hdmi;
  106. bool has_hdmi_monitor;
  107. bool has_hdmi_audio;
  108. /**
  109. * This is set if we detect output of sdvo device as LVDS and
  110. * have a valid fixed mode to use with the panel.
  111. */
  112. bool is_lvds;
  113. /**
  114. * This is sdvo fixed pannel mode pointer
  115. */
  116. struct drm_display_mode *sdvo_lvds_fixed_mode;
  117. /* DDC bus used by this SDVO encoder */
  118. uint8_t ddc_bus;
  119. };
  120. struct intel_sdvo_connector {
  121. struct intel_connector base;
  122. /* Mark the type of connector */
  123. uint16_t output_flag;
  124. enum hdmi_force_audio force_audio;
  125. /* This contains all current supported TV format */
  126. u8 tv_format_supported[TV_FORMAT_NUM];
  127. int format_supported_num;
  128. struct drm_property *tv_format;
  129. /* add the property for the SDVO-TV */
  130. struct drm_property *left;
  131. struct drm_property *right;
  132. struct drm_property *top;
  133. struct drm_property *bottom;
  134. struct drm_property *hpos;
  135. struct drm_property *vpos;
  136. struct drm_property *contrast;
  137. struct drm_property *saturation;
  138. struct drm_property *hue;
  139. struct drm_property *sharpness;
  140. struct drm_property *flicker_filter;
  141. struct drm_property *flicker_filter_adaptive;
  142. struct drm_property *flicker_filter_2d;
  143. struct drm_property *tv_chroma_filter;
  144. struct drm_property *tv_luma_filter;
  145. struct drm_property *dot_crawl;
  146. /* add the property for the SDVO-TV/LVDS */
  147. struct drm_property *brightness;
  148. /* Add variable to record current setting for the above property */
  149. u32 left_margin, right_margin, top_margin, bottom_margin;
  150. /* this is to get the range of margin.*/
  151. u32 max_hscan, max_vscan;
  152. u32 max_hpos, cur_hpos;
  153. u32 max_vpos, cur_vpos;
  154. u32 cur_brightness, max_brightness;
  155. u32 cur_contrast, max_contrast;
  156. u32 cur_saturation, max_saturation;
  157. u32 cur_hue, max_hue;
  158. u32 cur_sharpness, max_sharpness;
  159. u32 cur_flicker_filter, max_flicker_filter;
  160. u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
  161. u32 cur_flicker_filter_2d, max_flicker_filter_2d;
  162. u32 cur_tv_chroma_filter, max_tv_chroma_filter;
  163. u32 cur_tv_luma_filter, max_tv_luma_filter;
  164. u32 cur_dot_crawl, max_dot_crawl;
  165. };
  166. static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
  167. {
  168. return container_of(encoder, struct intel_sdvo, base.base);
  169. }
  170. static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
  171. {
  172. return container_of(intel_attached_encoder(connector),
  173. struct intel_sdvo, base);
  174. }
  175. static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
  176. {
  177. return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
  178. }
  179. static bool
  180. intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
  181. static bool
  182. intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
  183. struct intel_sdvo_connector *intel_sdvo_connector,
  184. int type);
  185. static bool
  186. intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
  187. struct intel_sdvo_connector *intel_sdvo_connector);
  188. /**
  189. * Writes the SDVOB or SDVOC with the given value, but always writes both
  190. * SDVOB and SDVOC to work around apparent hardware issues (according to
  191. * comments in the BIOS).
  192. */
  193. static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
  194. {
  195. struct drm_device *dev = intel_sdvo->base.base.dev;
  196. struct drm_i915_private *dev_priv = dev->dev_private;
  197. u32 bval = val, cval = val;
  198. int i;
  199. if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
  200. I915_WRITE(intel_sdvo->sdvo_reg, val);
  201. I915_READ(intel_sdvo->sdvo_reg);
  202. return;
  203. }
  204. if (intel_sdvo->sdvo_reg == SDVOB) {
  205. cval = I915_READ(SDVOC);
  206. } else {
  207. bval = I915_READ(SDVOB);
  208. }
  209. /*
  210. * Write the registers twice for luck. Sometimes,
  211. * writing them only once doesn't appear to 'stick'.
  212. * The BIOS does this too. Yay, magic
  213. */
  214. for (i = 0; i < 2; i++)
  215. {
  216. I915_WRITE(SDVOB, bval);
  217. I915_READ(SDVOB);
  218. I915_WRITE(SDVOC, cval);
  219. I915_READ(SDVOC);
  220. }
  221. }
  222. static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
  223. {
  224. struct i2c_msg msgs[] = {
  225. {
  226. .addr = intel_sdvo->slave_addr,
  227. .flags = 0,
  228. .len = 1,
  229. .buf = &addr,
  230. },
  231. {
  232. .addr = intel_sdvo->slave_addr,
  233. .flags = I2C_M_RD,
  234. .len = 1,
  235. .buf = ch,
  236. }
  237. };
  238. int ret;
  239. if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
  240. return true;
  241. DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
  242. return false;
  243. }
  244. #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
  245. /** Mapping of command numbers to names, for debug output */
  246. static const struct _sdvo_cmd_name {
  247. u8 cmd;
  248. const char *name;
  249. } sdvo_cmd_names[] = {
  250. SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
  251. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
  252. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
  253. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
  254. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
  255. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
  256. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
  257. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
  258. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
  259. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
  260. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
  261. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
  262. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
  263. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
  264. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
  265. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
  266. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
  267. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
  268. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
  269. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
  270. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
  271. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
  272. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
  273. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
  274. SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
  275. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
  276. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
  277. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
  278. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
  279. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
  280. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
  281. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
  282. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
  283. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
  284. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
  285. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
  286. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
  287. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
  288. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
  289. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
  290. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
  291. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
  292. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
  293. /* Add the op code for SDVO enhancements */
  294. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
  295. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
  296. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
  297. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
  298. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
  299. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
  300. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
  301. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
  302. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
  303. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
  304. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
  305. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
  306. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
  307. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
  308. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
  309. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
  310. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
  311. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
  312. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
  313. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
  314. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
  315. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
  316. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
  317. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
  318. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
  319. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
  320. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
  321. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
  322. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
  323. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
  324. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
  325. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
  326. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
  327. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
  328. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
  329. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
  330. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
  331. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
  332. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
  333. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
  334. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
  335. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
  336. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
  337. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
  338. /* HDMI op code */
  339. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
  340. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
  341. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
  342. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
  343. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
  344. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
  345. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
  346. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
  347. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
  348. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
  349. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
  350. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
  351. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
  352. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
  353. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
  354. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
  355. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
  356. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
  357. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
  358. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
  359. };
  360. #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
  361. static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
  362. const void *args, int args_len)
  363. {
  364. int i;
  365. DRM_DEBUG_KMS("%s: W: %02X ",
  366. SDVO_NAME(intel_sdvo), cmd);
  367. for (i = 0; i < args_len; i++)
  368. DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
  369. for (; i < 8; i++)
  370. DRM_LOG_KMS(" ");
  371. for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
  372. if (cmd == sdvo_cmd_names[i].cmd) {
  373. DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
  374. break;
  375. }
  376. }
  377. if (i == ARRAY_SIZE(sdvo_cmd_names))
  378. DRM_LOG_KMS("(%02X)", cmd);
  379. DRM_LOG_KMS("\n");
  380. }
  381. static const char *cmd_status_names[] = {
  382. "Power on",
  383. "Success",
  384. "Not supported",
  385. "Invalid arg",
  386. "Pending",
  387. "Target not specified",
  388. "Scaling not supported"
  389. };
  390. static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
  391. const void *args, int args_len)
  392. {
  393. u8 *buf, status;
  394. struct i2c_msg *msgs;
  395. int i, ret = true;
  396. /* Would be simpler to allocate both in one go ? */
  397. buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL);
  398. if (!buf)
  399. return false;
  400. msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
  401. if (!msgs) {
  402. kfree(buf);
  403. return false;
  404. }
  405. intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
  406. for (i = 0; i < args_len; i++) {
  407. msgs[i].addr = intel_sdvo->slave_addr;
  408. msgs[i].flags = 0;
  409. msgs[i].len = 2;
  410. msgs[i].buf = buf + 2 *i;
  411. buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
  412. buf[2*i + 1] = ((u8*)args)[i];
  413. }
  414. msgs[i].addr = intel_sdvo->slave_addr;
  415. msgs[i].flags = 0;
  416. msgs[i].len = 2;
  417. msgs[i].buf = buf + 2*i;
  418. buf[2*i + 0] = SDVO_I2C_OPCODE;
  419. buf[2*i + 1] = cmd;
  420. /* the following two are to read the response */
  421. status = SDVO_I2C_CMD_STATUS;
  422. msgs[i+1].addr = intel_sdvo->slave_addr;
  423. msgs[i+1].flags = 0;
  424. msgs[i+1].len = 1;
  425. msgs[i+1].buf = &status;
  426. msgs[i+2].addr = intel_sdvo->slave_addr;
  427. msgs[i+2].flags = I2C_M_RD;
  428. msgs[i+2].len = 1;
  429. msgs[i+2].buf = &status;
  430. ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
  431. if (ret < 0) {
  432. DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
  433. ret = false;
  434. goto out;
  435. }
  436. if (ret != i+3) {
  437. /* failure in I2C transfer */
  438. DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
  439. ret = false;
  440. }
  441. out:
  442. kfree(msgs);
  443. kfree(buf);
  444. return ret;
  445. }
  446. static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
  447. void *response, int response_len)
  448. {
  449. u8 retry = 5;
  450. u8 status;
  451. int i;
  452. DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
  453. /*
  454. * The documentation states that all commands will be
  455. * processed within 15µs, and that we need only poll
  456. * the status byte a maximum of 3 times in order for the
  457. * command to be complete.
  458. *
  459. * Check 5 times in case the hardware failed to read the docs.
  460. */
  461. if (!intel_sdvo_read_byte(intel_sdvo,
  462. SDVO_I2C_CMD_STATUS,
  463. &status))
  464. goto log_fail;
  465. while (status == SDVO_CMD_STATUS_PENDING && retry--) {
  466. udelay(15);
  467. if (!intel_sdvo_read_byte(intel_sdvo,
  468. SDVO_I2C_CMD_STATUS,
  469. &status))
  470. goto log_fail;
  471. }
  472. if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
  473. DRM_LOG_KMS("(%s)", cmd_status_names[status]);
  474. else
  475. DRM_LOG_KMS("(??? %d)", status);
  476. if (status != SDVO_CMD_STATUS_SUCCESS)
  477. goto log_fail;
  478. /* Read the command response */
  479. for (i = 0; i < response_len; i++) {
  480. if (!intel_sdvo_read_byte(intel_sdvo,
  481. SDVO_I2C_RETURN_0 + i,
  482. &((u8 *)response)[i]))
  483. goto log_fail;
  484. DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
  485. }
  486. DRM_LOG_KMS("\n");
  487. return true;
  488. log_fail:
  489. DRM_LOG_KMS("... failed\n");
  490. return false;
  491. }
  492. static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
  493. {
  494. if (mode->clock >= 100000)
  495. return 1;
  496. else if (mode->clock >= 50000)
  497. return 2;
  498. else
  499. return 4;
  500. }
  501. static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
  502. u8 ddc_bus)
  503. {
  504. /* This must be the immediately preceding write before the i2c xfer */
  505. return intel_sdvo_write_cmd(intel_sdvo,
  506. SDVO_CMD_SET_CONTROL_BUS_SWITCH,
  507. &ddc_bus, 1);
  508. }
  509. static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
  510. {
  511. if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
  512. return false;
  513. return intel_sdvo_read_response(intel_sdvo, NULL, 0);
  514. }
  515. static bool
  516. intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
  517. {
  518. if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
  519. return false;
  520. return intel_sdvo_read_response(intel_sdvo, value, len);
  521. }
  522. static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
  523. {
  524. struct intel_sdvo_set_target_input_args targets = {0};
  525. return intel_sdvo_set_value(intel_sdvo,
  526. SDVO_CMD_SET_TARGET_INPUT,
  527. &targets, sizeof(targets));
  528. }
  529. /**
  530. * Return whether each input is trained.
  531. *
  532. * This function is making an assumption about the layout of the response,
  533. * which should be checked against the docs.
  534. */
  535. static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
  536. {
  537. struct intel_sdvo_get_trained_inputs_response response;
  538. BUILD_BUG_ON(sizeof(response) != 1);
  539. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
  540. &response, sizeof(response)))
  541. return false;
  542. *input_1 = response.input0_trained;
  543. *input_2 = response.input1_trained;
  544. return true;
  545. }
  546. static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
  547. u16 outputs)
  548. {
  549. return intel_sdvo_set_value(intel_sdvo,
  550. SDVO_CMD_SET_ACTIVE_OUTPUTS,
  551. &outputs, sizeof(outputs));
  552. }
  553. static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
  554. u16 *outputs)
  555. {
  556. return intel_sdvo_get_value(intel_sdvo,
  557. SDVO_CMD_GET_ACTIVE_OUTPUTS,
  558. outputs, sizeof(*outputs));
  559. }
  560. static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
  561. int mode)
  562. {
  563. u8 state = SDVO_ENCODER_STATE_ON;
  564. switch (mode) {
  565. case DRM_MODE_DPMS_ON:
  566. state = SDVO_ENCODER_STATE_ON;
  567. break;
  568. case DRM_MODE_DPMS_STANDBY:
  569. state = SDVO_ENCODER_STATE_STANDBY;
  570. break;
  571. case DRM_MODE_DPMS_SUSPEND:
  572. state = SDVO_ENCODER_STATE_SUSPEND;
  573. break;
  574. case DRM_MODE_DPMS_OFF:
  575. state = SDVO_ENCODER_STATE_OFF;
  576. break;
  577. }
  578. return intel_sdvo_set_value(intel_sdvo,
  579. SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
  580. }
  581. static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
  582. int *clock_min,
  583. int *clock_max)
  584. {
  585. struct intel_sdvo_pixel_clock_range clocks;
  586. BUILD_BUG_ON(sizeof(clocks) != 4);
  587. if (!intel_sdvo_get_value(intel_sdvo,
  588. SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
  589. &clocks, sizeof(clocks)))
  590. return false;
  591. /* Convert the values from units of 10 kHz to kHz. */
  592. *clock_min = clocks.min * 10;
  593. *clock_max = clocks.max * 10;
  594. return true;
  595. }
  596. static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
  597. u16 outputs)
  598. {
  599. return intel_sdvo_set_value(intel_sdvo,
  600. SDVO_CMD_SET_TARGET_OUTPUT,
  601. &outputs, sizeof(outputs));
  602. }
  603. static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
  604. struct intel_sdvo_dtd *dtd)
  605. {
  606. return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
  607. intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
  608. }
  609. static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
  610. struct intel_sdvo_dtd *dtd)
  611. {
  612. return intel_sdvo_set_timing(intel_sdvo,
  613. SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
  614. }
  615. static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
  616. struct intel_sdvo_dtd *dtd)
  617. {
  618. return intel_sdvo_set_timing(intel_sdvo,
  619. SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
  620. }
  621. static bool
  622. intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
  623. uint16_t clock,
  624. uint16_t width,
  625. uint16_t height)
  626. {
  627. struct intel_sdvo_preferred_input_timing_args args;
  628. memset(&args, 0, sizeof(args));
  629. args.clock = clock;
  630. args.width = width;
  631. args.height = height;
  632. args.interlace = 0;
  633. if (intel_sdvo->is_lvds &&
  634. (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
  635. intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
  636. args.scaled = 1;
  637. return intel_sdvo_set_value(intel_sdvo,
  638. SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
  639. &args, sizeof(args));
  640. }
  641. static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
  642. struct intel_sdvo_dtd *dtd)
  643. {
  644. BUILD_BUG_ON(sizeof(dtd->part1) != 8);
  645. BUILD_BUG_ON(sizeof(dtd->part2) != 8);
  646. return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
  647. &dtd->part1, sizeof(dtd->part1)) &&
  648. intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
  649. &dtd->part2, sizeof(dtd->part2));
  650. }
  651. static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
  652. {
  653. return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
  654. }
  655. static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
  656. const struct drm_display_mode *mode)
  657. {
  658. uint16_t width, height;
  659. uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
  660. uint16_t h_sync_offset, v_sync_offset;
  661. int mode_clock;
  662. width = mode->hdisplay;
  663. height = mode->vdisplay;
  664. /* do some mode translations */
  665. h_blank_len = mode->htotal - mode->hdisplay;
  666. h_sync_len = mode->hsync_end - mode->hsync_start;
  667. v_blank_len = mode->vtotal - mode->vdisplay;
  668. v_sync_len = mode->vsync_end - mode->vsync_start;
  669. h_sync_offset = mode->hsync_start - mode->hdisplay;
  670. v_sync_offset = mode->vsync_start - mode->vdisplay;
  671. mode_clock = mode->clock;
  672. mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
  673. mode_clock /= 10;
  674. dtd->part1.clock = mode_clock;
  675. dtd->part1.h_active = width & 0xff;
  676. dtd->part1.h_blank = h_blank_len & 0xff;
  677. dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
  678. ((h_blank_len >> 8) & 0xf);
  679. dtd->part1.v_active = height & 0xff;
  680. dtd->part1.v_blank = v_blank_len & 0xff;
  681. dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
  682. ((v_blank_len >> 8) & 0xf);
  683. dtd->part2.h_sync_off = h_sync_offset & 0xff;
  684. dtd->part2.h_sync_width = h_sync_len & 0xff;
  685. dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
  686. (v_sync_len & 0xf);
  687. dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
  688. ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
  689. ((v_sync_len & 0x30) >> 4);
  690. dtd->part2.dtd_flags = 0x18;
  691. if (mode->flags & DRM_MODE_FLAG_INTERLACE)
  692. dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
  693. if (mode->flags & DRM_MODE_FLAG_PHSYNC)
  694. dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
  695. if (mode->flags & DRM_MODE_FLAG_PVSYNC)
  696. dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
  697. dtd->part2.sdvo_flags = 0;
  698. dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
  699. dtd->part2.reserved = 0;
  700. }
  701. static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
  702. const struct intel_sdvo_dtd *dtd)
  703. {
  704. mode->hdisplay = dtd->part1.h_active;
  705. mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
  706. mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
  707. mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
  708. mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
  709. mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
  710. mode->htotal = mode->hdisplay + dtd->part1.h_blank;
  711. mode->htotal += (dtd->part1.h_high & 0xf) << 8;
  712. mode->vdisplay = dtd->part1.v_active;
  713. mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
  714. mode->vsync_start = mode->vdisplay;
  715. mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
  716. mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
  717. mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
  718. mode->vsync_end = mode->vsync_start +
  719. (dtd->part2.v_sync_off_width & 0xf);
  720. mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
  721. mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
  722. mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
  723. mode->clock = dtd->part1.clock * 10;
  724. mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
  725. if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
  726. mode->flags |= DRM_MODE_FLAG_INTERLACE;
  727. if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
  728. mode->flags |= DRM_MODE_FLAG_PHSYNC;
  729. if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
  730. mode->flags |= DRM_MODE_FLAG_PVSYNC;
  731. }
  732. static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
  733. {
  734. struct intel_sdvo_encode encode;
  735. BUILD_BUG_ON(sizeof(encode) != 2);
  736. return intel_sdvo_get_value(intel_sdvo,
  737. SDVO_CMD_GET_SUPP_ENCODE,
  738. &encode, sizeof(encode));
  739. }
  740. static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
  741. uint8_t mode)
  742. {
  743. return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
  744. }
  745. static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
  746. uint8_t mode)
  747. {
  748. return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
  749. }
  750. #if 0
  751. static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
  752. {
  753. int i, j;
  754. uint8_t set_buf_index[2];
  755. uint8_t av_split;
  756. uint8_t buf_size;
  757. uint8_t buf[48];
  758. uint8_t *pos;
  759. intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
  760. for (i = 0; i <= av_split; i++) {
  761. set_buf_index[0] = i; set_buf_index[1] = 0;
  762. intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
  763. set_buf_index, 2);
  764. intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
  765. intel_sdvo_read_response(encoder, &buf_size, 1);
  766. pos = buf;
  767. for (j = 0; j <= buf_size; j += 8) {
  768. intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
  769. NULL, 0);
  770. intel_sdvo_read_response(encoder, pos, 8);
  771. pos += 8;
  772. }
  773. }
  774. }
  775. #endif
  776. static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
  777. {
  778. struct dip_infoframe avi_if = {
  779. .type = DIP_TYPE_AVI,
  780. .ver = DIP_VERSION_AVI,
  781. .len = DIP_LEN_AVI,
  782. };
  783. uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
  784. uint8_t set_buf_index[2] = { 1, 0 };
  785. uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
  786. uint64_t *data = (uint64_t *)sdvo_data;
  787. unsigned i;
  788. intel_dip_infoframe_csum(&avi_if);
  789. /* sdvo spec says that the ecc is handled by the hw, and it looks like
  790. * we must not send the ecc field, either. */
  791. memcpy(sdvo_data, &avi_if, 3);
  792. sdvo_data[3] = avi_if.checksum;
  793. memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
  794. if (!intel_sdvo_set_value(intel_sdvo,
  795. SDVO_CMD_SET_HBUF_INDEX,
  796. set_buf_index, 2))
  797. return false;
  798. for (i = 0; i < sizeof(sdvo_data); i += 8) {
  799. if (!intel_sdvo_set_value(intel_sdvo,
  800. SDVO_CMD_SET_HBUF_DATA,
  801. data, 8))
  802. return false;
  803. data++;
  804. }
  805. return intel_sdvo_set_value(intel_sdvo,
  806. SDVO_CMD_SET_HBUF_TXRATE,
  807. &tx_rate, 1);
  808. }
  809. static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
  810. {
  811. struct intel_sdvo_tv_format format;
  812. uint32_t format_map;
  813. format_map = 1 << intel_sdvo->tv_format_index;
  814. memset(&format, 0, sizeof(format));
  815. memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
  816. BUILD_BUG_ON(sizeof(format) != 6);
  817. return intel_sdvo_set_value(intel_sdvo,
  818. SDVO_CMD_SET_TV_FORMAT,
  819. &format, sizeof(format));
  820. }
  821. static bool
  822. intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
  823. const struct drm_display_mode *mode)
  824. {
  825. struct intel_sdvo_dtd output_dtd;
  826. if (!intel_sdvo_set_target_output(intel_sdvo,
  827. intel_sdvo->attached_output))
  828. return false;
  829. intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
  830. if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
  831. return false;
  832. return true;
  833. }
  834. /* Asks the sdvo controller for the preferred input mode given the output mode.
  835. * Unfortunately we have to set up the full output mode to do that. */
  836. static bool
  837. intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
  838. const struct drm_display_mode *mode,
  839. struct drm_display_mode *adjusted_mode)
  840. {
  841. struct intel_sdvo_dtd input_dtd;
  842. /* Reset the input timing to the screen. Assume always input 0. */
  843. if (!intel_sdvo_set_target_input(intel_sdvo))
  844. return false;
  845. if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
  846. mode->clock / 10,
  847. mode->hdisplay,
  848. mode->vdisplay))
  849. return false;
  850. if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
  851. &input_dtd))
  852. return false;
  853. intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
  854. return true;
  855. }
  856. static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
  857. const struct drm_display_mode *mode,
  858. struct drm_display_mode *adjusted_mode)
  859. {
  860. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  861. int multiplier;
  862. /* We need to construct preferred input timings based on our
  863. * output timings. To do that, we have to set the output
  864. * timings, even though this isn't really the right place in
  865. * the sequence to do it. Oh well.
  866. */
  867. if (intel_sdvo->is_tv) {
  868. if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
  869. return false;
  870. (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
  871. mode,
  872. adjusted_mode);
  873. } else if (intel_sdvo->is_lvds) {
  874. if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
  875. intel_sdvo->sdvo_lvds_fixed_mode))
  876. return false;
  877. (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
  878. mode,
  879. adjusted_mode);
  880. }
  881. /* Make the CRTC code factor in the SDVO pixel multiplier. The
  882. * SDVO device will factor out the multiplier during mode_set.
  883. */
  884. multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
  885. intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
  886. return true;
  887. }
  888. static void intel_sdvo_mode_set(struct drm_encoder *encoder,
  889. struct drm_display_mode *mode,
  890. struct drm_display_mode *adjusted_mode)
  891. {
  892. struct drm_device *dev = encoder->dev;
  893. struct drm_i915_private *dev_priv = dev->dev_private;
  894. struct drm_crtc *crtc = encoder->crtc;
  895. struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  896. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  897. u32 sdvox;
  898. struct intel_sdvo_in_out_map in_out;
  899. struct intel_sdvo_dtd input_dtd, output_dtd;
  900. int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
  901. int rate;
  902. if (!mode)
  903. return;
  904. /* First, set the input mapping for the first input to our controlled
  905. * output. This is only correct if we're a single-input device, in
  906. * which case the first input is the output from the appropriate SDVO
  907. * channel on the motherboard. In a two-input device, the first input
  908. * will be SDVOB and the second SDVOC.
  909. */
  910. in_out.in0 = intel_sdvo->attached_output;
  911. in_out.in1 = 0;
  912. intel_sdvo_set_value(intel_sdvo,
  913. SDVO_CMD_SET_IN_OUT_MAP,
  914. &in_out, sizeof(in_out));
  915. /* Set the output timings to the screen */
  916. if (!intel_sdvo_set_target_output(intel_sdvo,
  917. intel_sdvo->attached_output))
  918. return;
  919. /* lvds has a special fixed output timing. */
  920. if (intel_sdvo->is_lvds)
  921. intel_sdvo_get_dtd_from_mode(&output_dtd,
  922. intel_sdvo->sdvo_lvds_fixed_mode);
  923. else
  924. intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
  925. if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
  926. DRM_INFO("Setting output timings on %s failed\n",
  927. SDVO_NAME(intel_sdvo));
  928. /* Set the input timing to the screen. Assume always input 0. */
  929. if (!intel_sdvo_set_target_input(intel_sdvo))
  930. return;
  931. if (intel_sdvo->has_hdmi_monitor) {
  932. intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
  933. intel_sdvo_set_colorimetry(intel_sdvo,
  934. SDVO_COLORIMETRY_RGB256);
  935. intel_sdvo_set_avi_infoframe(intel_sdvo);
  936. } else
  937. intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
  938. if (intel_sdvo->is_tv &&
  939. !intel_sdvo_set_tv_format(intel_sdvo))
  940. return;
  941. /* We have tried to get input timing in mode_fixup, and filled into
  942. * adjusted_mode.
  943. */
  944. intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
  945. if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
  946. DRM_INFO("Setting input timings on %s failed\n",
  947. SDVO_NAME(intel_sdvo));
  948. switch (pixel_multiplier) {
  949. default:
  950. case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
  951. case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
  952. case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
  953. }
  954. if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
  955. return;
  956. /* Set the SDVO control regs. */
  957. if (INTEL_INFO(dev)->gen >= 4) {
  958. /* The real mode polarity is set by the SDVO commands, using
  959. * struct intel_sdvo_dtd. */
  960. sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
  961. if (intel_sdvo->is_hdmi)
  962. sdvox |= intel_sdvo->color_range;
  963. if (INTEL_INFO(dev)->gen < 5)
  964. sdvox |= SDVO_BORDER_ENABLE;
  965. } else {
  966. sdvox = I915_READ(intel_sdvo->sdvo_reg);
  967. switch (intel_sdvo->sdvo_reg) {
  968. case SDVOB:
  969. sdvox &= SDVOB_PRESERVE_MASK;
  970. break;
  971. case SDVOC:
  972. sdvox &= SDVOC_PRESERVE_MASK;
  973. break;
  974. }
  975. sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
  976. }
  977. if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
  978. sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
  979. else
  980. sdvox |= TRANSCODER(intel_crtc->pipe);
  981. if (intel_sdvo->has_hdmi_audio)
  982. sdvox |= SDVO_AUDIO_ENABLE;
  983. if (INTEL_INFO(dev)->gen >= 4) {
  984. /* done in crtc_mode_set as the dpll_md reg must be written early */
  985. } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
  986. /* done in crtc_mode_set as it lives inside the dpll register */
  987. } else {
  988. sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
  989. }
  990. if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
  991. INTEL_INFO(dev)->gen < 5)
  992. sdvox |= SDVO_STALL_SELECT;
  993. intel_sdvo_write_sdvox(intel_sdvo, sdvox);
  994. }
  995. static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
  996. {
  997. struct intel_sdvo_connector *intel_sdvo_connector =
  998. to_intel_sdvo_connector(&connector->base);
  999. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
  1000. u16 active_outputs;
  1001. intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
  1002. if (active_outputs & intel_sdvo_connector->output_flag)
  1003. return true;
  1004. else
  1005. return false;
  1006. }
  1007. static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
  1008. enum pipe *pipe)
  1009. {
  1010. struct drm_device *dev = encoder->base.dev;
  1011. struct drm_i915_private *dev_priv = dev->dev_private;
  1012. struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
  1013. u32 tmp;
  1014. tmp = I915_READ(intel_sdvo->sdvo_reg);
  1015. if (!(tmp & SDVO_ENABLE))
  1016. return false;
  1017. if (HAS_PCH_CPT(dev))
  1018. *pipe = PORT_TO_PIPE_CPT(tmp);
  1019. else
  1020. *pipe = PORT_TO_PIPE(tmp);
  1021. return true;
  1022. }
  1023. static void intel_disable_sdvo(struct intel_encoder *encoder)
  1024. {
  1025. struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
  1026. struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
  1027. u32 temp;
  1028. intel_sdvo_set_active_outputs(intel_sdvo, 0);
  1029. if (0)
  1030. intel_sdvo_set_encoder_power_state(intel_sdvo,
  1031. DRM_MODE_DPMS_OFF);
  1032. temp = I915_READ(intel_sdvo->sdvo_reg);
  1033. if ((temp & SDVO_ENABLE) != 0) {
  1034. intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
  1035. }
  1036. }
  1037. static void intel_enable_sdvo(struct intel_encoder *encoder)
  1038. {
  1039. struct drm_device *dev = encoder->base.dev;
  1040. struct drm_i915_private *dev_priv = dev->dev_private;
  1041. struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
  1042. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  1043. u32 temp;
  1044. bool input1, input2;
  1045. int i;
  1046. u8 status;
  1047. temp = I915_READ(intel_sdvo->sdvo_reg);
  1048. if ((temp & SDVO_ENABLE) == 0)
  1049. intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
  1050. for (i = 0; i < 2; i++)
  1051. intel_wait_for_vblank(dev, intel_crtc->pipe);
  1052. status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
  1053. /* Warn if the device reported failure to sync.
  1054. * A lot of SDVO devices fail to notify of sync, but it's
  1055. * a given it the status is a success, we succeeded.
  1056. */
  1057. if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
  1058. DRM_DEBUG_KMS("First %s output reported failure to "
  1059. "sync\n", SDVO_NAME(intel_sdvo));
  1060. }
  1061. if (0)
  1062. intel_sdvo_set_encoder_power_state(intel_sdvo,
  1063. DRM_MODE_DPMS_ON);
  1064. intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
  1065. }
  1066. static void intel_sdvo_dpms(struct drm_connector *connector, int mode)
  1067. {
  1068. struct drm_crtc *crtc;
  1069. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1070. /* dvo supports only 2 dpms states. */
  1071. if (mode != DRM_MODE_DPMS_ON)
  1072. mode = DRM_MODE_DPMS_OFF;
  1073. if (mode == connector->dpms)
  1074. return;
  1075. connector->dpms = mode;
  1076. /* Only need to change hw state when actually enabled */
  1077. crtc = intel_sdvo->base.base.crtc;
  1078. if (!crtc) {
  1079. intel_sdvo->base.connectors_active = false;
  1080. return;
  1081. }
  1082. if (mode != DRM_MODE_DPMS_ON) {
  1083. intel_sdvo_set_active_outputs(intel_sdvo, 0);
  1084. if (0)
  1085. intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
  1086. intel_sdvo->base.connectors_active = false;
  1087. intel_crtc_update_dpms(crtc);
  1088. } else {
  1089. intel_sdvo->base.connectors_active = true;
  1090. intel_crtc_update_dpms(crtc);
  1091. if (0)
  1092. intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
  1093. intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
  1094. }
  1095. intel_modeset_check_state(connector->dev);
  1096. }
  1097. static int intel_sdvo_mode_valid(struct drm_connector *connector,
  1098. struct drm_display_mode *mode)
  1099. {
  1100. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1101. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  1102. return MODE_NO_DBLESCAN;
  1103. if (intel_sdvo->pixel_clock_min > mode->clock)
  1104. return MODE_CLOCK_LOW;
  1105. if (intel_sdvo->pixel_clock_max < mode->clock)
  1106. return MODE_CLOCK_HIGH;
  1107. if (intel_sdvo->is_lvds) {
  1108. if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
  1109. return MODE_PANEL;
  1110. if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
  1111. return MODE_PANEL;
  1112. }
  1113. return MODE_OK;
  1114. }
  1115. static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
  1116. {
  1117. BUILD_BUG_ON(sizeof(*caps) != 8);
  1118. if (!intel_sdvo_get_value(intel_sdvo,
  1119. SDVO_CMD_GET_DEVICE_CAPS,
  1120. caps, sizeof(*caps)))
  1121. return false;
  1122. DRM_DEBUG_KMS("SDVO capabilities:\n"
  1123. " vendor_id: %d\n"
  1124. " device_id: %d\n"
  1125. " device_rev_id: %d\n"
  1126. " sdvo_version_major: %d\n"
  1127. " sdvo_version_minor: %d\n"
  1128. " sdvo_inputs_mask: %d\n"
  1129. " smooth_scaling: %d\n"
  1130. " sharp_scaling: %d\n"
  1131. " up_scaling: %d\n"
  1132. " down_scaling: %d\n"
  1133. " stall_support: %d\n"
  1134. " output_flags: %d\n",
  1135. caps->vendor_id,
  1136. caps->device_id,
  1137. caps->device_rev_id,
  1138. caps->sdvo_version_major,
  1139. caps->sdvo_version_minor,
  1140. caps->sdvo_inputs_mask,
  1141. caps->smooth_scaling,
  1142. caps->sharp_scaling,
  1143. caps->up_scaling,
  1144. caps->down_scaling,
  1145. caps->stall_support,
  1146. caps->output_flags);
  1147. return true;
  1148. }
  1149. static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
  1150. {
  1151. struct drm_device *dev = intel_sdvo->base.base.dev;
  1152. uint16_t hotplug;
  1153. /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
  1154. * on the line. */
  1155. if (IS_I945G(dev) || IS_I945GM(dev))
  1156. return 0;
  1157. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
  1158. &hotplug, sizeof(hotplug)))
  1159. return 0;
  1160. return hotplug;
  1161. }
  1162. static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
  1163. {
  1164. struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
  1165. intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
  1166. &intel_sdvo->hotplug_active, 2);
  1167. }
  1168. static bool
  1169. intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
  1170. {
  1171. /* Is there more than one type of output? */
  1172. return hweight16(intel_sdvo->caps.output_flags) > 1;
  1173. }
  1174. static struct edid *
  1175. intel_sdvo_get_edid(struct drm_connector *connector)
  1176. {
  1177. struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
  1178. return drm_get_edid(connector, &sdvo->ddc);
  1179. }
  1180. /* Mac mini hack -- use the same DDC as the analog connector */
  1181. static struct edid *
  1182. intel_sdvo_get_analog_edid(struct drm_connector *connector)
  1183. {
  1184. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1185. return drm_get_edid(connector,
  1186. intel_gmbus_get_adapter(dev_priv,
  1187. dev_priv->crt_ddc_pin));
  1188. }
  1189. static enum drm_connector_status
  1190. intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
  1191. {
  1192. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1193. enum drm_connector_status status;
  1194. struct edid *edid;
  1195. edid = intel_sdvo_get_edid(connector);
  1196. if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
  1197. u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
  1198. /*
  1199. * Don't use the 1 as the argument of DDC bus switch to get
  1200. * the EDID. It is used for SDVO SPD ROM.
  1201. */
  1202. for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
  1203. intel_sdvo->ddc_bus = ddc;
  1204. edid = intel_sdvo_get_edid(connector);
  1205. if (edid)
  1206. break;
  1207. }
  1208. /*
  1209. * If we found the EDID on the other bus,
  1210. * assume that is the correct DDC bus.
  1211. */
  1212. if (edid == NULL)
  1213. intel_sdvo->ddc_bus = saved_ddc;
  1214. }
  1215. /*
  1216. * When there is no edid and no monitor is connected with VGA
  1217. * port, try to use the CRT ddc to read the EDID for DVI-connector.
  1218. */
  1219. if (edid == NULL)
  1220. edid = intel_sdvo_get_analog_edid(connector);
  1221. status = connector_status_unknown;
  1222. if (edid != NULL) {
  1223. /* DDC bus is shared, match EDID to connector type */
  1224. if (edid->input & DRM_EDID_INPUT_DIGITAL) {
  1225. status = connector_status_connected;
  1226. if (intel_sdvo->is_hdmi) {
  1227. intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
  1228. intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
  1229. }
  1230. } else
  1231. status = connector_status_disconnected;
  1232. kfree(edid);
  1233. }
  1234. if (status == connector_status_connected) {
  1235. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1236. if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
  1237. intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
  1238. }
  1239. return status;
  1240. }
  1241. static bool
  1242. intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
  1243. struct edid *edid)
  1244. {
  1245. bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
  1246. bool connector_is_digital = !!IS_DIGITAL(sdvo);
  1247. DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
  1248. connector_is_digital, monitor_is_digital);
  1249. return connector_is_digital == monitor_is_digital;
  1250. }
  1251. static enum drm_connector_status
  1252. intel_sdvo_detect(struct drm_connector *connector, bool force)
  1253. {
  1254. uint16_t response;
  1255. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1256. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1257. enum drm_connector_status ret;
  1258. if (!intel_sdvo_write_cmd(intel_sdvo,
  1259. SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
  1260. return connector_status_unknown;
  1261. /* add 30ms delay when the output type might be TV */
  1262. if (intel_sdvo->caps.output_flags & SDVO_TV_MASK)
  1263. msleep(30);
  1264. if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
  1265. return connector_status_unknown;
  1266. DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
  1267. response & 0xff, response >> 8,
  1268. intel_sdvo_connector->output_flag);
  1269. if (response == 0)
  1270. return connector_status_disconnected;
  1271. intel_sdvo->attached_output = response;
  1272. intel_sdvo->has_hdmi_monitor = false;
  1273. intel_sdvo->has_hdmi_audio = false;
  1274. if ((intel_sdvo_connector->output_flag & response) == 0)
  1275. ret = connector_status_disconnected;
  1276. else if (IS_TMDS(intel_sdvo_connector))
  1277. ret = intel_sdvo_tmds_sink_detect(connector);
  1278. else {
  1279. struct edid *edid;
  1280. /* if we have an edid check it matches the connection */
  1281. edid = intel_sdvo_get_edid(connector);
  1282. if (edid == NULL)
  1283. edid = intel_sdvo_get_analog_edid(connector);
  1284. if (edid != NULL) {
  1285. if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
  1286. edid))
  1287. ret = connector_status_connected;
  1288. else
  1289. ret = connector_status_disconnected;
  1290. kfree(edid);
  1291. } else
  1292. ret = connector_status_connected;
  1293. }
  1294. /* May update encoder flag for like clock for SDVO TV, etc.*/
  1295. if (ret == connector_status_connected) {
  1296. intel_sdvo->is_tv = false;
  1297. intel_sdvo->is_lvds = false;
  1298. intel_sdvo->base.needs_tv_clock = false;
  1299. if (response & SDVO_TV_MASK) {
  1300. intel_sdvo->is_tv = true;
  1301. intel_sdvo->base.needs_tv_clock = true;
  1302. }
  1303. if (response & SDVO_LVDS_MASK)
  1304. intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
  1305. }
  1306. return ret;
  1307. }
  1308. static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
  1309. {
  1310. struct edid *edid;
  1311. /* set the bus switch and get the modes */
  1312. edid = intel_sdvo_get_edid(connector);
  1313. /*
  1314. * Mac mini hack. On this device, the DVI-I connector shares one DDC
  1315. * link between analog and digital outputs. So, if the regular SDVO
  1316. * DDC fails, check to see if the analog output is disconnected, in
  1317. * which case we'll look there for the digital DDC data.
  1318. */
  1319. if (edid == NULL)
  1320. edid = intel_sdvo_get_analog_edid(connector);
  1321. if (edid != NULL) {
  1322. if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
  1323. edid)) {
  1324. drm_mode_connector_update_edid_property(connector, edid);
  1325. drm_add_edid_modes(connector, edid);
  1326. }
  1327. kfree(edid);
  1328. }
  1329. }
  1330. /*
  1331. * Set of SDVO TV modes.
  1332. * Note! This is in reply order (see loop in get_tv_modes).
  1333. * XXX: all 60Hz refresh?
  1334. */
  1335. static const struct drm_display_mode sdvo_tv_modes[] = {
  1336. { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
  1337. 416, 0, 200, 201, 232, 233, 0,
  1338. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1339. { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
  1340. 416, 0, 240, 241, 272, 273, 0,
  1341. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1342. { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
  1343. 496, 0, 300, 301, 332, 333, 0,
  1344. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1345. { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
  1346. 736, 0, 350, 351, 382, 383, 0,
  1347. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1348. { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
  1349. 736, 0, 400, 401, 432, 433, 0,
  1350. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1351. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
  1352. 736, 0, 480, 481, 512, 513, 0,
  1353. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1354. { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
  1355. 800, 0, 480, 481, 512, 513, 0,
  1356. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1357. { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
  1358. 800, 0, 576, 577, 608, 609, 0,
  1359. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1360. { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
  1361. 816, 0, 350, 351, 382, 383, 0,
  1362. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1363. { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
  1364. 816, 0, 400, 401, 432, 433, 0,
  1365. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1366. { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
  1367. 816, 0, 480, 481, 512, 513, 0,
  1368. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1369. { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
  1370. 816, 0, 540, 541, 572, 573, 0,
  1371. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1372. { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
  1373. 816, 0, 576, 577, 608, 609, 0,
  1374. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1375. { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
  1376. 864, 0, 576, 577, 608, 609, 0,
  1377. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1378. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
  1379. 896, 0, 600, 601, 632, 633, 0,
  1380. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1381. { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
  1382. 928, 0, 624, 625, 656, 657, 0,
  1383. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1384. { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
  1385. 1016, 0, 766, 767, 798, 799, 0,
  1386. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1387. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
  1388. 1120, 0, 768, 769, 800, 801, 0,
  1389. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1390. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
  1391. 1376, 0, 1024, 1025, 1056, 1057, 0,
  1392. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1393. };
  1394. static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
  1395. {
  1396. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1397. struct intel_sdvo_sdtv_resolution_request tv_res;
  1398. uint32_t reply = 0, format_map = 0;
  1399. int i;
  1400. /* Read the list of supported input resolutions for the selected TV
  1401. * format.
  1402. */
  1403. format_map = 1 << intel_sdvo->tv_format_index;
  1404. memcpy(&tv_res, &format_map,
  1405. min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
  1406. if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
  1407. return;
  1408. BUILD_BUG_ON(sizeof(tv_res) != 3);
  1409. if (!intel_sdvo_write_cmd(intel_sdvo,
  1410. SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
  1411. &tv_res, sizeof(tv_res)))
  1412. return;
  1413. if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
  1414. return;
  1415. for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
  1416. if (reply & (1 << i)) {
  1417. struct drm_display_mode *nmode;
  1418. nmode = drm_mode_duplicate(connector->dev,
  1419. &sdvo_tv_modes[i]);
  1420. if (nmode)
  1421. drm_mode_probed_add(connector, nmode);
  1422. }
  1423. }
  1424. static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
  1425. {
  1426. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1427. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1428. struct drm_display_mode *newmode;
  1429. /*
  1430. * Attempt to get the mode list from DDC.
  1431. * Assume that the preferred modes are
  1432. * arranged in priority order.
  1433. */
  1434. intel_ddc_get_modes(connector, intel_sdvo->i2c);
  1435. if (list_empty(&connector->probed_modes) == false)
  1436. goto end;
  1437. /* Fetch modes from VBT */
  1438. if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
  1439. newmode = drm_mode_duplicate(connector->dev,
  1440. dev_priv->sdvo_lvds_vbt_mode);
  1441. if (newmode != NULL) {
  1442. /* Guarantee the mode is preferred */
  1443. newmode->type = (DRM_MODE_TYPE_PREFERRED |
  1444. DRM_MODE_TYPE_DRIVER);
  1445. drm_mode_probed_add(connector, newmode);
  1446. }
  1447. }
  1448. end:
  1449. list_for_each_entry(newmode, &connector->probed_modes, head) {
  1450. if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
  1451. intel_sdvo->sdvo_lvds_fixed_mode =
  1452. drm_mode_duplicate(connector->dev, newmode);
  1453. intel_sdvo->is_lvds = true;
  1454. break;
  1455. }
  1456. }
  1457. }
  1458. static int intel_sdvo_get_modes(struct drm_connector *connector)
  1459. {
  1460. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1461. if (IS_TV(intel_sdvo_connector))
  1462. intel_sdvo_get_tv_modes(connector);
  1463. else if (IS_LVDS(intel_sdvo_connector))
  1464. intel_sdvo_get_lvds_modes(connector);
  1465. else
  1466. intel_sdvo_get_ddc_modes(connector);
  1467. return !list_empty(&connector->probed_modes);
  1468. }
  1469. static void
  1470. intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
  1471. {
  1472. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1473. struct drm_device *dev = connector->dev;
  1474. if (intel_sdvo_connector->left)
  1475. drm_property_destroy(dev, intel_sdvo_connector->left);
  1476. if (intel_sdvo_connector->right)
  1477. drm_property_destroy(dev, intel_sdvo_connector->right);
  1478. if (intel_sdvo_connector->top)
  1479. drm_property_destroy(dev, intel_sdvo_connector->top);
  1480. if (intel_sdvo_connector->bottom)
  1481. drm_property_destroy(dev, intel_sdvo_connector->bottom);
  1482. if (intel_sdvo_connector->hpos)
  1483. drm_property_destroy(dev, intel_sdvo_connector->hpos);
  1484. if (intel_sdvo_connector->vpos)
  1485. drm_property_destroy(dev, intel_sdvo_connector->vpos);
  1486. if (intel_sdvo_connector->saturation)
  1487. drm_property_destroy(dev, intel_sdvo_connector->saturation);
  1488. if (intel_sdvo_connector->contrast)
  1489. drm_property_destroy(dev, intel_sdvo_connector->contrast);
  1490. if (intel_sdvo_connector->hue)
  1491. drm_property_destroy(dev, intel_sdvo_connector->hue);
  1492. if (intel_sdvo_connector->sharpness)
  1493. drm_property_destroy(dev, intel_sdvo_connector->sharpness);
  1494. if (intel_sdvo_connector->flicker_filter)
  1495. drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
  1496. if (intel_sdvo_connector->flicker_filter_2d)
  1497. drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
  1498. if (intel_sdvo_connector->flicker_filter_adaptive)
  1499. drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
  1500. if (intel_sdvo_connector->tv_luma_filter)
  1501. drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
  1502. if (intel_sdvo_connector->tv_chroma_filter)
  1503. drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
  1504. if (intel_sdvo_connector->dot_crawl)
  1505. drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
  1506. if (intel_sdvo_connector->brightness)
  1507. drm_property_destroy(dev, intel_sdvo_connector->brightness);
  1508. }
  1509. static void intel_sdvo_destroy(struct drm_connector *connector)
  1510. {
  1511. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1512. if (intel_sdvo_connector->tv_format)
  1513. drm_property_destroy(connector->dev,
  1514. intel_sdvo_connector->tv_format);
  1515. intel_sdvo_destroy_enhance_property(connector);
  1516. drm_sysfs_connector_remove(connector);
  1517. drm_connector_cleanup(connector);
  1518. kfree(connector);
  1519. }
  1520. static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
  1521. {
  1522. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1523. struct edid *edid;
  1524. bool has_audio = false;
  1525. if (!intel_sdvo->is_hdmi)
  1526. return false;
  1527. edid = intel_sdvo_get_edid(connector);
  1528. if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
  1529. has_audio = drm_detect_monitor_audio(edid);
  1530. kfree(edid);
  1531. return has_audio;
  1532. }
  1533. static int
  1534. intel_sdvo_set_property(struct drm_connector *connector,
  1535. struct drm_property *property,
  1536. uint64_t val)
  1537. {
  1538. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1539. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1540. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1541. uint16_t temp_value;
  1542. uint8_t cmd;
  1543. int ret;
  1544. ret = drm_connector_property_set_value(connector, property, val);
  1545. if (ret)
  1546. return ret;
  1547. if (property == dev_priv->force_audio_property) {
  1548. int i = val;
  1549. bool has_audio;
  1550. if (i == intel_sdvo_connector->force_audio)
  1551. return 0;
  1552. intel_sdvo_connector->force_audio = i;
  1553. if (i == HDMI_AUDIO_AUTO)
  1554. has_audio = intel_sdvo_detect_hdmi_audio(connector);
  1555. else
  1556. has_audio = (i == HDMI_AUDIO_ON);
  1557. if (has_audio == intel_sdvo->has_hdmi_audio)
  1558. return 0;
  1559. intel_sdvo->has_hdmi_audio = has_audio;
  1560. goto done;
  1561. }
  1562. if (property == dev_priv->broadcast_rgb_property) {
  1563. if (val == !!intel_sdvo->color_range)
  1564. return 0;
  1565. intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
  1566. goto done;
  1567. }
  1568. #define CHECK_PROPERTY(name, NAME) \
  1569. if (intel_sdvo_connector->name == property) { \
  1570. if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
  1571. if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
  1572. cmd = SDVO_CMD_SET_##NAME; \
  1573. intel_sdvo_connector->cur_##name = temp_value; \
  1574. goto set_value; \
  1575. }
  1576. if (property == intel_sdvo_connector->tv_format) {
  1577. if (val >= TV_FORMAT_NUM)
  1578. return -EINVAL;
  1579. if (intel_sdvo->tv_format_index ==
  1580. intel_sdvo_connector->tv_format_supported[val])
  1581. return 0;
  1582. intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
  1583. goto done;
  1584. } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
  1585. temp_value = val;
  1586. if (intel_sdvo_connector->left == property) {
  1587. drm_connector_property_set_value(connector,
  1588. intel_sdvo_connector->right, val);
  1589. if (intel_sdvo_connector->left_margin == temp_value)
  1590. return 0;
  1591. intel_sdvo_connector->left_margin = temp_value;
  1592. intel_sdvo_connector->right_margin = temp_value;
  1593. temp_value = intel_sdvo_connector->max_hscan -
  1594. intel_sdvo_connector->left_margin;
  1595. cmd = SDVO_CMD_SET_OVERSCAN_H;
  1596. goto set_value;
  1597. } else if (intel_sdvo_connector->right == property) {
  1598. drm_connector_property_set_value(connector,
  1599. intel_sdvo_connector->left, val);
  1600. if (intel_sdvo_connector->right_margin == temp_value)
  1601. return 0;
  1602. intel_sdvo_connector->left_margin = temp_value;
  1603. intel_sdvo_connector->right_margin = temp_value;
  1604. temp_value = intel_sdvo_connector->max_hscan -
  1605. intel_sdvo_connector->left_margin;
  1606. cmd = SDVO_CMD_SET_OVERSCAN_H;
  1607. goto set_value;
  1608. } else if (intel_sdvo_connector->top == property) {
  1609. drm_connector_property_set_value(connector,
  1610. intel_sdvo_connector->bottom, val);
  1611. if (intel_sdvo_connector->top_margin == temp_value)
  1612. return 0;
  1613. intel_sdvo_connector->top_margin = temp_value;
  1614. intel_sdvo_connector->bottom_margin = temp_value;
  1615. temp_value = intel_sdvo_connector->max_vscan -
  1616. intel_sdvo_connector->top_margin;
  1617. cmd = SDVO_CMD_SET_OVERSCAN_V;
  1618. goto set_value;
  1619. } else if (intel_sdvo_connector->bottom == property) {
  1620. drm_connector_property_set_value(connector,
  1621. intel_sdvo_connector->top, val);
  1622. if (intel_sdvo_connector->bottom_margin == temp_value)
  1623. return 0;
  1624. intel_sdvo_connector->top_margin = temp_value;
  1625. intel_sdvo_connector->bottom_margin = temp_value;
  1626. temp_value = intel_sdvo_connector->max_vscan -
  1627. intel_sdvo_connector->top_margin;
  1628. cmd = SDVO_CMD_SET_OVERSCAN_V;
  1629. goto set_value;
  1630. }
  1631. CHECK_PROPERTY(hpos, HPOS)
  1632. CHECK_PROPERTY(vpos, VPOS)
  1633. CHECK_PROPERTY(saturation, SATURATION)
  1634. CHECK_PROPERTY(contrast, CONTRAST)
  1635. CHECK_PROPERTY(hue, HUE)
  1636. CHECK_PROPERTY(brightness, BRIGHTNESS)
  1637. CHECK_PROPERTY(sharpness, SHARPNESS)
  1638. CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
  1639. CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
  1640. CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
  1641. CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
  1642. CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
  1643. CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
  1644. }
  1645. return -EINVAL; /* unknown property */
  1646. set_value:
  1647. if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
  1648. return -EIO;
  1649. done:
  1650. if (intel_sdvo->base.base.crtc) {
  1651. struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
  1652. intel_set_mode(crtc, &crtc->mode,
  1653. crtc->x, crtc->y, crtc->fb);
  1654. }
  1655. return 0;
  1656. #undef CHECK_PROPERTY
  1657. }
  1658. static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
  1659. .mode_fixup = intel_sdvo_mode_fixup,
  1660. .mode_set = intel_sdvo_mode_set,
  1661. .disable = intel_encoder_noop,
  1662. };
  1663. static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
  1664. .dpms = intel_sdvo_dpms,
  1665. .detect = intel_sdvo_detect,
  1666. .fill_modes = drm_helper_probe_single_connector_modes,
  1667. .set_property = intel_sdvo_set_property,
  1668. .destroy = intel_sdvo_destroy,
  1669. };
  1670. static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
  1671. .get_modes = intel_sdvo_get_modes,
  1672. .mode_valid = intel_sdvo_mode_valid,
  1673. .best_encoder = intel_best_encoder,
  1674. };
  1675. static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
  1676. {
  1677. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  1678. if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
  1679. drm_mode_destroy(encoder->dev,
  1680. intel_sdvo->sdvo_lvds_fixed_mode);
  1681. i2c_del_adapter(&intel_sdvo->ddc);
  1682. intel_encoder_destroy(encoder);
  1683. }
  1684. static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
  1685. .destroy = intel_sdvo_enc_destroy,
  1686. };
  1687. static void
  1688. intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
  1689. {
  1690. uint16_t mask = 0;
  1691. unsigned int num_bits;
  1692. /* Make a mask of outputs less than or equal to our own priority in the
  1693. * list.
  1694. */
  1695. switch (sdvo->controlled_output) {
  1696. case SDVO_OUTPUT_LVDS1:
  1697. mask |= SDVO_OUTPUT_LVDS1;
  1698. case SDVO_OUTPUT_LVDS0:
  1699. mask |= SDVO_OUTPUT_LVDS0;
  1700. case SDVO_OUTPUT_TMDS1:
  1701. mask |= SDVO_OUTPUT_TMDS1;
  1702. case SDVO_OUTPUT_TMDS0:
  1703. mask |= SDVO_OUTPUT_TMDS0;
  1704. case SDVO_OUTPUT_RGB1:
  1705. mask |= SDVO_OUTPUT_RGB1;
  1706. case SDVO_OUTPUT_RGB0:
  1707. mask |= SDVO_OUTPUT_RGB0;
  1708. break;
  1709. }
  1710. /* Count bits to find what number we are in the priority list. */
  1711. mask &= sdvo->caps.output_flags;
  1712. num_bits = hweight16(mask);
  1713. /* If more than 3 outputs, default to DDC bus 3 for now. */
  1714. if (num_bits > 3)
  1715. num_bits = 3;
  1716. /* Corresponds to SDVO_CONTROL_BUS_DDCx */
  1717. sdvo->ddc_bus = 1 << num_bits;
  1718. }
  1719. /**
  1720. * Choose the appropriate DDC bus for control bus switch command for this
  1721. * SDVO output based on the controlled output.
  1722. *
  1723. * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
  1724. * outputs, then LVDS outputs.
  1725. */
  1726. static void
  1727. intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
  1728. struct intel_sdvo *sdvo, u32 reg)
  1729. {
  1730. struct sdvo_device_mapping *mapping;
  1731. if (sdvo->is_sdvob)
  1732. mapping = &(dev_priv->sdvo_mappings[0]);
  1733. else
  1734. mapping = &(dev_priv->sdvo_mappings[1]);
  1735. if (mapping->initialized)
  1736. sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
  1737. else
  1738. intel_sdvo_guess_ddc_bus(sdvo);
  1739. }
  1740. static void
  1741. intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
  1742. struct intel_sdvo *sdvo, u32 reg)
  1743. {
  1744. struct sdvo_device_mapping *mapping;
  1745. u8 pin;
  1746. if (sdvo->is_sdvob)
  1747. mapping = &dev_priv->sdvo_mappings[0];
  1748. else
  1749. mapping = &dev_priv->sdvo_mappings[1];
  1750. pin = GMBUS_PORT_DPB;
  1751. if (mapping->initialized)
  1752. pin = mapping->i2c_pin;
  1753. if (intel_gmbus_is_port_valid(pin)) {
  1754. sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
  1755. intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
  1756. intel_gmbus_force_bit(sdvo->i2c, true);
  1757. } else {
  1758. sdvo->i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
  1759. }
  1760. }
  1761. static bool
  1762. intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
  1763. {
  1764. return intel_sdvo_check_supp_encode(intel_sdvo);
  1765. }
  1766. static u8
  1767. intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
  1768. {
  1769. struct drm_i915_private *dev_priv = dev->dev_private;
  1770. struct sdvo_device_mapping *my_mapping, *other_mapping;
  1771. if (sdvo->is_sdvob) {
  1772. my_mapping = &dev_priv->sdvo_mappings[0];
  1773. other_mapping = &dev_priv->sdvo_mappings[1];
  1774. } else {
  1775. my_mapping = &dev_priv->sdvo_mappings[1];
  1776. other_mapping = &dev_priv->sdvo_mappings[0];
  1777. }
  1778. /* If the BIOS described our SDVO device, take advantage of it. */
  1779. if (my_mapping->slave_addr)
  1780. return my_mapping->slave_addr;
  1781. /* If the BIOS only described a different SDVO device, use the
  1782. * address that it isn't using.
  1783. */
  1784. if (other_mapping->slave_addr) {
  1785. if (other_mapping->slave_addr == 0x70)
  1786. return 0x72;
  1787. else
  1788. return 0x70;
  1789. }
  1790. /* No SDVO device info is found for another DVO port,
  1791. * so use mapping assumption we had before BIOS parsing.
  1792. */
  1793. if (sdvo->is_sdvob)
  1794. return 0x70;
  1795. else
  1796. return 0x72;
  1797. }
  1798. static void
  1799. intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
  1800. struct intel_sdvo *encoder)
  1801. {
  1802. drm_connector_init(encoder->base.base.dev,
  1803. &connector->base.base,
  1804. &intel_sdvo_connector_funcs,
  1805. connector->base.base.connector_type);
  1806. drm_connector_helper_add(&connector->base.base,
  1807. &intel_sdvo_connector_helper_funcs);
  1808. connector->base.base.interlace_allowed = 1;
  1809. connector->base.base.doublescan_allowed = 0;
  1810. connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
  1811. connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
  1812. intel_connector_attach_encoder(&connector->base, &encoder->base);
  1813. drm_sysfs_connector_add(&connector->base.base);
  1814. }
  1815. static void
  1816. intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
  1817. {
  1818. struct drm_device *dev = connector->base.base.dev;
  1819. intel_attach_force_audio_property(&connector->base.base);
  1820. if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
  1821. intel_attach_broadcast_rgb_property(&connector->base.base);
  1822. }
  1823. static bool
  1824. intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
  1825. {
  1826. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1827. struct drm_connector *connector;
  1828. struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
  1829. struct intel_connector *intel_connector;
  1830. struct intel_sdvo_connector *intel_sdvo_connector;
  1831. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1832. if (!intel_sdvo_connector)
  1833. return false;
  1834. if (device == 0) {
  1835. intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
  1836. intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
  1837. } else if (device == 1) {
  1838. intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
  1839. intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
  1840. }
  1841. intel_connector = &intel_sdvo_connector->base;
  1842. connector = &intel_connector->base;
  1843. if (intel_sdvo_get_hotplug_support(intel_sdvo) &
  1844. intel_sdvo_connector->output_flag) {
  1845. connector->polled = DRM_CONNECTOR_POLL_HPD;
  1846. intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
  1847. /* Some SDVO devices have one-shot hotplug interrupts.
  1848. * Ensure that they get re-enabled when an interrupt happens.
  1849. */
  1850. intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
  1851. intel_sdvo_enable_hotplug(intel_encoder);
  1852. } else {
  1853. connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
  1854. }
  1855. encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
  1856. connector->connector_type = DRM_MODE_CONNECTOR_DVID;
  1857. if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
  1858. connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
  1859. intel_sdvo->is_hdmi = true;
  1860. }
  1861. intel_sdvo->base.cloneable = true;
  1862. intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  1863. if (intel_sdvo->is_hdmi)
  1864. intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
  1865. return true;
  1866. }
  1867. static bool
  1868. intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
  1869. {
  1870. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1871. struct drm_connector *connector;
  1872. struct intel_connector *intel_connector;
  1873. struct intel_sdvo_connector *intel_sdvo_connector;
  1874. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1875. if (!intel_sdvo_connector)
  1876. return false;
  1877. intel_connector = &intel_sdvo_connector->base;
  1878. connector = &intel_connector->base;
  1879. encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
  1880. connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
  1881. intel_sdvo->controlled_output |= type;
  1882. intel_sdvo_connector->output_flag = type;
  1883. intel_sdvo->is_tv = true;
  1884. intel_sdvo->base.needs_tv_clock = true;
  1885. intel_sdvo->base.cloneable = false;
  1886. intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  1887. if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
  1888. goto err;
  1889. if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
  1890. goto err;
  1891. return true;
  1892. err:
  1893. intel_sdvo_destroy(connector);
  1894. return false;
  1895. }
  1896. static bool
  1897. intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
  1898. {
  1899. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1900. struct drm_connector *connector;
  1901. struct intel_connector *intel_connector;
  1902. struct intel_sdvo_connector *intel_sdvo_connector;
  1903. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1904. if (!intel_sdvo_connector)
  1905. return false;
  1906. intel_connector = &intel_sdvo_connector->base;
  1907. connector = &intel_connector->base;
  1908. connector->polled = DRM_CONNECTOR_POLL_CONNECT;
  1909. encoder->encoder_type = DRM_MODE_ENCODER_DAC;
  1910. connector->connector_type = DRM_MODE_CONNECTOR_VGA;
  1911. if (device == 0) {
  1912. intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
  1913. intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
  1914. } else if (device == 1) {
  1915. intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
  1916. intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
  1917. }
  1918. intel_sdvo->base.cloneable = true;
  1919. intel_sdvo_connector_init(intel_sdvo_connector,
  1920. intel_sdvo);
  1921. return true;
  1922. }
  1923. static bool
  1924. intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
  1925. {
  1926. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1927. struct drm_connector *connector;
  1928. struct intel_connector *intel_connector;
  1929. struct intel_sdvo_connector *intel_sdvo_connector;
  1930. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1931. if (!intel_sdvo_connector)
  1932. return false;
  1933. intel_connector = &intel_sdvo_connector->base;
  1934. connector = &intel_connector->base;
  1935. encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
  1936. connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
  1937. if (device == 0) {
  1938. intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
  1939. intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
  1940. } else if (device == 1) {
  1941. intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
  1942. intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
  1943. }
  1944. /* SDVO LVDS is cloneable because the SDVO encoder does the upscaling,
  1945. * as opposed to native LVDS, where we upscale with the panel-fitter
  1946. * (and hence only the native LVDS resolution could be cloned). */
  1947. intel_sdvo->base.cloneable = true;
  1948. intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  1949. if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
  1950. goto err;
  1951. return true;
  1952. err:
  1953. intel_sdvo_destroy(connector);
  1954. return false;
  1955. }
  1956. static bool
  1957. intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
  1958. {
  1959. intel_sdvo->is_tv = false;
  1960. intel_sdvo->base.needs_tv_clock = false;
  1961. intel_sdvo->is_lvds = false;
  1962. /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
  1963. if (flags & SDVO_OUTPUT_TMDS0)
  1964. if (!intel_sdvo_dvi_init(intel_sdvo, 0))
  1965. return false;
  1966. if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
  1967. if (!intel_sdvo_dvi_init(intel_sdvo, 1))
  1968. return false;
  1969. /* TV has no XXX1 function block */
  1970. if (flags & SDVO_OUTPUT_SVID0)
  1971. if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
  1972. return false;
  1973. if (flags & SDVO_OUTPUT_CVBS0)
  1974. if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
  1975. return false;
  1976. if (flags & SDVO_OUTPUT_YPRPB0)
  1977. if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
  1978. return false;
  1979. if (flags & SDVO_OUTPUT_RGB0)
  1980. if (!intel_sdvo_analog_init(intel_sdvo, 0))
  1981. return false;
  1982. if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
  1983. if (!intel_sdvo_analog_init(intel_sdvo, 1))
  1984. return false;
  1985. if (flags & SDVO_OUTPUT_LVDS0)
  1986. if (!intel_sdvo_lvds_init(intel_sdvo, 0))
  1987. return false;
  1988. if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
  1989. if (!intel_sdvo_lvds_init(intel_sdvo, 1))
  1990. return false;
  1991. if ((flags & SDVO_OUTPUT_MASK) == 0) {
  1992. unsigned char bytes[2];
  1993. intel_sdvo->controlled_output = 0;
  1994. memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
  1995. DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
  1996. SDVO_NAME(intel_sdvo),
  1997. bytes[0], bytes[1]);
  1998. return false;
  1999. }
  2000. intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  2001. return true;
  2002. }
  2003. static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
  2004. struct intel_sdvo_connector *intel_sdvo_connector,
  2005. int type)
  2006. {
  2007. struct drm_device *dev = intel_sdvo->base.base.dev;
  2008. struct intel_sdvo_tv_format format;
  2009. uint32_t format_map, i;
  2010. if (!intel_sdvo_set_target_output(intel_sdvo, type))
  2011. return false;
  2012. BUILD_BUG_ON(sizeof(format) != 6);
  2013. if (!intel_sdvo_get_value(intel_sdvo,
  2014. SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
  2015. &format, sizeof(format)))
  2016. return false;
  2017. memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
  2018. if (format_map == 0)
  2019. return false;
  2020. intel_sdvo_connector->format_supported_num = 0;
  2021. for (i = 0 ; i < TV_FORMAT_NUM; i++)
  2022. if (format_map & (1 << i))
  2023. intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
  2024. intel_sdvo_connector->tv_format =
  2025. drm_property_create(dev, DRM_MODE_PROP_ENUM,
  2026. "mode", intel_sdvo_connector->format_supported_num);
  2027. if (!intel_sdvo_connector->tv_format)
  2028. return false;
  2029. for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
  2030. drm_property_add_enum(
  2031. intel_sdvo_connector->tv_format, i,
  2032. i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
  2033. intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
  2034. drm_connector_attach_property(&intel_sdvo_connector->base.base,
  2035. intel_sdvo_connector->tv_format, 0);
  2036. return true;
  2037. }
  2038. #define ENHANCEMENT(name, NAME) do { \
  2039. if (enhancements.name) { \
  2040. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
  2041. !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
  2042. return false; \
  2043. intel_sdvo_connector->max_##name = data_value[0]; \
  2044. intel_sdvo_connector->cur_##name = response; \
  2045. intel_sdvo_connector->name = \
  2046. drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
  2047. if (!intel_sdvo_connector->name) return false; \
  2048. drm_connector_attach_property(connector, \
  2049. intel_sdvo_connector->name, \
  2050. intel_sdvo_connector->cur_##name); \
  2051. DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
  2052. data_value[0], data_value[1], response); \
  2053. } \
  2054. } while (0)
  2055. static bool
  2056. intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
  2057. struct intel_sdvo_connector *intel_sdvo_connector,
  2058. struct intel_sdvo_enhancements_reply enhancements)
  2059. {
  2060. struct drm_device *dev = intel_sdvo->base.base.dev;
  2061. struct drm_connector *connector = &intel_sdvo_connector->base.base;
  2062. uint16_t response, data_value[2];
  2063. /* when horizontal overscan is supported, Add the left/right property */
  2064. if (enhancements.overscan_h) {
  2065. if (!intel_sdvo_get_value(intel_sdvo,
  2066. SDVO_CMD_GET_MAX_OVERSCAN_H,
  2067. &data_value, 4))
  2068. return false;
  2069. if (!intel_sdvo_get_value(intel_sdvo,
  2070. SDVO_CMD_GET_OVERSCAN_H,
  2071. &response, 2))
  2072. return false;
  2073. intel_sdvo_connector->max_hscan = data_value[0];
  2074. intel_sdvo_connector->left_margin = data_value[0] - response;
  2075. intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
  2076. intel_sdvo_connector->left =
  2077. drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
  2078. if (!intel_sdvo_connector->left)
  2079. return false;
  2080. drm_connector_attach_property(connector,
  2081. intel_sdvo_connector->left,
  2082. intel_sdvo_connector->left_margin);
  2083. intel_sdvo_connector->right =
  2084. drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
  2085. if (!intel_sdvo_connector->right)
  2086. return false;
  2087. drm_connector_attach_property(connector,
  2088. intel_sdvo_connector->right,
  2089. intel_sdvo_connector->right_margin);
  2090. DRM_DEBUG_KMS("h_overscan: max %d, "
  2091. "default %d, current %d\n",
  2092. data_value[0], data_value[1], response);
  2093. }
  2094. if (enhancements.overscan_v) {
  2095. if (!intel_sdvo_get_value(intel_sdvo,
  2096. SDVO_CMD_GET_MAX_OVERSCAN_V,
  2097. &data_value, 4))
  2098. return false;
  2099. if (!intel_sdvo_get_value(intel_sdvo,
  2100. SDVO_CMD_GET_OVERSCAN_V,
  2101. &response, 2))
  2102. return false;
  2103. intel_sdvo_connector->max_vscan = data_value[0];
  2104. intel_sdvo_connector->top_margin = data_value[0] - response;
  2105. intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
  2106. intel_sdvo_connector->top =
  2107. drm_property_create_range(dev, 0,
  2108. "top_margin", 0, data_value[0]);
  2109. if (!intel_sdvo_connector->top)
  2110. return false;
  2111. drm_connector_attach_property(connector,
  2112. intel_sdvo_connector->top,
  2113. intel_sdvo_connector->top_margin);
  2114. intel_sdvo_connector->bottom =
  2115. drm_property_create_range(dev, 0,
  2116. "bottom_margin", 0, data_value[0]);
  2117. if (!intel_sdvo_connector->bottom)
  2118. return false;
  2119. drm_connector_attach_property(connector,
  2120. intel_sdvo_connector->bottom,
  2121. intel_sdvo_connector->bottom_margin);
  2122. DRM_DEBUG_KMS("v_overscan: max %d, "
  2123. "default %d, current %d\n",
  2124. data_value[0], data_value[1], response);
  2125. }
  2126. ENHANCEMENT(hpos, HPOS);
  2127. ENHANCEMENT(vpos, VPOS);
  2128. ENHANCEMENT(saturation, SATURATION);
  2129. ENHANCEMENT(contrast, CONTRAST);
  2130. ENHANCEMENT(hue, HUE);
  2131. ENHANCEMENT(sharpness, SHARPNESS);
  2132. ENHANCEMENT(brightness, BRIGHTNESS);
  2133. ENHANCEMENT(flicker_filter, FLICKER_FILTER);
  2134. ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
  2135. ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
  2136. ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
  2137. ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
  2138. if (enhancements.dot_crawl) {
  2139. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
  2140. return false;
  2141. intel_sdvo_connector->max_dot_crawl = 1;
  2142. intel_sdvo_connector->cur_dot_crawl = response & 0x1;
  2143. intel_sdvo_connector->dot_crawl =
  2144. drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
  2145. if (!intel_sdvo_connector->dot_crawl)
  2146. return false;
  2147. drm_connector_attach_property(connector,
  2148. intel_sdvo_connector->dot_crawl,
  2149. intel_sdvo_connector->cur_dot_crawl);
  2150. DRM_DEBUG_KMS("dot crawl: current %d\n", response);
  2151. }
  2152. return true;
  2153. }
  2154. static bool
  2155. intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
  2156. struct intel_sdvo_connector *intel_sdvo_connector,
  2157. struct intel_sdvo_enhancements_reply enhancements)
  2158. {
  2159. struct drm_device *dev = intel_sdvo->base.base.dev;
  2160. struct drm_connector *connector = &intel_sdvo_connector->base.base;
  2161. uint16_t response, data_value[2];
  2162. ENHANCEMENT(brightness, BRIGHTNESS);
  2163. return true;
  2164. }
  2165. #undef ENHANCEMENT
  2166. static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
  2167. struct intel_sdvo_connector *intel_sdvo_connector)
  2168. {
  2169. union {
  2170. struct intel_sdvo_enhancements_reply reply;
  2171. uint16_t response;
  2172. } enhancements;
  2173. BUILD_BUG_ON(sizeof(enhancements) != 2);
  2174. enhancements.response = 0;
  2175. intel_sdvo_get_value(intel_sdvo,
  2176. SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
  2177. &enhancements, sizeof(enhancements));
  2178. if (enhancements.response == 0) {
  2179. DRM_DEBUG_KMS("No enhancement is supported\n");
  2180. return true;
  2181. }
  2182. if (IS_TV(intel_sdvo_connector))
  2183. return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
  2184. else if (IS_LVDS(intel_sdvo_connector))
  2185. return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
  2186. else
  2187. return true;
  2188. }
  2189. static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
  2190. struct i2c_msg *msgs,
  2191. int num)
  2192. {
  2193. struct intel_sdvo *sdvo = adapter->algo_data;
  2194. if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
  2195. return -EIO;
  2196. return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
  2197. }
  2198. static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
  2199. {
  2200. struct intel_sdvo *sdvo = adapter->algo_data;
  2201. return sdvo->i2c->algo->functionality(sdvo->i2c);
  2202. }
  2203. static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
  2204. .master_xfer = intel_sdvo_ddc_proxy_xfer,
  2205. .functionality = intel_sdvo_ddc_proxy_func
  2206. };
  2207. static bool
  2208. intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
  2209. struct drm_device *dev)
  2210. {
  2211. sdvo->ddc.owner = THIS_MODULE;
  2212. sdvo->ddc.class = I2C_CLASS_DDC;
  2213. snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
  2214. sdvo->ddc.dev.parent = &dev->pdev->dev;
  2215. sdvo->ddc.algo_data = sdvo;
  2216. sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
  2217. return i2c_add_adapter(&sdvo->ddc) == 0;
  2218. }
  2219. bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
  2220. {
  2221. struct drm_i915_private *dev_priv = dev->dev_private;
  2222. struct intel_encoder *intel_encoder;
  2223. struct intel_sdvo *intel_sdvo;
  2224. u32 hotplug_mask;
  2225. int i;
  2226. intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
  2227. if (!intel_sdvo)
  2228. return false;
  2229. intel_sdvo->sdvo_reg = sdvo_reg;
  2230. intel_sdvo->is_sdvob = is_sdvob;
  2231. intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
  2232. intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
  2233. if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
  2234. kfree(intel_sdvo);
  2235. return false;
  2236. }
  2237. /* encoder type will be decided later */
  2238. intel_encoder = &intel_sdvo->base;
  2239. intel_encoder->type = INTEL_OUTPUT_SDVO;
  2240. drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
  2241. /* Read the regs to test if we can talk to the device */
  2242. for (i = 0; i < 0x40; i++) {
  2243. u8 byte;
  2244. if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
  2245. DRM_DEBUG_KMS("No SDVO device found on %s\n",
  2246. SDVO_NAME(intel_sdvo));
  2247. goto err;
  2248. }
  2249. }
  2250. hotplug_mask = 0;
  2251. if (IS_G4X(dev)) {
  2252. hotplug_mask = intel_sdvo->is_sdvob ?
  2253. SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X;
  2254. } else if (IS_GEN4(dev)) {
  2255. hotplug_mask = intel_sdvo->is_sdvob ?
  2256. SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965;
  2257. } else {
  2258. hotplug_mask = intel_sdvo->is_sdvob ?
  2259. SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;
  2260. }
  2261. drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
  2262. intel_encoder->disable = intel_disable_sdvo;
  2263. intel_encoder->enable = intel_enable_sdvo;
  2264. intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
  2265. /* In default case sdvo lvds is false */
  2266. if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
  2267. goto err;
  2268. if (intel_sdvo_output_setup(intel_sdvo,
  2269. intel_sdvo->caps.output_flags) != true) {
  2270. DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
  2271. SDVO_NAME(intel_sdvo));
  2272. goto err;
  2273. }
  2274. /* Only enable the hotplug irq if we need it, to work around noisy
  2275. * hotplug lines.
  2276. */
  2277. if (intel_sdvo->hotplug_active)
  2278. dev_priv->hotplug_supported_mask |= hotplug_mask;
  2279. intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
  2280. /* Set the input timing to the screen. Assume always input 0. */
  2281. if (!intel_sdvo_set_target_input(intel_sdvo))
  2282. goto err;
  2283. if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
  2284. &intel_sdvo->pixel_clock_min,
  2285. &intel_sdvo->pixel_clock_max))
  2286. goto err;
  2287. DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
  2288. "clock range %dMHz - %dMHz, "
  2289. "input 1: %c, input 2: %c, "
  2290. "output 1: %c, output 2: %c\n",
  2291. SDVO_NAME(intel_sdvo),
  2292. intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
  2293. intel_sdvo->caps.device_rev_id,
  2294. intel_sdvo->pixel_clock_min / 1000,
  2295. intel_sdvo->pixel_clock_max / 1000,
  2296. (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
  2297. (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
  2298. /* check currently supported outputs */
  2299. intel_sdvo->caps.output_flags &
  2300. (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
  2301. intel_sdvo->caps.output_flags &
  2302. (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
  2303. return true;
  2304. err:
  2305. drm_encoder_cleanup(&intel_encoder->base);
  2306. i2c_del_adapter(&intel_sdvo->ddc);
  2307. kfree(intel_sdvo);
  2308. return false;
  2309. }