intel_lvds.c 34 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. */
  29. #include <acpi/button.h>
  30. #include <linux/dmi.h>
  31. #include <linux/i2c.h>
  32. #include <linux/slab.h>
  33. #include <drm/drmP.h>
  34. #include <drm/drm_crtc.h>
  35. #include <drm/drm_edid.h>
  36. #include "intel_drv.h"
  37. #include <drm/i915_drm.h>
  38. #include "i915_drv.h"
  39. #include <linux/acpi.h>
  40. /* Private structure for the integrated LVDS support */
  41. struct intel_lvds_connector {
  42. struct intel_connector base;
  43. struct notifier_block lid_notifier;
  44. };
  45. struct intel_lvds_encoder {
  46. struct intel_encoder base;
  47. u32 pfit_control;
  48. u32 pfit_pgm_ratios;
  49. bool pfit_dirty;
  50. bool is_dual_link;
  51. struct intel_lvds_connector *attached_connector;
  52. };
  53. static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  54. {
  55. return container_of(encoder, struct intel_lvds_encoder, base.base);
  56. }
  57. static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  58. {
  59. return container_of(connector, struct intel_lvds_connector, base.base);
  60. }
  61. static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  62. enum pipe *pipe)
  63. {
  64. struct drm_device *dev = encoder->base.dev;
  65. struct drm_i915_private *dev_priv = dev->dev_private;
  66. u32 lvds_reg, tmp;
  67. if (HAS_PCH_SPLIT(dev)) {
  68. lvds_reg = PCH_LVDS;
  69. } else {
  70. lvds_reg = LVDS;
  71. }
  72. tmp = I915_READ(lvds_reg);
  73. if (!(tmp & LVDS_PORT_EN))
  74. return false;
  75. if (HAS_PCH_CPT(dev))
  76. *pipe = PORT_TO_PIPE_CPT(tmp);
  77. else
  78. *pipe = PORT_TO_PIPE(tmp);
  79. return true;
  80. }
  81. /**
  82. * Sets the power state for the panel.
  83. */
  84. static void intel_enable_lvds(struct intel_encoder *encoder)
  85. {
  86. struct drm_device *dev = encoder->base.dev;
  87. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  88. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  89. struct drm_i915_private *dev_priv = dev->dev_private;
  90. u32 ctl_reg, lvds_reg, stat_reg;
  91. if (HAS_PCH_SPLIT(dev)) {
  92. ctl_reg = PCH_PP_CONTROL;
  93. lvds_reg = PCH_LVDS;
  94. stat_reg = PCH_PP_STATUS;
  95. } else {
  96. ctl_reg = PP_CONTROL;
  97. lvds_reg = LVDS;
  98. stat_reg = PP_STATUS;
  99. }
  100. I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
  101. if (lvds_encoder->pfit_dirty) {
  102. /*
  103. * Enable automatic panel scaling so that non-native modes
  104. * fill the screen. The panel fitter should only be
  105. * adjusted whilst the pipe is disabled, according to
  106. * register description and PRM.
  107. */
  108. DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
  109. lvds_encoder->pfit_control,
  110. lvds_encoder->pfit_pgm_ratios);
  111. I915_WRITE(PFIT_PGM_RATIOS, lvds_encoder->pfit_pgm_ratios);
  112. I915_WRITE(PFIT_CONTROL, lvds_encoder->pfit_control);
  113. lvds_encoder->pfit_dirty = false;
  114. }
  115. I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  116. POSTING_READ(lvds_reg);
  117. if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
  118. DRM_ERROR("timed out waiting for panel to power on\n");
  119. intel_panel_enable_backlight(dev, intel_crtc->pipe);
  120. }
  121. static void intel_disable_lvds(struct intel_encoder *encoder)
  122. {
  123. struct drm_device *dev = encoder->base.dev;
  124. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  125. struct drm_i915_private *dev_priv = dev->dev_private;
  126. u32 ctl_reg, lvds_reg, stat_reg;
  127. if (HAS_PCH_SPLIT(dev)) {
  128. ctl_reg = PCH_PP_CONTROL;
  129. lvds_reg = PCH_LVDS;
  130. stat_reg = PCH_PP_STATUS;
  131. } else {
  132. ctl_reg = PP_CONTROL;
  133. lvds_reg = LVDS;
  134. stat_reg = PP_STATUS;
  135. }
  136. intel_panel_disable_backlight(dev);
  137. I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  138. if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
  139. DRM_ERROR("timed out waiting for panel to power off\n");
  140. if (lvds_encoder->pfit_control) {
  141. I915_WRITE(PFIT_CONTROL, 0);
  142. lvds_encoder->pfit_dirty = true;
  143. }
  144. I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
  145. POSTING_READ(lvds_reg);
  146. }
  147. static int intel_lvds_mode_valid(struct drm_connector *connector,
  148. struct drm_display_mode *mode)
  149. {
  150. struct intel_connector *intel_connector = to_intel_connector(connector);
  151. struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
  152. if (mode->hdisplay > fixed_mode->hdisplay)
  153. return MODE_PANEL;
  154. if (mode->vdisplay > fixed_mode->vdisplay)
  155. return MODE_PANEL;
  156. return MODE_OK;
  157. }
  158. static void
  159. centre_horizontally(struct drm_display_mode *mode,
  160. int width)
  161. {
  162. u32 border, sync_pos, blank_width, sync_width;
  163. /* keep the hsync and hblank widths constant */
  164. sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
  165. blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
  166. sync_pos = (blank_width - sync_width + 1) / 2;
  167. border = (mode->hdisplay - width + 1) / 2;
  168. border += border & 1; /* make the border even */
  169. mode->crtc_hdisplay = width;
  170. mode->crtc_hblank_start = width + border;
  171. mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
  172. mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
  173. mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
  174. mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
  175. }
  176. static void
  177. centre_vertically(struct drm_display_mode *mode,
  178. int height)
  179. {
  180. u32 border, sync_pos, blank_width, sync_width;
  181. /* keep the vsync and vblank widths constant */
  182. sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
  183. blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
  184. sync_pos = (blank_width - sync_width + 1) / 2;
  185. border = (mode->vdisplay - height + 1) / 2;
  186. mode->crtc_vdisplay = height;
  187. mode->crtc_vblank_start = height + border;
  188. mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
  189. mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
  190. mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
  191. mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
  192. }
  193. static inline u32 panel_fitter_scaling(u32 source, u32 target)
  194. {
  195. /*
  196. * Floating point operation is not supported. So the FACTOR
  197. * is defined, which can avoid the floating point computation
  198. * when calculating the panel ratio.
  199. */
  200. #define ACCURACY 12
  201. #define FACTOR (1 << ACCURACY)
  202. u32 ratio = source * FACTOR / target;
  203. return (FACTOR * ratio + FACTOR/2) / FACTOR;
  204. }
  205. static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
  206. const struct drm_display_mode *mode,
  207. struct drm_display_mode *adjusted_mode)
  208. {
  209. struct drm_device *dev = encoder->dev;
  210. struct drm_i915_private *dev_priv = dev->dev_private;
  211. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(encoder);
  212. struct intel_connector *intel_connector =
  213. &lvds_encoder->attached_connector->base;
  214. struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
  215. u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
  216. int pipe;
  217. /* Should never happen!! */
  218. if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
  219. DRM_ERROR("Can't support LVDS on pipe A\n");
  220. return false;
  221. }
  222. if (intel_encoder_check_is_cloned(&lvds_encoder->base))
  223. return false;
  224. /*
  225. * We have timings from the BIOS for the panel, put them in
  226. * to the adjusted mode. The CRTC will be set up for this mode,
  227. * with the panel scaling set up to source from the H/VDisplay
  228. * of the original mode.
  229. */
  230. intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
  231. adjusted_mode);
  232. if (HAS_PCH_SPLIT(dev)) {
  233. intel_pch_panel_fitting(dev,
  234. intel_connector->panel.fitting_mode,
  235. mode, adjusted_mode);
  236. return true;
  237. }
  238. /* Native modes don't need fitting */
  239. if (adjusted_mode->hdisplay == mode->hdisplay &&
  240. adjusted_mode->vdisplay == mode->vdisplay)
  241. goto out;
  242. /* 965+ wants fuzzy fitting */
  243. if (INTEL_INFO(dev)->gen >= 4)
  244. pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
  245. PFIT_FILTER_FUZZY);
  246. /*
  247. * Enable automatic panel scaling for non-native modes so that they fill
  248. * the screen. Should be enabled before the pipe is enabled, according
  249. * to register description and PRM.
  250. * Change the value here to see the borders for debugging
  251. */
  252. for_each_pipe(pipe)
  253. I915_WRITE(BCLRPAT(pipe), 0);
  254. drm_mode_set_crtcinfo(adjusted_mode, 0);
  255. switch (intel_connector->panel.fitting_mode) {
  256. case DRM_MODE_SCALE_CENTER:
  257. /*
  258. * For centered modes, we have to calculate border widths &
  259. * heights and modify the values programmed into the CRTC.
  260. */
  261. centre_horizontally(adjusted_mode, mode->hdisplay);
  262. centre_vertically(adjusted_mode, mode->vdisplay);
  263. border = LVDS_BORDER_ENABLE;
  264. break;
  265. case DRM_MODE_SCALE_ASPECT:
  266. /* Scale but preserve the aspect ratio */
  267. if (INTEL_INFO(dev)->gen >= 4) {
  268. u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  269. u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  270. /* 965+ is easy, it does everything in hw */
  271. if (scaled_width > scaled_height)
  272. pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
  273. else if (scaled_width < scaled_height)
  274. pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
  275. else if (adjusted_mode->hdisplay != mode->hdisplay)
  276. pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
  277. } else {
  278. u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  279. u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  280. /*
  281. * For earlier chips we have to calculate the scaling
  282. * ratio by hand and program it into the
  283. * PFIT_PGM_RATIO register
  284. */
  285. if (scaled_width > scaled_height) { /* pillar */
  286. centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
  287. border = LVDS_BORDER_ENABLE;
  288. if (mode->vdisplay != adjusted_mode->vdisplay) {
  289. u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
  290. pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  291. bits << PFIT_VERT_SCALE_SHIFT);
  292. pfit_control |= (PFIT_ENABLE |
  293. VERT_INTERP_BILINEAR |
  294. HORIZ_INTERP_BILINEAR);
  295. }
  296. } else if (scaled_width < scaled_height) { /* letter */
  297. centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
  298. border = LVDS_BORDER_ENABLE;
  299. if (mode->hdisplay != adjusted_mode->hdisplay) {
  300. u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
  301. pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  302. bits << PFIT_VERT_SCALE_SHIFT);
  303. pfit_control |= (PFIT_ENABLE |
  304. VERT_INTERP_BILINEAR |
  305. HORIZ_INTERP_BILINEAR);
  306. }
  307. } else
  308. /* Aspects match, Let hw scale both directions */
  309. pfit_control |= (PFIT_ENABLE |
  310. VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
  311. VERT_INTERP_BILINEAR |
  312. HORIZ_INTERP_BILINEAR);
  313. }
  314. break;
  315. case DRM_MODE_SCALE_FULLSCREEN:
  316. /*
  317. * Full scaling, even if it changes the aspect ratio.
  318. * Fortunately this is all done for us in hw.
  319. */
  320. if (mode->vdisplay != adjusted_mode->vdisplay ||
  321. mode->hdisplay != adjusted_mode->hdisplay) {
  322. pfit_control |= PFIT_ENABLE;
  323. if (INTEL_INFO(dev)->gen >= 4)
  324. pfit_control |= PFIT_SCALING_AUTO;
  325. else
  326. pfit_control |= (VERT_AUTO_SCALE |
  327. VERT_INTERP_BILINEAR |
  328. HORIZ_AUTO_SCALE |
  329. HORIZ_INTERP_BILINEAR);
  330. }
  331. break;
  332. default:
  333. break;
  334. }
  335. out:
  336. /* If not enabling scaling, be consistent and always use 0. */
  337. if ((pfit_control & PFIT_ENABLE) == 0) {
  338. pfit_control = 0;
  339. pfit_pgm_ratios = 0;
  340. }
  341. /* Make sure pre-965 set dither correctly */
  342. if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
  343. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  344. if (pfit_control != lvds_encoder->pfit_control ||
  345. pfit_pgm_ratios != lvds_encoder->pfit_pgm_ratios) {
  346. lvds_encoder->pfit_control = pfit_control;
  347. lvds_encoder->pfit_pgm_ratios = pfit_pgm_ratios;
  348. lvds_encoder->pfit_dirty = true;
  349. }
  350. dev_priv->lvds_border_bits = border;
  351. /*
  352. * XXX: It would be nice to support lower refresh rates on the
  353. * panels to reduce power consumption, and perhaps match the
  354. * user's requested refresh rate.
  355. */
  356. return true;
  357. }
  358. static void intel_lvds_mode_set(struct drm_encoder *encoder,
  359. struct drm_display_mode *mode,
  360. struct drm_display_mode *adjusted_mode)
  361. {
  362. /*
  363. * The LVDS pin pair will already have been turned on in the
  364. * intel_crtc_mode_set since it has a large impact on the DPLL
  365. * settings.
  366. */
  367. }
  368. /**
  369. * Detect the LVDS connection.
  370. *
  371. * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
  372. * connected and closed means disconnected. We also send hotplug events as
  373. * needed, using lid status notification from the input layer.
  374. */
  375. static enum drm_connector_status
  376. intel_lvds_detect(struct drm_connector *connector, bool force)
  377. {
  378. struct drm_device *dev = connector->dev;
  379. enum drm_connector_status status;
  380. status = intel_panel_detect(dev);
  381. if (status != connector_status_unknown)
  382. return status;
  383. return connector_status_connected;
  384. }
  385. /**
  386. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  387. */
  388. static int intel_lvds_get_modes(struct drm_connector *connector)
  389. {
  390. struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
  391. struct drm_device *dev = connector->dev;
  392. struct drm_display_mode *mode;
  393. /* use cached edid if we have one */
  394. if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  395. return drm_add_edid_modes(connector, lvds_connector->base.edid);
  396. mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
  397. if (mode == NULL)
  398. return 0;
  399. drm_mode_probed_add(connector, mode);
  400. return 1;
  401. }
  402. static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
  403. {
  404. DRM_INFO("Skipping forced modeset for %s\n", id->ident);
  405. return 1;
  406. }
  407. /* The GPU hangs up on these systems if modeset is performed on LID open */
  408. static const struct dmi_system_id intel_no_modeset_on_lid[] = {
  409. {
  410. .callback = intel_no_modeset_on_lid_dmi_callback,
  411. .ident = "Toshiba Tecra A11",
  412. .matches = {
  413. DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  414. DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
  415. },
  416. },
  417. { } /* terminating entry */
  418. };
  419. /*
  420. * Lid events. Note the use of 'modeset_on_lid':
  421. * - we set it on lid close, and reset it on open
  422. * - we use it as a "only once" bit (ie we ignore
  423. * duplicate events where it was already properly
  424. * set/reset)
  425. * - the suspend/resume paths will also set it to
  426. * zero, since they restore the mode ("lid open").
  427. */
  428. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  429. void *unused)
  430. {
  431. struct intel_lvds_connector *lvds_connector =
  432. container_of(nb, struct intel_lvds_connector, lid_notifier);
  433. struct drm_connector *connector = &lvds_connector->base.base;
  434. struct drm_device *dev = connector->dev;
  435. struct drm_i915_private *dev_priv = dev->dev_private;
  436. if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
  437. return NOTIFY_OK;
  438. /*
  439. * check and update the status of LVDS connector after receiving
  440. * the LID nofication event.
  441. */
  442. connector->status = connector->funcs->detect(connector, false);
  443. /* Don't force modeset on machines where it causes a GPU lockup */
  444. if (dmi_check_system(intel_no_modeset_on_lid))
  445. return NOTIFY_OK;
  446. if (!acpi_lid_open()) {
  447. dev_priv->modeset_on_lid = 1;
  448. return NOTIFY_OK;
  449. }
  450. if (!dev_priv->modeset_on_lid)
  451. return NOTIFY_OK;
  452. dev_priv->modeset_on_lid = 0;
  453. mutex_lock(&dev->mode_config.mutex);
  454. intel_modeset_setup_hw_state(dev, true);
  455. mutex_unlock(&dev->mode_config.mutex);
  456. return NOTIFY_OK;
  457. }
  458. /**
  459. * intel_lvds_destroy - unregister and free LVDS structures
  460. * @connector: connector to free
  461. *
  462. * Unregister the DDC bus for this connector then free the driver private
  463. * structure.
  464. */
  465. static void intel_lvds_destroy(struct drm_connector *connector)
  466. {
  467. struct intel_lvds_connector *lvds_connector =
  468. to_lvds_connector(connector);
  469. if (lvds_connector->lid_notifier.notifier_call)
  470. acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
  471. if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  472. kfree(lvds_connector->base.edid);
  473. intel_panel_destroy_backlight(connector->dev);
  474. intel_panel_fini(&lvds_connector->base.panel);
  475. drm_sysfs_connector_remove(connector);
  476. drm_connector_cleanup(connector);
  477. kfree(connector);
  478. }
  479. static int intel_lvds_set_property(struct drm_connector *connector,
  480. struct drm_property *property,
  481. uint64_t value)
  482. {
  483. struct intel_connector *intel_connector = to_intel_connector(connector);
  484. struct drm_device *dev = connector->dev;
  485. if (property == dev->mode_config.scaling_mode_property) {
  486. struct drm_crtc *crtc;
  487. if (value == DRM_MODE_SCALE_NONE) {
  488. DRM_DEBUG_KMS("no scaling not supported\n");
  489. return -EINVAL;
  490. }
  491. if (intel_connector->panel.fitting_mode == value) {
  492. /* the LVDS scaling property is not changed */
  493. return 0;
  494. }
  495. intel_connector->panel.fitting_mode = value;
  496. crtc = intel_attached_encoder(connector)->base.crtc;
  497. if (crtc && crtc->enabled) {
  498. /*
  499. * If the CRTC is enabled, the display will be changed
  500. * according to the new panel fitting mode.
  501. */
  502. intel_set_mode(crtc, &crtc->mode,
  503. crtc->x, crtc->y, crtc->fb);
  504. }
  505. }
  506. return 0;
  507. }
  508. static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
  509. .mode_fixup = intel_lvds_mode_fixup,
  510. .mode_set = intel_lvds_mode_set,
  511. .disable = intel_encoder_noop,
  512. };
  513. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  514. .get_modes = intel_lvds_get_modes,
  515. .mode_valid = intel_lvds_mode_valid,
  516. .best_encoder = intel_best_encoder,
  517. };
  518. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  519. .dpms = intel_connector_dpms,
  520. .detect = intel_lvds_detect,
  521. .fill_modes = drm_helper_probe_single_connector_modes,
  522. .set_property = intel_lvds_set_property,
  523. .destroy = intel_lvds_destroy,
  524. };
  525. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  526. .destroy = intel_encoder_destroy,
  527. };
  528. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  529. {
  530. DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
  531. return 1;
  532. }
  533. /* These systems claim to have LVDS, but really don't */
  534. static const struct dmi_system_id intel_no_lvds[] = {
  535. {
  536. .callback = intel_no_lvds_dmi_callback,
  537. .ident = "Apple Mac Mini (Core series)",
  538. .matches = {
  539. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  540. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  541. },
  542. },
  543. {
  544. .callback = intel_no_lvds_dmi_callback,
  545. .ident = "Apple Mac Mini (Core 2 series)",
  546. .matches = {
  547. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  548. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  549. },
  550. },
  551. {
  552. .callback = intel_no_lvds_dmi_callback,
  553. .ident = "MSI IM-945GSE-A",
  554. .matches = {
  555. DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  556. DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  557. },
  558. },
  559. {
  560. .callback = intel_no_lvds_dmi_callback,
  561. .ident = "Dell Studio Hybrid",
  562. .matches = {
  563. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  564. DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  565. },
  566. },
  567. {
  568. .callback = intel_no_lvds_dmi_callback,
  569. .ident = "Dell OptiPlex FX170",
  570. .matches = {
  571. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  572. DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
  573. },
  574. },
  575. {
  576. .callback = intel_no_lvds_dmi_callback,
  577. .ident = "AOpen Mini PC",
  578. .matches = {
  579. DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  580. DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  581. },
  582. },
  583. {
  584. .callback = intel_no_lvds_dmi_callback,
  585. .ident = "AOpen Mini PC MP915",
  586. .matches = {
  587. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  588. DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  589. },
  590. },
  591. {
  592. .callback = intel_no_lvds_dmi_callback,
  593. .ident = "AOpen i915GMm-HFS",
  594. .matches = {
  595. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  596. DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
  597. },
  598. },
  599. {
  600. .callback = intel_no_lvds_dmi_callback,
  601. .ident = "AOpen i45GMx-I",
  602. .matches = {
  603. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  604. DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
  605. },
  606. },
  607. {
  608. .callback = intel_no_lvds_dmi_callback,
  609. .ident = "Aopen i945GTt-VFA",
  610. .matches = {
  611. DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  612. },
  613. },
  614. {
  615. .callback = intel_no_lvds_dmi_callback,
  616. .ident = "Clientron U800",
  617. .matches = {
  618. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  619. DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
  620. },
  621. },
  622. {
  623. .callback = intel_no_lvds_dmi_callback,
  624. .ident = "Clientron E830",
  625. .matches = {
  626. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  627. DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
  628. },
  629. },
  630. {
  631. .callback = intel_no_lvds_dmi_callback,
  632. .ident = "Asus EeeBox PC EB1007",
  633. .matches = {
  634. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
  635. DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
  636. },
  637. },
  638. {
  639. .callback = intel_no_lvds_dmi_callback,
  640. .ident = "Asus AT5NM10T-I",
  641. .matches = {
  642. DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  643. DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
  644. },
  645. },
  646. {
  647. .callback = intel_no_lvds_dmi_callback,
  648. .ident = "Hewlett-Packard HP t5740e Thin Client",
  649. .matches = {
  650. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  651. DMI_MATCH(DMI_PRODUCT_NAME, "HP t5740e Thin Client"),
  652. },
  653. },
  654. {
  655. .callback = intel_no_lvds_dmi_callback,
  656. .ident = "Hewlett-Packard t5745",
  657. .matches = {
  658. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  659. DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
  660. },
  661. },
  662. {
  663. .callback = intel_no_lvds_dmi_callback,
  664. .ident = "Hewlett-Packard st5747",
  665. .matches = {
  666. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  667. DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
  668. },
  669. },
  670. {
  671. .callback = intel_no_lvds_dmi_callback,
  672. .ident = "MSI Wind Box DC500",
  673. .matches = {
  674. DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  675. DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
  676. },
  677. },
  678. {
  679. .callback = intel_no_lvds_dmi_callback,
  680. .ident = "ZOTAC ZBOXSD-ID12/ID13",
  681. .matches = {
  682. DMI_MATCH(DMI_BOARD_VENDOR, "ZOTAC"),
  683. DMI_MATCH(DMI_BOARD_NAME, "ZBOXSD-ID12/ID13"),
  684. },
  685. },
  686. {
  687. .callback = intel_no_lvds_dmi_callback,
  688. .ident = "Gigabyte GA-D525TUD",
  689. .matches = {
  690. DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
  691. DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
  692. },
  693. },
  694. {
  695. .callback = intel_no_lvds_dmi_callback,
  696. .ident = "Supermicro X7SPA-H",
  697. .matches = {
  698. DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
  699. DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
  700. },
  701. },
  702. { } /* terminating entry */
  703. };
  704. /**
  705. * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
  706. * @dev: drm device
  707. * @connector: LVDS connector
  708. *
  709. * Find the reduced downclock for LVDS in EDID.
  710. */
  711. static void intel_find_lvds_downclock(struct drm_device *dev,
  712. struct drm_display_mode *fixed_mode,
  713. struct drm_connector *connector)
  714. {
  715. struct drm_i915_private *dev_priv = dev->dev_private;
  716. struct drm_display_mode *scan;
  717. int temp_downclock;
  718. temp_downclock = fixed_mode->clock;
  719. list_for_each_entry(scan, &connector->probed_modes, head) {
  720. /*
  721. * If one mode has the same resolution with the fixed_panel
  722. * mode while they have the different refresh rate, it means
  723. * that the reduced downclock is found for the LVDS. In such
  724. * case we can set the different FPx0/1 to dynamically select
  725. * between low and high frequency.
  726. */
  727. if (scan->hdisplay == fixed_mode->hdisplay &&
  728. scan->hsync_start == fixed_mode->hsync_start &&
  729. scan->hsync_end == fixed_mode->hsync_end &&
  730. scan->htotal == fixed_mode->htotal &&
  731. scan->vdisplay == fixed_mode->vdisplay &&
  732. scan->vsync_start == fixed_mode->vsync_start &&
  733. scan->vsync_end == fixed_mode->vsync_end &&
  734. scan->vtotal == fixed_mode->vtotal) {
  735. if (scan->clock < temp_downclock) {
  736. /*
  737. * The downclock is already found. But we
  738. * expect to find the lower downclock.
  739. */
  740. temp_downclock = scan->clock;
  741. }
  742. }
  743. }
  744. if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
  745. /* We found the downclock for LVDS. */
  746. dev_priv->lvds_downclock_avail = 1;
  747. dev_priv->lvds_downclock = temp_downclock;
  748. DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
  749. "Normal clock %dKhz, downclock %dKhz\n",
  750. fixed_mode->clock, temp_downclock);
  751. }
  752. }
  753. /*
  754. * Enumerate the child dev array parsed from VBT to check whether
  755. * the LVDS is present.
  756. * If it is present, return 1.
  757. * If it is not present, return false.
  758. * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  759. */
  760. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  761. u8 *i2c_pin)
  762. {
  763. struct drm_i915_private *dev_priv = dev->dev_private;
  764. int i;
  765. if (!dev_priv->child_dev_num)
  766. return true;
  767. for (i = 0; i < dev_priv->child_dev_num; i++) {
  768. struct child_device_config *child = dev_priv->child_dev + i;
  769. /* If the device type is not LFP, continue.
  770. * We have to check both the new identifiers as well as the
  771. * old for compatibility with some BIOSes.
  772. */
  773. if (child->device_type != DEVICE_TYPE_INT_LFP &&
  774. child->device_type != DEVICE_TYPE_LFP)
  775. continue;
  776. if (intel_gmbus_is_port_valid(child->i2c_pin))
  777. *i2c_pin = child->i2c_pin;
  778. /* However, we cannot trust the BIOS writers to populate
  779. * the VBT correctly. Since LVDS requires additional
  780. * information from AIM blocks, a non-zero addin offset is
  781. * a good indicator that the LVDS is actually present.
  782. */
  783. if (child->addin_offset)
  784. return true;
  785. /* But even then some BIOS writers perform some black magic
  786. * and instantiate the device without reference to any
  787. * additional data. Trust that if the VBT was written into
  788. * the OpRegion then they have validated the LVDS's existence.
  789. */
  790. if (dev_priv->opregion.vbt)
  791. return true;
  792. }
  793. return false;
  794. }
  795. static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
  796. {
  797. DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
  798. return 1;
  799. }
  800. static const struct dmi_system_id intel_dual_link_lvds[] = {
  801. {
  802. .callback = intel_dual_link_lvds_callback,
  803. .ident = "Apple MacBook Pro (Core i5/i7 Series)",
  804. .matches = {
  805. DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
  806. DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
  807. },
  808. },
  809. { } /* terminating entry */
  810. };
  811. bool intel_is_dual_link_lvds(struct drm_device *dev)
  812. {
  813. struct intel_encoder *encoder;
  814. struct intel_lvds_encoder *lvds_encoder;
  815. list_for_each_entry(encoder, &dev->mode_config.encoder_list,
  816. base.head) {
  817. if (encoder->type == INTEL_OUTPUT_LVDS) {
  818. lvds_encoder = to_lvds_encoder(&encoder->base);
  819. return lvds_encoder->is_dual_link;
  820. }
  821. }
  822. return false;
  823. }
  824. static bool compute_is_dual_link_lvds(struct drm_device *dev)
  825. {
  826. unsigned int val;
  827. struct drm_i915_private *dev_priv = dev->dev_private;
  828. u32 lvds_reg;
  829. if (HAS_PCH_SPLIT(dev)) {
  830. lvds_reg = PCH_LVDS;
  831. } else {
  832. lvds_reg = LVDS;
  833. }
  834. /* use the module option value if specified */
  835. if (i915_lvds_channel_mode > 0)
  836. return i915_lvds_channel_mode == 2;
  837. if (dmi_check_system(intel_dual_link_lvds))
  838. return true;
  839. /* BIOS should set the proper LVDS register value at boot, but
  840. * in reality, it doesn't set the value when the lid is closed;
  841. * we need to check "the value to be set" in VBT when LVDS
  842. * register is uninitialized.
  843. */
  844. val = I915_READ(lvds_reg);
  845. if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
  846. val = dev_priv->bios_lvds_val;
  847. return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
  848. }
  849. static bool intel_lvds_supported(struct drm_device *dev)
  850. {
  851. /* With the introduction of the PCH we gained a dedicated
  852. * LVDS presence pin, use it. */
  853. if (HAS_PCH_SPLIT(dev))
  854. return true;
  855. /* Otherwise LVDS was only attached to mobile products,
  856. * except for the inglorious 830gm */
  857. return IS_MOBILE(dev) && !IS_I830(dev);
  858. }
  859. /**
  860. * intel_lvds_init - setup LVDS connectors on this device
  861. * @dev: drm device
  862. *
  863. * Create the connector, register the LVDS DDC bus, and try to figure out what
  864. * modes we can display on the LVDS panel (if present).
  865. */
  866. bool intel_lvds_init(struct drm_device *dev)
  867. {
  868. struct drm_i915_private *dev_priv = dev->dev_private;
  869. struct intel_lvds_encoder *lvds_encoder;
  870. struct intel_encoder *intel_encoder;
  871. struct intel_lvds_connector *lvds_connector;
  872. struct intel_connector *intel_connector;
  873. struct drm_connector *connector;
  874. struct drm_encoder *encoder;
  875. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  876. struct drm_display_mode *fixed_mode = NULL;
  877. struct edid *edid;
  878. struct drm_crtc *crtc;
  879. u32 lvds;
  880. int pipe;
  881. u8 pin;
  882. if (!intel_lvds_supported(dev))
  883. return false;
  884. /* Skip init on machines we know falsely report LVDS */
  885. if (dmi_check_system(intel_no_lvds))
  886. return false;
  887. pin = GMBUS_PORT_PANEL;
  888. if (!lvds_is_present_in_vbt(dev, &pin)) {
  889. DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  890. return false;
  891. }
  892. if (HAS_PCH_SPLIT(dev)) {
  893. if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  894. return false;
  895. if (dev_priv->edp.support) {
  896. DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  897. return false;
  898. }
  899. }
  900. lvds_encoder = kzalloc(sizeof(struct intel_lvds_encoder), GFP_KERNEL);
  901. if (!lvds_encoder)
  902. return false;
  903. lvds_connector = kzalloc(sizeof(struct intel_lvds_connector), GFP_KERNEL);
  904. if (!lvds_connector) {
  905. kfree(lvds_encoder);
  906. return false;
  907. }
  908. lvds_encoder->attached_connector = lvds_connector;
  909. if (!HAS_PCH_SPLIT(dev)) {
  910. lvds_encoder->pfit_control = I915_READ(PFIT_CONTROL);
  911. }
  912. intel_encoder = &lvds_encoder->base;
  913. encoder = &intel_encoder->base;
  914. intel_connector = &lvds_connector->base;
  915. connector = &intel_connector->base;
  916. drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
  917. DRM_MODE_CONNECTOR_LVDS);
  918. drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
  919. DRM_MODE_ENCODER_LVDS);
  920. intel_encoder->enable = intel_enable_lvds;
  921. intel_encoder->disable = intel_disable_lvds;
  922. intel_encoder->get_hw_state = intel_lvds_get_hw_state;
  923. intel_connector->get_hw_state = intel_connector_get_hw_state;
  924. intel_connector_attach_encoder(intel_connector, intel_encoder);
  925. intel_encoder->type = INTEL_OUTPUT_LVDS;
  926. intel_encoder->cloneable = false;
  927. if (HAS_PCH_SPLIT(dev))
  928. intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  929. else if (IS_GEN4(dev))
  930. intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  931. else
  932. intel_encoder->crtc_mask = (1 << 1);
  933. drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
  934. drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  935. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  936. connector->interlace_allowed = false;
  937. connector->doublescan_allowed = false;
  938. /* create the scaling mode property */
  939. drm_mode_create_scaling_mode_property(dev);
  940. drm_object_attach_property(&connector->base,
  941. dev->mode_config.scaling_mode_property,
  942. DRM_MODE_SCALE_ASPECT);
  943. intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
  944. /*
  945. * LVDS discovery:
  946. * 1) check for EDID on DDC
  947. * 2) check for VBT data
  948. * 3) check to see if LVDS is already on
  949. * if none of the above, no panel
  950. * 4) make sure lid is open
  951. * if closed, act like it's not there for now
  952. */
  953. /*
  954. * Attempt to get the fixed panel mode from DDC. Assume that the
  955. * preferred mode is the right one.
  956. */
  957. edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
  958. if (edid) {
  959. if (drm_add_edid_modes(connector, edid)) {
  960. drm_mode_connector_update_edid_property(connector,
  961. edid);
  962. } else {
  963. kfree(edid);
  964. edid = ERR_PTR(-EINVAL);
  965. }
  966. } else {
  967. edid = ERR_PTR(-ENOENT);
  968. }
  969. lvds_connector->base.edid = edid;
  970. if (IS_ERR_OR_NULL(edid)) {
  971. /* Didn't get an EDID, so
  972. * Set wide sync ranges so we get all modes
  973. * handed to valid_mode for checking
  974. */
  975. connector->display_info.min_vfreq = 0;
  976. connector->display_info.max_vfreq = 200;
  977. connector->display_info.min_hfreq = 0;
  978. connector->display_info.max_hfreq = 200;
  979. }
  980. list_for_each_entry(scan, &connector->probed_modes, head) {
  981. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  982. DRM_DEBUG_KMS("using preferred mode from EDID: ");
  983. drm_mode_debug_printmodeline(scan);
  984. fixed_mode = drm_mode_duplicate(dev, scan);
  985. if (fixed_mode) {
  986. intel_find_lvds_downclock(dev, fixed_mode,
  987. connector);
  988. goto out;
  989. }
  990. }
  991. }
  992. /* Failed to get EDID, what about VBT? */
  993. if (dev_priv->lfp_lvds_vbt_mode) {
  994. DRM_DEBUG_KMS("using mode from VBT: ");
  995. drm_mode_debug_printmodeline(dev_priv->lfp_lvds_vbt_mode);
  996. fixed_mode = drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  997. if (fixed_mode) {
  998. fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  999. goto out;
  1000. }
  1001. }
  1002. /*
  1003. * If we didn't get EDID, try checking if the panel is already turned
  1004. * on. If so, assume that whatever is currently programmed is the
  1005. * correct mode.
  1006. */
  1007. /* Ironlake: FIXME if still fail, not try pipe mode now */
  1008. if (HAS_PCH_SPLIT(dev))
  1009. goto failed;
  1010. lvds = I915_READ(LVDS);
  1011. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  1012. crtc = intel_get_crtc_for_pipe(dev, pipe);
  1013. if (crtc && (lvds & LVDS_PORT_EN)) {
  1014. fixed_mode = intel_crtc_mode_get(dev, crtc);
  1015. if (fixed_mode) {
  1016. DRM_DEBUG_KMS("using current (BIOS) mode: ");
  1017. drm_mode_debug_printmodeline(fixed_mode);
  1018. fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  1019. goto out;
  1020. }
  1021. }
  1022. /* If we still don't have a mode after all that, give up. */
  1023. if (!fixed_mode)
  1024. goto failed;
  1025. out:
  1026. lvds_encoder->is_dual_link = compute_is_dual_link_lvds(dev);
  1027. DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
  1028. lvds_encoder->is_dual_link ? "dual" : "single");
  1029. /*
  1030. * Unlock registers and just
  1031. * leave them unlocked
  1032. */
  1033. if (HAS_PCH_SPLIT(dev)) {
  1034. I915_WRITE(PCH_PP_CONTROL,
  1035. I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
  1036. } else {
  1037. I915_WRITE(PP_CONTROL,
  1038. I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  1039. }
  1040. lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
  1041. if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
  1042. DRM_DEBUG_KMS("lid notifier registration failed\n");
  1043. lvds_connector->lid_notifier.notifier_call = NULL;
  1044. }
  1045. drm_sysfs_connector_add(connector);
  1046. intel_panel_init(&intel_connector->panel, fixed_mode);
  1047. intel_panel_setup_backlight(connector);
  1048. return true;
  1049. failed:
  1050. DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  1051. drm_connector_cleanup(connector);
  1052. drm_encoder_cleanup(encoder);
  1053. if (fixed_mode)
  1054. drm_mode_destroy(dev, fixed_mode);
  1055. kfree(lvds_encoder);
  1056. kfree(lvds_connector);
  1057. return false;
  1058. }