i387.c 15 KB

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  1. /*
  2. * Copyright (C) 1994 Linus Torvalds
  3. *
  4. * Pentium III FXSR, SSE support
  5. * General FPU state handling cleanups
  6. * Gareth Hughes <gareth@valinux.com>, May 2000
  7. */
  8. #include <linux/module.h>
  9. #include <linux/regset.h>
  10. #include <linux/sched.h>
  11. #include <asm/sigcontext.h>
  12. #include <asm/processor.h>
  13. #include <asm/math_emu.h>
  14. #include <asm/uaccess.h>
  15. #include <asm/ptrace.h>
  16. #include <asm/i387.h>
  17. #include <asm/user.h>
  18. #ifdef CONFIG_X86_64
  19. # include <asm/sigcontext32.h>
  20. # include <asm/user32.h>
  21. #else
  22. # define save_i387_xstate_ia32 save_i387_xstate
  23. # define restore_i387_xstate_ia32 restore_i387_xstate
  24. # define _fpstate_ia32 _fpstate
  25. # define _xstate_ia32 _xstate
  26. # define sig_xstate_ia32_size sig_xstate_size
  27. # define fx_sw_reserved_ia32 fx_sw_reserved
  28. # define user_i387_ia32_struct user_i387_struct
  29. # define user32_fxsr_struct user_fxsr_struct
  30. #endif
  31. #ifdef CONFIG_MATH_EMULATION
  32. # define HAVE_HWFP (boot_cpu_data.hard_math)
  33. #else
  34. # define HAVE_HWFP 1
  35. #endif
  36. static unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
  37. unsigned int xstate_size;
  38. unsigned int sig_xstate_ia32_size = sizeof(struct _fpstate_ia32);
  39. static struct i387_fxsave_struct fx_scratch __cpuinitdata;
  40. void __cpuinit mxcsr_feature_mask_init(void)
  41. {
  42. unsigned long mask = 0;
  43. clts();
  44. if (cpu_has_fxsr) {
  45. memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
  46. asm volatile("fxsave %0" : : "m" (fx_scratch));
  47. mask = fx_scratch.mxcsr_mask;
  48. if (mask == 0)
  49. mask = 0x0000ffbf;
  50. }
  51. mxcsr_feature_mask &= mask;
  52. stts();
  53. }
  54. void __init init_thread_xstate(void)
  55. {
  56. if (!HAVE_HWFP) {
  57. xstate_size = sizeof(struct i387_soft_struct);
  58. return;
  59. }
  60. if (cpu_has_xsave) {
  61. xsave_cntxt_init();
  62. return;
  63. }
  64. if (cpu_has_fxsr)
  65. xstate_size = sizeof(struct i387_fxsave_struct);
  66. #ifdef CONFIG_X86_32
  67. else
  68. xstate_size = sizeof(struct i387_fsave_struct);
  69. #endif
  70. }
  71. #ifdef CONFIG_X86_64
  72. /*
  73. * Called at bootup to set up the initial FPU state that is later cloned
  74. * into all processes.
  75. */
  76. void __cpuinit fpu_init(void)
  77. {
  78. unsigned long oldcr0 = read_cr0();
  79. set_in_cr4(X86_CR4_OSFXSR);
  80. set_in_cr4(X86_CR4_OSXMMEXCPT);
  81. write_cr0(oldcr0 & ~(X86_CR0_TS|X86_CR0_EM)); /* clear TS and EM */
  82. /*
  83. * Boot processor to setup the FP and extended state context info.
  84. */
  85. if (!smp_processor_id())
  86. init_thread_xstate();
  87. xsave_init();
  88. mxcsr_feature_mask_init();
  89. /* clean state in init */
  90. if (cpu_has_xsave)
  91. current_thread_info()->status = TS_XSAVE;
  92. else
  93. current_thread_info()->status = 0;
  94. clear_used_math();
  95. }
  96. #endif /* CONFIG_X86_64 */
  97. /*
  98. * The _current_ task is using the FPU for the first time
  99. * so initialize it and set the mxcsr to its default
  100. * value at reset if we support XMM instructions and then
  101. * remeber the current task has used the FPU.
  102. */
  103. int init_fpu(struct task_struct *tsk)
  104. {
  105. if (tsk_used_math(tsk)) {
  106. if (HAVE_HWFP && tsk == current)
  107. unlazy_fpu(tsk);
  108. return 0;
  109. }
  110. /*
  111. * Memory allocation at the first usage of the FPU and other state.
  112. */
  113. if (!tsk->thread.xstate) {
  114. tsk->thread.xstate = kmem_cache_alloc(task_xstate_cachep,
  115. GFP_KERNEL);
  116. if (!tsk->thread.xstate)
  117. return -ENOMEM;
  118. }
  119. #ifdef CONFIG_X86_32
  120. if (!HAVE_HWFP) {
  121. memset(tsk->thread.xstate, 0, xstate_size);
  122. finit();
  123. set_stopped_child_used_math(tsk);
  124. return 0;
  125. }
  126. #endif
  127. if (cpu_has_fxsr) {
  128. struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
  129. memset(fx, 0, xstate_size);
  130. fx->cwd = 0x37f;
  131. if (cpu_has_xmm)
  132. fx->mxcsr = MXCSR_DEFAULT;
  133. } else {
  134. struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave;
  135. memset(fp, 0, xstate_size);
  136. fp->cwd = 0xffff037fu;
  137. fp->swd = 0xffff0000u;
  138. fp->twd = 0xffffffffu;
  139. fp->fos = 0xffff0000u;
  140. }
  141. /*
  142. * Only the device not available exception or ptrace can call init_fpu.
  143. */
  144. set_stopped_child_used_math(tsk);
  145. return 0;
  146. }
  147. int fpregs_active(struct task_struct *target, const struct user_regset *regset)
  148. {
  149. return tsk_used_math(target) ? regset->n : 0;
  150. }
  151. int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
  152. {
  153. return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
  154. }
  155. int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
  156. unsigned int pos, unsigned int count,
  157. void *kbuf, void __user *ubuf)
  158. {
  159. int ret;
  160. if (!cpu_has_fxsr)
  161. return -ENODEV;
  162. ret = init_fpu(target);
  163. if (ret)
  164. return ret;
  165. return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
  166. &target->thread.xstate->fxsave, 0, -1);
  167. }
  168. int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
  169. unsigned int pos, unsigned int count,
  170. const void *kbuf, const void __user *ubuf)
  171. {
  172. int ret;
  173. if (!cpu_has_fxsr)
  174. return -ENODEV;
  175. ret = init_fpu(target);
  176. if (ret)
  177. return ret;
  178. set_stopped_child_used_math(target);
  179. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
  180. &target->thread.xstate->fxsave, 0, -1);
  181. /*
  182. * mxcsr reserved bits must be masked to zero for security reasons.
  183. */
  184. target->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask;
  185. /*
  186. * update the header bits in the xsave header, indicating the
  187. * presence of FP and SSE state.
  188. */
  189. if (cpu_has_xsave)
  190. target->thread.xstate->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
  191. return ret;
  192. }
  193. #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
  194. /*
  195. * FPU tag word conversions.
  196. */
  197. static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
  198. {
  199. unsigned int tmp; /* to avoid 16 bit prefixes in the code */
  200. /* Transform each pair of bits into 01 (valid) or 00 (empty) */
  201. tmp = ~twd;
  202. tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
  203. /* and move the valid bits to the lower byte. */
  204. tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
  205. tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
  206. tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
  207. return tmp;
  208. }
  209. #define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16);
  210. #define FP_EXP_TAG_VALID 0
  211. #define FP_EXP_TAG_ZERO 1
  212. #define FP_EXP_TAG_SPECIAL 2
  213. #define FP_EXP_TAG_EMPTY 3
  214. static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
  215. {
  216. struct _fpxreg *st;
  217. u32 tos = (fxsave->swd >> 11) & 7;
  218. u32 twd = (unsigned long) fxsave->twd;
  219. u32 tag;
  220. u32 ret = 0xffff0000u;
  221. int i;
  222. for (i = 0; i < 8; i++, twd >>= 1) {
  223. if (twd & 0x1) {
  224. st = FPREG_ADDR(fxsave, (i - tos) & 7);
  225. switch (st->exponent & 0x7fff) {
  226. case 0x7fff:
  227. tag = FP_EXP_TAG_SPECIAL;
  228. break;
  229. case 0x0000:
  230. if (!st->significand[0] &&
  231. !st->significand[1] &&
  232. !st->significand[2] &&
  233. !st->significand[3])
  234. tag = FP_EXP_TAG_ZERO;
  235. else
  236. tag = FP_EXP_TAG_SPECIAL;
  237. break;
  238. default:
  239. if (st->significand[3] & 0x8000)
  240. tag = FP_EXP_TAG_VALID;
  241. else
  242. tag = FP_EXP_TAG_SPECIAL;
  243. break;
  244. }
  245. } else {
  246. tag = FP_EXP_TAG_EMPTY;
  247. }
  248. ret |= tag << (2 * i);
  249. }
  250. return ret;
  251. }
  252. /*
  253. * FXSR floating point environment conversions.
  254. */
  255. static void
  256. convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
  257. {
  258. struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave;
  259. struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
  260. struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
  261. int i;
  262. env->cwd = fxsave->cwd | 0xffff0000u;
  263. env->swd = fxsave->swd | 0xffff0000u;
  264. env->twd = twd_fxsr_to_i387(fxsave);
  265. #ifdef CONFIG_X86_64
  266. env->fip = fxsave->rip;
  267. env->foo = fxsave->rdp;
  268. if (tsk == current) {
  269. /*
  270. * should be actually ds/cs at fpu exception time, but
  271. * that information is not available in 64bit mode.
  272. */
  273. asm("mov %%ds, %[fos]" : [fos] "=r" (env->fos));
  274. asm("mov %%cs, %[fcs]" : [fcs] "=r" (env->fcs));
  275. } else {
  276. struct pt_regs *regs = task_pt_regs(tsk);
  277. env->fos = 0xffff0000 | tsk->thread.ds;
  278. env->fcs = regs->cs;
  279. }
  280. #else
  281. env->fip = fxsave->fip;
  282. env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
  283. env->foo = fxsave->foo;
  284. env->fos = fxsave->fos;
  285. #endif
  286. for (i = 0; i < 8; ++i)
  287. memcpy(&to[i], &from[i], sizeof(to[0]));
  288. }
  289. static void convert_to_fxsr(struct task_struct *tsk,
  290. const struct user_i387_ia32_struct *env)
  291. {
  292. struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave;
  293. struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
  294. struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
  295. int i;
  296. fxsave->cwd = env->cwd;
  297. fxsave->swd = env->swd;
  298. fxsave->twd = twd_i387_to_fxsr(env->twd);
  299. fxsave->fop = (u16) ((u32) env->fcs >> 16);
  300. #ifdef CONFIG_X86_64
  301. fxsave->rip = env->fip;
  302. fxsave->rdp = env->foo;
  303. /* cs and ds ignored */
  304. #else
  305. fxsave->fip = env->fip;
  306. fxsave->fcs = (env->fcs & 0xffff);
  307. fxsave->foo = env->foo;
  308. fxsave->fos = env->fos;
  309. #endif
  310. for (i = 0; i < 8; ++i)
  311. memcpy(&to[i], &from[i], sizeof(from[0]));
  312. }
  313. int fpregs_get(struct task_struct *target, const struct user_regset *regset,
  314. unsigned int pos, unsigned int count,
  315. void *kbuf, void __user *ubuf)
  316. {
  317. struct user_i387_ia32_struct env;
  318. int ret;
  319. ret = init_fpu(target);
  320. if (ret)
  321. return ret;
  322. if (!HAVE_HWFP)
  323. return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
  324. if (!cpu_has_fxsr) {
  325. return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
  326. &target->thread.xstate->fsave, 0,
  327. -1);
  328. }
  329. if (kbuf && pos == 0 && count == sizeof(env)) {
  330. convert_from_fxsr(kbuf, target);
  331. return 0;
  332. }
  333. convert_from_fxsr(&env, target);
  334. return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
  335. }
  336. int fpregs_set(struct task_struct *target, const struct user_regset *regset,
  337. unsigned int pos, unsigned int count,
  338. const void *kbuf, const void __user *ubuf)
  339. {
  340. struct user_i387_ia32_struct env;
  341. int ret;
  342. ret = init_fpu(target);
  343. if (ret)
  344. return ret;
  345. set_stopped_child_used_math(target);
  346. if (!HAVE_HWFP)
  347. return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
  348. if (!cpu_has_fxsr) {
  349. return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
  350. &target->thread.xstate->fsave, 0, -1);
  351. }
  352. if (pos > 0 || count < sizeof(env))
  353. convert_from_fxsr(&env, target);
  354. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
  355. if (!ret)
  356. convert_to_fxsr(target, &env);
  357. /*
  358. * update the header bit in the xsave header, indicating the
  359. * presence of FP.
  360. */
  361. if (cpu_has_xsave)
  362. target->thread.xstate->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
  363. return ret;
  364. }
  365. /*
  366. * Signal frame handlers.
  367. */
  368. static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf)
  369. {
  370. struct task_struct *tsk = current;
  371. struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave;
  372. fp->status = fp->swd;
  373. if (__copy_to_user(buf, fp, sizeof(struct i387_fsave_struct)))
  374. return -1;
  375. return 1;
  376. }
  377. static int save_i387_fxsave(struct _fpstate_ia32 __user *buf)
  378. {
  379. struct task_struct *tsk = current;
  380. struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
  381. struct user_i387_ia32_struct env;
  382. int err = 0;
  383. convert_from_fxsr(&env, tsk);
  384. if (__copy_to_user(buf, &env, sizeof(env)))
  385. return -1;
  386. err |= __put_user(fx->swd, &buf->status);
  387. err |= __put_user(X86_FXSR_MAGIC, &buf->magic);
  388. if (err)
  389. return -1;
  390. if (__copy_to_user(&buf->_fxsr_env[0], fx, xstate_size))
  391. return -1;
  392. return 1;
  393. }
  394. static int save_i387_xsave(void __user *buf)
  395. {
  396. struct _fpstate_ia32 __user *fx = buf;
  397. int err = 0;
  398. if (save_i387_fxsave(fx) < 0)
  399. return -1;
  400. err = __copy_to_user(&fx->sw_reserved, &fx_sw_reserved_ia32,
  401. sizeof(struct _fpx_sw_bytes));
  402. err |= __put_user(FP_XSTATE_MAGIC2,
  403. (__u32 __user *) (buf + sig_xstate_ia32_size
  404. - FP_XSTATE_MAGIC2_SIZE));
  405. if (err)
  406. return -1;
  407. return 1;
  408. }
  409. int save_i387_xstate_ia32(void __user *buf)
  410. {
  411. struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
  412. struct task_struct *tsk = current;
  413. if (!used_math())
  414. return 0;
  415. if (!access_ok(VERIFY_WRITE, buf, sig_xstate_ia32_size))
  416. return -EACCES;
  417. /*
  418. * This will cause a "finit" to be triggered by the next
  419. * attempted FPU operation by the 'current' process.
  420. */
  421. clear_used_math();
  422. if (!HAVE_HWFP) {
  423. return fpregs_soft_get(current, NULL,
  424. 0, sizeof(struct user_i387_ia32_struct),
  425. NULL, fp) ? -1 : 1;
  426. }
  427. unlazy_fpu(tsk);
  428. if (cpu_has_xsave)
  429. return save_i387_xsave(fp);
  430. if (cpu_has_fxsr)
  431. return save_i387_fxsave(fp);
  432. else
  433. return save_i387_fsave(fp);
  434. }
  435. static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
  436. {
  437. struct task_struct *tsk = current;
  438. return __copy_from_user(&tsk->thread.xstate->fsave, buf,
  439. sizeof(struct i387_fsave_struct));
  440. }
  441. static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf,
  442. unsigned int size)
  443. {
  444. struct task_struct *tsk = current;
  445. struct user_i387_ia32_struct env;
  446. int err;
  447. err = __copy_from_user(&tsk->thread.xstate->fxsave, &buf->_fxsr_env[0],
  448. size);
  449. /* mxcsr reserved bits must be masked to zero for security reasons */
  450. tsk->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask;
  451. if (err || __copy_from_user(&env, buf, sizeof(env)))
  452. return 1;
  453. convert_to_fxsr(tsk, &env);
  454. return 0;
  455. }
  456. static int restore_i387_xsave(void __user *buf)
  457. {
  458. struct _fpx_sw_bytes fx_sw_user;
  459. struct _fpstate_ia32 __user *fx_user =
  460. ((struct _fpstate_ia32 __user *) buf);
  461. struct i387_fxsave_struct __user *fx =
  462. (struct i387_fxsave_struct __user *) &fx_user->_fxsr_env[0];
  463. struct xsave_hdr_struct *xsave_hdr =
  464. &current->thread.xstate->xsave.xsave_hdr;
  465. u64 mask;
  466. int err;
  467. if (check_for_xstate(fx, buf, &fx_sw_user))
  468. goto fx_only;
  469. mask = fx_sw_user.xstate_bv;
  470. err = restore_i387_fxsave(buf, fx_sw_user.xstate_size);
  471. xsave_hdr->xstate_bv &= pcntxt_mask;
  472. /*
  473. * These bits must be zero.
  474. */
  475. xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
  476. /*
  477. * Init the state that is not present in the memory layout
  478. * and enabled by the OS.
  479. */
  480. mask = ~(pcntxt_mask & ~mask);
  481. xsave_hdr->xstate_bv &= mask;
  482. return err;
  483. fx_only:
  484. /*
  485. * Couldn't find the extended state information in the memory
  486. * layout. Restore the FP/SSE and init the other extended state
  487. * enabled by the OS.
  488. */
  489. xsave_hdr->xstate_bv = XSTATE_FPSSE;
  490. return restore_i387_fxsave(buf, sizeof(struct i387_fxsave_struct));
  491. }
  492. int restore_i387_xstate_ia32(void __user *buf)
  493. {
  494. int err;
  495. struct task_struct *tsk = current;
  496. struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
  497. if (HAVE_HWFP)
  498. clear_fpu(tsk);
  499. if (!buf) {
  500. if (used_math()) {
  501. clear_fpu(tsk);
  502. clear_used_math();
  503. }
  504. return 0;
  505. } else
  506. if (!access_ok(VERIFY_READ, buf, sig_xstate_ia32_size))
  507. return -EACCES;
  508. if (!used_math()) {
  509. err = init_fpu(tsk);
  510. if (err)
  511. return err;
  512. }
  513. if (HAVE_HWFP) {
  514. if (cpu_has_xsave)
  515. err = restore_i387_xsave(buf);
  516. else if (cpu_has_fxsr)
  517. err = restore_i387_fxsave(fp, sizeof(struct
  518. i387_fxsave_struct));
  519. else
  520. err = restore_i387_fsave(fp);
  521. } else {
  522. err = fpregs_soft_set(current, NULL,
  523. 0, sizeof(struct user_i387_ia32_struct),
  524. NULL, fp) != 0;
  525. }
  526. set_used_math();
  527. return err;
  528. }
  529. /*
  530. * FPU state for core dumps.
  531. * This is only used for a.out dumps now.
  532. * It is declared generically using elf_fpregset_t (which is
  533. * struct user_i387_struct) but is in fact only used for 32-bit
  534. * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
  535. */
  536. int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
  537. {
  538. struct task_struct *tsk = current;
  539. int fpvalid;
  540. fpvalid = !!used_math();
  541. if (fpvalid)
  542. fpvalid = !fpregs_get(tsk, NULL,
  543. 0, sizeof(struct user_i387_ia32_struct),
  544. fpu, NULL);
  545. return fpvalid;
  546. }
  547. EXPORT_SYMBOL(dump_fpu);
  548. #endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */