mmu.c 70 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * This module enables machines with Intel VT-x extensions to run virtual
  5. * machines without emulation or binary translation.
  6. *
  7. * MMU support
  8. *
  9. * Copyright (C) 2006 Qumranet, Inc.
  10. *
  11. * Authors:
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Avi Kivity <avi@qumranet.com>
  14. *
  15. * This work is licensed under the terms of the GNU GPL, version 2. See
  16. * the COPYING file in the top-level directory.
  17. *
  18. */
  19. #include "mmu.h"
  20. #include <linux/kvm_host.h>
  21. #include <linux/types.h>
  22. #include <linux/string.h>
  23. #include <linux/mm.h>
  24. #include <linux/highmem.h>
  25. #include <linux/module.h>
  26. #include <linux/swap.h>
  27. #include <linux/hugetlb.h>
  28. #include <linux/compiler.h>
  29. #include <asm/page.h>
  30. #include <asm/cmpxchg.h>
  31. #include <asm/io.h>
  32. #include <asm/vmx.h>
  33. /*
  34. * When setting this variable to true it enables Two-Dimensional-Paging
  35. * where the hardware walks 2 page tables:
  36. * 1. the guest-virtual to guest-physical
  37. * 2. while doing 1. it walks guest-physical to host-physical
  38. * If the hardware supports that we don't need to do shadow paging.
  39. */
  40. bool tdp_enabled = false;
  41. #undef MMU_DEBUG
  42. #undef AUDIT
  43. #ifdef AUDIT
  44. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
  45. #else
  46. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
  47. #endif
  48. #ifdef MMU_DEBUG
  49. #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  50. #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  51. #else
  52. #define pgprintk(x...) do { } while (0)
  53. #define rmap_printk(x...) do { } while (0)
  54. #endif
  55. #if defined(MMU_DEBUG) || defined(AUDIT)
  56. static int dbg = 0;
  57. module_param(dbg, bool, 0644);
  58. #endif
  59. static int oos_shadow = 1;
  60. module_param(oos_shadow, bool, 0644);
  61. #ifndef MMU_DEBUG
  62. #define ASSERT(x) do { } while (0)
  63. #else
  64. #define ASSERT(x) \
  65. if (!(x)) { \
  66. printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
  67. __FILE__, __LINE__, #x); \
  68. }
  69. #endif
  70. #define PT_FIRST_AVAIL_BITS_SHIFT 9
  71. #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  72. #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  73. #define PT64_LEVEL_BITS 9
  74. #define PT64_LEVEL_SHIFT(level) \
  75. (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
  76. #define PT64_LEVEL_MASK(level) \
  77. (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
  78. #define PT64_INDEX(address, level)\
  79. (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
  80. #define PT32_LEVEL_BITS 10
  81. #define PT32_LEVEL_SHIFT(level) \
  82. (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
  83. #define PT32_LEVEL_MASK(level) \
  84. (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
  85. #define PT32_INDEX(address, level)\
  86. (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
  87. #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
  88. #define PT64_DIR_BASE_ADDR_MASK \
  89. (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
  90. #define PT32_BASE_ADDR_MASK PAGE_MASK
  91. #define PT32_DIR_BASE_ADDR_MASK \
  92. (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
  93. #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
  94. | PT64_NX_MASK)
  95. #define PFERR_PRESENT_MASK (1U << 0)
  96. #define PFERR_WRITE_MASK (1U << 1)
  97. #define PFERR_USER_MASK (1U << 2)
  98. #define PFERR_FETCH_MASK (1U << 4)
  99. #define PT_DIRECTORY_LEVEL 2
  100. #define PT_PAGE_TABLE_LEVEL 1
  101. #define RMAP_EXT 4
  102. #define ACC_EXEC_MASK 1
  103. #define ACC_WRITE_MASK PT_WRITABLE_MASK
  104. #define ACC_USER_MASK PT_USER_MASK
  105. #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
  106. #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
  107. struct kvm_rmap_desc {
  108. u64 *shadow_ptes[RMAP_EXT];
  109. struct kvm_rmap_desc *more;
  110. };
  111. struct kvm_shadow_walk {
  112. int (*entry)(struct kvm_shadow_walk *walk, struct kvm_vcpu *vcpu,
  113. u64 addr, u64 *spte, int level);
  114. };
  115. struct kvm_unsync_walk {
  116. int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
  117. };
  118. typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
  119. static struct kmem_cache *pte_chain_cache;
  120. static struct kmem_cache *rmap_desc_cache;
  121. static struct kmem_cache *mmu_page_header_cache;
  122. static u64 __read_mostly shadow_trap_nonpresent_pte;
  123. static u64 __read_mostly shadow_notrap_nonpresent_pte;
  124. static u64 __read_mostly shadow_base_present_pte;
  125. static u64 __read_mostly shadow_nx_mask;
  126. static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
  127. static u64 __read_mostly shadow_user_mask;
  128. static u64 __read_mostly shadow_accessed_mask;
  129. static u64 __read_mostly shadow_dirty_mask;
  130. static u64 __read_mostly shadow_mt_mask;
  131. void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
  132. {
  133. shadow_trap_nonpresent_pte = trap_pte;
  134. shadow_notrap_nonpresent_pte = notrap_pte;
  135. }
  136. EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
  137. void kvm_mmu_set_base_ptes(u64 base_pte)
  138. {
  139. shadow_base_present_pte = base_pte;
  140. }
  141. EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
  142. void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
  143. u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 mt_mask)
  144. {
  145. shadow_user_mask = user_mask;
  146. shadow_accessed_mask = accessed_mask;
  147. shadow_dirty_mask = dirty_mask;
  148. shadow_nx_mask = nx_mask;
  149. shadow_x_mask = x_mask;
  150. shadow_mt_mask = mt_mask;
  151. }
  152. EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
  153. static int is_write_protection(struct kvm_vcpu *vcpu)
  154. {
  155. return vcpu->arch.cr0 & X86_CR0_WP;
  156. }
  157. static int is_cpuid_PSE36(void)
  158. {
  159. return 1;
  160. }
  161. static int is_nx(struct kvm_vcpu *vcpu)
  162. {
  163. return vcpu->arch.shadow_efer & EFER_NX;
  164. }
  165. static int is_present_pte(unsigned long pte)
  166. {
  167. return pte & PT_PRESENT_MASK;
  168. }
  169. static int is_shadow_present_pte(u64 pte)
  170. {
  171. return pte != shadow_trap_nonpresent_pte
  172. && pte != shadow_notrap_nonpresent_pte;
  173. }
  174. static int is_large_pte(u64 pte)
  175. {
  176. return pte & PT_PAGE_SIZE_MASK;
  177. }
  178. static int is_writeble_pte(unsigned long pte)
  179. {
  180. return pte & PT_WRITABLE_MASK;
  181. }
  182. static int is_dirty_pte(unsigned long pte)
  183. {
  184. return pte & shadow_dirty_mask;
  185. }
  186. static int is_rmap_pte(u64 pte)
  187. {
  188. return is_shadow_present_pte(pte);
  189. }
  190. static pfn_t spte_to_pfn(u64 pte)
  191. {
  192. return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  193. }
  194. static gfn_t pse36_gfn_delta(u32 gpte)
  195. {
  196. int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
  197. return (gpte & PT32_DIR_PSE36_MASK) << shift;
  198. }
  199. static void set_shadow_pte(u64 *sptep, u64 spte)
  200. {
  201. #ifdef CONFIG_X86_64
  202. set_64bit((unsigned long *)sptep, spte);
  203. #else
  204. set_64bit((unsigned long long *)sptep, spte);
  205. #endif
  206. }
  207. static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
  208. struct kmem_cache *base_cache, int min)
  209. {
  210. void *obj;
  211. if (cache->nobjs >= min)
  212. return 0;
  213. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  214. obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
  215. if (!obj)
  216. return -ENOMEM;
  217. cache->objects[cache->nobjs++] = obj;
  218. }
  219. return 0;
  220. }
  221. static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
  222. {
  223. while (mc->nobjs)
  224. kfree(mc->objects[--mc->nobjs]);
  225. }
  226. static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
  227. int min)
  228. {
  229. struct page *page;
  230. if (cache->nobjs >= min)
  231. return 0;
  232. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  233. page = alloc_page(GFP_KERNEL);
  234. if (!page)
  235. return -ENOMEM;
  236. set_page_private(page, 0);
  237. cache->objects[cache->nobjs++] = page_address(page);
  238. }
  239. return 0;
  240. }
  241. static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
  242. {
  243. while (mc->nobjs)
  244. free_page((unsigned long)mc->objects[--mc->nobjs]);
  245. }
  246. static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
  247. {
  248. int r;
  249. r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
  250. pte_chain_cache, 4);
  251. if (r)
  252. goto out;
  253. r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
  254. rmap_desc_cache, 4);
  255. if (r)
  256. goto out;
  257. r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
  258. if (r)
  259. goto out;
  260. r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
  261. mmu_page_header_cache, 4);
  262. out:
  263. return r;
  264. }
  265. static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
  266. {
  267. mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
  268. mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
  269. mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
  270. mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
  271. }
  272. static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
  273. size_t size)
  274. {
  275. void *p;
  276. BUG_ON(!mc->nobjs);
  277. p = mc->objects[--mc->nobjs];
  278. memset(p, 0, size);
  279. return p;
  280. }
  281. static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
  282. {
  283. return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
  284. sizeof(struct kvm_pte_chain));
  285. }
  286. static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
  287. {
  288. kfree(pc);
  289. }
  290. static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
  291. {
  292. return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
  293. sizeof(struct kvm_rmap_desc));
  294. }
  295. static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
  296. {
  297. kfree(rd);
  298. }
  299. /*
  300. * Return the pointer to the largepage write count for a given
  301. * gfn, handling slots that are not large page aligned.
  302. */
  303. static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
  304. {
  305. unsigned long idx;
  306. idx = (gfn / KVM_PAGES_PER_HPAGE) -
  307. (slot->base_gfn / KVM_PAGES_PER_HPAGE);
  308. return &slot->lpage_info[idx].write_count;
  309. }
  310. static void account_shadowed(struct kvm *kvm, gfn_t gfn)
  311. {
  312. int *write_count;
  313. gfn = unalias_gfn(kvm, gfn);
  314. write_count = slot_largepage_idx(gfn,
  315. gfn_to_memslot_unaliased(kvm, gfn));
  316. *write_count += 1;
  317. }
  318. static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
  319. {
  320. int *write_count;
  321. gfn = unalias_gfn(kvm, gfn);
  322. write_count = slot_largepage_idx(gfn,
  323. gfn_to_memslot_unaliased(kvm, gfn));
  324. *write_count -= 1;
  325. WARN_ON(*write_count < 0);
  326. }
  327. static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
  328. {
  329. struct kvm_memory_slot *slot;
  330. int *largepage_idx;
  331. gfn = unalias_gfn(kvm, gfn);
  332. slot = gfn_to_memslot_unaliased(kvm, gfn);
  333. if (slot) {
  334. largepage_idx = slot_largepage_idx(gfn, slot);
  335. return *largepage_idx;
  336. }
  337. return 1;
  338. }
  339. static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
  340. {
  341. struct vm_area_struct *vma;
  342. unsigned long addr;
  343. int ret = 0;
  344. addr = gfn_to_hva(kvm, gfn);
  345. if (kvm_is_error_hva(addr))
  346. return ret;
  347. down_read(&current->mm->mmap_sem);
  348. vma = find_vma(current->mm, addr);
  349. if (vma && is_vm_hugetlb_page(vma))
  350. ret = 1;
  351. up_read(&current->mm->mmap_sem);
  352. return ret;
  353. }
  354. static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
  355. {
  356. struct kvm_memory_slot *slot;
  357. if (has_wrprotected_page(vcpu->kvm, large_gfn))
  358. return 0;
  359. if (!host_largepage_backed(vcpu->kvm, large_gfn))
  360. return 0;
  361. slot = gfn_to_memslot(vcpu->kvm, large_gfn);
  362. if (slot && slot->dirty_bitmap)
  363. return 0;
  364. return 1;
  365. }
  366. /*
  367. * Take gfn and return the reverse mapping to it.
  368. * Note: gfn must be unaliased before this function get called
  369. */
  370. static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
  371. {
  372. struct kvm_memory_slot *slot;
  373. unsigned long idx;
  374. slot = gfn_to_memslot(kvm, gfn);
  375. if (!lpage)
  376. return &slot->rmap[gfn - slot->base_gfn];
  377. idx = (gfn / KVM_PAGES_PER_HPAGE) -
  378. (slot->base_gfn / KVM_PAGES_PER_HPAGE);
  379. return &slot->lpage_info[idx].rmap_pde;
  380. }
  381. /*
  382. * Reverse mapping data structures:
  383. *
  384. * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
  385. * that points to page_address(page).
  386. *
  387. * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
  388. * containing more mappings.
  389. */
  390. static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
  391. {
  392. struct kvm_mmu_page *sp;
  393. struct kvm_rmap_desc *desc;
  394. unsigned long *rmapp;
  395. int i;
  396. if (!is_rmap_pte(*spte))
  397. return;
  398. gfn = unalias_gfn(vcpu->kvm, gfn);
  399. sp = page_header(__pa(spte));
  400. sp->gfns[spte - sp->spt] = gfn;
  401. rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
  402. if (!*rmapp) {
  403. rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
  404. *rmapp = (unsigned long)spte;
  405. } else if (!(*rmapp & 1)) {
  406. rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
  407. desc = mmu_alloc_rmap_desc(vcpu);
  408. desc->shadow_ptes[0] = (u64 *)*rmapp;
  409. desc->shadow_ptes[1] = spte;
  410. *rmapp = (unsigned long)desc | 1;
  411. } else {
  412. rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
  413. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  414. while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
  415. desc = desc->more;
  416. if (desc->shadow_ptes[RMAP_EXT-1]) {
  417. desc->more = mmu_alloc_rmap_desc(vcpu);
  418. desc = desc->more;
  419. }
  420. for (i = 0; desc->shadow_ptes[i]; ++i)
  421. ;
  422. desc->shadow_ptes[i] = spte;
  423. }
  424. }
  425. static void rmap_desc_remove_entry(unsigned long *rmapp,
  426. struct kvm_rmap_desc *desc,
  427. int i,
  428. struct kvm_rmap_desc *prev_desc)
  429. {
  430. int j;
  431. for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
  432. ;
  433. desc->shadow_ptes[i] = desc->shadow_ptes[j];
  434. desc->shadow_ptes[j] = NULL;
  435. if (j != 0)
  436. return;
  437. if (!prev_desc && !desc->more)
  438. *rmapp = (unsigned long)desc->shadow_ptes[0];
  439. else
  440. if (prev_desc)
  441. prev_desc->more = desc->more;
  442. else
  443. *rmapp = (unsigned long)desc->more | 1;
  444. mmu_free_rmap_desc(desc);
  445. }
  446. static void rmap_remove(struct kvm *kvm, u64 *spte)
  447. {
  448. struct kvm_rmap_desc *desc;
  449. struct kvm_rmap_desc *prev_desc;
  450. struct kvm_mmu_page *sp;
  451. pfn_t pfn;
  452. unsigned long *rmapp;
  453. int i;
  454. if (!is_rmap_pte(*spte))
  455. return;
  456. sp = page_header(__pa(spte));
  457. pfn = spte_to_pfn(*spte);
  458. if (*spte & shadow_accessed_mask)
  459. kvm_set_pfn_accessed(pfn);
  460. if (is_writeble_pte(*spte))
  461. kvm_release_pfn_dirty(pfn);
  462. else
  463. kvm_release_pfn_clean(pfn);
  464. rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
  465. if (!*rmapp) {
  466. printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
  467. BUG();
  468. } else if (!(*rmapp & 1)) {
  469. rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
  470. if ((u64 *)*rmapp != spte) {
  471. printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
  472. spte, *spte);
  473. BUG();
  474. }
  475. *rmapp = 0;
  476. } else {
  477. rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
  478. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  479. prev_desc = NULL;
  480. while (desc) {
  481. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
  482. if (desc->shadow_ptes[i] == spte) {
  483. rmap_desc_remove_entry(rmapp,
  484. desc, i,
  485. prev_desc);
  486. return;
  487. }
  488. prev_desc = desc;
  489. desc = desc->more;
  490. }
  491. BUG();
  492. }
  493. }
  494. static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
  495. {
  496. struct kvm_rmap_desc *desc;
  497. struct kvm_rmap_desc *prev_desc;
  498. u64 *prev_spte;
  499. int i;
  500. if (!*rmapp)
  501. return NULL;
  502. else if (!(*rmapp & 1)) {
  503. if (!spte)
  504. return (u64 *)*rmapp;
  505. return NULL;
  506. }
  507. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  508. prev_desc = NULL;
  509. prev_spte = NULL;
  510. while (desc) {
  511. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
  512. if (prev_spte == spte)
  513. return desc->shadow_ptes[i];
  514. prev_spte = desc->shadow_ptes[i];
  515. }
  516. desc = desc->more;
  517. }
  518. return NULL;
  519. }
  520. static void rmap_write_protect(struct kvm *kvm, u64 gfn)
  521. {
  522. unsigned long *rmapp;
  523. u64 *spte;
  524. int write_protected = 0;
  525. gfn = unalias_gfn(kvm, gfn);
  526. rmapp = gfn_to_rmap(kvm, gfn, 0);
  527. spte = rmap_next(kvm, rmapp, NULL);
  528. while (spte) {
  529. BUG_ON(!spte);
  530. BUG_ON(!(*spte & PT_PRESENT_MASK));
  531. rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
  532. if (is_writeble_pte(*spte)) {
  533. set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
  534. write_protected = 1;
  535. }
  536. spte = rmap_next(kvm, rmapp, spte);
  537. }
  538. if (write_protected) {
  539. pfn_t pfn;
  540. spte = rmap_next(kvm, rmapp, NULL);
  541. pfn = spte_to_pfn(*spte);
  542. kvm_set_pfn_dirty(pfn);
  543. }
  544. /* check for huge page mappings */
  545. rmapp = gfn_to_rmap(kvm, gfn, 1);
  546. spte = rmap_next(kvm, rmapp, NULL);
  547. while (spte) {
  548. BUG_ON(!spte);
  549. BUG_ON(!(*spte & PT_PRESENT_MASK));
  550. BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
  551. pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
  552. if (is_writeble_pte(*spte)) {
  553. rmap_remove(kvm, spte);
  554. --kvm->stat.lpages;
  555. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  556. spte = NULL;
  557. write_protected = 1;
  558. }
  559. spte = rmap_next(kvm, rmapp, spte);
  560. }
  561. if (write_protected)
  562. kvm_flush_remote_tlbs(kvm);
  563. }
  564. static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
  565. {
  566. u64 *spte;
  567. int need_tlb_flush = 0;
  568. while ((spte = rmap_next(kvm, rmapp, NULL))) {
  569. BUG_ON(!(*spte & PT_PRESENT_MASK));
  570. rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
  571. rmap_remove(kvm, spte);
  572. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  573. need_tlb_flush = 1;
  574. }
  575. return need_tlb_flush;
  576. }
  577. static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
  578. int (*handler)(struct kvm *kvm, unsigned long *rmapp))
  579. {
  580. int i;
  581. int retval = 0;
  582. /*
  583. * If mmap_sem isn't taken, we can look the memslots with only
  584. * the mmu_lock by skipping over the slots with userspace_addr == 0.
  585. */
  586. for (i = 0; i < kvm->nmemslots; i++) {
  587. struct kvm_memory_slot *memslot = &kvm->memslots[i];
  588. unsigned long start = memslot->userspace_addr;
  589. unsigned long end;
  590. /* mmu_lock protects userspace_addr */
  591. if (!start)
  592. continue;
  593. end = start + (memslot->npages << PAGE_SHIFT);
  594. if (hva >= start && hva < end) {
  595. gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
  596. retval |= handler(kvm, &memslot->rmap[gfn_offset]);
  597. retval |= handler(kvm,
  598. &memslot->lpage_info[
  599. gfn_offset /
  600. KVM_PAGES_PER_HPAGE].rmap_pde);
  601. }
  602. }
  603. return retval;
  604. }
  605. int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
  606. {
  607. return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
  608. }
  609. static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
  610. {
  611. u64 *spte;
  612. int young = 0;
  613. /* always return old for EPT */
  614. if (!shadow_accessed_mask)
  615. return 0;
  616. spte = rmap_next(kvm, rmapp, NULL);
  617. while (spte) {
  618. int _young;
  619. u64 _spte = *spte;
  620. BUG_ON(!(_spte & PT_PRESENT_MASK));
  621. _young = _spte & PT_ACCESSED_MASK;
  622. if (_young) {
  623. young = 1;
  624. clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
  625. }
  626. spte = rmap_next(kvm, rmapp, spte);
  627. }
  628. return young;
  629. }
  630. int kvm_age_hva(struct kvm *kvm, unsigned long hva)
  631. {
  632. return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
  633. }
  634. #ifdef MMU_DEBUG
  635. static int is_empty_shadow_page(u64 *spt)
  636. {
  637. u64 *pos;
  638. u64 *end;
  639. for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
  640. if (is_shadow_present_pte(*pos)) {
  641. printk(KERN_ERR "%s: %p %llx\n", __func__,
  642. pos, *pos);
  643. return 0;
  644. }
  645. return 1;
  646. }
  647. #endif
  648. static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  649. {
  650. ASSERT(is_empty_shadow_page(sp->spt));
  651. list_del(&sp->link);
  652. __free_page(virt_to_page(sp->spt));
  653. __free_page(virt_to_page(sp->gfns));
  654. kfree(sp);
  655. ++kvm->arch.n_free_mmu_pages;
  656. }
  657. static unsigned kvm_page_table_hashfn(gfn_t gfn)
  658. {
  659. return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
  660. }
  661. static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
  662. u64 *parent_pte)
  663. {
  664. struct kvm_mmu_page *sp;
  665. sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
  666. sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  667. sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  668. set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
  669. list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
  670. ASSERT(is_empty_shadow_page(sp->spt));
  671. bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
  672. sp->multimapped = 0;
  673. sp->parent_pte = parent_pte;
  674. --vcpu->kvm->arch.n_free_mmu_pages;
  675. return sp;
  676. }
  677. static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
  678. struct kvm_mmu_page *sp, u64 *parent_pte)
  679. {
  680. struct kvm_pte_chain *pte_chain;
  681. struct hlist_node *node;
  682. int i;
  683. if (!parent_pte)
  684. return;
  685. if (!sp->multimapped) {
  686. u64 *old = sp->parent_pte;
  687. if (!old) {
  688. sp->parent_pte = parent_pte;
  689. return;
  690. }
  691. sp->multimapped = 1;
  692. pte_chain = mmu_alloc_pte_chain(vcpu);
  693. INIT_HLIST_HEAD(&sp->parent_ptes);
  694. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  695. pte_chain->parent_ptes[0] = old;
  696. }
  697. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
  698. if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
  699. continue;
  700. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
  701. if (!pte_chain->parent_ptes[i]) {
  702. pte_chain->parent_ptes[i] = parent_pte;
  703. return;
  704. }
  705. }
  706. pte_chain = mmu_alloc_pte_chain(vcpu);
  707. BUG_ON(!pte_chain);
  708. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  709. pte_chain->parent_ptes[0] = parent_pte;
  710. }
  711. static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
  712. u64 *parent_pte)
  713. {
  714. struct kvm_pte_chain *pte_chain;
  715. struct hlist_node *node;
  716. int i;
  717. if (!sp->multimapped) {
  718. BUG_ON(sp->parent_pte != parent_pte);
  719. sp->parent_pte = NULL;
  720. return;
  721. }
  722. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  723. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  724. if (!pte_chain->parent_ptes[i])
  725. break;
  726. if (pte_chain->parent_ptes[i] != parent_pte)
  727. continue;
  728. while (i + 1 < NR_PTE_CHAIN_ENTRIES
  729. && pte_chain->parent_ptes[i + 1]) {
  730. pte_chain->parent_ptes[i]
  731. = pte_chain->parent_ptes[i + 1];
  732. ++i;
  733. }
  734. pte_chain->parent_ptes[i] = NULL;
  735. if (i == 0) {
  736. hlist_del(&pte_chain->link);
  737. mmu_free_pte_chain(pte_chain);
  738. if (hlist_empty(&sp->parent_ptes)) {
  739. sp->multimapped = 0;
  740. sp->parent_pte = NULL;
  741. }
  742. }
  743. return;
  744. }
  745. BUG();
  746. }
  747. static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
  748. mmu_parent_walk_fn fn)
  749. {
  750. struct kvm_pte_chain *pte_chain;
  751. struct hlist_node *node;
  752. struct kvm_mmu_page *parent_sp;
  753. int i;
  754. if (!sp->multimapped && sp->parent_pte) {
  755. parent_sp = page_header(__pa(sp->parent_pte));
  756. fn(vcpu, parent_sp);
  757. mmu_parent_walk(vcpu, parent_sp, fn);
  758. return;
  759. }
  760. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  761. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  762. if (!pte_chain->parent_ptes[i])
  763. break;
  764. parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
  765. fn(vcpu, parent_sp);
  766. mmu_parent_walk(vcpu, parent_sp, fn);
  767. }
  768. }
  769. static void kvm_mmu_update_unsync_bitmap(u64 *spte)
  770. {
  771. unsigned int index;
  772. struct kvm_mmu_page *sp = page_header(__pa(spte));
  773. index = spte - sp->spt;
  774. __set_bit(index, sp->unsync_child_bitmap);
  775. sp->unsync_children = 1;
  776. }
  777. static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
  778. {
  779. struct kvm_pte_chain *pte_chain;
  780. struct hlist_node *node;
  781. int i;
  782. if (!sp->parent_pte)
  783. return;
  784. if (!sp->multimapped) {
  785. kvm_mmu_update_unsync_bitmap(sp->parent_pte);
  786. return;
  787. }
  788. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  789. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  790. if (!pte_chain->parent_ptes[i])
  791. break;
  792. kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
  793. }
  794. }
  795. static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  796. {
  797. sp->unsync_children = 1;
  798. kvm_mmu_update_parents_unsync(sp);
  799. return 1;
  800. }
  801. static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
  802. struct kvm_mmu_page *sp)
  803. {
  804. mmu_parent_walk(vcpu, sp, unsync_walk_fn);
  805. kvm_mmu_update_parents_unsync(sp);
  806. }
  807. static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
  808. struct kvm_mmu_page *sp)
  809. {
  810. int i;
  811. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  812. sp->spt[i] = shadow_trap_nonpresent_pte;
  813. }
  814. static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
  815. struct kvm_mmu_page *sp)
  816. {
  817. return 1;
  818. }
  819. static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
  820. {
  821. }
  822. #define for_each_unsync_children(bitmap, idx) \
  823. for (idx = find_first_bit(bitmap, 512); \
  824. idx < 512; \
  825. idx = find_next_bit(bitmap, 512, idx+1))
  826. static int mmu_unsync_walk(struct kvm_mmu_page *sp,
  827. struct kvm_unsync_walk *walker)
  828. {
  829. int i, ret;
  830. if (!sp->unsync_children)
  831. return 0;
  832. for_each_unsync_children(sp->unsync_child_bitmap, i) {
  833. u64 ent = sp->spt[i];
  834. if (is_shadow_present_pte(ent)) {
  835. struct kvm_mmu_page *child;
  836. child = page_header(ent & PT64_BASE_ADDR_MASK);
  837. if (child->unsync_children) {
  838. ret = mmu_unsync_walk(child, walker);
  839. if (ret)
  840. return ret;
  841. __clear_bit(i, sp->unsync_child_bitmap);
  842. }
  843. if (child->unsync) {
  844. ret = walker->entry(child, walker);
  845. __clear_bit(i, sp->unsync_child_bitmap);
  846. if (ret)
  847. return ret;
  848. }
  849. }
  850. }
  851. if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
  852. sp->unsync_children = 0;
  853. return 0;
  854. }
  855. static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
  856. {
  857. unsigned index;
  858. struct hlist_head *bucket;
  859. struct kvm_mmu_page *sp;
  860. struct hlist_node *node;
  861. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  862. index = kvm_page_table_hashfn(gfn);
  863. bucket = &kvm->arch.mmu_page_hash[index];
  864. hlist_for_each_entry(sp, node, bucket, hash_link)
  865. if (sp->gfn == gfn && !sp->role.metaphysical
  866. && !sp->role.invalid) {
  867. pgprintk("%s: found role %x\n",
  868. __func__, sp->role.word);
  869. return sp;
  870. }
  871. return NULL;
  872. }
  873. static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  874. {
  875. WARN_ON(!sp->unsync);
  876. sp->unsync = 0;
  877. --kvm->stat.mmu_unsync;
  878. }
  879. static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
  880. static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  881. {
  882. if (sp->role.glevels != vcpu->arch.mmu.root_level) {
  883. kvm_mmu_zap_page(vcpu->kvm, sp);
  884. return 1;
  885. }
  886. rmap_write_protect(vcpu->kvm, sp->gfn);
  887. kvm_unlink_unsync_page(vcpu->kvm, sp);
  888. if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
  889. kvm_mmu_zap_page(vcpu->kvm, sp);
  890. return 1;
  891. }
  892. kvm_mmu_flush_tlb(vcpu);
  893. return 0;
  894. }
  895. struct sync_walker {
  896. struct kvm_vcpu *vcpu;
  897. struct kvm_unsync_walk walker;
  898. };
  899. static int mmu_sync_fn(struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk)
  900. {
  901. struct sync_walker *sync_walk = container_of(walk, struct sync_walker,
  902. walker);
  903. struct kvm_vcpu *vcpu = sync_walk->vcpu;
  904. kvm_sync_page(vcpu, sp);
  905. return (need_resched() || spin_needbreak(&vcpu->kvm->mmu_lock));
  906. }
  907. static void mmu_sync_children(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  908. {
  909. struct sync_walker walker = {
  910. .walker = { .entry = mmu_sync_fn, },
  911. .vcpu = vcpu,
  912. };
  913. while (mmu_unsync_walk(sp, &walker.walker))
  914. cond_resched_lock(&vcpu->kvm->mmu_lock);
  915. }
  916. static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
  917. gfn_t gfn,
  918. gva_t gaddr,
  919. unsigned level,
  920. int metaphysical,
  921. unsigned access,
  922. u64 *parent_pte)
  923. {
  924. union kvm_mmu_page_role role;
  925. unsigned index;
  926. unsigned quadrant;
  927. struct hlist_head *bucket;
  928. struct kvm_mmu_page *sp;
  929. struct hlist_node *node, *tmp;
  930. role.word = 0;
  931. role.glevels = vcpu->arch.mmu.root_level;
  932. role.level = level;
  933. role.metaphysical = metaphysical;
  934. role.access = access;
  935. if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
  936. quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
  937. quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
  938. role.quadrant = quadrant;
  939. }
  940. pgprintk("%s: looking gfn %lx role %x\n", __func__,
  941. gfn, role.word);
  942. index = kvm_page_table_hashfn(gfn);
  943. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  944. hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
  945. if (sp->gfn == gfn) {
  946. if (sp->unsync)
  947. if (kvm_sync_page(vcpu, sp))
  948. continue;
  949. if (sp->role.word != role.word)
  950. continue;
  951. mmu_page_add_parent_pte(vcpu, sp, parent_pte);
  952. if (sp->unsync_children) {
  953. set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
  954. kvm_mmu_mark_parents_unsync(vcpu, sp);
  955. }
  956. pgprintk("%s: found\n", __func__);
  957. return sp;
  958. }
  959. ++vcpu->kvm->stat.mmu_cache_miss;
  960. sp = kvm_mmu_alloc_page(vcpu, parent_pte);
  961. if (!sp)
  962. return sp;
  963. pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
  964. sp->gfn = gfn;
  965. sp->role = role;
  966. hlist_add_head(&sp->hash_link, bucket);
  967. if (!metaphysical) {
  968. rmap_write_protect(vcpu->kvm, gfn);
  969. account_shadowed(vcpu->kvm, gfn);
  970. }
  971. if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
  972. vcpu->arch.mmu.prefetch_page(vcpu, sp);
  973. else
  974. nonpaging_prefetch_page(vcpu, sp);
  975. return sp;
  976. }
  977. static int walk_shadow(struct kvm_shadow_walk *walker,
  978. struct kvm_vcpu *vcpu, u64 addr)
  979. {
  980. hpa_t shadow_addr;
  981. int level;
  982. int r;
  983. u64 *sptep;
  984. unsigned index;
  985. shadow_addr = vcpu->arch.mmu.root_hpa;
  986. level = vcpu->arch.mmu.shadow_root_level;
  987. if (level == PT32E_ROOT_LEVEL) {
  988. shadow_addr = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
  989. shadow_addr &= PT64_BASE_ADDR_MASK;
  990. --level;
  991. }
  992. while (level >= PT_PAGE_TABLE_LEVEL) {
  993. index = SHADOW_PT_INDEX(addr, level);
  994. sptep = ((u64 *)__va(shadow_addr)) + index;
  995. r = walker->entry(walker, vcpu, addr, sptep, level);
  996. if (r)
  997. return r;
  998. shadow_addr = *sptep & PT64_BASE_ADDR_MASK;
  999. --level;
  1000. }
  1001. return 0;
  1002. }
  1003. static void kvm_mmu_page_unlink_children(struct kvm *kvm,
  1004. struct kvm_mmu_page *sp)
  1005. {
  1006. unsigned i;
  1007. u64 *pt;
  1008. u64 ent;
  1009. pt = sp->spt;
  1010. if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
  1011. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1012. if (is_shadow_present_pte(pt[i]))
  1013. rmap_remove(kvm, &pt[i]);
  1014. pt[i] = shadow_trap_nonpresent_pte;
  1015. }
  1016. return;
  1017. }
  1018. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1019. ent = pt[i];
  1020. if (is_shadow_present_pte(ent)) {
  1021. if (!is_large_pte(ent)) {
  1022. ent &= PT64_BASE_ADDR_MASK;
  1023. mmu_page_remove_parent_pte(page_header(ent),
  1024. &pt[i]);
  1025. } else {
  1026. --kvm->stat.lpages;
  1027. rmap_remove(kvm, &pt[i]);
  1028. }
  1029. }
  1030. pt[i] = shadow_trap_nonpresent_pte;
  1031. }
  1032. }
  1033. static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
  1034. {
  1035. mmu_page_remove_parent_pte(sp, parent_pte);
  1036. }
  1037. static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
  1038. {
  1039. int i;
  1040. for (i = 0; i < KVM_MAX_VCPUS; ++i)
  1041. if (kvm->vcpus[i])
  1042. kvm->vcpus[i]->arch.last_pte_updated = NULL;
  1043. }
  1044. static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
  1045. {
  1046. u64 *parent_pte;
  1047. while (sp->multimapped || sp->parent_pte) {
  1048. if (!sp->multimapped)
  1049. parent_pte = sp->parent_pte;
  1050. else {
  1051. struct kvm_pte_chain *chain;
  1052. chain = container_of(sp->parent_ptes.first,
  1053. struct kvm_pte_chain, link);
  1054. parent_pte = chain->parent_ptes[0];
  1055. }
  1056. BUG_ON(!parent_pte);
  1057. kvm_mmu_put_page(sp, parent_pte);
  1058. set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
  1059. }
  1060. }
  1061. struct zap_walker {
  1062. struct kvm_unsync_walk walker;
  1063. struct kvm *kvm;
  1064. int zapped;
  1065. };
  1066. static int mmu_zap_fn(struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk)
  1067. {
  1068. struct zap_walker *zap_walk = container_of(walk, struct zap_walker,
  1069. walker);
  1070. kvm_mmu_zap_page(zap_walk->kvm, sp);
  1071. zap_walk->zapped = 1;
  1072. return 0;
  1073. }
  1074. static int mmu_zap_unsync_children(struct kvm *kvm, struct kvm_mmu_page *sp)
  1075. {
  1076. struct zap_walker walker = {
  1077. .walker = { .entry = mmu_zap_fn, },
  1078. .kvm = kvm,
  1079. .zapped = 0,
  1080. };
  1081. if (sp->role.level == PT_PAGE_TABLE_LEVEL)
  1082. return 0;
  1083. mmu_unsync_walk(sp, &walker.walker);
  1084. return walker.zapped;
  1085. }
  1086. static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  1087. {
  1088. int ret;
  1089. ++kvm->stat.mmu_shadow_zapped;
  1090. ret = mmu_zap_unsync_children(kvm, sp);
  1091. kvm_mmu_page_unlink_children(kvm, sp);
  1092. kvm_mmu_unlink_parents(kvm, sp);
  1093. kvm_flush_remote_tlbs(kvm);
  1094. if (!sp->role.invalid && !sp->role.metaphysical)
  1095. unaccount_shadowed(kvm, sp->gfn);
  1096. if (sp->unsync)
  1097. kvm_unlink_unsync_page(kvm, sp);
  1098. if (!sp->root_count) {
  1099. hlist_del(&sp->hash_link);
  1100. kvm_mmu_free_page(kvm, sp);
  1101. } else {
  1102. sp->role.invalid = 1;
  1103. list_move(&sp->link, &kvm->arch.active_mmu_pages);
  1104. kvm_reload_remote_mmus(kvm);
  1105. }
  1106. kvm_mmu_reset_last_pte_updated(kvm);
  1107. return ret;
  1108. }
  1109. /*
  1110. * Changing the number of mmu pages allocated to the vm
  1111. * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
  1112. */
  1113. void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
  1114. {
  1115. /*
  1116. * If we set the number of mmu pages to be smaller be than the
  1117. * number of actived pages , we must to free some mmu pages before we
  1118. * change the value
  1119. */
  1120. if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
  1121. kvm_nr_mmu_pages) {
  1122. int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
  1123. - kvm->arch.n_free_mmu_pages;
  1124. while (n_used_mmu_pages > kvm_nr_mmu_pages) {
  1125. struct kvm_mmu_page *page;
  1126. page = container_of(kvm->arch.active_mmu_pages.prev,
  1127. struct kvm_mmu_page, link);
  1128. kvm_mmu_zap_page(kvm, page);
  1129. n_used_mmu_pages--;
  1130. }
  1131. kvm->arch.n_free_mmu_pages = 0;
  1132. }
  1133. else
  1134. kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
  1135. - kvm->arch.n_alloc_mmu_pages;
  1136. kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
  1137. }
  1138. static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
  1139. {
  1140. unsigned index;
  1141. struct hlist_head *bucket;
  1142. struct kvm_mmu_page *sp;
  1143. struct hlist_node *node, *n;
  1144. int r;
  1145. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  1146. r = 0;
  1147. index = kvm_page_table_hashfn(gfn);
  1148. bucket = &kvm->arch.mmu_page_hash[index];
  1149. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
  1150. if (sp->gfn == gfn && !sp->role.metaphysical) {
  1151. pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
  1152. sp->role.word);
  1153. r = 1;
  1154. if (kvm_mmu_zap_page(kvm, sp))
  1155. n = bucket->first;
  1156. }
  1157. return r;
  1158. }
  1159. static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
  1160. {
  1161. struct kvm_mmu_page *sp;
  1162. while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
  1163. pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word);
  1164. kvm_mmu_zap_page(kvm, sp);
  1165. }
  1166. }
  1167. static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
  1168. {
  1169. int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
  1170. struct kvm_mmu_page *sp = page_header(__pa(pte));
  1171. __set_bit(slot, sp->slot_bitmap);
  1172. }
  1173. static void mmu_convert_notrap(struct kvm_mmu_page *sp)
  1174. {
  1175. int i;
  1176. u64 *pt = sp->spt;
  1177. if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
  1178. return;
  1179. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1180. if (pt[i] == shadow_notrap_nonpresent_pte)
  1181. set_shadow_pte(&pt[i], shadow_trap_nonpresent_pte);
  1182. }
  1183. }
  1184. struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
  1185. {
  1186. struct page *page;
  1187. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
  1188. if (gpa == UNMAPPED_GVA)
  1189. return NULL;
  1190. page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  1191. return page;
  1192. }
  1193. /*
  1194. * The function is based on mtrr_type_lookup() in
  1195. * arch/x86/kernel/cpu/mtrr/generic.c
  1196. */
  1197. static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
  1198. u64 start, u64 end)
  1199. {
  1200. int i;
  1201. u64 base, mask;
  1202. u8 prev_match, curr_match;
  1203. int num_var_ranges = KVM_NR_VAR_MTRR;
  1204. if (!mtrr_state->enabled)
  1205. return 0xFF;
  1206. /* Make end inclusive end, instead of exclusive */
  1207. end--;
  1208. /* Look in fixed ranges. Just return the type as per start */
  1209. if (mtrr_state->have_fixed && (start < 0x100000)) {
  1210. int idx;
  1211. if (start < 0x80000) {
  1212. idx = 0;
  1213. idx += (start >> 16);
  1214. return mtrr_state->fixed_ranges[idx];
  1215. } else if (start < 0xC0000) {
  1216. idx = 1 * 8;
  1217. idx += ((start - 0x80000) >> 14);
  1218. return mtrr_state->fixed_ranges[idx];
  1219. } else if (start < 0x1000000) {
  1220. idx = 3 * 8;
  1221. idx += ((start - 0xC0000) >> 12);
  1222. return mtrr_state->fixed_ranges[idx];
  1223. }
  1224. }
  1225. /*
  1226. * Look in variable ranges
  1227. * Look of multiple ranges matching this address and pick type
  1228. * as per MTRR precedence
  1229. */
  1230. if (!(mtrr_state->enabled & 2))
  1231. return mtrr_state->def_type;
  1232. prev_match = 0xFF;
  1233. for (i = 0; i < num_var_ranges; ++i) {
  1234. unsigned short start_state, end_state;
  1235. if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
  1236. continue;
  1237. base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
  1238. (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
  1239. mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
  1240. (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
  1241. start_state = ((start & mask) == (base & mask));
  1242. end_state = ((end & mask) == (base & mask));
  1243. if (start_state != end_state)
  1244. return 0xFE;
  1245. if ((start & mask) != (base & mask))
  1246. continue;
  1247. curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
  1248. if (prev_match == 0xFF) {
  1249. prev_match = curr_match;
  1250. continue;
  1251. }
  1252. if (prev_match == MTRR_TYPE_UNCACHABLE ||
  1253. curr_match == MTRR_TYPE_UNCACHABLE)
  1254. return MTRR_TYPE_UNCACHABLE;
  1255. if ((prev_match == MTRR_TYPE_WRBACK &&
  1256. curr_match == MTRR_TYPE_WRTHROUGH) ||
  1257. (prev_match == MTRR_TYPE_WRTHROUGH &&
  1258. curr_match == MTRR_TYPE_WRBACK)) {
  1259. prev_match = MTRR_TYPE_WRTHROUGH;
  1260. curr_match = MTRR_TYPE_WRTHROUGH;
  1261. }
  1262. if (prev_match != curr_match)
  1263. return MTRR_TYPE_UNCACHABLE;
  1264. }
  1265. if (prev_match != 0xFF)
  1266. return prev_match;
  1267. return mtrr_state->def_type;
  1268. }
  1269. static u8 get_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
  1270. {
  1271. u8 mtrr;
  1272. mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
  1273. (gfn << PAGE_SHIFT) + PAGE_SIZE);
  1274. if (mtrr == 0xfe || mtrr == 0xff)
  1275. mtrr = MTRR_TYPE_WRBACK;
  1276. return mtrr;
  1277. }
  1278. static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  1279. {
  1280. unsigned index;
  1281. struct hlist_head *bucket;
  1282. struct kvm_mmu_page *s;
  1283. struct hlist_node *node, *n;
  1284. index = kvm_page_table_hashfn(sp->gfn);
  1285. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  1286. /* don't unsync if pagetable is shadowed with multiple roles */
  1287. hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
  1288. if (s->gfn != sp->gfn || s->role.metaphysical)
  1289. continue;
  1290. if (s->role.word != sp->role.word)
  1291. return 1;
  1292. }
  1293. kvm_mmu_mark_parents_unsync(vcpu, sp);
  1294. ++vcpu->kvm->stat.mmu_unsync;
  1295. sp->unsync = 1;
  1296. mmu_convert_notrap(sp);
  1297. return 0;
  1298. }
  1299. static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
  1300. bool can_unsync)
  1301. {
  1302. struct kvm_mmu_page *shadow;
  1303. shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
  1304. if (shadow) {
  1305. if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
  1306. return 1;
  1307. if (shadow->unsync)
  1308. return 0;
  1309. if (can_unsync && oos_shadow)
  1310. return kvm_unsync_page(vcpu, shadow);
  1311. return 1;
  1312. }
  1313. return 0;
  1314. }
  1315. static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
  1316. unsigned pte_access, int user_fault,
  1317. int write_fault, int dirty, int largepage,
  1318. gfn_t gfn, pfn_t pfn, bool speculative,
  1319. bool can_unsync)
  1320. {
  1321. u64 spte;
  1322. int ret = 0;
  1323. u64 mt_mask = shadow_mt_mask;
  1324. /*
  1325. * We don't set the accessed bit, since we sometimes want to see
  1326. * whether the guest actually used the pte (in order to detect
  1327. * demand paging).
  1328. */
  1329. spte = shadow_base_present_pte | shadow_dirty_mask;
  1330. if (!speculative)
  1331. spte |= shadow_accessed_mask;
  1332. if (!dirty)
  1333. pte_access &= ~ACC_WRITE_MASK;
  1334. if (pte_access & ACC_EXEC_MASK)
  1335. spte |= shadow_x_mask;
  1336. else
  1337. spte |= shadow_nx_mask;
  1338. if (pte_access & ACC_USER_MASK)
  1339. spte |= shadow_user_mask;
  1340. if (largepage)
  1341. spte |= PT_PAGE_SIZE_MASK;
  1342. if (mt_mask) {
  1343. mt_mask = get_memory_type(vcpu, gfn) <<
  1344. kvm_x86_ops->get_mt_mask_shift();
  1345. spte |= mt_mask;
  1346. }
  1347. spte |= (u64)pfn << PAGE_SHIFT;
  1348. if ((pte_access & ACC_WRITE_MASK)
  1349. || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
  1350. if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
  1351. ret = 1;
  1352. spte = shadow_trap_nonpresent_pte;
  1353. goto set_pte;
  1354. }
  1355. spte |= PT_WRITABLE_MASK;
  1356. if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
  1357. pgprintk("%s: found shadow page for %lx, marking ro\n",
  1358. __func__, gfn);
  1359. ret = 1;
  1360. pte_access &= ~ACC_WRITE_MASK;
  1361. if (is_writeble_pte(spte))
  1362. spte &= ~PT_WRITABLE_MASK;
  1363. }
  1364. }
  1365. if (pte_access & ACC_WRITE_MASK)
  1366. mark_page_dirty(vcpu->kvm, gfn);
  1367. set_pte:
  1368. set_shadow_pte(shadow_pte, spte);
  1369. return ret;
  1370. }
  1371. static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
  1372. unsigned pt_access, unsigned pte_access,
  1373. int user_fault, int write_fault, int dirty,
  1374. int *ptwrite, int largepage, gfn_t gfn,
  1375. pfn_t pfn, bool speculative)
  1376. {
  1377. int was_rmapped = 0;
  1378. int was_writeble = is_writeble_pte(*shadow_pte);
  1379. pgprintk("%s: spte %llx access %x write_fault %d"
  1380. " user_fault %d gfn %lx\n",
  1381. __func__, *shadow_pte, pt_access,
  1382. write_fault, user_fault, gfn);
  1383. if (is_rmap_pte(*shadow_pte)) {
  1384. /*
  1385. * If we overwrite a PTE page pointer with a 2MB PMD, unlink
  1386. * the parent of the now unreachable PTE.
  1387. */
  1388. if (largepage && !is_large_pte(*shadow_pte)) {
  1389. struct kvm_mmu_page *child;
  1390. u64 pte = *shadow_pte;
  1391. child = page_header(pte & PT64_BASE_ADDR_MASK);
  1392. mmu_page_remove_parent_pte(child, shadow_pte);
  1393. } else if (pfn != spte_to_pfn(*shadow_pte)) {
  1394. pgprintk("hfn old %lx new %lx\n",
  1395. spte_to_pfn(*shadow_pte), pfn);
  1396. rmap_remove(vcpu->kvm, shadow_pte);
  1397. } else {
  1398. if (largepage)
  1399. was_rmapped = is_large_pte(*shadow_pte);
  1400. else
  1401. was_rmapped = 1;
  1402. }
  1403. }
  1404. if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
  1405. dirty, largepage, gfn, pfn, speculative, true)) {
  1406. if (write_fault)
  1407. *ptwrite = 1;
  1408. kvm_x86_ops->tlb_flush(vcpu);
  1409. }
  1410. pgprintk("%s: setting spte %llx\n", __func__, *shadow_pte);
  1411. pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
  1412. is_large_pte(*shadow_pte)? "2MB" : "4kB",
  1413. is_present_pte(*shadow_pte)?"RW":"R", gfn,
  1414. *shadow_pte, shadow_pte);
  1415. if (!was_rmapped && is_large_pte(*shadow_pte))
  1416. ++vcpu->kvm->stat.lpages;
  1417. page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
  1418. if (!was_rmapped) {
  1419. rmap_add(vcpu, shadow_pte, gfn, largepage);
  1420. if (!is_rmap_pte(*shadow_pte))
  1421. kvm_release_pfn_clean(pfn);
  1422. } else {
  1423. if (was_writeble)
  1424. kvm_release_pfn_dirty(pfn);
  1425. else
  1426. kvm_release_pfn_clean(pfn);
  1427. }
  1428. if (speculative) {
  1429. vcpu->arch.last_pte_updated = shadow_pte;
  1430. vcpu->arch.last_pte_gfn = gfn;
  1431. }
  1432. }
  1433. static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
  1434. {
  1435. }
  1436. struct direct_shadow_walk {
  1437. struct kvm_shadow_walk walker;
  1438. pfn_t pfn;
  1439. int write;
  1440. int largepage;
  1441. int pt_write;
  1442. };
  1443. static int direct_map_entry(struct kvm_shadow_walk *_walk,
  1444. struct kvm_vcpu *vcpu,
  1445. u64 addr, u64 *sptep, int level)
  1446. {
  1447. struct direct_shadow_walk *walk =
  1448. container_of(_walk, struct direct_shadow_walk, walker);
  1449. struct kvm_mmu_page *sp;
  1450. gfn_t pseudo_gfn;
  1451. gfn_t gfn = addr >> PAGE_SHIFT;
  1452. if (level == PT_PAGE_TABLE_LEVEL
  1453. || (walk->largepage && level == PT_DIRECTORY_LEVEL)) {
  1454. mmu_set_spte(vcpu, sptep, ACC_ALL, ACC_ALL,
  1455. 0, walk->write, 1, &walk->pt_write,
  1456. walk->largepage, gfn, walk->pfn, false);
  1457. ++vcpu->stat.pf_fixed;
  1458. return 1;
  1459. }
  1460. if (*sptep == shadow_trap_nonpresent_pte) {
  1461. pseudo_gfn = (addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
  1462. sp = kvm_mmu_get_page(vcpu, pseudo_gfn, (gva_t)addr, level - 1,
  1463. 1, ACC_ALL, sptep);
  1464. if (!sp) {
  1465. pgprintk("nonpaging_map: ENOMEM\n");
  1466. kvm_release_pfn_clean(walk->pfn);
  1467. return -ENOMEM;
  1468. }
  1469. set_shadow_pte(sptep,
  1470. __pa(sp->spt)
  1471. | PT_PRESENT_MASK | PT_WRITABLE_MASK
  1472. | shadow_user_mask | shadow_x_mask);
  1473. }
  1474. return 0;
  1475. }
  1476. static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
  1477. int largepage, gfn_t gfn, pfn_t pfn)
  1478. {
  1479. int r;
  1480. struct direct_shadow_walk walker = {
  1481. .walker = { .entry = direct_map_entry, },
  1482. .pfn = pfn,
  1483. .largepage = largepage,
  1484. .write = write,
  1485. .pt_write = 0,
  1486. };
  1487. r = walk_shadow(&walker.walker, vcpu, gfn << PAGE_SHIFT);
  1488. if (r < 0)
  1489. return r;
  1490. return walker.pt_write;
  1491. }
  1492. static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
  1493. {
  1494. int r;
  1495. int largepage = 0;
  1496. pfn_t pfn;
  1497. unsigned long mmu_seq;
  1498. if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
  1499. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1500. largepage = 1;
  1501. }
  1502. mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1503. smp_rmb();
  1504. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1505. /* mmio */
  1506. if (is_error_pfn(pfn)) {
  1507. kvm_release_pfn_clean(pfn);
  1508. return 1;
  1509. }
  1510. spin_lock(&vcpu->kvm->mmu_lock);
  1511. if (mmu_notifier_retry(vcpu, mmu_seq))
  1512. goto out_unlock;
  1513. kvm_mmu_free_some_pages(vcpu);
  1514. r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
  1515. spin_unlock(&vcpu->kvm->mmu_lock);
  1516. return r;
  1517. out_unlock:
  1518. spin_unlock(&vcpu->kvm->mmu_lock);
  1519. kvm_release_pfn_clean(pfn);
  1520. return 0;
  1521. }
  1522. static void mmu_free_roots(struct kvm_vcpu *vcpu)
  1523. {
  1524. int i;
  1525. struct kvm_mmu_page *sp;
  1526. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  1527. return;
  1528. spin_lock(&vcpu->kvm->mmu_lock);
  1529. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1530. hpa_t root = vcpu->arch.mmu.root_hpa;
  1531. sp = page_header(root);
  1532. --sp->root_count;
  1533. if (!sp->root_count && sp->role.invalid)
  1534. kvm_mmu_zap_page(vcpu->kvm, sp);
  1535. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1536. spin_unlock(&vcpu->kvm->mmu_lock);
  1537. return;
  1538. }
  1539. for (i = 0; i < 4; ++i) {
  1540. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1541. if (root) {
  1542. root &= PT64_BASE_ADDR_MASK;
  1543. sp = page_header(root);
  1544. --sp->root_count;
  1545. if (!sp->root_count && sp->role.invalid)
  1546. kvm_mmu_zap_page(vcpu->kvm, sp);
  1547. }
  1548. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  1549. }
  1550. spin_unlock(&vcpu->kvm->mmu_lock);
  1551. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1552. }
  1553. static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
  1554. {
  1555. int i;
  1556. gfn_t root_gfn;
  1557. struct kvm_mmu_page *sp;
  1558. int metaphysical = 0;
  1559. root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
  1560. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1561. hpa_t root = vcpu->arch.mmu.root_hpa;
  1562. ASSERT(!VALID_PAGE(root));
  1563. if (tdp_enabled)
  1564. metaphysical = 1;
  1565. sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
  1566. PT64_ROOT_LEVEL, metaphysical,
  1567. ACC_ALL, NULL);
  1568. root = __pa(sp->spt);
  1569. ++sp->root_count;
  1570. vcpu->arch.mmu.root_hpa = root;
  1571. return;
  1572. }
  1573. metaphysical = !is_paging(vcpu);
  1574. if (tdp_enabled)
  1575. metaphysical = 1;
  1576. for (i = 0; i < 4; ++i) {
  1577. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1578. ASSERT(!VALID_PAGE(root));
  1579. if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
  1580. if (!is_present_pte(vcpu->arch.pdptrs[i])) {
  1581. vcpu->arch.mmu.pae_root[i] = 0;
  1582. continue;
  1583. }
  1584. root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
  1585. } else if (vcpu->arch.mmu.root_level == 0)
  1586. root_gfn = 0;
  1587. sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
  1588. PT32_ROOT_LEVEL, metaphysical,
  1589. ACC_ALL, NULL);
  1590. root = __pa(sp->spt);
  1591. ++sp->root_count;
  1592. vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
  1593. }
  1594. vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
  1595. }
  1596. static void mmu_sync_roots(struct kvm_vcpu *vcpu)
  1597. {
  1598. int i;
  1599. struct kvm_mmu_page *sp;
  1600. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  1601. return;
  1602. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1603. hpa_t root = vcpu->arch.mmu.root_hpa;
  1604. sp = page_header(root);
  1605. mmu_sync_children(vcpu, sp);
  1606. return;
  1607. }
  1608. for (i = 0; i < 4; ++i) {
  1609. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1610. if (root) {
  1611. root &= PT64_BASE_ADDR_MASK;
  1612. sp = page_header(root);
  1613. mmu_sync_children(vcpu, sp);
  1614. }
  1615. }
  1616. }
  1617. void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
  1618. {
  1619. spin_lock(&vcpu->kvm->mmu_lock);
  1620. mmu_sync_roots(vcpu);
  1621. spin_unlock(&vcpu->kvm->mmu_lock);
  1622. }
  1623. static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
  1624. {
  1625. return vaddr;
  1626. }
  1627. static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
  1628. u32 error_code)
  1629. {
  1630. gfn_t gfn;
  1631. int r;
  1632. pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
  1633. r = mmu_topup_memory_caches(vcpu);
  1634. if (r)
  1635. return r;
  1636. ASSERT(vcpu);
  1637. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1638. gfn = gva >> PAGE_SHIFT;
  1639. return nonpaging_map(vcpu, gva & PAGE_MASK,
  1640. error_code & PFERR_WRITE_MASK, gfn);
  1641. }
  1642. static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
  1643. u32 error_code)
  1644. {
  1645. pfn_t pfn;
  1646. int r;
  1647. int largepage = 0;
  1648. gfn_t gfn = gpa >> PAGE_SHIFT;
  1649. unsigned long mmu_seq;
  1650. ASSERT(vcpu);
  1651. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1652. r = mmu_topup_memory_caches(vcpu);
  1653. if (r)
  1654. return r;
  1655. if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
  1656. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1657. largepage = 1;
  1658. }
  1659. mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1660. smp_rmb();
  1661. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1662. if (is_error_pfn(pfn)) {
  1663. kvm_release_pfn_clean(pfn);
  1664. return 1;
  1665. }
  1666. spin_lock(&vcpu->kvm->mmu_lock);
  1667. if (mmu_notifier_retry(vcpu, mmu_seq))
  1668. goto out_unlock;
  1669. kvm_mmu_free_some_pages(vcpu);
  1670. r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
  1671. largepage, gfn, pfn);
  1672. spin_unlock(&vcpu->kvm->mmu_lock);
  1673. return r;
  1674. out_unlock:
  1675. spin_unlock(&vcpu->kvm->mmu_lock);
  1676. kvm_release_pfn_clean(pfn);
  1677. return 0;
  1678. }
  1679. static void nonpaging_free(struct kvm_vcpu *vcpu)
  1680. {
  1681. mmu_free_roots(vcpu);
  1682. }
  1683. static int nonpaging_init_context(struct kvm_vcpu *vcpu)
  1684. {
  1685. struct kvm_mmu *context = &vcpu->arch.mmu;
  1686. context->new_cr3 = nonpaging_new_cr3;
  1687. context->page_fault = nonpaging_page_fault;
  1688. context->gva_to_gpa = nonpaging_gva_to_gpa;
  1689. context->free = nonpaging_free;
  1690. context->prefetch_page = nonpaging_prefetch_page;
  1691. context->sync_page = nonpaging_sync_page;
  1692. context->invlpg = nonpaging_invlpg;
  1693. context->root_level = 0;
  1694. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1695. context->root_hpa = INVALID_PAGE;
  1696. return 0;
  1697. }
  1698. void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  1699. {
  1700. ++vcpu->stat.tlb_flush;
  1701. kvm_x86_ops->tlb_flush(vcpu);
  1702. }
  1703. static void paging_new_cr3(struct kvm_vcpu *vcpu)
  1704. {
  1705. pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
  1706. mmu_free_roots(vcpu);
  1707. }
  1708. static void inject_page_fault(struct kvm_vcpu *vcpu,
  1709. u64 addr,
  1710. u32 err_code)
  1711. {
  1712. kvm_inject_page_fault(vcpu, addr, err_code);
  1713. }
  1714. static void paging_free(struct kvm_vcpu *vcpu)
  1715. {
  1716. nonpaging_free(vcpu);
  1717. }
  1718. #define PTTYPE 64
  1719. #include "paging_tmpl.h"
  1720. #undef PTTYPE
  1721. #define PTTYPE 32
  1722. #include "paging_tmpl.h"
  1723. #undef PTTYPE
  1724. static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
  1725. {
  1726. struct kvm_mmu *context = &vcpu->arch.mmu;
  1727. ASSERT(is_pae(vcpu));
  1728. context->new_cr3 = paging_new_cr3;
  1729. context->page_fault = paging64_page_fault;
  1730. context->gva_to_gpa = paging64_gva_to_gpa;
  1731. context->prefetch_page = paging64_prefetch_page;
  1732. context->sync_page = paging64_sync_page;
  1733. context->invlpg = paging64_invlpg;
  1734. context->free = paging_free;
  1735. context->root_level = level;
  1736. context->shadow_root_level = level;
  1737. context->root_hpa = INVALID_PAGE;
  1738. return 0;
  1739. }
  1740. static int paging64_init_context(struct kvm_vcpu *vcpu)
  1741. {
  1742. return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
  1743. }
  1744. static int paging32_init_context(struct kvm_vcpu *vcpu)
  1745. {
  1746. struct kvm_mmu *context = &vcpu->arch.mmu;
  1747. context->new_cr3 = paging_new_cr3;
  1748. context->page_fault = paging32_page_fault;
  1749. context->gva_to_gpa = paging32_gva_to_gpa;
  1750. context->free = paging_free;
  1751. context->prefetch_page = paging32_prefetch_page;
  1752. context->sync_page = paging32_sync_page;
  1753. context->invlpg = paging32_invlpg;
  1754. context->root_level = PT32_ROOT_LEVEL;
  1755. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1756. context->root_hpa = INVALID_PAGE;
  1757. return 0;
  1758. }
  1759. static int paging32E_init_context(struct kvm_vcpu *vcpu)
  1760. {
  1761. return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
  1762. }
  1763. static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
  1764. {
  1765. struct kvm_mmu *context = &vcpu->arch.mmu;
  1766. context->new_cr3 = nonpaging_new_cr3;
  1767. context->page_fault = tdp_page_fault;
  1768. context->free = nonpaging_free;
  1769. context->prefetch_page = nonpaging_prefetch_page;
  1770. context->sync_page = nonpaging_sync_page;
  1771. context->invlpg = nonpaging_invlpg;
  1772. context->shadow_root_level = kvm_x86_ops->get_tdp_level();
  1773. context->root_hpa = INVALID_PAGE;
  1774. if (!is_paging(vcpu)) {
  1775. context->gva_to_gpa = nonpaging_gva_to_gpa;
  1776. context->root_level = 0;
  1777. } else if (is_long_mode(vcpu)) {
  1778. context->gva_to_gpa = paging64_gva_to_gpa;
  1779. context->root_level = PT64_ROOT_LEVEL;
  1780. } else if (is_pae(vcpu)) {
  1781. context->gva_to_gpa = paging64_gva_to_gpa;
  1782. context->root_level = PT32E_ROOT_LEVEL;
  1783. } else {
  1784. context->gva_to_gpa = paging32_gva_to_gpa;
  1785. context->root_level = PT32_ROOT_LEVEL;
  1786. }
  1787. return 0;
  1788. }
  1789. static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
  1790. {
  1791. ASSERT(vcpu);
  1792. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1793. if (!is_paging(vcpu))
  1794. return nonpaging_init_context(vcpu);
  1795. else if (is_long_mode(vcpu))
  1796. return paging64_init_context(vcpu);
  1797. else if (is_pae(vcpu))
  1798. return paging32E_init_context(vcpu);
  1799. else
  1800. return paging32_init_context(vcpu);
  1801. }
  1802. static int init_kvm_mmu(struct kvm_vcpu *vcpu)
  1803. {
  1804. vcpu->arch.update_pte.pfn = bad_pfn;
  1805. if (tdp_enabled)
  1806. return init_kvm_tdp_mmu(vcpu);
  1807. else
  1808. return init_kvm_softmmu(vcpu);
  1809. }
  1810. static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
  1811. {
  1812. ASSERT(vcpu);
  1813. if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
  1814. vcpu->arch.mmu.free(vcpu);
  1815. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1816. }
  1817. }
  1818. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
  1819. {
  1820. destroy_kvm_mmu(vcpu);
  1821. return init_kvm_mmu(vcpu);
  1822. }
  1823. EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
  1824. int kvm_mmu_load(struct kvm_vcpu *vcpu)
  1825. {
  1826. int r;
  1827. r = mmu_topup_memory_caches(vcpu);
  1828. if (r)
  1829. goto out;
  1830. spin_lock(&vcpu->kvm->mmu_lock);
  1831. kvm_mmu_free_some_pages(vcpu);
  1832. mmu_alloc_roots(vcpu);
  1833. mmu_sync_roots(vcpu);
  1834. spin_unlock(&vcpu->kvm->mmu_lock);
  1835. kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
  1836. kvm_mmu_flush_tlb(vcpu);
  1837. out:
  1838. return r;
  1839. }
  1840. EXPORT_SYMBOL_GPL(kvm_mmu_load);
  1841. void kvm_mmu_unload(struct kvm_vcpu *vcpu)
  1842. {
  1843. mmu_free_roots(vcpu);
  1844. }
  1845. static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
  1846. struct kvm_mmu_page *sp,
  1847. u64 *spte)
  1848. {
  1849. u64 pte;
  1850. struct kvm_mmu_page *child;
  1851. pte = *spte;
  1852. if (is_shadow_present_pte(pte)) {
  1853. if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
  1854. is_large_pte(pte))
  1855. rmap_remove(vcpu->kvm, spte);
  1856. else {
  1857. child = page_header(pte & PT64_BASE_ADDR_MASK);
  1858. mmu_page_remove_parent_pte(child, spte);
  1859. }
  1860. }
  1861. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  1862. if (is_large_pte(pte))
  1863. --vcpu->kvm->stat.lpages;
  1864. }
  1865. static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
  1866. struct kvm_mmu_page *sp,
  1867. u64 *spte,
  1868. const void *new)
  1869. {
  1870. if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
  1871. if (!vcpu->arch.update_pte.largepage ||
  1872. sp->role.glevels == PT32_ROOT_LEVEL) {
  1873. ++vcpu->kvm->stat.mmu_pde_zapped;
  1874. return;
  1875. }
  1876. }
  1877. ++vcpu->kvm->stat.mmu_pte_updated;
  1878. if (sp->role.glevels == PT32_ROOT_LEVEL)
  1879. paging32_update_pte(vcpu, sp, spte, new);
  1880. else
  1881. paging64_update_pte(vcpu, sp, spte, new);
  1882. }
  1883. static bool need_remote_flush(u64 old, u64 new)
  1884. {
  1885. if (!is_shadow_present_pte(old))
  1886. return false;
  1887. if (!is_shadow_present_pte(new))
  1888. return true;
  1889. if ((old ^ new) & PT64_BASE_ADDR_MASK)
  1890. return true;
  1891. old ^= PT64_NX_MASK;
  1892. new ^= PT64_NX_MASK;
  1893. return (old & ~new & PT64_PERM_MASK) != 0;
  1894. }
  1895. static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
  1896. {
  1897. if (need_remote_flush(old, new))
  1898. kvm_flush_remote_tlbs(vcpu->kvm);
  1899. else
  1900. kvm_mmu_flush_tlb(vcpu);
  1901. }
  1902. static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
  1903. {
  1904. u64 *spte = vcpu->arch.last_pte_updated;
  1905. return !!(spte && (*spte & shadow_accessed_mask));
  1906. }
  1907. static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  1908. const u8 *new, int bytes)
  1909. {
  1910. gfn_t gfn;
  1911. int r;
  1912. u64 gpte = 0;
  1913. pfn_t pfn;
  1914. vcpu->arch.update_pte.largepage = 0;
  1915. if (bytes != 4 && bytes != 8)
  1916. return;
  1917. /*
  1918. * Assume that the pte write on a page table of the same type
  1919. * as the current vcpu paging mode. This is nearly always true
  1920. * (might be false while changing modes). Note it is verified later
  1921. * by update_pte().
  1922. */
  1923. if (is_pae(vcpu)) {
  1924. /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
  1925. if ((bytes == 4) && (gpa % 4 == 0)) {
  1926. r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
  1927. if (r)
  1928. return;
  1929. memcpy((void *)&gpte + (gpa % 8), new, 4);
  1930. } else if ((bytes == 8) && (gpa % 8 == 0)) {
  1931. memcpy((void *)&gpte, new, 8);
  1932. }
  1933. } else {
  1934. if ((bytes == 4) && (gpa % 4 == 0))
  1935. memcpy((void *)&gpte, new, 4);
  1936. }
  1937. if (!is_present_pte(gpte))
  1938. return;
  1939. gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  1940. if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
  1941. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1942. vcpu->arch.update_pte.largepage = 1;
  1943. }
  1944. vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1945. smp_rmb();
  1946. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1947. if (is_error_pfn(pfn)) {
  1948. kvm_release_pfn_clean(pfn);
  1949. return;
  1950. }
  1951. vcpu->arch.update_pte.gfn = gfn;
  1952. vcpu->arch.update_pte.pfn = pfn;
  1953. }
  1954. static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
  1955. {
  1956. u64 *spte = vcpu->arch.last_pte_updated;
  1957. if (spte
  1958. && vcpu->arch.last_pte_gfn == gfn
  1959. && shadow_accessed_mask
  1960. && !(*spte & shadow_accessed_mask)
  1961. && is_shadow_present_pte(*spte))
  1962. set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
  1963. }
  1964. void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  1965. const u8 *new, int bytes)
  1966. {
  1967. gfn_t gfn = gpa >> PAGE_SHIFT;
  1968. struct kvm_mmu_page *sp;
  1969. struct hlist_node *node, *n;
  1970. struct hlist_head *bucket;
  1971. unsigned index;
  1972. u64 entry, gentry;
  1973. u64 *spte;
  1974. unsigned offset = offset_in_page(gpa);
  1975. unsigned pte_size;
  1976. unsigned page_offset;
  1977. unsigned misaligned;
  1978. unsigned quadrant;
  1979. int level;
  1980. int flooded = 0;
  1981. int npte;
  1982. int r;
  1983. pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
  1984. mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
  1985. spin_lock(&vcpu->kvm->mmu_lock);
  1986. kvm_mmu_access_page(vcpu, gfn);
  1987. kvm_mmu_free_some_pages(vcpu);
  1988. ++vcpu->kvm->stat.mmu_pte_write;
  1989. kvm_mmu_audit(vcpu, "pre pte write");
  1990. if (gfn == vcpu->arch.last_pt_write_gfn
  1991. && !last_updated_pte_accessed(vcpu)) {
  1992. ++vcpu->arch.last_pt_write_count;
  1993. if (vcpu->arch.last_pt_write_count >= 3)
  1994. flooded = 1;
  1995. } else {
  1996. vcpu->arch.last_pt_write_gfn = gfn;
  1997. vcpu->arch.last_pt_write_count = 1;
  1998. vcpu->arch.last_pte_updated = NULL;
  1999. }
  2000. index = kvm_page_table_hashfn(gfn);
  2001. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  2002. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
  2003. if (sp->gfn != gfn || sp->role.metaphysical || sp->role.invalid)
  2004. continue;
  2005. pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
  2006. misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
  2007. misaligned |= bytes < 4;
  2008. if (misaligned || flooded) {
  2009. /*
  2010. * Misaligned accesses are too much trouble to fix
  2011. * up; also, they usually indicate a page is not used
  2012. * as a page table.
  2013. *
  2014. * If we're seeing too many writes to a page,
  2015. * it may no longer be a page table, or we may be
  2016. * forking, in which case it is better to unmap the
  2017. * page.
  2018. */
  2019. pgprintk("misaligned: gpa %llx bytes %d role %x\n",
  2020. gpa, bytes, sp->role.word);
  2021. if (kvm_mmu_zap_page(vcpu->kvm, sp))
  2022. n = bucket->first;
  2023. ++vcpu->kvm->stat.mmu_flooded;
  2024. continue;
  2025. }
  2026. page_offset = offset;
  2027. level = sp->role.level;
  2028. npte = 1;
  2029. if (sp->role.glevels == PT32_ROOT_LEVEL) {
  2030. page_offset <<= 1; /* 32->64 */
  2031. /*
  2032. * A 32-bit pde maps 4MB while the shadow pdes map
  2033. * only 2MB. So we need to double the offset again
  2034. * and zap two pdes instead of one.
  2035. */
  2036. if (level == PT32_ROOT_LEVEL) {
  2037. page_offset &= ~7; /* kill rounding error */
  2038. page_offset <<= 1;
  2039. npte = 2;
  2040. }
  2041. quadrant = page_offset >> PAGE_SHIFT;
  2042. page_offset &= ~PAGE_MASK;
  2043. if (quadrant != sp->role.quadrant)
  2044. continue;
  2045. }
  2046. spte = &sp->spt[page_offset / sizeof(*spte)];
  2047. if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
  2048. gentry = 0;
  2049. r = kvm_read_guest_atomic(vcpu->kvm,
  2050. gpa & ~(u64)(pte_size - 1),
  2051. &gentry, pte_size);
  2052. new = (const void *)&gentry;
  2053. if (r < 0)
  2054. new = NULL;
  2055. }
  2056. while (npte--) {
  2057. entry = *spte;
  2058. mmu_pte_write_zap_pte(vcpu, sp, spte);
  2059. if (new)
  2060. mmu_pte_write_new_pte(vcpu, sp, spte, new);
  2061. mmu_pte_write_flush_tlb(vcpu, entry, *spte);
  2062. ++spte;
  2063. }
  2064. }
  2065. kvm_mmu_audit(vcpu, "post pte write");
  2066. spin_unlock(&vcpu->kvm->mmu_lock);
  2067. if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
  2068. kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
  2069. vcpu->arch.update_pte.pfn = bad_pfn;
  2070. }
  2071. }
  2072. int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
  2073. {
  2074. gpa_t gpa;
  2075. int r;
  2076. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
  2077. spin_lock(&vcpu->kvm->mmu_lock);
  2078. r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  2079. spin_unlock(&vcpu->kvm->mmu_lock);
  2080. return r;
  2081. }
  2082. EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
  2083. void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
  2084. {
  2085. while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
  2086. struct kvm_mmu_page *sp;
  2087. sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
  2088. struct kvm_mmu_page, link);
  2089. kvm_mmu_zap_page(vcpu->kvm, sp);
  2090. ++vcpu->kvm->stat.mmu_recycled;
  2091. }
  2092. }
  2093. int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
  2094. {
  2095. int r;
  2096. enum emulation_result er;
  2097. r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
  2098. if (r < 0)
  2099. goto out;
  2100. if (!r) {
  2101. r = 1;
  2102. goto out;
  2103. }
  2104. r = mmu_topup_memory_caches(vcpu);
  2105. if (r)
  2106. goto out;
  2107. er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
  2108. switch (er) {
  2109. case EMULATE_DONE:
  2110. return 1;
  2111. case EMULATE_DO_MMIO:
  2112. ++vcpu->stat.mmio_exits;
  2113. return 0;
  2114. case EMULATE_FAIL:
  2115. kvm_report_emulation_failure(vcpu, "pagetable");
  2116. return 1;
  2117. default:
  2118. BUG();
  2119. }
  2120. out:
  2121. return r;
  2122. }
  2123. EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
  2124. void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
  2125. {
  2126. spin_lock(&vcpu->kvm->mmu_lock);
  2127. vcpu->arch.mmu.invlpg(vcpu, gva);
  2128. spin_unlock(&vcpu->kvm->mmu_lock);
  2129. kvm_mmu_flush_tlb(vcpu);
  2130. ++vcpu->stat.invlpg;
  2131. }
  2132. EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
  2133. void kvm_enable_tdp(void)
  2134. {
  2135. tdp_enabled = true;
  2136. }
  2137. EXPORT_SYMBOL_GPL(kvm_enable_tdp);
  2138. void kvm_disable_tdp(void)
  2139. {
  2140. tdp_enabled = false;
  2141. }
  2142. EXPORT_SYMBOL_GPL(kvm_disable_tdp);
  2143. static void free_mmu_pages(struct kvm_vcpu *vcpu)
  2144. {
  2145. struct kvm_mmu_page *sp;
  2146. while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
  2147. sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
  2148. struct kvm_mmu_page, link);
  2149. kvm_mmu_zap_page(vcpu->kvm, sp);
  2150. cond_resched();
  2151. }
  2152. free_page((unsigned long)vcpu->arch.mmu.pae_root);
  2153. }
  2154. static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
  2155. {
  2156. struct page *page;
  2157. int i;
  2158. ASSERT(vcpu);
  2159. if (vcpu->kvm->arch.n_requested_mmu_pages)
  2160. vcpu->kvm->arch.n_free_mmu_pages =
  2161. vcpu->kvm->arch.n_requested_mmu_pages;
  2162. else
  2163. vcpu->kvm->arch.n_free_mmu_pages =
  2164. vcpu->kvm->arch.n_alloc_mmu_pages;
  2165. /*
  2166. * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
  2167. * Therefore we need to allocate shadow page tables in the first
  2168. * 4GB of memory, which happens to fit the DMA32 zone.
  2169. */
  2170. page = alloc_page(GFP_KERNEL | __GFP_DMA32);
  2171. if (!page)
  2172. goto error_1;
  2173. vcpu->arch.mmu.pae_root = page_address(page);
  2174. for (i = 0; i < 4; ++i)
  2175. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  2176. return 0;
  2177. error_1:
  2178. free_mmu_pages(vcpu);
  2179. return -ENOMEM;
  2180. }
  2181. int kvm_mmu_create(struct kvm_vcpu *vcpu)
  2182. {
  2183. ASSERT(vcpu);
  2184. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  2185. return alloc_mmu_pages(vcpu);
  2186. }
  2187. int kvm_mmu_setup(struct kvm_vcpu *vcpu)
  2188. {
  2189. ASSERT(vcpu);
  2190. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  2191. return init_kvm_mmu(vcpu);
  2192. }
  2193. void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
  2194. {
  2195. ASSERT(vcpu);
  2196. destroy_kvm_mmu(vcpu);
  2197. free_mmu_pages(vcpu);
  2198. mmu_free_memory_caches(vcpu);
  2199. }
  2200. void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
  2201. {
  2202. struct kvm_mmu_page *sp;
  2203. spin_lock(&kvm->mmu_lock);
  2204. list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
  2205. int i;
  2206. u64 *pt;
  2207. if (!test_bit(slot, sp->slot_bitmap))
  2208. continue;
  2209. pt = sp->spt;
  2210. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  2211. /* avoid RMW */
  2212. if (pt[i] & PT_WRITABLE_MASK)
  2213. pt[i] &= ~PT_WRITABLE_MASK;
  2214. }
  2215. kvm_flush_remote_tlbs(kvm);
  2216. spin_unlock(&kvm->mmu_lock);
  2217. }
  2218. void kvm_mmu_zap_all(struct kvm *kvm)
  2219. {
  2220. struct kvm_mmu_page *sp, *node;
  2221. spin_lock(&kvm->mmu_lock);
  2222. list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
  2223. if (kvm_mmu_zap_page(kvm, sp))
  2224. node = container_of(kvm->arch.active_mmu_pages.next,
  2225. struct kvm_mmu_page, link);
  2226. spin_unlock(&kvm->mmu_lock);
  2227. kvm_flush_remote_tlbs(kvm);
  2228. }
  2229. static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
  2230. {
  2231. struct kvm_mmu_page *page;
  2232. page = container_of(kvm->arch.active_mmu_pages.prev,
  2233. struct kvm_mmu_page, link);
  2234. kvm_mmu_zap_page(kvm, page);
  2235. }
  2236. static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
  2237. {
  2238. struct kvm *kvm;
  2239. struct kvm *kvm_freed = NULL;
  2240. int cache_count = 0;
  2241. spin_lock(&kvm_lock);
  2242. list_for_each_entry(kvm, &vm_list, vm_list) {
  2243. int npages;
  2244. if (!down_read_trylock(&kvm->slots_lock))
  2245. continue;
  2246. spin_lock(&kvm->mmu_lock);
  2247. npages = kvm->arch.n_alloc_mmu_pages -
  2248. kvm->arch.n_free_mmu_pages;
  2249. cache_count += npages;
  2250. if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
  2251. kvm_mmu_remove_one_alloc_mmu_page(kvm);
  2252. cache_count--;
  2253. kvm_freed = kvm;
  2254. }
  2255. nr_to_scan--;
  2256. spin_unlock(&kvm->mmu_lock);
  2257. up_read(&kvm->slots_lock);
  2258. }
  2259. if (kvm_freed)
  2260. list_move_tail(&kvm_freed->vm_list, &vm_list);
  2261. spin_unlock(&kvm_lock);
  2262. return cache_count;
  2263. }
  2264. static struct shrinker mmu_shrinker = {
  2265. .shrink = mmu_shrink,
  2266. .seeks = DEFAULT_SEEKS * 10,
  2267. };
  2268. static void mmu_destroy_caches(void)
  2269. {
  2270. if (pte_chain_cache)
  2271. kmem_cache_destroy(pte_chain_cache);
  2272. if (rmap_desc_cache)
  2273. kmem_cache_destroy(rmap_desc_cache);
  2274. if (mmu_page_header_cache)
  2275. kmem_cache_destroy(mmu_page_header_cache);
  2276. }
  2277. void kvm_mmu_module_exit(void)
  2278. {
  2279. mmu_destroy_caches();
  2280. unregister_shrinker(&mmu_shrinker);
  2281. }
  2282. int kvm_mmu_module_init(void)
  2283. {
  2284. pte_chain_cache = kmem_cache_create("kvm_pte_chain",
  2285. sizeof(struct kvm_pte_chain),
  2286. 0, 0, NULL);
  2287. if (!pte_chain_cache)
  2288. goto nomem;
  2289. rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
  2290. sizeof(struct kvm_rmap_desc),
  2291. 0, 0, NULL);
  2292. if (!rmap_desc_cache)
  2293. goto nomem;
  2294. mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
  2295. sizeof(struct kvm_mmu_page),
  2296. 0, 0, NULL);
  2297. if (!mmu_page_header_cache)
  2298. goto nomem;
  2299. register_shrinker(&mmu_shrinker);
  2300. return 0;
  2301. nomem:
  2302. mmu_destroy_caches();
  2303. return -ENOMEM;
  2304. }
  2305. /*
  2306. * Caculate mmu pages needed for kvm.
  2307. */
  2308. unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
  2309. {
  2310. int i;
  2311. unsigned int nr_mmu_pages;
  2312. unsigned int nr_pages = 0;
  2313. for (i = 0; i < kvm->nmemslots; i++)
  2314. nr_pages += kvm->memslots[i].npages;
  2315. nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
  2316. nr_mmu_pages = max(nr_mmu_pages,
  2317. (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
  2318. return nr_mmu_pages;
  2319. }
  2320. static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  2321. unsigned len)
  2322. {
  2323. if (len > buffer->len)
  2324. return NULL;
  2325. return buffer->ptr;
  2326. }
  2327. static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  2328. unsigned len)
  2329. {
  2330. void *ret;
  2331. ret = pv_mmu_peek_buffer(buffer, len);
  2332. if (!ret)
  2333. return ret;
  2334. buffer->ptr += len;
  2335. buffer->len -= len;
  2336. buffer->processed += len;
  2337. return ret;
  2338. }
  2339. static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
  2340. gpa_t addr, gpa_t value)
  2341. {
  2342. int bytes = 8;
  2343. int r;
  2344. if (!is_long_mode(vcpu) && !is_pae(vcpu))
  2345. bytes = 4;
  2346. r = mmu_topup_memory_caches(vcpu);
  2347. if (r)
  2348. return r;
  2349. if (!emulator_write_phys(vcpu, addr, &value, bytes))
  2350. return -EFAULT;
  2351. return 1;
  2352. }
  2353. static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  2354. {
  2355. kvm_x86_ops->tlb_flush(vcpu);
  2356. set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
  2357. return 1;
  2358. }
  2359. static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
  2360. {
  2361. spin_lock(&vcpu->kvm->mmu_lock);
  2362. mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
  2363. spin_unlock(&vcpu->kvm->mmu_lock);
  2364. return 1;
  2365. }
  2366. static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
  2367. struct kvm_pv_mmu_op_buffer *buffer)
  2368. {
  2369. struct kvm_mmu_op_header *header;
  2370. header = pv_mmu_peek_buffer(buffer, sizeof *header);
  2371. if (!header)
  2372. return 0;
  2373. switch (header->op) {
  2374. case KVM_MMU_OP_WRITE_PTE: {
  2375. struct kvm_mmu_op_write_pte *wpte;
  2376. wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
  2377. if (!wpte)
  2378. return 0;
  2379. return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
  2380. wpte->pte_val);
  2381. }
  2382. case KVM_MMU_OP_FLUSH_TLB: {
  2383. struct kvm_mmu_op_flush_tlb *ftlb;
  2384. ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
  2385. if (!ftlb)
  2386. return 0;
  2387. return kvm_pv_mmu_flush_tlb(vcpu);
  2388. }
  2389. case KVM_MMU_OP_RELEASE_PT: {
  2390. struct kvm_mmu_op_release_pt *rpt;
  2391. rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
  2392. if (!rpt)
  2393. return 0;
  2394. return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
  2395. }
  2396. default: return 0;
  2397. }
  2398. }
  2399. int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
  2400. gpa_t addr, unsigned long *ret)
  2401. {
  2402. int r;
  2403. struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
  2404. buffer->ptr = buffer->buf;
  2405. buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
  2406. buffer->processed = 0;
  2407. r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
  2408. if (r)
  2409. goto out;
  2410. while (buffer->len) {
  2411. r = kvm_pv_mmu_op_one(vcpu, buffer);
  2412. if (r < 0)
  2413. goto out;
  2414. if (r == 0)
  2415. break;
  2416. }
  2417. r = 1;
  2418. out:
  2419. *ret = buffer->processed;
  2420. return r;
  2421. }
  2422. #ifdef AUDIT
  2423. static const char *audit_msg;
  2424. static gva_t canonicalize(gva_t gva)
  2425. {
  2426. #ifdef CONFIG_X86_64
  2427. gva = (long long)(gva << 16) >> 16;
  2428. #endif
  2429. return gva;
  2430. }
  2431. static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
  2432. gva_t va, int level)
  2433. {
  2434. u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
  2435. int i;
  2436. gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
  2437. for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
  2438. u64 ent = pt[i];
  2439. if (ent == shadow_trap_nonpresent_pte)
  2440. continue;
  2441. va = canonicalize(va);
  2442. if (level > 1) {
  2443. if (ent == shadow_notrap_nonpresent_pte)
  2444. printk(KERN_ERR "audit: (%s) nontrapping pte"
  2445. " in nonleaf level: levels %d gva %lx"
  2446. " level %d pte %llx\n", audit_msg,
  2447. vcpu->arch.mmu.root_level, va, level, ent);
  2448. audit_mappings_page(vcpu, ent, va, level - 1);
  2449. } else {
  2450. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
  2451. hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT;
  2452. if (is_shadow_present_pte(ent)
  2453. && (ent & PT64_BASE_ADDR_MASK) != hpa)
  2454. printk(KERN_ERR "xx audit error: (%s) levels %d"
  2455. " gva %lx gpa %llx hpa %llx ent %llx %d\n",
  2456. audit_msg, vcpu->arch.mmu.root_level,
  2457. va, gpa, hpa, ent,
  2458. is_shadow_present_pte(ent));
  2459. else if (ent == shadow_notrap_nonpresent_pte
  2460. && !is_error_hpa(hpa))
  2461. printk(KERN_ERR "audit: (%s) notrap shadow,"
  2462. " valid guest gva %lx\n", audit_msg, va);
  2463. kvm_release_pfn_clean(pfn);
  2464. }
  2465. }
  2466. }
  2467. static void audit_mappings(struct kvm_vcpu *vcpu)
  2468. {
  2469. unsigned i;
  2470. if (vcpu->arch.mmu.root_level == 4)
  2471. audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
  2472. else
  2473. for (i = 0; i < 4; ++i)
  2474. if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
  2475. audit_mappings_page(vcpu,
  2476. vcpu->arch.mmu.pae_root[i],
  2477. i << 30,
  2478. 2);
  2479. }
  2480. static int count_rmaps(struct kvm_vcpu *vcpu)
  2481. {
  2482. int nmaps = 0;
  2483. int i, j, k;
  2484. for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
  2485. struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
  2486. struct kvm_rmap_desc *d;
  2487. for (j = 0; j < m->npages; ++j) {
  2488. unsigned long *rmapp = &m->rmap[j];
  2489. if (!*rmapp)
  2490. continue;
  2491. if (!(*rmapp & 1)) {
  2492. ++nmaps;
  2493. continue;
  2494. }
  2495. d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  2496. while (d) {
  2497. for (k = 0; k < RMAP_EXT; ++k)
  2498. if (d->shadow_ptes[k])
  2499. ++nmaps;
  2500. else
  2501. break;
  2502. d = d->more;
  2503. }
  2504. }
  2505. }
  2506. return nmaps;
  2507. }
  2508. static int count_writable_mappings(struct kvm_vcpu *vcpu)
  2509. {
  2510. int nmaps = 0;
  2511. struct kvm_mmu_page *sp;
  2512. int i;
  2513. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  2514. u64 *pt = sp->spt;
  2515. if (sp->role.level != PT_PAGE_TABLE_LEVEL)
  2516. continue;
  2517. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  2518. u64 ent = pt[i];
  2519. if (!(ent & PT_PRESENT_MASK))
  2520. continue;
  2521. if (!(ent & PT_WRITABLE_MASK))
  2522. continue;
  2523. ++nmaps;
  2524. }
  2525. }
  2526. return nmaps;
  2527. }
  2528. static void audit_rmap(struct kvm_vcpu *vcpu)
  2529. {
  2530. int n_rmap = count_rmaps(vcpu);
  2531. int n_actual = count_writable_mappings(vcpu);
  2532. if (n_rmap != n_actual)
  2533. printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
  2534. __func__, audit_msg, n_rmap, n_actual);
  2535. }
  2536. static void audit_write_protection(struct kvm_vcpu *vcpu)
  2537. {
  2538. struct kvm_mmu_page *sp;
  2539. struct kvm_memory_slot *slot;
  2540. unsigned long *rmapp;
  2541. gfn_t gfn;
  2542. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  2543. if (sp->role.metaphysical)
  2544. continue;
  2545. gfn = unalias_gfn(vcpu->kvm, sp->gfn);
  2546. slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
  2547. rmapp = &slot->rmap[gfn - slot->base_gfn];
  2548. if (*rmapp)
  2549. printk(KERN_ERR "%s: (%s) shadow page has writable"
  2550. " mappings: gfn %lx role %x\n",
  2551. __func__, audit_msg, sp->gfn,
  2552. sp->role.word);
  2553. }
  2554. }
  2555. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
  2556. {
  2557. int olddbg = dbg;
  2558. dbg = 0;
  2559. audit_msg = msg;
  2560. audit_rmap(vcpu);
  2561. audit_write_protection(vcpu);
  2562. audit_mappings(vcpu);
  2563. dbg = olddbg;
  2564. }
  2565. #endif