iwl4965-base.c 254 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/version.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/wireless.h>
  39. #include <linux/firmware.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/if_arp.h>
  42. #include <net/mac80211.h>
  43. #include <asm/div64.h>
  44. #include "iwl-4965.h"
  45. #include "iwl-helpers.h"
  46. #ifdef CONFIG_IWL4965_DEBUG
  47. u32 iwl4965_debug_level;
  48. #endif
  49. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  50. struct iwl4965_tx_queue *txq);
  51. /******************************************************************************
  52. *
  53. * module boiler plate
  54. *
  55. ******************************************************************************/
  56. /* module parameters */
  57. static int iwl4965_param_disable_hw_scan; /* def: 0 = use 4965's h/w scan */
  58. static int iwl4965_param_debug; /* def: 0 = minimal debug log messages */
  59. static int iwl4965_param_disable; /* def: enable radio */
  60. static int iwl4965_param_antenna; /* def: 0 = both antennas (use diversity) */
  61. int iwl4965_param_hwcrypto; /* def: using software encryption */
  62. static int iwl4965_param_qos_enable = 1; /* def: 1 = use quality of service */
  63. int iwl4965_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 16 Tx queues */
  64. int iwl4965_param_amsdu_size_8K; /* def: enable 8K amsdu size */
  65. /*
  66. * module name, copyright, version, etc.
  67. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  68. */
  69. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
  70. #ifdef CONFIG_IWL4965_DEBUG
  71. #define VD "d"
  72. #else
  73. #define VD
  74. #endif
  75. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  76. #define VS "s"
  77. #else
  78. #define VS
  79. #endif
  80. #define IWLWIFI_VERSION "1.2.26k" VD VS
  81. #define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
  82. #define DRV_VERSION IWLWIFI_VERSION
  83. /* Change firmware file name, using "-" and incrementing number,
  84. * *only* when uCode interface or architecture changes so that it
  85. * is not compatible with earlier drivers.
  86. * This number will also appear in << 8 position of 1st dword of uCode file */
  87. #define IWL4965_UCODE_API "-1"
  88. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  89. MODULE_VERSION(DRV_VERSION);
  90. MODULE_AUTHOR(DRV_COPYRIGHT);
  91. MODULE_LICENSE("GPL");
  92. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  93. {
  94. u16 fc = le16_to_cpu(hdr->frame_control);
  95. int hdr_len = ieee80211_get_hdrlen(fc);
  96. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  97. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  98. return NULL;
  99. }
  100. static const struct ieee80211_supported_band *iwl4965_get_hw_mode(
  101. struct iwl4965_priv *priv, enum ieee80211_band band)
  102. {
  103. return priv->hw->wiphy->bands[band];
  104. }
  105. static int iwl4965_is_empty_essid(const char *essid, int essid_len)
  106. {
  107. /* Single white space is for Linksys APs */
  108. if (essid_len == 1 && essid[0] == ' ')
  109. return 1;
  110. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  111. while (essid_len) {
  112. essid_len--;
  113. if (essid[essid_len] != '\0')
  114. return 0;
  115. }
  116. return 1;
  117. }
  118. static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
  119. {
  120. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  121. const char *s = essid;
  122. char *d = escaped;
  123. if (iwl4965_is_empty_essid(essid, essid_len)) {
  124. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  125. return escaped;
  126. }
  127. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  128. while (essid_len--) {
  129. if (*s == '\0') {
  130. *d++ = '\\';
  131. *d++ = '0';
  132. s++;
  133. } else
  134. *d++ = *s++;
  135. }
  136. *d = '\0';
  137. return escaped;
  138. }
  139. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  140. * DMA services
  141. *
  142. * Theory of operation
  143. *
  144. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  145. * of buffer descriptors, each of which points to one or more data buffers for
  146. * the device to read from or fill. Driver and device exchange status of each
  147. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  148. * entries in each circular buffer, to protect against confusing empty and full
  149. * queue states.
  150. *
  151. * The device reads or writes the data in the queues via the device's several
  152. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  153. *
  154. * For Tx queue, there are low mark and high mark limits. If, after queuing
  155. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  156. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  157. * Tx queue resumed.
  158. *
  159. * The 4965 operates with up to 17 queues: One receive queue, one transmit
  160. * queue (#4) for sending commands to the device firmware, and 15 other
  161. * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
  162. *
  163. * See more detailed info in iwl-4965-hw.h.
  164. ***************************************************/
  165. int iwl4965_queue_space(const struct iwl4965_queue *q)
  166. {
  167. int s = q->read_ptr - q->write_ptr;
  168. if (q->read_ptr > q->write_ptr)
  169. s -= q->n_bd;
  170. if (s <= 0)
  171. s += q->n_window;
  172. /* keep some reserve to not confuse empty and full situations */
  173. s -= 2;
  174. if (s < 0)
  175. s = 0;
  176. return s;
  177. }
  178. /**
  179. * iwl4965_queue_inc_wrap - increment queue index, wrap back to beginning
  180. * @index -- current index
  181. * @n_bd -- total number of entries in queue (must be power of 2)
  182. */
  183. static inline int iwl4965_queue_inc_wrap(int index, int n_bd)
  184. {
  185. return ++index & (n_bd - 1);
  186. }
  187. /**
  188. * iwl4965_queue_dec_wrap - decrement queue index, wrap back to end
  189. * @index -- current index
  190. * @n_bd -- total number of entries in queue (must be power of 2)
  191. */
  192. static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
  193. {
  194. return --index & (n_bd - 1);
  195. }
  196. static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
  197. {
  198. return q->write_ptr > q->read_ptr ?
  199. (i >= q->read_ptr && i < q->write_ptr) :
  200. !(i < q->read_ptr && i >= q->write_ptr);
  201. }
  202. static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
  203. {
  204. /* This is for scan command, the big buffer at end of command array */
  205. if (is_huge)
  206. return q->n_window; /* must be power of 2 */
  207. /* Otherwise, use normal size buffers */
  208. return index & (q->n_window - 1);
  209. }
  210. /**
  211. * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
  212. */
  213. static int iwl4965_queue_init(struct iwl4965_priv *priv, struct iwl4965_queue *q,
  214. int count, int slots_num, u32 id)
  215. {
  216. q->n_bd = count;
  217. q->n_window = slots_num;
  218. q->id = id;
  219. /* count must be power-of-two size, otherwise iwl4965_queue_inc_wrap
  220. * and iwl4965_queue_dec_wrap are broken. */
  221. BUG_ON(!is_power_of_2(count));
  222. /* slots_num must be power-of-two size, otherwise
  223. * get_cmd_index is broken. */
  224. BUG_ON(!is_power_of_2(slots_num));
  225. q->low_mark = q->n_window / 4;
  226. if (q->low_mark < 4)
  227. q->low_mark = 4;
  228. q->high_mark = q->n_window / 8;
  229. if (q->high_mark < 2)
  230. q->high_mark = 2;
  231. q->write_ptr = q->read_ptr = 0;
  232. return 0;
  233. }
  234. /**
  235. * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  236. */
  237. static int iwl4965_tx_queue_alloc(struct iwl4965_priv *priv,
  238. struct iwl4965_tx_queue *txq, u32 id)
  239. {
  240. struct pci_dev *dev = priv->pci_dev;
  241. /* Driver private data, only for Tx (not command) queues,
  242. * not shared with device. */
  243. if (id != IWL_CMD_QUEUE_NUM) {
  244. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  245. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  246. if (!txq->txb) {
  247. IWL_ERROR("kmalloc for auxiliary BD "
  248. "structures failed\n");
  249. goto error;
  250. }
  251. } else
  252. txq->txb = NULL;
  253. /* Circular buffer of transmit frame descriptors (TFDs),
  254. * shared with device */
  255. txq->bd = pci_alloc_consistent(dev,
  256. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  257. &txq->q.dma_addr);
  258. if (!txq->bd) {
  259. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  260. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  261. goto error;
  262. }
  263. txq->q.id = id;
  264. return 0;
  265. error:
  266. if (txq->txb) {
  267. kfree(txq->txb);
  268. txq->txb = NULL;
  269. }
  270. return -ENOMEM;
  271. }
  272. /**
  273. * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
  274. */
  275. int iwl4965_tx_queue_init(struct iwl4965_priv *priv,
  276. struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
  277. {
  278. struct pci_dev *dev = priv->pci_dev;
  279. int len;
  280. int rc = 0;
  281. /*
  282. * Alloc buffer array for commands (Tx or other types of commands).
  283. * For the command queue (#4), allocate command space + one big
  284. * command for scan, since scan command is very huge; the system will
  285. * not have two scans at the same time, so only one is needed.
  286. * For normal Tx queues (all other queues), no super-size command
  287. * space is needed.
  288. */
  289. len = sizeof(struct iwl4965_cmd) * slots_num;
  290. if (txq_id == IWL_CMD_QUEUE_NUM)
  291. len += IWL_MAX_SCAN_SIZE;
  292. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  293. if (!txq->cmd)
  294. return -ENOMEM;
  295. /* Alloc driver data array and TFD circular buffer */
  296. rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
  297. if (rc) {
  298. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  299. return -ENOMEM;
  300. }
  301. txq->need_update = 0;
  302. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  303. * iwl4965_queue_inc_wrap and iwl4965_queue_dec_wrap are broken. */
  304. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  305. /* Initialize queue's high/low-water marks, and head/tail indexes */
  306. iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  307. /* Tell device where to find queue */
  308. iwl4965_hw_tx_queue_init(priv, txq);
  309. return 0;
  310. }
  311. /**
  312. * iwl4965_tx_queue_free - Deallocate DMA queue.
  313. * @txq: Transmit queue to deallocate.
  314. *
  315. * Empty queue by removing and destroying all BD's.
  316. * Free all buffers.
  317. * 0-fill, but do not free "txq" descriptor structure.
  318. */
  319. void iwl4965_tx_queue_free(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
  320. {
  321. struct iwl4965_queue *q = &txq->q;
  322. struct pci_dev *dev = priv->pci_dev;
  323. int len;
  324. if (q->n_bd == 0)
  325. return;
  326. /* first, empty all BD's */
  327. for (; q->write_ptr != q->read_ptr;
  328. q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd))
  329. iwl4965_hw_txq_free_tfd(priv, txq);
  330. len = sizeof(struct iwl4965_cmd) * q->n_window;
  331. if (q->id == IWL_CMD_QUEUE_NUM)
  332. len += IWL_MAX_SCAN_SIZE;
  333. /* De-alloc array of command/tx buffers */
  334. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  335. /* De-alloc circular buffer of TFDs */
  336. if (txq->q.n_bd)
  337. pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
  338. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  339. /* De-alloc array of per-TFD driver data */
  340. if (txq->txb) {
  341. kfree(txq->txb);
  342. txq->txb = NULL;
  343. }
  344. /* 0-fill queue descriptor structure */
  345. memset(txq, 0, sizeof(*txq));
  346. }
  347. const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  348. /*************** STATION TABLE MANAGEMENT ****
  349. * mac80211 should be examined to determine if sta_info is duplicating
  350. * the functionality provided here
  351. */
  352. /**************************************************************/
  353. #if 0 /* temporary disable till we add real remove station */
  354. /**
  355. * iwl4965_remove_station - Remove driver's knowledge of station.
  356. *
  357. * NOTE: This does not remove station from device's station table.
  358. */
  359. static u8 iwl4965_remove_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
  360. {
  361. int index = IWL_INVALID_STATION;
  362. int i;
  363. unsigned long flags;
  364. spin_lock_irqsave(&priv->sta_lock, flags);
  365. if (is_ap)
  366. index = IWL_AP_ID;
  367. else if (is_broadcast_ether_addr(addr))
  368. index = priv->hw_setting.bcast_sta_id;
  369. else
  370. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  371. if (priv->stations[i].used &&
  372. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  373. addr)) {
  374. index = i;
  375. break;
  376. }
  377. if (unlikely(index == IWL_INVALID_STATION))
  378. goto out;
  379. if (priv->stations[index].used) {
  380. priv->stations[index].used = 0;
  381. priv->num_stations--;
  382. }
  383. BUG_ON(priv->num_stations < 0);
  384. out:
  385. spin_unlock_irqrestore(&priv->sta_lock, flags);
  386. return 0;
  387. }
  388. #endif
  389. /**
  390. * iwl4965_clear_stations_table - Clear the driver's station table
  391. *
  392. * NOTE: This does not clear or otherwise alter the device's station table.
  393. */
  394. static void iwl4965_clear_stations_table(struct iwl4965_priv *priv)
  395. {
  396. unsigned long flags;
  397. spin_lock_irqsave(&priv->sta_lock, flags);
  398. priv->num_stations = 0;
  399. memset(priv->stations, 0, sizeof(priv->stations));
  400. spin_unlock_irqrestore(&priv->sta_lock, flags);
  401. }
  402. /**
  403. * iwl4965_add_station_flags - Add station to tables in driver and device
  404. */
  405. u8 iwl4965_add_station_flags(struct iwl4965_priv *priv, const u8 *addr,
  406. int is_ap, u8 flags, void *ht_data)
  407. {
  408. int i;
  409. int index = IWL_INVALID_STATION;
  410. struct iwl4965_station_entry *station;
  411. unsigned long flags_spin;
  412. DECLARE_MAC_BUF(mac);
  413. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  414. if (is_ap)
  415. index = IWL_AP_ID;
  416. else if (is_broadcast_ether_addr(addr))
  417. index = priv->hw_setting.bcast_sta_id;
  418. else
  419. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  420. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  421. addr)) {
  422. index = i;
  423. break;
  424. }
  425. if (!priv->stations[i].used &&
  426. index == IWL_INVALID_STATION)
  427. index = i;
  428. }
  429. /* These two conditions have the same outcome, but keep them separate
  430. since they have different meanings */
  431. if (unlikely(index == IWL_INVALID_STATION)) {
  432. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  433. return index;
  434. }
  435. if (priv->stations[index].used &&
  436. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  437. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  438. return index;
  439. }
  440. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  441. station = &priv->stations[index];
  442. station->used = 1;
  443. priv->num_stations++;
  444. /* Set up the REPLY_ADD_STA command to send to device */
  445. memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
  446. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  447. station->sta.mode = 0;
  448. station->sta.sta.sta_id = index;
  449. station->sta.station_flags = 0;
  450. #ifdef CONFIG_IWL4965_HT
  451. /* BCAST station and IBSS stations do not work in HT mode */
  452. if (index != priv->hw_setting.bcast_sta_id &&
  453. priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
  454. iwl4965_set_ht_add_station(priv, index,
  455. (struct ieee80211_ht_info *) ht_data);
  456. #endif /*CONFIG_IWL4965_HT*/
  457. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  458. /* Add station to device's station table */
  459. iwl4965_send_add_station(priv, &station->sta, flags);
  460. return index;
  461. }
  462. /*************** DRIVER STATUS FUNCTIONS *****/
  463. static inline int iwl4965_is_ready(struct iwl4965_priv *priv)
  464. {
  465. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  466. * set but EXIT_PENDING is not */
  467. return test_bit(STATUS_READY, &priv->status) &&
  468. test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
  469. !test_bit(STATUS_EXIT_PENDING, &priv->status);
  470. }
  471. static inline int iwl4965_is_alive(struct iwl4965_priv *priv)
  472. {
  473. return test_bit(STATUS_ALIVE, &priv->status);
  474. }
  475. static inline int iwl4965_is_init(struct iwl4965_priv *priv)
  476. {
  477. return test_bit(STATUS_INIT, &priv->status);
  478. }
  479. static inline int iwl4965_is_rfkill(struct iwl4965_priv *priv)
  480. {
  481. return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
  482. test_bit(STATUS_RF_KILL_SW, &priv->status);
  483. }
  484. static inline int iwl4965_is_ready_rf(struct iwl4965_priv *priv)
  485. {
  486. if (iwl4965_is_rfkill(priv))
  487. return 0;
  488. return iwl4965_is_ready(priv);
  489. }
  490. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  491. #define IWL_CMD(x) case x : return #x
  492. static const char *get_cmd_string(u8 cmd)
  493. {
  494. switch (cmd) {
  495. IWL_CMD(REPLY_ALIVE);
  496. IWL_CMD(REPLY_ERROR);
  497. IWL_CMD(REPLY_RXON);
  498. IWL_CMD(REPLY_RXON_ASSOC);
  499. IWL_CMD(REPLY_QOS_PARAM);
  500. IWL_CMD(REPLY_RXON_TIMING);
  501. IWL_CMD(REPLY_ADD_STA);
  502. IWL_CMD(REPLY_REMOVE_STA);
  503. IWL_CMD(REPLY_REMOVE_ALL_STA);
  504. IWL_CMD(REPLY_TX);
  505. IWL_CMD(REPLY_RATE_SCALE);
  506. IWL_CMD(REPLY_LEDS_CMD);
  507. IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
  508. IWL_CMD(RADAR_NOTIFICATION);
  509. IWL_CMD(REPLY_QUIET_CMD);
  510. IWL_CMD(REPLY_CHANNEL_SWITCH);
  511. IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
  512. IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
  513. IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
  514. IWL_CMD(POWER_TABLE_CMD);
  515. IWL_CMD(PM_SLEEP_NOTIFICATION);
  516. IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
  517. IWL_CMD(REPLY_SCAN_CMD);
  518. IWL_CMD(REPLY_SCAN_ABORT_CMD);
  519. IWL_CMD(SCAN_START_NOTIFICATION);
  520. IWL_CMD(SCAN_RESULTS_NOTIFICATION);
  521. IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
  522. IWL_CMD(BEACON_NOTIFICATION);
  523. IWL_CMD(REPLY_TX_BEACON);
  524. IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
  525. IWL_CMD(QUIET_NOTIFICATION);
  526. IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
  527. IWL_CMD(MEASURE_ABORT_NOTIFICATION);
  528. IWL_CMD(REPLY_BT_CONFIG);
  529. IWL_CMD(REPLY_STATISTICS_CMD);
  530. IWL_CMD(STATISTICS_NOTIFICATION);
  531. IWL_CMD(REPLY_CARD_STATE_CMD);
  532. IWL_CMD(CARD_STATE_NOTIFICATION);
  533. IWL_CMD(MISSED_BEACONS_NOTIFICATION);
  534. IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
  535. IWL_CMD(SENSITIVITY_CMD);
  536. IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
  537. IWL_CMD(REPLY_RX_PHY_CMD);
  538. IWL_CMD(REPLY_RX_MPDU_CMD);
  539. IWL_CMD(REPLY_4965_RX);
  540. IWL_CMD(REPLY_COMPRESSED_BA);
  541. default:
  542. return "UNKNOWN";
  543. }
  544. }
  545. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  546. /**
  547. * iwl4965_enqueue_hcmd - enqueue a uCode command
  548. * @priv: device private data point
  549. * @cmd: a point to the ucode command structure
  550. *
  551. * The function returns < 0 values to indicate the operation is
  552. * failed. On success, it turns the index (> 0) of command in the
  553. * command queue.
  554. */
  555. static int iwl4965_enqueue_hcmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  556. {
  557. struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  558. struct iwl4965_queue *q = &txq->q;
  559. struct iwl4965_tfd_frame *tfd;
  560. u32 *control_flags;
  561. struct iwl4965_cmd *out_cmd;
  562. u32 idx;
  563. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  564. dma_addr_t phys_addr;
  565. int ret;
  566. unsigned long flags;
  567. /* If any of the command structures end up being larger than
  568. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  569. * we will need to increase the size of the TFD entries */
  570. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  571. !(cmd->meta.flags & CMD_SIZE_HUGE));
  572. if (iwl4965_is_rfkill(priv)) {
  573. IWL_DEBUG_INFO("Not sending command - RF KILL");
  574. return -EIO;
  575. }
  576. if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  577. IWL_ERROR("No space for Tx\n");
  578. return -ENOSPC;
  579. }
  580. spin_lock_irqsave(&priv->hcmd_lock, flags);
  581. tfd = &txq->bd[q->write_ptr];
  582. memset(tfd, 0, sizeof(*tfd));
  583. control_flags = (u32 *) tfd;
  584. idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
  585. out_cmd = &txq->cmd[idx];
  586. out_cmd->hdr.cmd = cmd->id;
  587. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  588. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  589. /* At this point, the out_cmd now has all of the incoming cmd
  590. * information */
  591. out_cmd->hdr.flags = 0;
  592. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  593. INDEX_TO_SEQ(q->write_ptr));
  594. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  595. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  596. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  597. offsetof(struct iwl4965_cmd, hdr);
  598. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  599. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  600. "%d bytes at %d[%d]:%d\n",
  601. get_cmd_string(out_cmd->hdr.cmd),
  602. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  603. fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
  604. txq->need_update = 1;
  605. /* Set up entry in queue's byte count circular buffer */
  606. ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
  607. /* Increment and update queue's write index */
  608. q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
  609. iwl4965_tx_queue_update_write_ptr(priv, txq);
  610. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  611. return ret ? ret : idx;
  612. }
  613. static int iwl4965_send_cmd_async(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  614. {
  615. int ret;
  616. BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
  617. /* An asynchronous command can not expect an SKB to be set. */
  618. BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
  619. /* An asynchronous command MUST have a callback. */
  620. BUG_ON(!cmd->meta.u.callback);
  621. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  622. return -EBUSY;
  623. ret = iwl4965_enqueue_hcmd(priv, cmd);
  624. if (ret < 0) {
  625. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  626. get_cmd_string(cmd->id), ret);
  627. return ret;
  628. }
  629. return 0;
  630. }
  631. static int iwl4965_send_cmd_sync(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  632. {
  633. int cmd_idx;
  634. int ret;
  635. static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
  636. BUG_ON(cmd->meta.flags & CMD_ASYNC);
  637. /* A synchronous command can not have a callback set. */
  638. BUG_ON(cmd->meta.u.callback != NULL);
  639. if (atomic_xchg(&entry, 1)) {
  640. IWL_ERROR("Error sending %s: Already sending a host command\n",
  641. get_cmd_string(cmd->id));
  642. return -EBUSY;
  643. }
  644. set_bit(STATUS_HCMD_ACTIVE, &priv->status);
  645. if (cmd->meta.flags & CMD_WANT_SKB)
  646. cmd->meta.source = &cmd->meta;
  647. cmd_idx = iwl4965_enqueue_hcmd(priv, cmd);
  648. if (cmd_idx < 0) {
  649. ret = cmd_idx;
  650. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  651. get_cmd_string(cmd->id), ret);
  652. goto out;
  653. }
  654. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  655. !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
  656. HOST_COMPLETE_TIMEOUT);
  657. if (!ret) {
  658. if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
  659. IWL_ERROR("Error sending %s: time out after %dms.\n",
  660. get_cmd_string(cmd->id),
  661. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  662. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  663. ret = -ETIMEDOUT;
  664. goto cancel;
  665. }
  666. }
  667. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  668. IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
  669. get_cmd_string(cmd->id));
  670. ret = -ECANCELED;
  671. goto fail;
  672. }
  673. if (test_bit(STATUS_FW_ERROR, &priv->status)) {
  674. IWL_DEBUG_INFO("Command %s failed: FW Error\n",
  675. get_cmd_string(cmd->id));
  676. ret = -EIO;
  677. goto fail;
  678. }
  679. if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
  680. IWL_ERROR("Error: Response NULL in '%s'\n",
  681. get_cmd_string(cmd->id));
  682. ret = -EIO;
  683. goto out;
  684. }
  685. ret = 0;
  686. goto out;
  687. cancel:
  688. if (cmd->meta.flags & CMD_WANT_SKB) {
  689. struct iwl4965_cmd *qcmd;
  690. /* Cancel the CMD_WANT_SKB flag for the cmd in the
  691. * TX cmd queue. Otherwise in case the cmd comes
  692. * in later, it will possibly set an invalid
  693. * address (cmd->meta.source). */
  694. qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
  695. qcmd->meta.flags &= ~CMD_WANT_SKB;
  696. }
  697. fail:
  698. if (cmd->meta.u.skb) {
  699. dev_kfree_skb_any(cmd->meta.u.skb);
  700. cmd->meta.u.skb = NULL;
  701. }
  702. out:
  703. atomic_set(&entry, 0);
  704. return ret;
  705. }
  706. int iwl4965_send_cmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  707. {
  708. if (cmd->meta.flags & CMD_ASYNC)
  709. return iwl4965_send_cmd_async(priv, cmd);
  710. return iwl4965_send_cmd_sync(priv, cmd);
  711. }
  712. int iwl4965_send_cmd_pdu(struct iwl4965_priv *priv, u8 id, u16 len, const void *data)
  713. {
  714. struct iwl4965_host_cmd cmd = {
  715. .id = id,
  716. .len = len,
  717. .data = data,
  718. };
  719. return iwl4965_send_cmd_sync(priv, &cmd);
  720. }
  721. static int __must_check iwl4965_send_cmd_u32(struct iwl4965_priv *priv, u8 id, u32 val)
  722. {
  723. struct iwl4965_host_cmd cmd = {
  724. .id = id,
  725. .len = sizeof(val),
  726. .data = &val,
  727. };
  728. return iwl4965_send_cmd_sync(priv, &cmd);
  729. }
  730. int iwl4965_send_statistics_request(struct iwl4965_priv *priv)
  731. {
  732. return iwl4965_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
  733. }
  734. /**
  735. * iwl4965_rxon_add_station - add station into station table.
  736. *
  737. * there is only one AP station with id= IWL_AP_ID
  738. * NOTE: mutex must be held before calling this fnction
  739. */
  740. static int iwl4965_rxon_add_station(struct iwl4965_priv *priv,
  741. const u8 *addr, int is_ap)
  742. {
  743. u8 sta_id;
  744. /* Add station to device's station table */
  745. #ifdef CONFIG_IWL4965_HT
  746. struct ieee80211_conf *conf = &priv->hw->conf;
  747. struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
  748. if ((is_ap) &&
  749. (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
  750. (priv->iw_mode == IEEE80211_IF_TYPE_STA))
  751. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  752. 0, cur_ht_config);
  753. else
  754. #endif /* CONFIG_IWL4965_HT */
  755. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  756. 0, NULL);
  757. /* Set up default rate scaling table in device's station table */
  758. iwl4965_add_station(priv, addr, is_ap);
  759. return sta_id;
  760. }
  761. /**
  762. * iwl4965_set_rxon_channel - Set the phymode and channel values in staging RXON
  763. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  764. * @channel: Any channel valid for the requested phymode
  765. * In addition to setting the staging RXON, priv->phymode is also set.
  766. *
  767. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  768. * in the staging RXON flag structure based on the phymode
  769. */
  770. static int iwl4965_set_rxon_channel(struct iwl4965_priv *priv,
  771. enum ieee80211_band band,
  772. u16 channel)
  773. {
  774. if (!iwl4965_get_channel_info(priv, band, channel)) {
  775. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  776. channel, band);
  777. return -EINVAL;
  778. }
  779. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  780. (priv->band == band))
  781. return 0;
  782. priv->staging_rxon.channel = cpu_to_le16(channel);
  783. if (band == IEEE80211_BAND_5GHZ)
  784. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  785. else
  786. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  787. priv->band = band;
  788. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
  789. return 0;
  790. }
  791. /**
  792. * iwl4965_check_rxon_cmd - validate RXON structure is valid
  793. *
  794. * NOTE: This is really only useful during development and can eventually
  795. * be #ifdef'd out once the driver is stable and folks aren't actively
  796. * making changes
  797. */
  798. static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
  799. {
  800. int error = 0;
  801. int counter = 1;
  802. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  803. error |= le32_to_cpu(rxon->flags &
  804. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  805. RXON_FLG_RADAR_DETECT_MSK));
  806. if (error)
  807. IWL_WARNING("check 24G fields %d | %d\n",
  808. counter++, error);
  809. } else {
  810. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  811. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  812. if (error)
  813. IWL_WARNING("check 52 fields %d | %d\n",
  814. counter++, error);
  815. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  816. if (error)
  817. IWL_WARNING("check 52 CCK %d | %d\n",
  818. counter++, error);
  819. }
  820. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  821. if (error)
  822. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  823. /* make sure basic rates 6Mbps and 1Mbps are supported */
  824. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  825. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  826. if (error)
  827. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  828. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  829. if (error)
  830. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  831. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  832. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  833. if (error)
  834. IWL_WARNING("check CCK and short slot %d | %d\n",
  835. counter++, error);
  836. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  837. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  838. if (error)
  839. IWL_WARNING("check CCK & auto detect %d | %d\n",
  840. counter++, error);
  841. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  842. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  843. if (error)
  844. IWL_WARNING("check TGG and auto detect %d | %d\n",
  845. counter++, error);
  846. if (error)
  847. IWL_WARNING("Tuning to channel %d\n",
  848. le16_to_cpu(rxon->channel));
  849. if (error) {
  850. IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
  851. return -1;
  852. }
  853. return 0;
  854. }
  855. /**
  856. * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  857. * @priv: staging_rxon is compared to active_rxon
  858. *
  859. * If the RXON structure is changing enough to require a new tune,
  860. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  861. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  862. */
  863. static int iwl4965_full_rxon_required(struct iwl4965_priv *priv)
  864. {
  865. /* These items are only settable from the full RXON command */
  866. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  867. compare_ether_addr(priv->staging_rxon.bssid_addr,
  868. priv->active_rxon.bssid_addr) ||
  869. compare_ether_addr(priv->staging_rxon.node_addr,
  870. priv->active_rxon.node_addr) ||
  871. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  872. priv->active_rxon.wlap_bssid_addr) ||
  873. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  874. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  875. (priv->staging_rxon.air_propagation !=
  876. priv->active_rxon.air_propagation) ||
  877. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  878. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  879. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  880. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  881. (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
  882. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  883. return 1;
  884. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  885. * be updated with the RXON_ASSOC command -- however only some
  886. * flag transitions are allowed using RXON_ASSOC */
  887. /* Check if we are not switching bands */
  888. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  889. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  890. return 1;
  891. /* Check if we are switching association toggle */
  892. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  893. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  894. return 1;
  895. return 0;
  896. }
  897. static int iwl4965_send_rxon_assoc(struct iwl4965_priv *priv)
  898. {
  899. int rc = 0;
  900. struct iwl4965_rx_packet *res = NULL;
  901. struct iwl4965_rxon_assoc_cmd rxon_assoc;
  902. struct iwl4965_host_cmd cmd = {
  903. .id = REPLY_RXON_ASSOC,
  904. .len = sizeof(rxon_assoc),
  905. .meta.flags = CMD_WANT_SKB,
  906. .data = &rxon_assoc,
  907. };
  908. const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
  909. const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
  910. if ((rxon1->flags == rxon2->flags) &&
  911. (rxon1->filter_flags == rxon2->filter_flags) &&
  912. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  913. (rxon1->ofdm_ht_single_stream_basic_rates ==
  914. rxon2->ofdm_ht_single_stream_basic_rates) &&
  915. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  916. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  917. (rxon1->rx_chain == rxon2->rx_chain) &&
  918. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  919. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  920. return 0;
  921. }
  922. rxon_assoc.flags = priv->staging_rxon.flags;
  923. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  924. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  925. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  926. rxon_assoc.reserved = 0;
  927. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  928. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  929. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  930. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  931. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  932. rc = iwl4965_send_cmd_sync(priv, &cmd);
  933. if (rc)
  934. return rc;
  935. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  936. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  937. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  938. rc = -EIO;
  939. }
  940. priv->alloc_rxb_skb--;
  941. dev_kfree_skb_any(cmd.meta.u.skb);
  942. return rc;
  943. }
  944. /**
  945. * iwl4965_commit_rxon - commit staging_rxon to hardware
  946. *
  947. * The RXON command in staging_rxon is committed to the hardware and
  948. * the active_rxon structure is updated with the new data. This
  949. * function correctly transitions out of the RXON_ASSOC_MSK state if
  950. * a HW tune is required based on the RXON structure changes.
  951. */
  952. static int iwl4965_commit_rxon(struct iwl4965_priv *priv)
  953. {
  954. /* cast away the const for active_rxon in this function */
  955. struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  956. DECLARE_MAC_BUF(mac);
  957. int rc = 0;
  958. if (!iwl4965_is_alive(priv))
  959. return -1;
  960. /* always get timestamp with Rx frame */
  961. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  962. rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
  963. if (rc) {
  964. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  965. return -EINVAL;
  966. }
  967. /* If we don't need to send a full RXON, we can use
  968. * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
  969. * and other flags for the current radio configuration. */
  970. if (!iwl4965_full_rxon_required(priv)) {
  971. rc = iwl4965_send_rxon_assoc(priv);
  972. if (rc) {
  973. IWL_ERROR("Error setting RXON_ASSOC "
  974. "configuration (%d).\n", rc);
  975. return rc;
  976. }
  977. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  978. return 0;
  979. }
  980. /* station table will be cleared */
  981. priv->assoc_station_added = 0;
  982. #ifdef CONFIG_IWL4965_SENSITIVITY
  983. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  984. if (!priv->error_recovering)
  985. priv->start_calib = 0;
  986. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  987. #endif /* CONFIG_IWL4965_SENSITIVITY */
  988. /* If we are currently associated and the new config requires
  989. * an RXON_ASSOC and the new config wants the associated mask enabled,
  990. * we must clear the associated from the active configuration
  991. * before we apply the new config */
  992. if (iwl4965_is_associated(priv) &&
  993. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  994. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  995. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  996. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  997. sizeof(struct iwl4965_rxon_cmd),
  998. &priv->active_rxon);
  999. /* If the mask clearing failed then we set
  1000. * active_rxon back to what it was previously */
  1001. if (rc) {
  1002. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  1003. IWL_ERROR("Error clearing ASSOC_MSK on current "
  1004. "configuration (%d).\n", rc);
  1005. return rc;
  1006. }
  1007. }
  1008. IWL_DEBUG_INFO("Sending RXON\n"
  1009. "* with%s RXON_FILTER_ASSOC_MSK\n"
  1010. "* channel = %d\n"
  1011. "* bssid = %s\n",
  1012. ((priv->staging_rxon.filter_flags &
  1013. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  1014. le16_to_cpu(priv->staging_rxon.channel),
  1015. print_mac(mac, priv->staging_rxon.bssid_addr));
  1016. /* Apply the new configuration */
  1017. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  1018. sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
  1019. if (rc) {
  1020. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  1021. return rc;
  1022. }
  1023. iwl4965_clear_stations_table(priv);
  1024. #ifdef CONFIG_IWL4965_SENSITIVITY
  1025. if (!priv->error_recovering)
  1026. priv->start_calib = 0;
  1027. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  1028. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  1029. #endif /* CONFIG_IWL4965_SENSITIVITY */
  1030. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  1031. /* If we issue a new RXON command which required a tune then we must
  1032. * send a new TXPOWER command or we won't be able to Tx any frames */
  1033. rc = iwl4965_hw_reg_send_txpower(priv);
  1034. if (rc) {
  1035. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  1036. return rc;
  1037. }
  1038. /* Add the broadcast address so we can send broadcast frames */
  1039. if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
  1040. IWL_INVALID_STATION) {
  1041. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  1042. return -EIO;
  1043. }
  1044. /* If we have set the ASSOC_MSK and we are in BSS mode then
  1045. * add the IWL_AP_ID to the station rate table */
  1046. if (iwl4965_is_associated(priv) &&
  1047. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  1048. if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  1049. == IWL_INVALID_STATION) {
  1050. IWL_ERROR("Error adding AP address for transmit.\n");
  1051. return -EIO;
  1052. }
  1053. priv->assoc_station_added = 1;
  1054. }
  1055. return 0;
  1056. }
  1057. static int iwl4965_send_bt_config(struct iwl4965_priv *priv)
  1058. {
  1059. struct iwl4965_bt_cmd bt_cmd = {
  1060. .flags = 3,
  1061. .lead_time = 0xAA,
  1062. .max_kill = 1,
  1063. .kill_ack_mask = 0,
  1064. .kill_cts_mask = 0,
  1065. };
  1066. return iwl4965_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1067. sizeof(struct iwl4965_bt_cmd), &bt_cmd);
  1068. }
  1069. static int iwl4965_send_scan_abort(struct iwl4965_priv *priv)
  1070. {
  1071. int rc = 0;
  1072. struct iwl4965_rx_packet *res;
  1073. struct iwl4965_host_cmd cmd = {
  1074. .id = REPLY_SCAN_ABORT_CMD,
  1075. .meta.flags = CMD_WANT_SKB,
  1076. };
  1077. /* If there isn't a scan actively going on in the hardware
  1078. * then we are in between scan bands and not actually
  1079. * actively scanning, so don't send the abort command */
  1080. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1081. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1082. return 0;
  1083. }
  1084. rc = iwl4965_send_cmd_sync(priv, &cmd);
  1085. if (rc) {
  1086. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1087. return rc;
  1088. }
  1089. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1090. if (res->u.status != CAN_ABORT_STATUS) {
  1091. /* The scan abort will return 1 for success or
  1092. * 2 for "failure". A failure condition can be
  1093. * due to simply not being in an active scan which
  1094. * can occur if we send the scan abort before we
  1095. * the microcode has notified us that a scan is
  1096. * completed. */
  1097. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  1098. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1099. clear_bit(STATUS_SCAN_HW, &priv->status);
  1100. }
  1101. dev_kfree_skb_any(cmd.meta.u.skb);
  1102. return rc;
  1103. }
  1104. static int iwl4965_card_state_sync_callback(struct iwl4965_priv *priv,
  1105. struct iwl4965_cmd *cmd,
  1106. struct sk_buff *skb)
  1107. {
  1108. return 1;
  1109. }
  1110. /*
  1111. * CARD_STATE_CMD
  1112. *
  1113. * Use: Sets the device's internal card state to enable, disable, or halt
  1114. *
  1115. * When in the 'enable' state the card operates as normal.
  1116. * When in the 'disable' state, the card enters into a low power mode.
  1117. * When in the 'halt' state, the card is shut down and must be fully
  1118. * restarted to come back on.
  1119. */
  1120. static int iwl4965_send_card_state(struct iwl4965_priv *priv, u32 flags, u8 meta_flag)
  1121. {
  1122. struct iwl4965_host_cmd cmd = {
  1123. .id = REPLY_CARD_STATE_CMD,
  1124. .len = sizeof(u32),
  1125. .data = &flags,
  1126. .meta.flags = meta_flag,
  1127. };
  1128. if (meta_flag & CMD_ASYNC)
  1129. cmd.meta.u.callback = iwl4965_card_state_sync_callback;
  1130. return iwl4965_send_cmd(priv, &cmd);
  1131. }
  1132. static int iwl4965_add_sta_sync_callback(struct iwl4965_priv *priv,
  1133. struct iwl4965_cmd *cmd, struct sk_buff *skb)
  1134. {
  1135. struct iwl4965_rx_packet *res = NULL;
  1136. if (!skb) {
  1137. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  1138. return 1;
  1139. }
  1140. res = (struct iwl4965_rx_packet *)skb->data;
  1141. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1142. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1143. res->hdr.flags);
  1144. return 1;
  1145. }
  1146. switch (res->u.add_sta.status) {
  1147. case ADD_STA_SUCCESS_MSK:
  1148. break;
  1149. default:
  1150. break;
  1151. }
  1152. /* We didn't cache the SKB; let the caller free it */
  1153. return 1;
  1154. }
  1155. int iwl4965_send_add_station(struct iwl4965_priv *priv,
  1156. struct iwl4965_addsta_cmd *sta, u8 flags)
  1157. {
  1158. struct iwl4965_rx_packet *res = NULL;
  1159. int rc = 0;
  1160. struct iwl4965_host_cmd cmd = {
  1161. .id = REPLY_ADD_STA,
  1162. .len = sizeof(struct iwl4965_addsta_cmd),
  1163. .meta.flags = flags,
  1164. .data = sta,
  1165. };
  1166. if (flags & CMD_ASYNC)
  1167. cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
  1168. else
  1169. cmd.meta.flags |= CMD_WANT_SKB;
  1170. rc = iwl4965_send_cmd(priv, &cmd);
  1171. if (rc || (flags & CMD_ASYNC))
  1172. return rc;
  1173. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1174. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1175. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1176. res->hdr.flags);
  1177. rc = -EIO;
  1178. }
  1179. if (rc == 0) {
  1180. switch (res->u.add_sta.status) {
  1181. case ADD_STA_SUCCESS_MSK:
  1182. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  1183. break;
  1184. default:
  1185. rc = -EIO;
  1186. IWL_WARNING("REPLY_ADD_STA failed\n");
  1187. break;
  1188. }
  1189. }
  1190. priv->alloc_rxb_skb--;
  1191. dev_kfree_skb_any(cmd.meta.u.skb);
  1192. return rc;
  1193. }
  1194. static int iwl4965_update_sta_key_info(struct iwl4965_priv *priv,
  1195. struct ieee80211_key_conf *keyconf,
  1196. u8 sta_id)
  1197. {
  1198. unsigned long flags;
  1199. __le16 key_flags = 0;
  1200. switch (keyconf->alg) {
  1201. case ALG_CCMP:
  1202. key_flags |= STA_KEY_FLG_CCMP;
  1203. key_flags |= cpu_to_le16(
  1204. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  1205. key_flags &= ~STA_KEY_FLG_INVALID;
  1206. break;
  1207. case ALG_TKIP:
  1208. case ALG_WEP:
  1209. default:
  1210. return -EINVAL;
  1211. }
  1212. spin_lock_irqsave(&priv->sta_lock, flags);
  1213. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  1214. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  1215. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  1216. keyconf->keylen);
  1217. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  1218. keyconf->keylen);
  1219. priv->stations[sta_id].sta.key.key_flags = key_flags;
  1220. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1221. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1222. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1223. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  1224. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1225. return 0;
  1226. }
  1227. static int iwl4965_clear_sta_key_info(struct iwl4965_priv *priv, u8 sta_id)
  1228. {
  1229. unsigned long flags;
  1230. spin_lock_irqsave(&priv->sta_lock, flags);
  1231. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
  1232. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
  1233. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  1234. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1235. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1236. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1237. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1238. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1239. return 0;
  1240. }
  1241. static void iwl4965_clear_free_frames(struct iwl4965_priv *priv)
  1242. {
  1243. struct list_head *element;
  1244. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1245. priv->frames_count);
  1246. while (!list_empty(&priv->free_frames)) {
  1247. element = priv->free_frames.next;
  1248. list_del(element);
  1249. kfree(list_entry(element, struct iwl4965_frame, list));
  1250. priv->frames_count--;
  1251. }
  1252. if (priv->frames_count) {
  1253. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1254. priv->frames_count);
  1255. priv->frames_count = 0;
  1256. }
  1257. }
  1258. static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl4965_priv *priv)
  1259. {
  1260. struct iwl4965_frame *frame;
  1261. struct list_head *element;
  1262. if (list_empty(&priv->free_frames)) {
  1263. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1264. if (!frame) {
  1265. IWL_ERROR("Could not allocate frame!\n");
  1266. return NULL;
  1267. }
  1268. priv->frames_count++;
  1269. return frame;
  1270. }
  1271. element = priv->free_frames.next;
  1272. list_del(element);
  1273. return list_entry(element, struct iwl4965_frame, list);
  1274. }
  1275. static void iwl4965_free_frame(struct iwl4965_priv *priv, struct iwl4965_frame *frame)
  1276. {
  1277. memset(frame, 0, sizeof(*frame));
  1278. list_add(&frame->list, &priv->free_frames);
  1279. }
  1280. unsigned int iwl4965_fill_beacon_frame(struct iwl4965_priv *priv,
  1281. struct ieee80211_hdr *hdr,
  1282. const u8 *dest, int left)
  1283. {
  1284. if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
  1285. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1286. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1287. return 0;
  1288. if (priv->ibss_beacon->len > left)
  1289. return 0;
  1290. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1291. return priv->ibss_beacon->len;
  1292. }
  1293. static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
  1294. {
  1295. u8 i;
  1296. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1297. i = iwl4965_rates[i].next_ieee) {
  1298. if (rate_mask & (1 << i))
  1299. return iwl4965_rates[i].plcp;
  1300. }
  1301. return IWL_RATE_INVALID;
  1302. }
  1303. static int iwl4965_send_beacon_cmd(struct iwl4965_priv *priv)
  1304. {
  1305. struct iwl4965_frame *frame;
  1306. unsigned int frame_size;
  1307. int rc;
  1308. u8 rate;
  1309. frame = iwl4965_get_free_frame(priv);
  1310. if (!frame) {
  1311. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1312. "command.\n");
  1313. return -ENOMEM;
  1314. }
  1315. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1316. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
  1317. 0xFF0);
  1318. if (rate == IWL_INVALID_RATE)
  1319. rate = IWL_RATE_6M_PLCP;
  1320. } else {
  1321. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1322. if (rate == IWL_INVALID_RATE)
  1323. rate = IWL_RATE_1M_PLCP;
  1324. }
  1325. frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
  1326. rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1327. &frame->u.cmd[0]);
  1328. iwl4965_free_frame(priv, frame);
  1329. return rc;
  1330. }
  1331. /******************************************************************************
  1332. *
  1333. * EEPROM related functions
  1334. *
  1335. ******************************************************************************/
  1336. static void get_eeprom_mac(struct iwl4965_priv *priv, u8 *mac)
  1337. {
  1338. memcpy(mac, priv->eeprom.mac_address, 6);
  1339. }
  1340. static inline void iwl4965_eeprom_release_semaphore(struct iwl4965_priv *priv)
  1341. {
  1342. iwl4965_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
  1343. CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
  1344. }
  1345. /**
  1346. * iwl4965_eeprom_init - read EEPROM contents
  1347. *
  1348. * Load the EEPROM contents from adapter into priv->eeprom
  1349. *
  1350. * NOTE: This routine uses the non-debug IO access functions.
  1351. */
  1352. int iwl4965_eeprom_init(struct iwl4965_priv *priv)
  1353. {
  1354. u16 *e = (u16 *)&priv->eeprom;
  1355. u32 gp = iwl4965_read32(priv, CSR_EEPROM_GP);
  1356. u32 r;
  1357. int sz = sizeof(priv->eeprom);
  1358. int rc;
  1359. int i;
  1360. u16 addr;
  1361. /* The EEPROM structure has several padding buffers within it
  1362. * and when adding new EEPROM maps is subject to programmer errors
  1363. * which may be very difficult to identify without explicitly
  1364. * checking the resulting size of the eeprom map. */
  1365. BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
  1366. if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
  1367. IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
  1368. return -ENOENT;
  1369. }
  1370. /* Make sure driver (instead of uCode) is allowed to read EEPROM */
  1371. rc = iwl4965_eeprom_acquire_semaphore(priv);
  1372. if (rc < 0) {
  1373. IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
  1374. return -ENOENT;
  1375. }
  1376. /* eeprom is an array of 16bit values */
  1377. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  1378. _iwl4965_write32(priv, CSR_EEPROM_REG, addr << 1);
  1379. _iwl4965_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
  1380. for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
  1381. i += IWL_EEPROM_ACCESS_DELAY) {
  1382. r = _iwl4965_read_direct32(priv, CSR_EEPROM_REG);
  1383. if (r & CSR_EEPROM_REG_READ_VALID_MSK)
  1384. break;
  1385. udelay(IWL_EEPROM_ACCESS_DELAY);
  1386. }
  1387. if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
  1388. IWL_ERROR("Time out reading EEPROM[%d]", addr);
  1389. rc = -ETIMEDOUT;
  1390. goto done;
  1391. }
  1392. e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
  1393. }
  1394. rc = 0;
  1395. done:
  1396. iwl4965_eeprom_release_semaphore(priv);
  1397. return rc;
  1398. }
  1399. /******************************************************************************
  1400. *
  1401. * Misc. internal state and helper functions
  1402. *
  1403. ******************************************************************************/
  1404. static void iwl4965_unset_hw_setting(struct iwl4965_priv *priv)
  1405. {
  1406. if (priv->hw_setting.shared_virt)
  1407. pci_free_consistent(priv->pci_dev,
  1408. sizeof(struct iwl4965_shared),
  1409. priv->hw_setting.shared_virt,
  1410. priv->hw_setting.shared_phys);
  1411. }
  1412. /**
  1413. * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
  1414. *
  1415. * return : set the bit for each supported rate insert in ie
  1416. */
  1417. static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1418. u16 basic_rate, int *left)
  1419. {
  1420. u16 ret_rates = 0, bit;
  1421. int i;
  1422. u8 *cnt = ie;
  1423. u8 *rates = ie + 1;
  1424. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1425. if (bit & supported_rate) {
  1426. ret_rates |= bit;
  1427. rates[*cnt] = iwl4965_rates[i].ieee |
  1428. ((bit & basic_rate) ? 0x80 : 0x00);
  1429. (*cnt)++;
  1430. (*left)--;
  1431. if ((*left <= 0) ||
  1432. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1433. break;
  1434. }
  1435. }
  1436. return ret_rates;
  1437. }
  1438. /**
  1439. * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
  1440. */
  1441. static u16 iwl4965_fill_probe_req(struct iwl4965_priv *priv,
  1442. enum ieee80211_band band,
  1443. struct ieee80211_mgmt *frame,
  1444. int left, int is_direct)
  1445. {
  1446. int len = 0;
  1447. u8 *pos = NULL;
  1448. u16 active_rates, ret_rates, cck_rates, active_rate_basic;
  1449. #ifdef CONFIG_IWL4965_HT
  1450. const struct ieee80211_supported_band *sband =
  1451. iwl4965_get_hw_mode(priv, band);
  1452. #endif /* CONFIG_IWL4965_HT */
  1453. /* Make sure there is enough space for the probe request,
  1454. * two mandatory IEs and the data */
  1455. left -= 24;
  1456. if (left < 0)
  1457. return 0;
  1458. len += 24;
  1459. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1460. memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
  1461. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1462. memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
  1463. frame->seq_ctrl = 0;
  1464. /* fill in our indirect SSID IE */
  1465. /* ...next IE... */
  1466. left -= 2;
  1467. if (left < 0)
  1468. return 0;
  1469. len += 2;
  1470. pos = &(frame->u.probe_req.variable[0]);
  1471. *pos++ = WLAN_EID_SSID;
  1472. *pos++ = 0;
  1473. /* fill in our direct SSID IE... */
  1474. if (is_direct) {
  1475. /* ...next IE... */
  1476. left -= 2 + priv->essid_len;
  1477. if (left < 0)
  1478. return 0;
  1479. /* ... fill it in... */
  1480. *pos++ = WLAN_EID_SSID;
  1481. *pos++ = priv->essid_len;
  1482. memcpy(pos, priv->essid, priv->essid_len);
  1483. pos += priv->essid_len;
  1484. len += 2 + priv->essid_len;
  1485. }
  1486. /* fill in supported rate */
  1487. /* ...next IE... */
  1488. left -= 2;
  1489. if (left < 0)
  1490. return 0;
  1491. /* ... fill it in... */
  1492. *pos++ = WLAN_EID_SUPP_RATES;
  1493. *pos = 0;
  1494. /* exclude 60M rate */
  1495. active_rates = priv->rates_mask;
  1496. active_rates &= ~IWL_RATE_60M_MASK;
  1497. active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
  1498. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1499. ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
  1500. active_rate_basic, &left);
  1501. active_rates &= ~ret_rates;
  1502. ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
  1503. active_rate_basic, &left);
  1504. active_rates &= ~ret_rates;
  1505. len += 2 + *pos;
  1506. pos += (*pos) + 1;
  1507. if (active_rates == 0)
  1508. goto fill_end;
  1509. /* fill in supported extended rate */
  1510. /* ...next IE... */
  1511. left -= 2;
  1512. if (left < 0)
  1513. return 0;
  1514. /* ... fill it in... */
  1515. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1516. *pos = 0;
  1517. iwl4965_supported_rate_to_ie(pos, active_rates,
  1518. active_rate_basic, &left);
  1519. if (*pos > 0)
  1520. len += 2 + *pos;
  1521. #ifdef CONFIG_IWL4965_HT
  1522. if (sband && sband->ht_info.ht_supported) {
  1523. struct ieee80211_ht_cap *ht_cap;
  1524. pos += (*pos) + 1;
  1525. *pos++ = WLAN_EID_HT_CAPABILITY;
  1526. *pos++ = sizeof(struct ieee80211_ht_cap);
  1527. ht_cap = (struct ieee80211_ht_cap *)pos;
  1528. ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap);
  1529. memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16);
  1530. ht_cap->ampdu_params_info =(sband->ht_info.ampdu_factor &
  1531. IEEE80211_HT_CAP_AMPDU_FACTOR) |
  1532. ((sband->ht_info.ampdu_density << 2) &
  1533. IEEE80211_HT_CAP_AMPDU_DENSITY);
  1534. len += 2 + sizeof(struct ieee80211_ht_cap);
  1535. }
  1536. #endif /*CONFIG_IWL4965_HT */
  1537. fill_end:
  1538. return (u16)len;
  1539. }
  1540. /*
  1541. * QoS support
  1542. */
  1543. static int iwl4965_send_qos_params_command(struct iwl4965_priv *priv,
  1544. struct iwl4965_qosparam_cmd *qos)
  1545. {
  1546. return iwl4965_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1547. sizeof(struct iwl4965_qosparam_cmd), qos);
  1548. }
  1549. static void iwl4965_reset_qos(struct iwl4965_priv *priv)
  1550. {
  1551. u16 cw_min = 15;
  1552. u16 cw_max = 1023;
  1553. u8 aifs = 2;
  1554. u8 is_legacy = 0;
  1555. unsigned long flags;
  1556. int i;
  1557. spin_lock_irqsave(&priv->lock, flags);
  1558. priv->qos_data.qos_active = 0;
  1559. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
  1560. if (priv->qos_data.qos_enable)
  1561. priv->qos_data.qos_active = 1;
  1562. if (!(priv->active_rate & 0xfff0)) {
  1563. cw_min = 31;
  1564. is_legacy = 1;
  1565. }
  1566. } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1567. if (priv->qos_data.qos_enable)
  1568. priv->qos_data.qos_active = 1;
  1569. } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
  1570. cw_min = 31;
  1571. is_legacy = 1;
  1572. }
  1573. if (priv->qos_data.qos_active)
  1574. aifs = 3;
  1575. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  1576. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  1577. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  1578. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  1579. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  1580. if (priv->qos_data.qos_active) {
  1581. i = 1;
  1582. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  1583. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  1584. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  1585. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1586. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1587. i = 2;
  1588. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1589. cpu_to_le16((cw_min + 1) / 2 - 1);
  1590. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1591. cpu_to_le16(cw_max);
  1592. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1593. if (is_legacy)
  1594. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1595. cpu_to_le16(6016);
  1596. else
  1597. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1598. cpu_to_le16(3008);
  1599. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1600. i = 3;
  1601. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1602. cpu_to_le16((cw_min + 1) / 4 - 1);
  1603. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1604. cpu_to_le16((cw_max + 1) / 2 - 1);
  1605. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1606. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1607. if (is_legacy)
  1608. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1609. cpu_to_le16(3264);
  1610. else
  1611. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1612. cpu_to_le16(1504);
  1613. } else {
  1614. for (i = 1; i < 4; i++) {
  1615. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1616. cpu_to_le16(cw_min);
  1617. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1618. cpu_to_le16(cw_max);
  1619. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  1620. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1621. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1622. }
  1623. }
  1624. IWL_DEBUG_QOS("set QoS to default \n");
  1625. spin_unlock_irqrestore(&priv->lock, flags);
  1626. }
  1627. static void iwl4965_activate_qos(struct iwl4965_priv *priv, u8 force)
  1628. {
  1629. unsigned long flags;
  1630. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1631. return;
  1632. if (!priv->qos_data.qos_enable)
  1633. return;
  1634. spin_lock_irqsave(&priv->lock, flags);
  1635. priv->qos_data.def_qos_parm.qos_flags = 0;
  1636. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1637. !priv->qos_data.qos_cap.q_AP.txop_request)
  1638. priv->qos_data.def_qos_parm.qos_flags |=
  1639. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1640. if (priv->qos_data.qos_active)
  1641. priv->qos_data.def_qos_parm.qos_flags |=
  1642. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1643. #ifdef CONFIG_IWL4965_HT
  1644. if (priv->current_ht_config.is_ht)
  1645. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  1646. #endif /* CONFIG_IWL4965_HT */
  1647. spin_unlock_irqrestore(&priv->lock, flags);
  1648. if (force || iwl4965_is_associated(priv)) {
  1649. IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  1650. priv->qos_data.qos_active,
  1651. priv->qos_data.def_qos_parm.qos_flags);
  1652. iwl4965_send_qos_params_command(priv,
  1653. &(priv->qos_data.def_qos_parm));
  1654. }
  1655. }
  1656. /*
  1657. * Power management (not Tx power!) functions
  1658. */
  1659. #define MSEC_TO_USEC 1024
  1660. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1661. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1662. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1663. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1664. __constant_cpu_to_le32(X1), \
  1665. __constant_cpu_to_le32(X2), \
  1666. __constant_cpu_to_le32(X3), \
  1667. __constant_cpu_to_le32(X4)}
  1668. /* default power management (not Tx power) table values */
  1669. /* for tim 0-10 */
  1670. static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
  1671. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1672. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1673. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1674. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1675. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1676. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1677. };
  1678. /* for tim > 10 */
  1679. static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
  1680. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1681. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1682. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1683. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1684. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1685. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1686. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1687. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1688. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1689. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1690. };
  1691. int iwl4965_power_init_handle(struct iwl4965_priv *priv)
  1692. {
  1693. int rc = 0, i;
  1694. struct iwl4965_power_mgr *pow_data;
  1695. int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
  1696. u16 pci_pm;
  1697. IWL_DEBUG_POWER("Initialize power \n");
  1698. pow_data = &(priv->power_data);
  1699. memset(pow_data, 0, sizeof(*pow_data));
  1700. pow_data->active_index = IWL_POWER_RANGE_0;
  1701. pow_data->dtim_val = 0xffff;
  1702. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1703. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1704. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1705. if (rc != 0)
  1706. return 0;
  1707. else {
  1708. struct iwl4965_powertable_cmd *cmd;
  1709. IWL_DEBUG_POWER("adjust power command flags\n");
  1710. for (i = 0; i < IWL_POWER_AC; i++) {
  1711. cmd = &pow_data->pwr_range_0[i].cmd;
  1712. if (pci_pm & 0x1)
  1713. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1714. else
  1715. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1716. }
  1717. }
  1718. return rc;
  1719. }
  1720. static int iwl4965_update_power_cmd(struct iwl4965_priv *priv,
  1721. struct iwl4965_powertable_cmd *cmd, u32 mode)
  1722. {
  1723. int rc = 0, i;
  1724. u8 skip;
  1725. u32 max_sleep = 0;
  1726. struct iwl4965_power_vec_entry *range;
  1727. u8 period = 0;
  1728. struct iwl4965_power_mgr *pow_data;
  1729. if (mode > IWL_POWER_INDEX_5) {
  1730. IWL_DEBUG_POWER("Error invalid power mode \n");
  1731. return -1;
  1732. }
  1733. pow_data = &(priv->power_data);
  1734. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1735. range = &pow_data->pwr_range_0[0];
  1736. else
  1737. range = &pow_data->pwr_range_1[1];
  1738. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
  1739. #ifdef IWL_MAC80211_DISABLE
  1740. if (priv->assoc_network != NULL) {
  1741. unsigned long flags;
  1742. period = priv->assoc_network->tim.tim_period;
  1743. }
  1744. #endif /*IWL_MAC80211_DISABLE */
  1745. skip = range[mode].no_dtim;
  1746. if (period == 0) {
  1747. period = 1;
  1748. skip = 0;
  1749. }
  1750. if (skip == 0) {
  1751. max_sleep = period;
  1752. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1753. } else {
  1754. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1755. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1756. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1757. }
  1758. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1759. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1760. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1761. }
  1762. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1763. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1764. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1765. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1766. le32_to_cpu(cmd->sleep_interval[0]),
  1767. le32_to_cpu(cmd->sleep_interval[1]),
  1768. le32_to_cpu(cmd->sleep_interval[2]),
  1769. le32_to_cpu(cmd->sleep_interval[3]),
  1770. le32_to_cpu(cmd->sleep_interval[4]));
  1771. return rc;
  1772. }
  1773. static int iwl4965_send_power_mode(struct iwl4965_priv *priv, u32 mode)
  1774. {
  1775. u32 uninitialized_var(final_mode);
  1776. int rc;
  1777. struct iwl4965_powertable_cmd cmd;
  1778. /* If on battery, set to 3,
  1779. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1780. * else user level */
  1781. switch (mode) {
  1782. case IWL_POWER_BATTERY:
  1783. final_mode = IWL_POWER_INDEX_3;
  1784. break;
  1785. case IWL_POWER_AC:
  1786. final_mode = IWL_POWER_MODE_CAM;
  1787. break;
  1788. default:
  1789. final_mode = mode;
  1790. break;
  1791. }
  1792. cmd.keep_alive_beacons = 0;
  1793. iwl4965_update_power_cmd(priv, &cmd, final_mode);
  1794. rc = iwl4965_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1795. if (final_mode == IWL_POWER_MODE_CAM)
  1796. clear_bit(STATUS_POWER_PMI, &priv->status);
  1797. else
  1798. set_bit(STATUS_POWER_PMI, &priv->status);
  1799. return rc;
  1800. }
  1801. int iwl4965_is_network_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  1802. {
  1803. /* Filter incoming packets to determine if they are targeted toward
  1804. * this network, discarding packets coming from ourselves */
  1805. switch (priv->iw_mode) {
  1806. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1807. /* packets from our adapter are dropped (echo) */
  1808. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1809. return 0;
  1810. /* {broad,multi}cast packets to our IBSS go through */
  1811. if (is_multicast_ether_addr(header->addr1))
  1812. return !compare_ether_addr(header->addr3, priv->bssid);
  1813. /* packets to our adapter go through */
  1814. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1815. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1816. /* packets from our adapter are dropped (echo) */
  1817. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1818. return 0;
  1819. /* {broad,multi}cast packets to our BSS go through */
  1820. if (is_multicast_ether_addr(header->addr1))
  1821. return !compare_ether_addr(header->addr2, priv->bssid);
  1822. /* packets to our adapter go through */
  1823. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1824. }
  1825. return 1;
  1826. }
  1827. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1828. static const char *iwl4965_get_tx_fail_reason(u32 status)
  1829. {
  1830. switch (status & TX_STATUS_MSK) {
  1831. case TX_STATUS_SUCCESS:
  1832. return "SUCCESS";
  1833. TX_STATUS_ENTRY(SHORT_LIMIT);
  1834. TX_STATUS_ENTRY(LONG_LIMIT);
  1835. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1836. TX_STATUS_ENTRY(MGMNT_ABORT);
  1837. TX_STATUS_ENTRY(NEXT_FRAG);
  1838. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1839. TX_STATUS_ENTRY(DEST_PS);
  1840. TX_STATUS_ENTRY(ABORTED);
  1841. TX_STATUS_ENTRY(BT_RETRY);
  1842. TX_STATUS_ENTRY(STA_INVALID);
  1843. TX_STATUS_ENTRY(FRAG_DROPPED);
  1844. TX_STATUS_ENTRY(TID_DISABLE);
  1845. TX_STATUS_ENTRY(FRAME_FLUSHED);
  1846. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  1847. TX_STATUS_ENTRY(TX_LOCKED);
  1848. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  1849. }
  1850. return "UNKNOWN";
  1851. }
  1852. /**
  1853. * iwl4965_scan_cancel - Cancel any currently executing HW scan
  1854. *
  1855. * NOTE: priv->mutex is not required before calling this function
  1856. */
  1857. static int iwl4965_scan_cancel(struct iwl4965_priv *priv)
  1858. {
  1859. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1860. clear_bit(STATUS_SCANNING, &priv->status);
  1861. return 0;
  1862. }
  1863. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1864. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1865. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  1866. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  1867. queue_work(priv->workqueue, &priv->abort_scan);
  1868. } else
  1869. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  1870. return test_bit(STATUS_SCANNING, &priv->status);
  1871. }
  1872. return 0;
  1873. }
  1874. /**
  1875. * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
  1876. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1877. *
  1878. * NOTE: priv->mutex must be held before calling this function
  1879. */
  1880. static int iwl4965_scan_cancel_timeout(struct iwl4965_priv *priv, unsigned long ms)
  1881. {
  1882. unsigned long now = jiffies;
  1883. int ret;
  1884. ret = iwl4965_scan_cancel(priv);
  1885. if (ret && ms) {
  1886. mutex_unlock(&priv->mutex);
  1887. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  1888. test_bit(STATUS_SCANNING, &priv->status))
  1889. msleep(1);
  1890. mutex_lock(&priv->mutex);
  1891. return test_bit(STATUS_SCANNING, &priv->status);
  1892. }
  1893. return ret;
  1894. }
  1895. static void iwl4965_sequence_reset(struct iwl4965_priv *priv)
  1896. {
  1897. /* Reset ieee stats */
  1898. /* We don't reset the net_device_stats (ieee->stats) on
  1899. * re-association */
  1900. priv->last_seq_num = -1;
  1901. priv->last_frag_num = -1;
  1902. priv->last_packet_time = 0;
  1903. iwl4965_scan_cancel(priv);
  1904. }
  1905. #define MAX_UCODE_BEACON_INTERVAL 4096
  1906. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  1907. static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
  1908. {
  1909. u16 new_val = 0;
  1910. u16 beacon_factor = 0;
  1911. beacon_factor =
  1912. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  1913. / MAX_UCODE_BEACON_INTERVAL;
  1914. new_val = beacon_val / beacon_factor;
  1915. return cpu_to_le16(new_val);
  1916. }
  1917. static void iwl4965_setup_rxon_timing(struct iwl4965_priv *priv)
  1918. {
  1919. u64 interval_tm_unit;
  1920. u64 tsf, result;
  1921. unsigned long flags;
  1922. struct ieee80211_conf *conf = NULL;
  1923. u16 beacon_int = 0;
  1924. conf = ieee80211_get_hw_conf(priv->hw);
  1925. spin_lock_irqsave(&priv->lock, flags);
  1926. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
  1927. priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
  1928. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  1929. tsf = priv->timestamp1;
  1930. tsf = ((tsf << 32) | priv->timestamp0);
  1931. beacon_int = priv->beacon_int;
  1932. spin_unlock_irqrestore(&priv->lock, flags);
  1933. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  1934. if (beacon_int == 0) {
  1935. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  1936. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  1937. } else {
  1938. priv->rxon_timing.beacon_interval =
  1939. cpu_to_le16(beacon_int);
  1940. priv->rxon_timing.beacon_interval =
  1941. iwl4965_adjust_beacon_interval(
  1942. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1943. }
  1944. priv->rxon_timing.atim_window = 0;
  1945. } else {
  1946. priv->rxon_timing.beacon_interval =
  1947. iwl4965_adjust_beacon_interval(conf->beacon_int);
  1948. /* TODO: we need to get atim_window from upper stack
  1949. * for now we set to 0 */
  1950. priv->rxon_timing.atim_window = 0;
  1951. }
  1952. interval_tm_unit =
  1953. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  1954. result = do_div(tsf, interval_tm_unit);
  1955. priv->rxon_timing.beacon_init_val =
  1956. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  1957. IWL_DEBUG_ASSOC
  1958. ("beacon interval %d beacon timer %d beacon tim %d\n",
  1959. le16_to_cpu(priv->rxon_timing.beacon_interval),
  1960. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  1961. le16_to_cpu(priv->rxon_timing.atim_window));
  1962. }
  1963. static int iwl4965_scan_initiate(struct iwl4965_priv *priv)
  1964. {
  1965. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1966. IWL_ERROR("APs don't scan.\n");
  1967. return 0;
  1968. }
  1969. if (!iwl4965_is_ready_rf(priv)) {
  1970. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  1971. return -EIO;
  1972. }
  1973. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1974. IWL_DEBUG_SCAN("Scan already in progress.\n");
  1975. return -EAGAIN;
  1976. }
  1977. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1978. IWL_DEBUG_SCAN("Scan request while abort pending. "
  1979. "Queuing.\n");
  1980. return -EAGAIN;
  1981. }
  1982. IWL_DEBUG_INFO("Starting scan...\n");
  1983. priv->scan_bands = 2;
  1984. set_bit(STATUS_SCANNING, &priv->status);
  1985. priv->scan_start = jiffies;
  1986. priv->scan_pass_start = priv->scan_start;
  1987. queue_work(priv->workqueue, &priv->request_scan);
  1988. return 0;
  1989. }
  1990. static int iwl4965_set_rxon_hwcrypto(struct iwl4965_priv *priv, int hw_decrypt)
  1991. {
  1992. struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
  1993. if (hw_decrypt)
  1994. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  1995. else
  1996. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  1997. return 0;
  1998. }
  1999. static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv,
  2000. enum ieee80211_band band)
  2001. {
  2002. if (band == IEEE80211_BAND_5GHZ) {
  2003. priv->staging_rxon.flags &=
  2004. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  2005. | RXON_FLG_CCK_MSK);
  2006. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2007. } else {
  2008. /* Copied from iwl4965_bg_post_associate() */
  2009. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2010. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2011. else
  2012. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2013. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  2014. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2015. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  2016. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  2017. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  2018. }
  2019. }
  2020. /*
  2021. * initialize rxon structure with default values from eeprom
  2022. */
  2023. static void iwl4965_connection_init_rx_config(struct iwl4965_priv *priv)
  2024. {
  2025. const struct iwl4965_channel_info *ch_info;
  2026. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  2027. switch (priv->iw_mode) {
  2028. case IEEE80211_IF_TYPE_AP:
  2029. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  2030. break;
  2031. case IEEE80211_IF_TYPE_STA:
  2032. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  2033. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  2034. break;
  2035. case IEEE80211_IF_TYPE_IBSS:
  2036. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  2037. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  2038. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  2039. RXON_FILTER_ACCEPT_GRP_MSK;
  2040. break;
  2041. case IEEE80211_IF_TYPE_MNTR:
  2042. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  2043. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  2044. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  2045. break;
  2046. }
  2047. #if 0
  2048. /* TODO: Figure out when short_preamble would be set and cache from
  2049. * that */
  2050. if (!hw_to_local(priv->hw)->short_preamble)
  2051. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2052. else
  2053. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2054. #endif
  2055. ch_info = iwl4965_get_channel_info(priv, priv->band,
  2056. le16_to_cpu(priv->staging_rxon.channel));
  2057. if (!ch_info)
  2058. ch_info = &priv->channel_info[0];
  2059. /*
  2060. * in some case A channels are all non IBSS
  2061. * in this case force B/G channel
  2062. */
  2063. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  2064. !(is_channel_ibss(ch_info)))
  2065. ch_info = &priv->channel_info[0];
  2066. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  2067. priv->band = ch_info->band;
  2068. iwl4965_set_flags_for_phymode(priv, priv->band);
  2069. priv->staging_rxon.ofdm_basic_rates =
  2070. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2071. priv->staging_rxon.cck_basic_rates =
  2072. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2073. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  2074. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  2075. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2076. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  2077. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  2078. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  2079. iwl4965_set_rxon_chain(priv);
  2080. }
  2081. static int iwl4965_set_mode(struct iwl4965_priv *priv, int mode)
  2082. {
  2083. if (mode == IEEE80211_IF_TYPE_IBSS) {
  2084. const struct iwl4965_channel_info *ch_info;
  2085. ch_info = iwl4965_get_channel_info(priv,
  2086. priv->band,
  2087. le16_to_cpu(priv->staging_rxon.channel));
  2088. if (!ch_info || !is_channel_ibss(ch_info)) {
  2089. IWL_ERROR("channel %d not IBSS channel\n",
  2090. le16_to_cpu(priv->staging_rxon.channel));
  2091. return -EINVAL;
  2092. }
  2093. }
  2094. priv->iw_mode = mode;
  2095. iwl4965_connection_init_rx_config(priv);
  2096. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2097. iwl4965_clear_stations_table(priv);
  2098. /* dont commit rxon if rf-kill is on*/
  2099. if (!iwl4965_is_ready_rf(priv))
  2100. return -EAGAIN;
  2101. cancel_delayed_work(&priv->scan_check);
  2102. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  2103. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  2104. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  2105. return -EAGAIN;
  2106. }
  2107. iwl4965_commit_rxon(priv);
  2108. return 0;
  2109. }
  2110. static void iwl4965_build_tx_cmd_hwcrypto(struct iwl4965_priv *priv,
  2111. struct ieee80211_tx_control *ctl,
  2112. struct iwl4965_cmd *cmd,
  2113. struct sk_buff *skb_frag,
  2114. int last_frag)
  2115. {
  2116. struct iwl4965_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
  2117. switch (keyinfo->alg) {
  2118. case ALG_CCMP:
  2119. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  2120. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  2121. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  2122. break;
  2123. case ALG_TKIP:
  2124. #if 0
  2125. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  2126. if (last_frag)
  2127. memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
  2128. 8);
  2129. else
  2130. memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
  2131. #endif
  2132. break;
  2133. case ALG_WEP:
  2134. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  2135. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  2136. if (keyinfo->keylen == 13)
  2137. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  2138. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  2139. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  2140. "with key %d\n", ctl->key_idx);
  2141. break;
  2142. default:
  2143. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  2144. break;
  2145. }
  2146. }
  2147. /*
  2148. * handle build REPLY_TX command notification.
  2149. */
  2150. static void iwl4965_build_tx_cmd_basic(struct iwl4965_priv *priv,
  2151. struct iwl4965_cmd *cmd,
  2152. struct ieee80211_tx_control *ctrl,
  2153. struct ieee80211_hdr *hdr,
  2154. int is_unicast, u8 std_id)
  2155. {
  2156. __le16 *qc;
  2157. u16 fc = le16_to_cpu(hdr->frame_control);
  2158. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  2159. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2160. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  2161. tx_flags |= TX_CMD_FLG_ACK_MSK;
  2162. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  2163. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2164. if (ieee80211_is_probe_response(fc) &&
  2165. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  2166. tx_flags |= TX_CMD_FLG_TSF_MSK;
  2167. } else {
  2168. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  2169. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2170. }
  2171. if (ieee80211_is_back_request(fc))
  2172. tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
  2173. cmd->cmd.tx.sta_id = std_id;
  2174. if (ieee80211_get_morefrag(hdr))
  2175. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  2176. qc = ieee80211_get_qos_ctrl(hdr);
  2177. if (qc) {
  2178. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  2179. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  2180. } else
  2181. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2182. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  2183. tx_flags |= TX_CMD_FLG_RTS_MSK;
  2184. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  2185. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  2186. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2187. tx_flags |= TX_CMD_FLG_CTS_MSK;
  2188. }
  2189. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  2190. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2191. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  2192. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  2193. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  2194. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  2195. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
  2196. else
  2197. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
  2198. } else
  2199. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  2200. cmd->cmd.tx.driver_txop = 0;
  2201. cmd->cmd.tx.tx_flags = tx_flags;
  2202. cmd->cmd.tx.next_frame_len = 0;
  2203. }
  2204. /**
  2205. * iwl4965_get_sta_id - Find station's index within station table
  2206. *
  2207. * If new IBSS station, create new entry in station table
  2208. */
  2209. static int iwl4965_get_sta_id(struct iwl4965_priv *priv,
  2210. struct ieee80211_hdr *hdr)
  2211. {
  2212. int sta_id;
  2213. u16 fc = le16_to_cpu(hdr->frame_control);
  2214. DECLARE_MAC_BUF(mac);
  2215. /* If this frame is broadcast or management, use broadcast station id */
  2216. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  2217. is_multicast_ether_addr(hdr->addr1))
  2218. return priv->hw_setting.bcast_sta_id;
  2219. switch (priv->iw_mode) {
  2220. /* If we are a client station in a BSS network, use the special
  2221. * AP station entry (that's the only station we communicate with) */
  2222. case IEEE80211_IF_TYPE_STA:
  2223. return IWL_AP_ID;
  2224. /* If we are an AP, then find the station, or use BCAST */
  2225. case IEEE80211_IF_TYPE_AP:
  2226. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2227. if (sta_id != IWL_INVALID_STATION)
  2228. return sta_id;
  2229. return priv->hw_setting.bcast_sta_id;
  2230. /* If this frame is going out to an IBSS network, find the station,
  2231. * or create a new station table entry */
  2232. case IEEE80211_IF_TYPE_IBSS:
  2233. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2234. if (sta_id != IWL_INVALID_STATION)
  2235. return sta_id;
  2236. /* Create new station table entry */
  2237. sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
  2238. 0, CMD_ASYNC, NULL);
  2239. if (sta_id != IWL_INVALID_STATION)
  2240. return sta_id;
  2241. IWL_DEBUG_DROP("Station %s not in station map. "
  2242. "Defaulting to broadcast...\n",
  2243. print_mac(mac, hdr->addr1));
  2244. iwl4965_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  2245. return priv->hw_setting.bcast_sta_id;
  2246. default:
  2247. IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
  2248. return priv->hw_setting.bcast_sta_id;
  2249. }
  2250. }
  2251. /*
  2252. * start REPLY_TX command process
  2253. */
  2254. static int iwl4965_tx_skb(struct iwl4965_priv *priv,
  2255. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  2256. {
  2257. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2258. struct iwl4965_tfd_frame *tfd;
  2259. u32 *control_flags;
  2260. int txq_id = ctl->queue;
  2261. struct iwl4965_tx_queue *txq = NULL;
  2262. struct iwl4965_queue *q = NULL;
  2263. dma_addr_t phys_addr;
  2264. dma_addr_t txcmd_phys;
  2265. dma_addr_t scratch_phys;
  2266. struct iwl4965_cmd *out_cmd = NULL;
  2267. u16 len, idx, len_org;
  2268. u8 id, hdr_len, unicast;
  2269. u8 sta_id;
  2270. u16 seq_number = 0;
  2271. u16 fc;
  2272. __le16 *qc;
  2273. u8 wait_write_ptr = 0;
  2274. unsigned long flags;
  2275. int rc;
  2276. spin_lock_irqsave(&priv->lock, flags);
  2277. if (iwl4965_is_rfkill(priv)) {
  2278. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  2279. goto drop_unlock;
  2280. }
  2281. if (!priv->vif) {
  2282. IWL_DEBUG_DROP("Dropping - !priv->vif\n");
  2283. goto drop_unlock;
  2284. }
  2285. if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
  2286. IWL_ERROR("ERROR: No TX rate available.\n");
  2287. goto drop_unlock;
  2288. }
  2289. unicast = !is_multicast_ether_addr(hdr->addr1);
  2290. id = 0;
  2291. fc = le16_to_cpu(hdr->frame_control);
  2292. #ifdef CONFIG_IWL4965_DEBUG
  2293. if (ieee80211_is_auth(fc))
  2294. IWL_DEBUG_TX("Sending AUTH frame\n");
  2295. else if (ieee80211_is_assoc_request(fc))
  2296. IWL_DEBUG_TX("Sending ASSOC frame\n");
  2297. else if (ieee80211_is_reassoc_request(fc))
  2298. IWL_DEBUG_TX("Sending REASSOC frame\n");
  2299. #endif
  2300. /* drop all data frame if we are not associated */
  2301. if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
  2302. (!iwl4965_is_associated(priv) ||
  2303. ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
  2304. !priv->assoc_station_added)) {
  2305. IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
  2306. goto drop_unlock;
  2307. }
  2308. spin_unlock_irqrestore(&priv->lock, flags);
  2309. hdr_len = ieee80211_get_hdrlen(fc);
  2310. /* Find (or create) index into station table for destination station */
  2311. sta_id = iwl4965_get_sta_id(priv, hdr);
  2312. if (sta_id == IWL_INVALID_STATION) {
  2313. DECLARE_MAC_BUF(mac);
  2314. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  2315. print_mac(mac, hdr->addr1));
  2316. goto drop;
  2317. }
  2318. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  2319. qc = ieee80211_get_qos_ctrl(hdr);
  2320. if (qc) {
  2321. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2322. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  2323. IEEE80211_SCTL_SEQ;
  2324. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  2325. (hdr->seq_ctrl &
  2326. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  2327. seq_number += 0x10;
  2328. #ifdef CONFIG_IWL4965_HT
  2329. /* aggregation is on for this <sta,tid> */
  2330. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  2331. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  2332. priv->stations[sta_id].tid[tid].tfds_in_queue++;
  2333. #endif /* CONFIG_IWL4965_HT */
  2334. }
  2335. /* Descriptor for chosen Tx queue */
  2336. txq = &priv->txq[txq_id];
  2337. q = &txq->q;
  2338. spin_lock_irqsave(&priv->lock, flags);
  2339. /* Set up first empty TFD within this queue's circular TFD buffer */
  2340. tfd = &txq->bd[q->write_ptr];
  2341. memset(tfd, 0, sizeof(*tfd));
  2342. control_flags = (u32 *) tfd;
  2343. idx = get_cmd_index(q, q->write_ptr, 0);
  2344. /* Set up driver data for this TFD */
  2345. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
  2346. txq->txb[q->write_ptr].skb[0] = skb;
  2347. memcpy(&(txq->txb[q->write_ptr].status.control),
  2348. ctl, sizeof(struct ieee80211_tx_control));
  2349. /* Set up first empty entry in queue's array of Tx/cmd buffers */
  2350. out_cmd = &txq->cmd[idx];
  2351. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2352. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2353. /*
  2354. * Set up the Tx-command (not MAC!) header.
  2355. * Store the chosen Tx queue and TFD index within the sequence field;
  2356. * after Tx, uCode's Tx response will return this value so driver can
  2357. * locate the frame within the tx queue and do post-tx processing.
  2358. */
  2359. out_cmd->hdr.cmd = REPLY_TX;
  2360. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2361. INDEX_TO_SEQ(q->write_ptr)));
  2362. /* Copy MAC header from skb into command buffer */
  2363. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2364. /*
  2365. * Use the first empty entry in this queue's command buffer array
  2366. * to contain the Tx command and MAC header concatenated together
  2367. * (payload data will be in another buffer).
  2368. * Size of this varies, due to varying MAC header length.
  2369. * If end is not dword aligned, we'll have 2 extra bytes at the end
  2370. * of the MAC header (device reads on dword boundaries).
  2371. * We'll tell device about this padding later.
  2372. */
  2373. len = priv->hw_setting.tx_cmd_len +
  2374. sizeof(struct iwl4965_cmd_header) + hdr_len;
  2375. len_org = len;
  2376. len = (len + 3) & ~3;
  2377. if (len_org != len)
  2378. len_org = 1;
  2379. else
  2380. len_org = 0;
  2381. /* Physical address of this Tx command's header (not MAC header!),
  2382. * within command buffer array. */
  2383. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl4965_cmd) * idx +
  2384. offsetof(struct iwl4965_cmd, hdr);
  2385. /* Add buffer containing Tx command and MAC(!) header to TFD's
  2386. * first entry */
  2387. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2388. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2389. iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
  2390. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  2391. * if any (802.11 null frames have no payload). */
  2392. len = skb->len - hdr_len;
  2393. if (len) {
  2394. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2395. len, PCI_DMA_TODEVICE);
  2396. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2397. }
  2398. /* Tell 4965 about any 2-byte padding after MAC header */
  2399. if (len_org)
  2400. out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  2401. /* Total # bytes to be transmitted */
  2402. len = (u16)skb->len;
  2403. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2404. /* TODO need this for burst mode later on */
  2405. iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2406. /* set is_hcca to 0; it probably will never be implemented */
  2407. iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2408. scratch_phys = txcmd_phys + sizeof(struct iwl4965_cmd_header) +
  2409. offsetof(struct iwl4965_tx_cmd, scratch);
  2410. out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
  2411. out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
  2412. if (!ieee80211_get_morefrag(hdr)) {
  2413. txq->need_update = 1;
  2414. if (qc) {
  2415. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2416. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2417. }
  2418. } else {
  2419. wait_write_ptr = 1;
  2420. txq->need_update = 0;
  2421. }
  2422. iwl4965_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2423. sizeof(out_cmd->cmd.tx));
  2424. iwl4965_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2425. ieee80211_get_hdrlen(fc));
  2426. /* Set up entry for this TFD in Tx byte-count array */
  2427. iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
  2428. /* Tell device the write index *just past* this latest filled TFD */
  2429. q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
  2430. rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
  2431. spin_unlock_irqrestore(&priv->lock, flags);
  2432. if (rc)
  2433. return rc;
  2434. if ((iwl4965_queue_space(q) < q->high_mark)
  2435. && priv->mac80211_registered) {
  2436. if (wait_write_ptr) {
  2437. spin_lock_irqsave(&priv->lock, flags);
  2438. txq->need_update = 1;
  2439. iwl4965_tx_queue_update_write_ptr(priv, txq);
  2440. spin_unlock_irqrestore(&priv->lock, flags);
  2441. }
  2442. ieee80211_stop_queue(priv->hw, ctl->queue);
  2443. }
  2444. return 0;
  2445. drop_unlock:
  2446. spin_unlock_irqrestore(&priv->lock, flags);
  2447. drop:
  2448. return -1;
  2449. }
  2450. static void iwl4965_set_rate(struct iwl4965_priv *priv)
  2451. {
  2452. const struct ieee80211_supported_band *hw = NULL;
  2453. struct ieee80211_rate *rate;
  2454. int i;
  2455. hw = iwl4965_get_hw_mode(priv, priv->band);
  2456. if (!hw) {
  2457. IWL_ERROR("Failed to set rate: unable to get hw mode\n");
  2458. return;
  2459. }
  2460. priv->active_rate = 0;
  2461. priv->active_rate_basic = 0;
  2462. for (i = 0; i < hw->n_bitrates; i++) {
  2463. rate = &(hw->bitrates[i]);
  2464. if (rate->hw_value < IWL_RATE_COUNT)
  2465. priv->active_rate |= (1 << rate->hw_value);
  2466. }
  2467. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2468. priv->active_rate, priv->active_rate_basic);
  2469. /*
  2470. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2471. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2472. * OFDM
  2473. */
  2474. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2475. priv->staging_rxon.cck_basic_rates =
  2476. ((priv->active_rate_basic &
  2477. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2478. else
  2479. priv->staging_rxon.cck_basic_rates =
  2480. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2481. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2482. priv->staging_rxon.ofdm_basic_rates =
  2483. ((priv->active_rate_basic &
  2484. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2485. IWL_FIRST_OFDM_RATE) & 0xFF;
  2486. else
  2487. priv->staging_rxon.ofdm_basic_rates =
  2488. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2489. }
  2490. static void iwl4965_radio_kill_sw(struct iwl4965_priv *priv, int disable_radio)
  2491. {
  2492. unsigned long flags;
  2493. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2494. return;
  2495. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2496. disable_radio ? "OFF" : "ON");
  2497. if (disable_radio) {
  2498. iwl4965_scan_cancel(priv);
  2499. /* FIXME: This is a workaround for AP */
  2500. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2501. spin_lock_irqsave(&priv->lock, flags);
  2502. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2503. CSR_UCODE_SW_BIT_RFKILL);
  2504. spin_unlock_irqrestore(&priv->lock, flags);
  2505. iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2506. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2507. }
  2508. return;
  2509. }
  2510. spin_lock_irqsave(&priv->lock, flags);
  2511. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2512. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2513. spin_unlock_irqrestore(&priv->lock, flags);
  2514. /* wake up ucode */
  2515. msleep(10);
  2516. spin_lock_irqsave(&priv->lock, flags);
  2517. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  2518. if (!iwl4965_grab_nic_access(priv))
  2519. iwl4965_release_nic_access(priv);
  2520. spin_unlock_irqrestore(&priv->lock, flags);
  2521. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2522. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2523. "disabled by HW switch\n");
  2524. return;
  2525. }
  2526. queue_work(priv->workqueue, &priv->restart);
  2527. return;
  2528. }
  2529. void iwl4965_set_decrypted_flag(struct iwl4965_priv *priv, struct sk_buff *skb,
  2530. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2531. {
  2532. u16 fc =
  2533. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2534. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2535. return;
  2536. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2537. return;
  2538. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2539. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2540. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2541. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2542. RX_RES_STATUS_BAD_ICV_MIC)
  2543. stats->flag |= RX_FLAG_MMIC_ERROR;
  2544. case RX_RES_STATUS_SEC_TYPE_WEP:
  2545. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2546. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2547. RX_RES_STATUS_DECRYPT_OK) {
  2548. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2549. stats->flag |= RX_FLAG_DECRYPTED;
  2550. }
  2551. break;
  2552. default:
  2553. break;
  2554. }
  2555. }
  2556. #define IWL_PACKET_RETRY_TIME HZ
  2557. int iwl4965_is_duplicate_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  2558. {
  2559. u16 sc = le16_to_cpu(header->seq_ctrl);
  2560. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2561. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2562. u16 *last_seq, *last_frag;
  2563. unsigned long *last_time;
  2564. switch (priv->iw_mode) {
  2565. case IEEE80211_IF_TYPE_IBSS:{
  2566. struct list_head *p;
  2567. struct iwl4965_ibss_seq *entry = NULL;
  2568. u8 *mac = header->addr2;
  2569. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2570. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2571. entry = list_entry(p, struct iwl4965_ibss_seq, list);
  2572. if (!compare_ether_addr(entry->mac, mac))
  2573. break;
  2574. }
  2575. if (p == &priv->ibss_mac_hash[index]) {
  2576. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2577. if (!entry) {
  2578. IWL_ERROR("Cannot malloc new mac entry\n");
  2579. return 0;
  2580. }
  2581. memcpy(entry->mac, mac, ETH_ALEN);
  2582. entry->seq_num = seq;
  2583. entry->frag_num = frag;
  2584. entry->packet_time = jiffies;
  2585. list_add(&entry->list, &priv->ibss_mac_hash[index]);
  2586. return 0;
  2587. }
  2588. last_seq = &entry->seq_num;
  2589. last_frag = &entry->frag_num;
  2590. last_time = &entry->packet_time;
  2591. break;
  2592. }
  2593. case IEEE80211_IF_TYPE_STA:
  2594. last_seq = &priv->last_seq_num;
  2595. last_frag = &priv->last_frag_num;
  2596. last_time = &priv->last_packet_time;
  2597. break;
  2598. default:
  2599. return 0;
  2600. }
  2601. if ((*last_seq == seq) &&
  2602. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2603. if (*last_frag == frag)
  2604. goto drop;
  2605. if (*last_frag + 1 != frag)
  2606. /* out-of-order fragment */
  2607. goto drop;
  2608. } else
  2609. *last_seq = seq;
  2610. *last_frag = frag;
  2611. *last_time = jiffies;
  2612. return 0;
  2613. drop:
  2614. return 1;
  2615. }
  2616. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2617. #include "iwl-spectrum.h"
  2618. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2619. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2620. #define TIME_UNIT 1024
  2621. /*
  2622. * extended beacon time format
  2623. * time in usec will be changed into a 32-bit value in 8:24 format
  2624. * the high 1 byte is the beacon counts
  2625. * the lower 3 bytes is the time in usec within one beacon interval
  2626. */
  2627. static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2628. {
  2629. u32 quot;
  2630. u32 rem;
  2631. u32 interval = beacon_interval * 1024;
  2632. if (!interval || !usec)
  2633. return 0;
  2634. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2635. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2636. return (quot << 24) + rem;
  2637. }
  2638. /* base is usually what we get from ucode with each received frame,
  2639. * the same as HW timer counter counting down
  2640. */
  2641. static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2642. {
  2643. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2644. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2645. u32 interval = beacon_interval * TIME_UNIT;
  2646. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2647. (addon & BEACON_TIME_MASK_HIGH);
  2648. if (base_low > addon_low)
  2649. res += base_low - addon_low;
  2650. else if (base_low < addon_low) {
  2651. res += interval + base_low - addon_low;
  2652. res += (1 << 24);
  2653. } else
  2654. res += (1 << 24);
  2655. return cpu_to_le32(res);
  2656. }
  2657. static int iwl4965_get_measurement(struct iwl4965_priv *priv,
  2658. struct ieee80211_measurement_params *params,
  2659. u8 type)
  2660. {
  2661. struct iwl4965_spectrum_cmd spectrum;
  2662. struct iwl4965_rx_packet *res;
  2663. struct iwl4965_host_cmd cmd = {
  2664. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2665. .data = (void *)&spectrum,
  2666. .meta.flags = CMD_WANT_SKB,
  2667. };
  2668. u32 add_time = le64_to_cpu(params->start_time);
  2669. int rc;
  2670. int spectrum_resp_status;
  2671. int duration = le16_to_cpu(params->duration);
  2672. if (iwl4965_is_associated(priv))
  2673. add_time =
  2674. iwl4965_usecs_to_beacons(
  2675. le64_to_cpu(params->start_time) - priv->last_tsf,
  2676. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2677. memset(&spectrum, 0, sizeof(spectrum));
  2678. spectrum.channel_count = cpu_to_le16(1);
  2679. spectrum.flags =
  2680. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2681. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2682. cmd.len = sizeof(spectrum);
  2683. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2684. if (iwl4965_is_associated(priv))
  2685. spectrum.start_time =
  2686. iwl4965_add_beacon_time(priv->last_beacon_time,
  2687. add_time,
  2688. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2689. else
  2690. spectrum.start_time = 0;
  2691. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2692. spectrum.channels[0].channel = params->channel;
  2693. spectrum.channels[0].type = type;
  2694. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2695. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2696. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2697. rc = iwl4965_send_cmd_sync(priv, &cmd);
  2698. if (rc)
  2699. return rc;
  2700. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  2701. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2702. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2703. rc = -EIO;
  2704. }
  2705. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2706. switch (spectrum_resp_status) {
  2707. case 0: /* Command will be handled */
  2708. if (res->u.spectrum.id != 0xff) {
  2709. IWL_DEBUG_INFO
  2710. ("Replaced existing measurement: %d\n",
  2711. res->u.spectrum.id);
  2712. priv->measurement_status &= ~MEASUREMENT_READY;
  2713. }
  2714. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2715. rc = 0;
  2716. break;
  2717. case 1: /* Command will not be handled */
  2718. rc = -EAGAIN;
  2719. break;
  2720. }
  2721. dev_kfree_skb_any(cmd.meta.u.skb);
  2722. return rc;
  2723. }
  2724. #endif
  2725. static void iwl4965_txstatus_to_ieee(struct iwl4965_priv *priv,
  2726. struct iwl4965_tx_info *tx_sta)
  2727. {
  2728. tx_sta->status.ack_signal = 0;
  2729. tx_sta->status.excessive_retries = 0;
  2730. tx_sta->status.queue_length = 0;
  2731. tx_sta->status.queue_number = 0;
  2732. if (in_interrupt())
  2733. ieee80211_tx_status_irqsafe(priv->hw,
  2734. tx_sta->skb[0], &(tx_sta->status));
  2735. else
  2736. ieee80211_tx_status(priv->hw,
  2737. tx_sta->skb[0], &(tx_sta->status));
  2738. tx_sta->skb[0] = NULL;
  2739. }
  2740. /**
  2741. * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
  2742. *
  2743. * When FW advances 'R' index, all entries between old and new 'R' index
  2744. * need to be reclaimed. As result, some free space forms. If there is
  2745. * enough free space (> low mark), wake the stack that feeds us.
  2746. */
  2747. int iwl4965_tx_queue_reclaim(struct iwl4965_priv *priv, int txq_id, int index)
  2748. {
  2749. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2750. struct iwl4965_queue *q = &txq->q;
  2751. int nfreed = 0;
  2752. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2753. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2754. "is out of range [0-%d] %d %d.\n", txq_id,
  2755. index, q->n_bd, q->write_ptr, q->read_ptr);
  2756. return 0;
  2757. }
  2758. for (index = iwl4965_queue_inc_wrap(index, q->n_bd);
  2759. q->read_ptr != index;
  2760. q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2761. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2762. iwl4965_txstatus_to_ieee(priv,
  2763. &(txq->txb[txq->q.read_ptr]));
  2764. iwl4965_hw_txq_free_tfd(priv, txq);
  2765. } else if (nfreed > 1) {
  2766. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2767. q->write_ptr, q->read_ptr);
  2768. queue_work(priv->workqueue, &priv->restart);
  2769. }
  2770. nfreed++;
  2771. }
  2772. /* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2773. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2774. priv->mac80211_registered)
  2775. ieee80211_wake_queue(priv->hw, txq_id); */
  2776. return nfreed;
  2777. }
  2778. static int iwl4965_is_tx_success(u32 status)
  2779. {
  2780. status &= TX_STATUS_MSK;
  2781. return (status == TX_STATUS_SUCCESS)
  2782. || (status == TX_STATUS_DIRECT_DONE);
  2783. }
  2784. /******************************************************************************
  2785. *
  2786. * Generic RX handler implementations
  2787. *
  2788. ******************************************************************************/
  2789. #ifdef CONFIG_IWL4965_HT
  2790. static inline int iwl4965_get_ra_sta_id(struct iwl4965_priv *priv,
  2791. struct ieee80211_hdr *hdr)
  2792. {
  2793. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  2794. return IWL_AP_ID;
  2795. else {
  2796. u8 *da = ieee80211_get_DA(hdr);
  2797. return iwl4965_hw_find_station(priv, da);
  2798. }
  2799. }
  2800. static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
  2801. struct iwl4965_priv *priv, int txq_id, int idx)
  2802. {
  2803. if (priv->txq[txq_id].txb[idx].skb[0])
  2804. return (struct ieee80211_hdr *)priv->txq[txq_id].
  2805. txb[idx].skb[0]->data;
  2806. return NULL;
  2807. }
  2808. static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
  2809. {
  2810. __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
  2811. tx_resp->frame_count);
  2812. return le32_to_cpu(*scd_ssn) & MAX_SN;
  2813. }
  2814. /**
  2815. * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
  2816. */
  2817. static int iwl4965_tx_status_reply_tx(struct iwl4965_priv *priv,
  2818. struct iwl4965_ht_agg *agg,
  2819. struct iwl4965_tx_resp_agg *tx_resp,
  2820. u16 start_idx)
  2821. {
  2822. u16 status;
  2823. struct agg_tx_status *frame_status = &tx_resp->status;
  2824. struct ieee80211_tx_status *tx_status = NULL;
  2825. struct ieee80211_hdr *hdr = NULL;
  2826. int i, sh;
  2827. int txq_id, idx;
  2828. u16 seq;
  2829. if (agg->wait_for_ba)
  2830. IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
  2831. agg->frame_count = tx_resp->frame_count;
  2832. agg->start_idx = start_idx;
  2833. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2834. agg->bitmap = 0;
  2835. /* # frames attempted by Tx command */
  2836. if (agg->frame_count == 1) {
  2837. /* Only one frame was attempted; no block-ack will arrive */
  2838. status = le16_to_cpu(frame_status[0].status);
  2839. seq = le16_to_cpu(frame_status[0].sequence);
  2840. idx = SEQ_TO_INDEX(seq);
  2841. txq_id = SEQ_TO_QUEUE(seq);
  2842. /* FIXME: code repetition */
  2843. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
  2844. agg->frame_count, agg->start_idx, idx);
  2845. tx_status = &(priv->txq[txq_id].txb[idx].status);
  2846. tx_status->retry_count = tx_resp->failure_frame;
  2847. tx_status->queue_number = status & 0xff;
  2848. tx_status->queue_length = tx_resp->failure_rts;
  2849. tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
  2850. tx_status->flags = iwl4965_is_tx_success(status)?
  2851. IEEE80211_TX_STATUS_ACK : 0;
  2852. /* FIXME Wrong Rate
  2853. tx_status->control.tx_rate =
  2854. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags); */
  2855. /* FIXME: code repetition end */
  2856. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  2857. status & 0xff, tx_resp->failure_frame);
  2858. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
  2859. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
  2860. agg->wait_for_ba = 0;
  2861. } else {
  2862. /* Two or more frames were attempted; expect block-ack */
  2863. u64 bitmap = 0;
  2864. int start = agg->start_idx;
  2865. /* Construct bit-map of pending frames within Tx window */
  2866. for (i = 0; i < agg->frame_count; i++) {
  2867. u16 sc;
  2868. status = le16_to_cpu(frame_status[i].status);
  2869. seq = le16_to_cpu(frame_status[i].sequence);
  2870. idx = SEQ_TO_INDEX(seq);
  2871. txq_id = SEQ_TO_QUEUE(seq);
  2872. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  2873. AGG_TX_STATE_ABORT_MSK))
  2874. continue;
  2875. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  2876. agg->frame_count, txq_id, idx);
  2877. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
  2878. sc = le16_to_cpu(hdr->seq_ctrl);
  2879. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  2880. IWL_ERROR("BUG_ON idx doesn't match seq control"
  2881. " idx=%d, seq_idx=%d, seq=%d\n",
  2882. idx, SEQ_TO_SN(sc),
  2883. hdr->seq_ctrl);
  2884. return -1;
  2885. }
  2886. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  2887. i, idx, SEQ_TO_SN(sc));
  2888. sh = idx - start;
  2889. if (sh > 64) {
  2890. sh = (start - idx) + 0xff;
  2891. bitmap = bitmap << sh;
  2892. sh = 0;
  2893. start = idx;
  2894. } else if (sh < -64)
  2895. sh = 0xff - (start - idx);
  2896. else if (sh < 0) {
  2897. sh = start - idx;
  2898. start = idx;
  2899. bitmap = bitmap << sh;
  2900. sh = 0;
  2901. }
  2902. bitmap |= (1 << sh);
  2903. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  2904. start, (u32)(bitmap & 0xFFFFFFFF));
  2905. }
  2906. agg->bitmap = bitmap;
  2907. agg->start_idx = start;
  2908. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2909. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
  2910. agg->frame_count, agg->start_idx,
  2911. agg->bitmap);
  2912. if (bitmap)
  2913. agg->wait_for_ba = 1;
  2914. }
  2915. return 0;
  2916. }
  2917. #endif
  2918. /**
  2919. * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
  2920. */
  2921. static void iwl4965_rx_reply_tx(struct iwl4965_priv *priv,
  2922. struct iwl4965_rx_mem_buffer *rxb)
  2923. {
  2924. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2925. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2926. int txq_id = SEQ_TO_QUEUE(sequence);
  2927. int index = SEQ_TO_INDEX(sequence);
  2928. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2929. struct ieee80211_tx_status *tx_status;
  2930. struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  2931. u32 status = le32_to_cpu(tx_resp->status);
  2932. #ifdef CONFIG_IWL4965_HT
  2933. int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
  2934. struct ieee80211_hdr *hdr;
  2935. __le16 *qc;
  2936. #endif
  2937. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  2938. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  2939. "is out of range [0-%d] %d %d\n", txq_id,
  2940. index, txq->q.n_bd, txq->q.write_ptr,
  2941. txq->q.read_ptr);
  2942. return;
  2943. }
  2944. #ifdef CONFIG_IWL4965_HT
  2945. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
  2946. qc = ieee80211_get_qos_ctrl(hdr);
  2947. if (qc)
  2948. tid = le16_to_cpu(*qc) & 0xf;
  2949. sta_id = iwl4965_get_ra_sta_id(priv, hdr);
  2950. if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
  2951. IWL_ERROR("Station not known\n");
  2952. return;
  2953. }
  2954. if (txq->sched_retry) {
  2955. const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
  2956. struct iwl4965_ht_agg *agg = NULL;
  2957. if (!qc)
  2958. return;
  2959. agg = &priv->stations[sta_id].tid[tid].agg;
  2960. iwl4965_tx_status_reply_tx(priv, agg,
  2961. (struct iwl4965_tx_resp_agg *)tx_resp, index);
  2962. if ((tx_resp->frame_count == 1) &&
  2963. !iwl4965_is_tx_success(status)) {
  2964. /* TODO: send BAR */
  2965. }
  2966. if (txq->q.read_ptr != (scd_ssn & 0xff)) {
  2967. int freed;
  2968. index = iwl4965_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  2969. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  2970. "%d index %d\n", scd_ssn , index);
  2971. freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2972. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2973. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2974. txq_id >= 0 && priv->mac80211_registered &&
  2975. agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
  2976. ieee80211_wake_queue(priv->hw, txq_id);
  2977. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2978. }
  2979. } else {
  2980. #endif /* CONFIG_IWL4965_HT */
  2981. tx_status = &(txq->txb[txq->q.read_ptr].status);
  2982. tx_status->retry_count = tx_resp->failure_frame;
  2983. tx_status->queue_number = status;
  2984. tx_status->queue_length = tx_resp->bt_kill_count;
  2985. tx_status->queue_length |= tx_resp->failure_rts;
  2986. tx_status->flags =
  2987. iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  2988. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
  2989. "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
  2990. status, le32_to_cpu(tx_resp->rate_n_flags),
  2991. tx_resp->failure_frame);
  2992. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  2993. if (index != -1) {
  2994. int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2995. #ifdef CONFIG_IWL4965_HT
  2996. if (tid != MAX_TID_COUNT)
  2997. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2998. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2999. (txq_id >= 0) &&
  3000. priv->mac80211_registered)
  3001. ieee80211_wake_queue(priv->hw, txq_id);
  3002. if (tid != MAX_TID_COUNT)
  3003. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  3004. #endif
  3005. }
  3006. #ifdef CONFIG_IWL4965_HT
  3007. }
  3008. #endif /* CONFIG_IWL4965_HT */
  3009. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  3010. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  3011. }
  3012. static void iwl4965_rx_reply_alive(struct iwl4965_priv *priv,
  3013. struct iwl4965_rx_mem_buffer *rxb)
  3014. {
  3015. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3016. struct iwl4965_alive_resp *palive;
  3017. struct delayed_work *pwork;
  3018. palive = &pkt->u.alive_frame;
  3019. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  3020. "0x%01X 0x%01X\n",
  3021. palive->is_valid, palive->ver_type,
  3022. palive->ver_subtype);
  3023. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  3024. IWL_DEBUG_INFO("Initialization Alive received.\n");
  3025. memcpy(&priv->card_alive_init,
  3026. &pkt->u.alive_frame,
  3027. sizeof(struct iwl4965_init_alive_resp));
  3028. pwork = &priv->init_alive_start;
  3029. } else {
  3030. IWL_DEBUG_INFO("Runtime Alive received.\n");
  3031. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  3032. sizeof(struct iwl4965_alive_resp));
  3033. pwork = &priv->alive_start;
  3034. }
  3035. /* We delay the ALIVE response by 5ms to
  3036. * give the HW RF Kill time to activate... */
  3037. if (palive->is_valid == UCODE_VALID_OK)
  3038. queue_delayed_work(priv->workqueue, pwork,
  3039. msecs_to_jiffies(5));
  3040. else
  3041. IWL_WARNING("uCode did not respond OK.\n");
  3042. }
  3043. static void iwl4965_rx_reply_add_sta(struct iwl4965_priv *priv,
  3044. struct iwl4965_rx_mem_buffer *rxb)
  3045. {
  3046. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3047. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  3048. return;
  3049. }
  3050. static void iwl4965_rx_reply_error(struct iwl4965_priv *priv,
  3051. struct iwl4965_rx_mem_buffer *rxb)
  3052. {
  3053. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3054. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  3055. "seq 0x%04X ser 0x%08X\n",
  3056. le32_to_cpu(pkt->u.err_resp.error_type),
  3057. get_cmd_string(pkt->u.err_resp.cmd_id),
  3058. pkt->u.err_resp.cmd_id,
  3059. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  3060. le32_to_cpu(pkt->u.err_resp.error_info));
  3061. }
  3062. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  3063. static void iwl4965_rx_csa(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
  3064. {
  3065. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3066. struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
  3067. struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
  3068. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  3069. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  3070. rxon->channel = csa->channel;
  3071. priv->staging_rxon.channel = csa->channel;
  3072. }
  3073. static void iwl4965_rx_spectrum_measure_notif(struct iwl4965_priv *priv,
  3074. struct iwl4965_rx_mem_buffer *rxb)
  3075. {
  3076. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  3077. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3078. struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
  3079. if (!report->state) {
  3080. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  3081. "Spectrum Measure Notification: Start\n");
  3082. return;
  3083. }
  3084. memcpy(&priv->measure_report, report, sizeof(*report));
  3085. priv->measurement_status |= MEASUREMENT_READY;
  3086. #endif
  3087. }
  3088. static void iwl4965_rx_pm_sleep_notif(struct iwl4965_priv *priv,
  3089. struct iwl4965_rx_mem_buffer *rxb)
  3090. {
  3091. #ifdef CONFIG_IWL4965_DEBUG
  3092. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3093. struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
  3094. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  3095. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  3096. #endif
  3097. }
  3098. static void iwl4965_rx_pm_debug_statistics_notif(struct iwl4965_priv *priv,
  3099. struct iwl4965_rx_mem_buffer *rxb)
  3100. {
  3101. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3102. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  3103. "notification for %s:\n",
  3104. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  3105. iwl4965_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  3106. }
  3107. static void iwl4965_bg_beacon_update(struct work_struct *work)
  3108. {
  3109. struct iwl4965_priv *priv =
  3110. container_of(work, struct iwl4965_priv, beacon_update);
  3111. struct sk_buff *beacon;
  3112. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  3113. beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
  3114. if (!beacon) {
  3115. IWL_ERROR("update beacon failed\n");
  3116. return;
  3117. }
  3118. mutex_lock(&priv->mutex);
  3119. /* new beacon skb is allocated every time; dispose previous.*/
  3120. if (priv->ibss_beacon)
  3121. dev_kfree_skb(priv->ibss_beacon);
  3122. priv->ibss_beacon = beacon;
  3123. mutex_unlock(&priv->mutex);
  3124. iwl4965_send_beacon_cmd(priv);
  3125. }
  3126. static void iwl4965_rx_beacon_notif(struct iwl4965_priv *priv,
  3127. struct iwl4965_rx_mem_buffer *rxb)
  3128. {
  3129. #ifdef CONFIG_IWL4965_DEBUG
  3130. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3131. struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
  3132. u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  3133. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  3134. "tsf %d %d rate %d\n",
  3135. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  3136. beacon->beacon_notify_hdr.failure_frame,
  3137. le32_to_cpu(beacon->ibss_mgr_status),
  3138. le32_to_cpu(beacon->high_tsf),
  3139. le32_to_cpu(beacon->low_tsf), rate);
  3140. #endif
  3141. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  3142. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  3143. queue_work(priv->workqueue, &priv->beacon_update);
  3144. }
  3145. /* Service response to REPLY_SCAN_CMD (0x80) */
  3146. static void iwl4965_rx_reply_scan(struct iwl4965_priv *priv,
  3147. struct iwl4965_rx_mem_buffer *rxb)
  3148. {
  3149. #ifdef CONFIG_IWL4965_DEBUG
  3150. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3151. struct iwl4965_scanreq_notification *notif =
  3152. (struct iwl4965_scanreq_notification *)pkt->u.raw;
  3153. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  3154. #endif
  3155. }
  3156. /* Service SCAN_START_NOTIFICATION (0x82) */
  3157. static void iwl4965_rx_scan_start_notif(struct iwl4965_priv *priv,
  3158. struct iwl4965_rx_mem_buffer *rxb)
  3159. {
  3160. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3161. struct iwl4965_scanstart_notification *notif =
  3162. (struct iwl4965_scanstart_notification *)pkt->u.raw;
  3163. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  3164. IWL_DEBUG_SCAN("Scan start: "
  3165. "%d [802.11%s] "
  3166. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  3167. notif->channel,
  3168. notif->band ? "bg" : "a",
  3169. notif->tsf_high,
  3170. notif->tsf_low, notif->status, notif->beacon_timer);
  3171. }
  3172. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  3173. static void iwl4965_rx_scan_results_notif(struct iwl4965_priv *priv,
  3174. struct iwl4965_rx_mem_buffer *rxb)
  3175. {
  3176. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3177. struct iwl4965_scanresults_notification *notif =
  3178. (struct iwl4965_scanresults_notification *)pkt->u.raw;
  3179. IWL_DEBUG_SCAN("Scan ch.res: "
  3180. "%d [802.11%s] "
  3181. "(TSF: 0x%08X:%08X) - %d "
  3182. "elapsed=%lu usec (%dms since last)\n",
  3183. notif->channel,
  3184. notif->band ? "bg" : "a",
  3185. le32_to_cpu(notif->tsf_high),
  3186. le32_to_cpu(notif->tsf_low),
  3187. le32_to_cpu(notif->statistics[0]),
  3188. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  3189. jiffies_to_msecs(elapsed_jiffies
  3190. (priv->last_scan_jiffies, jiffies)));
  3191. priv->last_scan_jiffies = jiffies;
  3192. priv->next_scan_jiffies = 0;
  3193. }
  3194. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  3195. static void iwl4965_rx_scan_complete_notif(struct iwl4965_priv *priv,
  3196. struct iwl4965_rx_mem_buffer *rxb)
  3197. {
  3198. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3199. struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  3200. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  3201. scan_notif->scanned_channels,
  3202. scan_notif->tsf_low,
  3203. scan_notif->tsf_high, scan_notif->status);
  3204. /* The HW is no longer scanning */
  3205. clear_bit(STATUS_SCAN_HW, &priv->status);
  3206. /* The scan completion notification came in, so kill that timer... */
  3207. cancel_delayed_work(&priv->scan_check);
  3208. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  3209. (priv->scan_bands == 2) ? "2.4" : "5.2",
  3210. jiffies_to_msecs(elapsed_jiffies
  3211. (priv->scan_pass_start, jiffies)));
  3212. /* Remove this scanned band from the list
  3213. * of pending bands to scan */
  3214. priv->scan_bands--;
  3215. /* If a request to abort was given, or the scan did not succeed
  3216. * then we reset the scan state machine and terminate,
  3217. * re-queuing another scan if one has been requested */
  3218. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  3219. IWL_DEBUG_INFO("Aborted scan completed.\n");
  3220. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  3221. } else {
  3222. /* If there are more bands on this scan pass reschedule */
  3223. if (priv->scan_bands > 0)
  3224. goto reschedule;
  3225. }
  3226. priv->last_scan_jiffies = jiffies;
  3227. priv->next_scan_jiffies = 0;
  3228. IWL_DEBUG_INFO("Setting scan to off\n");
  3229. clear_bit(STATUS_SCANNING, &priv->status);
  3230. IWL_DEBUG_INFO("Scan took %dms\n",
  3231. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  3232. queue_work(priv->workqueue, &priv->scan_completed);
  3233. return;
  3234. reschedule:
  3235. priv->scan_pass_start = jiffies;
  3236. queue_work(priv->workqueue, &priv->request_scan);
  3237. }
  3238. /* Handle notification from uCode that card's power state is changing
  3239. * due to software, hardware, or critical temperature RFKILL */
  3240. static void iwl4965_rx_card_state_notif(struct iwl4965_priv *priv,
  3241. struct iwl4965_rx_mem_buffer *rxb)
  3242. {
  3243. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3244. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  3245. unsigned long status = priv->status;
  3246. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  3247. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  3248. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  3249. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  3250. RF_CARD_DISABLED)) {
  3251. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3252. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3253. if (!iwl4965_grab_nic_access(priv)) {
  3254. iwl4965_write_direct32(
  3255. priv, HBUS_TARG_MBX_C,
  3256. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3257. iwl4965_release_nic_access(priv);
  3258. }
  3259. if (!(flags & RXON_CARD_DISABLED)) {
  3260. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  3261. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3262. if (!iwl4965_grab_nic_access(priv)) {
  3263. iwl4965_write_direct32(
  3264. priv, HBUS_TARG_MBX_C,
  3265. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3266. iwl4965_release_nic_access(priv);
  3267. }
  3268. }
  3269. if (flags & RF_CARD_DISABLED) {
  3270. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3271. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  3272. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3273. if (!iwl4965_grab_nic_access(priv))
  3274. iwl4965_release_nic_access(priv);
  3275. }
  3276. }
  3277. if (flags & HW_CARD_DISABLED)
  3278. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3279. else
  3280. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3281. if (flags & SW_CARD_DISABLED)
  3282. set_bit(STATUS_RF_KILL_SW, &priv->status);
  3283. else
  3284. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  3285. if (!(flags & RXON_CARD_DISABLED))
  3286. iwl4965_scan_cancel(priv);
  3287. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  3288. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  3289. (test_bit(STATUS_RF_KILL_SW, &status) !=
  3290. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  3291. queue_work(priv->workqueue, &priv->rf_kill);
  3292. else
  3293. wake_up_interruptible(&priv->wait_command_queue);
  3294. }
  3295. /**
  3296. * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
  3297. *
  3298. * Setup the RX handlers for each of the reply types sent from the uCode
  3299. * to the host.
  3300. *
  3301. * This function chains into the hardware specific files for them to setup
  3302. * any hardware specific handlers as well.
  3303. */
  3304. static void iwl4965_setup_rx_handlers(struct iwl4965_priv *priv)
  3305. {
  3306. priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
  3307. priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
  3308. priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
  3309. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
  3310. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  3311. iwl4965_rx_spectrum_measure_notif;
  3312. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
  3313. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  3314. iwl4965_rx_pm_debug_statistics_notif;
  3315. priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
  3316. /*
  3317. * The same handler is used for both the REPLY to a discrete
  3318. * statistics request from the host as well as for the periodic
  3319. * statistics notifications (after received beacons) from the uCode.
  3320. */
  3321. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
  3322. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
  3323. priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
  3324. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
  3325. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  3326. iwl4965_rx_scan_results_notif;
  3327. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  3328. iwl4965_rx_scan_complete_notif;
  3329. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
  3330. priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
  3331. /* Set up hardware specific Rx handlers */
  3332. iwl4965_hw_rx_handler_setup(priv);
  3333. }
  3334. /**
  3335. * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3336. * @rxb: Rx buffer to reclaim
  3337. *
  3338. * If an Rx buffer has an async callback associated with it the callback
  3339. * will be executed. The attached skb (if present) will only be freed
  3340. * if the callback returns 1
  3341. */
  3342. static void iwl4965_tx_cmd_complete(struct iwl4965_priv *priv,
  3343. struct iwl4965_rx_mem_buffer *rxb)
  3344. {
  3345. struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3346. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3347. int txq_id = SEQ_TO_QUEUE(sequence);
  3348. int index = SEQ_TO_INDEX(sequence);
  3349. int huge = sequence & SEQ_HUGE_FRAME;
  3350. int cmd_index;
  3351. struct iwl4965_cmd *cmd;
  3352. /* If a Tx command is being handled and it isn't in the actual
  3353. * command queue then there a command routing bug has been introduced
  3354. * in the queue management code. */
  3355. if (txq_id != IWL_CMD_QUEUE_NUM)
  3356. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3357. txq_id, pkt->hdr.cmd);
  3358. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3359. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3360. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3361. /* Input error checking is done when commands are added to queue. */
  3362. if (cmd->meta.flags & CMD_WANT_SKB) {
  3363. cmd->meta.source->u.skb = rxb->skb;
  3364. rxb->skb = NULL;
  3365. } else if (cmd->meta.u.callback &&
  3366. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3367. rxb->skb = NULL;
  3368. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3369. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3370. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3371. wake_up_interruptible(&priv->wait_command_queue);
  3372. }
  3373. }
  3374. /************************** RX-FUNCTIONS ****************************/
  3375. /*
  3376. * Rx theory of operation
  3377. *
  3378. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  3379. * each of which point to Receive Buffers to be filled by 4965. These get
  3380. * used not only for Rx frames, but for any command response or notification
  3381. * from the 4965. The driver and 4965 manage the Rx buffers by means
  3382. * of indexes into the circular buffer.
  3383. *
  3384. * Rx Queue Indexes
  3385. * The host/firmware share two index registers for managing the Rx buffers.
  3386. *
  3387. * The READ index maps to the first position that the firmware may be writing
  3388. * to -- the driver can read up to (but not including) this position and get
  3389. * good data.
  3390. * The READ index is managed by the firmware once the card is enabled.
  3391. *
  3392. * The WRITE index maps to the last position the driver has read from -- the
  3393. * position preceding WRITE is the last slot the firmware can place a packet.
  3394. *
  3395. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3396. * WRITE = READ.
  3397. *
  3398. * During initialization, the host sets up the READ queue position to the first
  3399. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3400. *
  3401. * When the firmware places a packet in a buffer, it will advance the READ index
  3402. * and fire the RX interrupt. The driver can then query the READ index and
  3403. * process as many packets as possible, moving the WRITE index forward as it
  3404. * resets the Rx queue buffers with new memory.
  3405. *
  3406. * The management in the driver is as follows:
  3407. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3408. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3409. * to replenish the iwl->rxq->rx_free.
  3410. * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
  3411. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3412. * 'processed' and 'read' driver indexes as well)
  3413. * + A received packet is processed and handed to the kernel network stack,
  3414. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3415. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3416. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3417. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3418. * were enough free buffers and RX_STALLED is set it is cleared.
  3419. *
  3420. *
  3421. * Driver sequence:
  3422. *
  3423. * iwl4965_rx_queue_alloc() Allocates rx_free
  3424. * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3425. * iwl4965_rx_queue_restock
  3426. * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
  3427. * queue, updates firmware pointers, and updates
  3428. * the WRITE index. If insufficient rx_free buffers
  3429. * are available, schedules iwl4965_rx_replenish
  3430. *
  3431. * -- enable interrupts --
  3432. * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
  3433. * READ INDEX, detaching the SKB from the pool.
  3434. * Moves the packet buffer from queue to rx_used.
  3435. * Calls iwl4965_rx_queue_restock to refill any empty
  3436. * slots.
  3437. * ...
  3438. *
  3439. */
  3440. /**
  3441. * iwl4965_rx_queue_space - Return number of free slots available in queue.
  3442. */
  3443. static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
  3444. {
  3445. int s = q->read - q->write;
  3446. if (s <= 0)
  3447. s += RX_QUEUE_SIZE;
  3448. /* keep some buffer to not confuse full and empty queue */
  3449. s -= 2;
  3450. if (s < 0)
  3451. s = 0;
  3452. return s;
  3453. }
  3454. /**
  3455. * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3456. */
  3457. int iwl4965_rx_queue_update_write_ptr(struct iwl4965_priv *priv, struct iwl4965_rx_queue *q)
  3458. {
  3459. u32 reg = 0;
  3460. int rc = 0;
  3461. unsigned long flags;
  3462. spin_lock_irqsave(&q->lock, flags);
  3463. if (q->need_update == 0)
  3464. goto exit_unlock;
  3465. /* If power-saving is in use, make sure device is awake */
  3466. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3467. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3468. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3469. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  3470. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3471. goto exit_unlock;
  3472. }
  3473. rc = iwl4965_grab_nic_access(priv);
  3474. if (rc)
  3475. goto exit_unlock;
  3476. /* Device expects a multiple of 8 */
  3477. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
  3478. q->write & ~0x7);
  3479. iwl4965_release_nic_access(priv);
  3480. /* Else device is assumed to be awake */
  3481. } else
  3482. /* Device expects a multiple of 8 */
  3483. iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3484. q->need_update = 0;
  3485. exit_unlock:
  3486. spin_unlock_irqrestore(&q->lock, flags);
  3487. return rc;
  3488. }
  3489. /**
  3490. * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  3491. */
  3492. static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl4965_priv *priv,
  3493. dma_addr_t dma_addr)
  3494. {
  3495. return cpu_to_le32((u32)(dma_addr >> 8));
  3496. }
  3497. /**
  3498. * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
  3499. *
  3500. * If there are slots in the RX queue that need to be restocked,
  3501. * and we have free pre-allocated buffers, fill the ranks as much
  3502. * as we can, pulling from rx_free.
  3503. *
  3504. * This moves the 'write' index forward to catch up with 'processed', and
  3505. * also updates the memory address in the firmware to reference the new
  3506. * target buffer.
  3507. */
  3508. static int iwl4965_rx_queue_restock(struct iwl4965_priv *priv)
  3509. {
  3510. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3511. struct list_head *element;
  3512. struct iwl4965_rx_mem_buffer *rxb;
  3513. unsigned long flags;
  3514. int write, rc;
  3515. spin_lock_irqsave(&rxq->lock, flags);
  3516. write = rxq->write & ~0x7;
  3517. while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3518. /* Get next free Rx buffer, remove from free list */
  3519. element = rxq->rx_free.next;
  3520. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3521. list_del(element);
  3522. /* Point to Rx buffer via next RBD in circular buffer */
  3523. rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3524. rxq->queue[rxq->write] = rxb;
  3525. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3526. rxq->free_count--;
  3527. }
  3528. spin_unlock_irqrestore(&rxq->lock, flags);
  3529. /* If the pre-allocated buffer pool is dropping low, schedule to
  3530. * refill it */
  3531. if (rxq->free_count <= RX_LOW_WATERMARK)
  3532. queue_work(priv->workqueue, &priv->rx_replenish);
  3533. /* If we've added more space for the firmware to place data, tell it.
  3534. * Increment device's write pointer in multiples of 8. */
  3535. if ((write != (rxq->write & ~0x7))
  3536. || (abs(rxq->write - rxq->read) > 7)) {
  3537. spin_lock_irqsave(&rxq->lock, flags);
  3538. rxq->need_update = 1;
  3539. spin_unlock_irqrestore(&rxq->lock, flags);
  3540. rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
  3541. if (rc)
  3542. return rc;
  3543. }
  3544. return 0;
  3545. }
  3546. /**
  3547. * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
  3548. *
  3549. * When moving to rx_free an SKB is allocated for the slot.
  3550. *
  3551. * Also restock the Rx queue via iwl4965_rx_queue_restock.
  3552. * This is called as a scheduled work item (except for during initialization)
  3553. */
  3554. static void iwl4965_rx_allocate(struct iwl4965_priv *priv)
  3555. {
  3556. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3557. struct list_head *element;
  3558. struct iwl4965_rx_mem_buffer *rxb;
  3559. unsigned long flags;
  3560. spin_lock_irqsave(&rxq->lock, flags);
  3561. while (!list_empty(&rxq->rx_used)) {
  3562. element = rxq->rx_used.next;
  3563. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3564. /* Alloc a new receive buffer */
  3565. rxb->skb =
  3566. alloc_skb(priv->hw_setting.rx_buf_size,
  3567. __GFP_NOWARN | GFP_ATOMIC);
  3568. if (!rxb->skb) {
  3569. if (net_ratelimit())
  3570. printk(KERN_CRIT DRV_NAME
  3571. ": Can not allocate SKB buffers\n");
  3572. /* We don't reschedule replenish work here -- we will
  3573. * call the restock method and if it still needs
  3574. * more buffers it will schedule replenish */
  3575. break;
  3576. }
  3577. priv->alloc_rxb_skb++;
  3578. list_del(element);
  3579. /* Get physical address of RB/SKB */
  3580. rxb->dma_addr =
  3581. pci_map_single(priv->pci_dev, rxb->skb->data,
  3582. priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
  3583. list_add_tail(&rxb->list, &rxq->rx_free);
  3584. rxq->free_count++;
  3585. }
  3586. spin_unlock_irqrestore(&rxq->lock, flags);
  3587. }
  3588. /*
  3589. * this should be called while priv->lock is locked
  3590. */
  3591. static void __iwl4965_rx_replenish(void *data)
  3592. {
  3593. struct iwl4965_priv *priv = data;
  3594. iwl4965_rx_allocate(priv);
  3595. iwl4965_rx_queue_restock(priv);
  3596. }
  3597. void iwl4965_rx_replenish(void *data)
  3598. {
  3599. struct iwl4965_priv *priv = data;
  3600. unsigned long flags;
  3601. iwl4965_rx_allocate(priv);
  3602. spin_lock_irqsave(&priv->lock, flags);
  3603. iwl4965_rx_queue_restock(priv);
  3604. spin_unlock_irqrestore(&priv->lock, flags);
  3605. }
  3606. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3607. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  3608. * This free routine walks the list of POOL entries and if SKB is set to
  3609. * non NULL it is unmapped and freed
  3610. */
  3611. static void iwl4965_rx_queue_free(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3612. {
  3613. int i;
  3614. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3615. if (rxq->pool[i].skb != NULL) {
  3616. pci_unmap_single(priv->pci_dev,
  3617. rxq->pool[i].dma_addr,
  3618. priv->hw_setting.rx_buf_size,
  3619. PCI_DMA_FROMDEVICE);
  3620. dev_kfree_skb(rxq->pool[i].skb);
  3621. }
  3622. }
  3623. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3624. rxq->dma_addr);
  3625. rxq->bd = NULL;
  3626. }
  3627. int iwl4965_rx_queue_alloc(struct iwl4965_priv *priv)
  3628. {
  3629. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3630. struct pci_dev *dev = priv->pci_dev;
  3631. int i;
  3632. spin_lock_init(&rxq->lock);
  3633. INIT_LIST_HEAD(&rxq->rx_free);
  3634. INIT_LIST_HEAD(&rxq->rx_used);
  3635. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  3636. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3637. if (!rxq->bd)
  3638. return -ENOMEM;
  3639. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3640. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3641. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3642. /* Set us so that we have processed and used all buffers, but have
  3643. * not restocked the Rx queue with fresh buffers */
  3644. rxq->read = rxq->write = 0;
  3645. rxq->free_count = 0;
  3646. rxq->need_update = 0;
  3647. return 0;
  3648. }
  3649. void iwl4965_rx_queue_reset(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3650. {
  3651. unsigned long flags;
  3652. int i;
  3653. spin_lock_irqsave(&rxq->lock, flags);
  3654. INIT_LIST_HEAD(&rxq->rx_free);
  3655. INIT_LIST_HEAD(&rxq->rx_used);
  3656. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3657. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3658. /* In the reset function, these buffers may have been allocated
  3659. * to an SKB, so we need to unmap and free potential storage */
  3660. if (rxq->pool[i].skb != NULL) {
  3661. pci_unmap_single(priv->pci_dev,
  3662. rxq->pool[i].dma_addr,
  3663. priv->hw_setting.rx_buf_size,
  3664. PCI_DMA_FROMDEVICE);
  3665. priv->alloc_rxb_skb--;
  3666. dev_kfree_skb(rxq->pool[i].skb);
  3667. rxq->pool[i].skb = NULL;
  3668. }
  3669. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3670. }
  3671. /* Set us so that we have processed and used all buffers, but have
  3672. * not restocked the Rx queue with fresh buffers */
  3673. rxq->read = rxq->write = 0;
  3674. rxq->free_count = 0;
  3675. spin_unlock_irqrestore(&rxq->lock, flags);
  3676. }
  3677. /* Convert linear signal-to-noise ratio into dB */
  3678. static u8 ratio2dB[100] = {
  3679. /* 0 1 2 3 4 5 6 7 8 9 */
  3680. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3681. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3682. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3683. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3684. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3685. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3686. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3687. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3688. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3689. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3690. };
  3691. /* Calculates a relative dB value from a ratio of linear
  3692. * (i.e. not dB) signal levels.
  3693. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3694. int iwl4965_calc_db_from_ratio(int sig_ratio)
  3695. {
  3696. /* 1000:1 or higher just report as 60 dB */
  3697. if (sig_ratio >= 1000)
  3698. return 60;
  3699. /* 100:1 or higher, divide by 10 and use table,
  3700. * add 20 dB to make up for divide by 10 */
  3701. if (sig_ratio >= 100)
  3702. return (20 + (int)ratio2dB[sig_ratio/10]);
  3703. /* We shouldn't see this */
  3704. if (sig_ratio < 1)
  3705. return 0;
  3706. /* Use table for ratios 1:1 - 99:1 */
  3707. return (int)ratio2dB[sig_ratio];
  3708. }
  3709. #define PERFECT_RSSI (-20) /* dBm */
  3710. #define WORST_RSSI (-95) /* dBm */
  3711. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3712. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3713. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3714. * about formulas used below. */
  3715. int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3716. {
  3717. int sig_qual;
  3718. int degradation = PERFECT_RSSI - rssi_dbm;
  3719. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3720. * as indicator; formula is (signal dbm - noise dbm).
  3721. * SNR at or above 40 is a great signal (100%).
  3722. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3723. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3724. if (noise_dbm) {
  3725. if (rssi_dbm - noise_dbm >= 40)
  3726. return 100;
  3727. else if (rssi_dbm < noise_dbm)
  3728. return 0;
  3729. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3730. /* Else use just the signal level.
  3731. * This formula is a least squares fit of data points collected and
  3732. * compared with a reference system that had a percentage (%) display
  3733. * for signal quality. */
  3734. } else
  3735. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3736. (15 * RSSI_RANGE + 62 * degradation)) /
  3737. (RSSI_RANGE * RSSI_RANGE);
  3738. if (sig_qual > 100)
  3739. sig_qual = 100;
  3740. else if (sig_qual < 1)
  3741. sig_qual = 0;
  3742. return sig_qual;
  3743. }
  3744. /**
  3745. * iwl4965_rx_handle - Main entry function for receiving responses from uCode
  3746. *
  3747. * Uses the priv->rx_handlers callback function array to invoke
  3748. * the appropriate handlers, including command responses,
  3749. * frame-received notifications, and other notifications.
  3750. */
  3751. static void iwl4965_rx_handle(struct iwl4965_priv *priv)
  3752. {
  3753. struct iwl4965_rx_mem_buffer *rxb;
  3754. struct iwl4965_rx_packet *pkt;
  3755. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3756. u32 r, i;
  3757. int reclaim;
  3758. unsigned long flags;
  3759. u8 fill_rx = 0;
  3760. u32 count = 8;
  3761. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  3762. * buffer that the driver may process (last buffer filled by ucode). */
  3763. r = iwl4965_hw_get_rx_read(priv);
  3764. i = rxq->read;
  3765. /* Rx interrupt, but nothing sent from uCode */
  3766. if (i == r)
  3767. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3768. if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  3769. fill_rx = 1;
  3770. while (i != r) {
  3771. rxb = rxq->queue[i];
  3772. /* If an RXB doesn't have a Rx queue slot associated with it,
  3773. * then a bug has been introduced in the queue refilling
  3774. * routines -- catch it here */
  3775. BUG_ON(rxb == NULL);
  3776. rxq->queue[i] = NULL;
  3777. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3778. priv->hw_setting.rx_buf_size,
  3779. PCI_DMA_FROMDEVICE);
  3780. pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3781. /* Reclaim a command buffer only if this packet is a response
  3782. * to a (driver-originated) command.
  3783. * If the packet (e.g. Rx frame) originated from uCode,
  3784. * there is no command buffer to reclaim.
  3785. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3786. * but apparently a few don't get set; catch them here. */
  3787. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3788. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  3789. (pkt->hdr.cmd != REPLY_4965_RX) &&
  3790. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  3791. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3792. (pkt->hdr.cmd != REPLY_TX);
  3793. /* Based on type of command response or notification,
  3794. * handle those that need handling via function in
  3795. * rx_handlers table. See iwl4965_setup_rx_handlers() */
  3796. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3797. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3798. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3799. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3800. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3801. } else {
  3802. /* No handling needed */
  3803. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3804. "r %d i %d No handler needed for %s, 0x%02x\n",
  3805. r, i, get_cmd_string(pkt->hdr.cmd),
  3806. pkt->hdr.cmd);
  3807. }
  3808. if (reclaim) {
  3809. /* Invoke any callbacks, transfer the skb to caller, and
  3810. * fire off the (possibly) blocking iwl4965_send_cmd()
  3811. * as we reclaim the driver command queue */
  3812. if (rxb && rxb->skb)
  3813. iwl4965_tx_cmd_complete(priv, rxb);
  3814. else
  3815. IWL_WARNING("Claim null rxb?\n");
  3816. }
  3817. /* For now we just don't re-use anything. We can tweak this
  3818. * later to try and re-use notification packets and SKBs that
  3819. * fail to Rx correctly */
  3820. if (rxb->skb != NULL) {
  3821. priv->alloc_rxb_skb--;
  3822. dev_kfree_skb_any(rxb->skb);
  3823. rxb->skb = NULL;
  3824. }
  3825. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  3826. priv->hw_setting.rx_buf_size,
  3827. PCI_DMA_FROMDEVICE);
  3828. spin_lock_irqsave(&rxq->lock, flags);
  3829. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  3830. spin_unlock_irqrestore(&rxq->lock, flags);
  3831. i = (i + 1) & RX_QUEUE_MASK;
  3832. /* If there are a lot of unused frames,
  3833. * restock the Rx queue so ucode wont assert. */
  3834. if (fill_rx) {
  3835. count++;
  3836. if (count >= 8) {
  3837. priv->rxq.read = i;
  3838. __iwl4965_rx_replenish(priv);
  3839. count = 0;
  3840. }
  3841. }
  3842. }
  3843. /* Backtrack one entry */
  3844. priv->rxq.read = i;
  3845. iwl4965_rx_queue_restock(priv);
  3846. }
  3847. /**
  3848. * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
  3849. */
  3850. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  3851. struct iwl4965_tx_queue *txq)
  3852. {
  3853. u32 reg = 0;
  3854. int rc = 0;
  3855. int txq_id = txq->q.id;
  3856. if (txq->need_update == 0)
  3857. return rc;
  3858. /* if we're trying to save power */
  3859. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3860. /* wake up nic if it's powered down ...
  3861. * uCode will wake up, and interrupt us again, so next
  3862. * time we'll skip this part. */
  3863. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3864. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3865. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  3866. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  3867. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3868. return rc;
  3869. }
  3870. /* restore this queue's parameters in nic hardware. */
  3871. rc = iwl4965_grab_nic_access(priv);
  3872. if (rc)
  3873. return rc;
  3874. iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
  3875. txq->q.write_ptr | (txq_id << 8));
  3876. iwl4965_release_nic_access(priv);
  3877. /* else not in power-save mode, uCode will never sleep when we're
  3878. * trying to tx (during RFKILL, we're not trying to tx). */
  3879. } else
  3880. iwl4965_write32(priv, HBUS_TARG_WRPTR,
  3881. txq->q.write_ptr | (txq_id << 8));
  3882. txq->need_update = 0;
  3883. return rc;
  3884. }
  3885. #ifdef CONFIG_IWL4965_DEBUG
  3886. static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
  3887. {
  3888. DECLARE_MAC_BUF(mac);
  3889. IWL_DEBUG_RADIO("RX CONFIG:\n");
  3890. iwl4965_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3891. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  3892. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3893. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  3894. le32_to_cpu(rxon->filter_flags));
  3895. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3896. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3897. rxon->ofdm_basic_rates);
  3898. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  3899. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  3900. print_mac(mac, rxon->node_addr));
  3901. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  3902. print_mac(mac, rxon->bssid_addr));
  3903. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  3904. }
  3905. #endif
  3906. static void iwl4965_enable_interrupts(struct iwl4965_priv *priv)
  3907. {
  3908. IWL_DEBUG_ISR("Enabling interrupts\n");
  3909. set_bit(STATUS_INT_ENABLED, &priv->status);
  3910. iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  3911. }
  3912. static inline void iwl4965_disable_interrupts(struct iwl4965_priv *priv)
  3913. {
  3914. clear_bit(STATUS_INT_ENABLED, &priv->status);
  3915. /* disable interrupts from uCode/NIC to host */
  3916. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  3917. /* acknowledge/clear/reset any interrupts still pending
  3918. * from uCode or flow handler (Rx/Tx DMA) */
  3919. iwl4965_write32(priv, CSR_INT, 0xffffffff);
  3920. iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  3921. IWL_DEBUG_ISR("Disabled interrupts\n");
  3922. }
  3923. static const char *desc_lookup(int i)
  3924. {
  3925. switch (i) {
  3926. case 1:
  3927. return "FAIL";
  3928. case 2:
  3929. return "BAD_PARAM";
  3930. case 3:
  3931. return "BAD_CHECKSUM";
  3932. case 4:
  3933. return "NMI_INTERRUPT";
  3934. case 5:
  3935. return "SYSASSERT";
  3936. case 6:
  3937. return "FATAL_ERROR";
  3938. }
  3939. return "UNKNOWN";
  3940. }
  3941. #define ERROR_START_OFFSET (1 * sizeof(u32))
  3942. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  3943. static void iwl4965_dump_nic_error_log(struct iwl4965_priv *priv)
  3944. {
  3945. u32 data2, line;
  3946. u32 desc, time, count, base, data1;
  3947. u32 blink1, blink2, ilink1, ilink2;
  3948. int rc;
  3949. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  3950. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  3951. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  3952. return;
  3953. }
  3954. rc = iwl4965_grab_nic_access(priv);
  3955. if (rc) {
  3956. IWL_WARNING("Can not read from adapter at this time.\n");
  3957. return;
  3958. }
  3959. count = iwl4965_read_targ_mem(priv, base);
  3960. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  3961. IWL_ERROR("Start IWL Error Log Dump:\n");
  3962. IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
  3963. }
  3964. desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
  3965. blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
  3966. blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
  3967. ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
  3968. ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
  3969. data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
  3970. data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
  3971. line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
  3972. time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
  3973. IWL_ERROR("Desc Time "
  3974. "data1 data2 line\n");
  3975. IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
  3976. desc_lookup(desc), desc, time, data1, data2, line);
  3977. IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
  3978. IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  3979. ilink1, ilink2);
  3980. iwl4965_release_nic_access(priv);
  3981. }
  3982. #define EVENT_START_OFFSET (4 * sizeof(u32))
  3983. /**
  3984. * iwl4965_print_event_log - Dump error event log to syslog
  3985. *
  3986. * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
  3987. */
  3988. static void iwl4965_print_event_log(struct iwl4965_priv *priv, u32 start_idx,
  3989. u32 num_events, u32 mode)
  3990. {
  3991. u32 i;
  3992. u32 base; /* SRAM byte address of event log header */
  3993. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  3994. u32 ptr; /* SRAM byte address of log data */
  3995. u32 ev, time, data; /* event log data */
  3996. if (num_events == 0)
  3997. return;
  3998. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3999. if (mode == 0)
  4000. event_size = 2 * sizeof(u32);
  4001. else
  4002. event_size = 3 * sizeof(u32);
  4003. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  4004. /* "time" is actually "data" for mode 0 (no timestamp).
  4005. * place event id # at far right for easier visual parsing. */
  4006. for (i = 0; i < num_events; i++) {
  4007. ev = iwl4965_read_targ_mem(priv, ptr);
  4008. ptr += sizeof(u32);
  4009. time = iwl4965_read_targ_mem(priv, ptr);
  4010. ptr += sizeof(u32);
  4011. if (mode == 0)
  4012. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  4013. else {
  4014. data = iwl4965_read_targ_mem(priv, ptr);
  4015. ptr += sizeof(u32);
  4016. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  4017. }
  4018. }
  4019. }
  4020. static void iwl4965_dump_nic_event_log(struct iwl4965_priv *priv)
  4021. {
  4022. int rc;
  4023. u32 base; /* SRAM byte address of event log header */
  4024. u32 capacity; /* event log capacity in # entries */
  4025. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  4026. u32 num_wraps; /* # times uCode wrapped to top of log */
  4027. u32 next_entry; /* index of next entry to be written by uCode */
  4028. u32 size; /* # entries that we'll print */
  4029. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4030. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  4031. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  4032. return;
  4033. }
  4034. rc = iwl4965_grab_nic_access(priv);
  4035. if (rc) {
  4036. IWL_WARNING("Can not read from adapter at this time.\n");
  4037. return;
  4038. }
  4039. /* event log header */
  4040. capacity = iwl4965_read_targ_mem(priv, base);
  4041. mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
  4042. num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
  4043. next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
  4044. size = num_wraps ? capacity : next_entry;
  4045. /* bail out if nothing in log */
  4046. if (size == 0) {
  4047. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  4048. iwl4965_release_nic_access(priv);
  4049. return;
  4050. }
  4051. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  4052. size, num_wraps);
  4053. /* if uCode has wrapped back to top of log, start at the oldest entry,
  4054. * i.e the next one that uCode would fill. */
  4055. if (num_wraps)
  4056. iwl4965_print_event_log(priv, next_entry,
  4057. capacity - next_entry, mode);
  4058. /* (then/else) start at top of log */
  4059. iwl4965_print_event_log(priv, 0, next_entry, mode);
  4060. iwl4965_release_nic_access(priv);
  4061. }
  4062. /**
  4063. * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
  4064. */
  4065. static void iwl4965_irq_handle_error(struct iwl4965_priv *priv)
  4066. {
  4067. /* Set the FW error flag -- cleared on iwl4965_down */
  4068. set_bit(STATUS_FW_ERROR, &priv->status);
  4069. /* Cancel currently queued command. */
  4070. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  4071. #ifdef CONFIG_IWL4965_DEBUG
  4072. if (iwl4965_debug_level & IWL_DL_FW_ERRORS) {
  4073. iwl4965_dump_nic_error_log(priv);
  4074. iwl4965_dump_nic_event_log(priv);
  4075. iwl4965_print_rx_config_cmd(&priv->staging_rxon);
  4076. }
  4077. #endif
  4078. wake_up_interruptible(&priv->wait_command_queue);
  4079. /* Keep the restart process from trying to send host
  4080. * commands by clearing the INIT status bit */
  4081. clear_bit(STATUS_READY, &priv->status);
  4082. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4083. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  4084. "Restarting adapter due to uCode error.\n");
  4085. if (iwl4965_is_associated(priv)) {
  4086. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  4087. sizeof(priv->recovery_rxon));
  4088. priv->error_recovering = 1;
  4089. }
  4090. queue_work(priv->workqueue, &priv->restart);
  4091. }
  4092. }
  4093. static void iwl4965_error_recovery(struct iwl4965_priv *priv)
  4094. {
  4095. unsigned long flags;
  4096. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  4097. sizeof(priv->staging_rxon));
  4098. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4099. iwl4965_commit_rxon(priv);
  4100. iwl4965_rxon_add_station(priv, priv->bssid, 1);
  4101. spin_lock_irqsave(&priv->lock, flags);
  4102. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  4103. priv->error_recovering = 0;
  4104. spin_unlock_irqrestore(&priv->lock, flags);
  4105. }
  4106. static void iwl4965_irq_tasklet(struct iwl4965_priv *priv)
  4107. {
  4108. u32 inta, handled = 0;
  4109. u32 inta_fh;
  4110. unsigned long flags;
  4111. #ifdef CONFIG_IWL4965_DEBUG
  4112. u32 inta_mask;
  4113. #endif
  4114. spin_lock_irqsave(&priv->lock, flags);
  4115. /* Ack/clear/reset pending uCode interrupts.
  4116. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  4117. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  4118. inta = iwl4965_read32(priv, CSR_INT);
  4119. iwl4965_write32(priv, CSR_INT, inta);
  4120. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  4121. * Any new interrupts that happen after this, either while we're
  4122. * in this tasklet, or later, will show up in next ISR/tasklet. */
  4123. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4124. iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  4125. #ifdef CONFIG_IWL4965_DEBUG
  4126. if (iwl4965_debug_level & IWL_DL_ISR) {
  4127. /* just for debug */
  4128. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4129. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4130. inta, inta_mask, inta_fh);
  4131. }
  4132. #endif
  4133. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  4134. * atomic, make sure that inta covers all the interrupts that
  4135. * we've discovered, even if FH interrupt came in just after
  4136. * reading CSR_INT. */
  4137. if (inta_fh & CSR_FH_INT_RX_MASK)
  4138. inta |= CSR_INT_BIT_FH_RX;
  4139. if (inta_fh & CSR_FH_INT_TX_MASK)
  4140. inta |= CSR_INT_BIT_FH_TX;
  4141. /* Now service all interrupt bits discovered above. */
  4142. if (inta & CSR_INT_BIT_HW_ERR) {
  4143. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  4144. /* Tell the device to stop sending interrupts */
  4145. iwl4965_disable_interrupts(priv);
  4146. iwl4965_irq_handle_error(priv);
  4147. handled |= CSR_INT_BIT_HW_ERR;
  4148. spin_unlock_irqrestore(&priv->lock, flags);
  4149. return;
  4150. }
  4151. #ifdef CONFIG_IWL4965_DEBUG
  4152. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4153. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  4154. if (inta & CSR_INT_BIT_SCD)
  4155. IWL_DEBUG_ISR("Scheduler finished to transmit "
  4156. "the frame/frames.\n");
  4157. /* Alive notification via Rx interrupt will do the real work */
  4158. if (inta & CSR_INT_BIT_ALIVE)
  4159. IWL_DEBUG_ISR("Alive interrupt\n");
  4160. }
  4161. #endif
  4162. /* Safely ignore these bits for debug checks below */
  4163. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  4164. /* HW RF KILL switch toggled */
  4165. if (inta & CSR_INT_BIT_RF_KILL) {
  4166. int hw_rf_kill = 0;
  4167. if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
  4168. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  4169. hw_rf_kill = 1;
  4170. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  4171. "RF_KILL bit toggled to %s.\n",
  4172. hw_rf_kill ? "disable radio":"enable radio");
  4173. /* Queue restart only if RF_KILL switch was set to "kill"
  4174. * when we loaded driver, and is now set to "enable".
  4175. * After we're Alive, RF_KILL gets handled by
  4176. * iwl4965_rx_card_state_notif() */
  4177. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
  4178. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4179. queue_work(priv->workqueue, &priv->restart);
  4180. }
  4181. handled |= CSR_INT_BIT_RF_KILL;
  4182. }
  4183. /* Chip got too hot and stopped itself */
  4184. if (inta & CSR_INT_BIT_CT_KILL) {
  4185. IWL_ERROR("Microcode CT kill error detected.\n");
  4186. handled |= CSR_INT_BIT_CT_KILL;
  4187. }
  4188. /* Error detected by uCode */
  4189. if (inta & CSR_INT_BIT_SW_ERR) {
  4190. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  4191. inta);
  4192. iwl4965_irq_handle_error(priv);
  4193. handled |= CSR_INT_BIT_SW_ERR;
  4194. }
  4195. /* uCode wakes up after power-down sleep */
  4196. if (inta & CSR_INT_BIT_WAKEUP) {
  4197. IWL_DEBUG_ISR("Wakeup interrupt\n");
  4198. iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
  4199. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  4200. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  4201. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  4202. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  4203. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  4204. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  4205. handled |= CSR_INT_BIT_WAKEUP;
  4206. }
  4207. /* All uCode command responses, including Tx command responses,
  4208. * Rx "responses" (frame-received notification), and other
  4209. * notifications from uCode come through here*/
  4210. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  4211. iwl4965_rx_handle(priv);
  4212. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  4213. }
  4214. if (inta & CSR_INT_BIT_FH_TX) {
  4215. IWL_DEBUG_ISR("Tx interrupt\n");
  4216. handled |= CSR_INT_BIT_FH_TX;
  4217. }
  4218. if (inta & ~handled)
  4219. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  4220. if (inta & ~CSR_INI_SET_MASK) {
  4221. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  4222. inta & ~CSR_INI_SET_MASK);
  4223. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  4224. }
  4225. /* Re-enable all interrupts */
  4226. iwl4965_enable_interrupts(priv);
  4227. #ifdef CONFIG_IWL4965_DEBUG
  4228. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4229. inta = iwl4965_read32(priv, CSR_INT);
  4230. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4231. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4232. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  4233. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  4234. }
  4235. #endif
  4236. spin_unlock_irqrestore(&priv->lock, flags);
  4237. }
  4238. static irqreturn_t iwl4965_isr(int irq, void *data)
  4239. {
  4240. struct iwl4965_priv *priv = data;
  4241. u32 inta, inta_mask;
  4242. u32 inta_fh;
  4243. if (!priv)
  4244. return IRQ_NONE;
  4245. spin_lock(&priv->lock);
  4246. /* Disable (but don't clear!) interrupts here to avoid
  4247. * back-to-back ISRs and sporadic interrupts from our NIC.
  4248. * If we have something to service, the tasklet will re-enable ints.
  4249. * If we *don't* have something, we'll re-enable before leaving here. */
  4250. inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
  4251. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  4252. /* Discover which interrupts are active/pending */
  4253. inta = iwl4965_read32(priv, CSR_INT);
  4254. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4255. /* Ignore interrupt if there's nothing in NIC to service.
  4256. * This may be due to IRQ shared with another device,
  4257. * or due to sporadic interrupts thrown from our NIC. */
  4258. if (!inta && !inta_fh) {
  4259. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  4260. goto none;
  4261. }
  4262. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  4263. /* Hardware disappeared. It might have already raised
  4264. * an interrupt */
  4265. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  4266. goto unplugged;
  4267. }
  4268. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4269. inta, inta_mask, inta_fh);
  4270. inta &= ~CSR_INT_BIT_SCD;
  4271. /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
  4272. if (likely(inta || inta_fh))
  4273. tasklet_schedule(&priv->irq_tasklet);
  4274. unplugged:
  4275. spin_unlock(&priv->lock);
  4276. return IRQ_HANDLED;
  4277. none:
  4278. /* re-enable interrupts here since we don't have anything to service. */
  4279. iwl4965_enable_interrupts(priv);
  4280. spin_unlock(&priv->lock);
  4281. return IRQ_NONE;
  4282. }
  4283. /************************** EEPROM BANDS ****************************
  4284. *
  4285. * The iwl4965_eeprom_band definitions below provide the mapping from the
  4286. * EEPROM contents to the specific channel number supported for each
  4287. * band.
  4288. *
  4289. * For example, iwl4965_priv->eeprom.band_3_channels[4] from the band_3
  4290. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  4291. * The specific geography and calibration information for that channel
  4292. * is contained in the eeprom map itself.
  4293. *
  4294. * During init, we copy the eeprom information and channel map
  4295. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  4296. *
  4297. * channel_map_24/52 provides the index in the channel_info array for a
  4298. * given channel. We have to have two separate maps as there is channel
  4299. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  4300. * band_2
  4301. *
  4302. * A value of 0xff stored in the channel_map indicates that the channel
  4303. * is not supported by the hardware at all.
  4304. *
  4305. * A value of 0xfe in the channel_map indicates that the channel is not
  4306. * valid for Tx with the current hardware. This means that
  4307. * while the system can tune and receive on a given channel, it may not
  4308. * be able to associate or transmit any frames on that
  4309. * channel. There is no corresponding channel information for that
  4310. * entry.
  4311. *
  4312. *********************************************************************/
  4313. /* 2.4 GHz */
  4314. static const u8 iwl4965_eeprom_band_1[14] = {
  4315. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  4316. };
  4317. /* 5.2 GHz bands */
  4318. static const u8 iwl4965_eeprom_band_2[] = { /* 4915-5080MHz */
  4319. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  4320. };
  4321. static const u8 iwl4965_eeprom_band_3[] = { /* 5170-5320MHz */
  4322. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  4323. };
  4324. static const u8 iwl4965_eeprom_band_4[] = { /* 5500-5700MHz */
  4325. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  4326. };
  4327. static const u8 iwl4965_eeprom_band_5[] = { /* 5725-5825MHz */
  4328. 145, 149, 153, 157, 161, 165
  4329. };
  4330. static u8 iwl4965_eeprom_band_6[] = { /* 2.4 FAT channel */
  4331. 1, 2, 3, 4, 5, 6, 7
  4332. };
  4333. static u8 iwl4965_eeprom_band_7[] = { /* 5.2 FAT channel */
  4334. 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
  4335. };
  4336. static void iwl4965_init_band_reference(const struct iwl4965_priv *priv,
  4337. int band,
  4338. int *eeprom_ch_count,
  4339. const struct iwl4965_eeprom_channel
  4340. **eeprom_ch_info,
  4341. const u8 **eeprom_ch_index)
  4342. {
  4343. switch (band) {
  4344. case 1: /* 2.4GHz band */
  4345. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_1);
  4346. *eeprom_ch_info = priv->eeprom.band_1_channels;
  4347. *eeprom_ch_index = iwl4965_eeprom_band_1;
  4348. break;
  4349. case 2: /* 4.9GHz band */
  4350. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_2);
  4351. *eeprom_ch_info = priv->eeprom.band_2_channels;
  4352. *eeprom_ch_index = iwl4965_eeprom_band_2;
  4353. break;
  4354. case 3: /* 5.2GHz band */
  4355. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_3);
  4356. *eeprom_ch_info = priv->eeprom.band_3_channels;
  4357. *eeprom_ch_index = iwl4965_eeprom_band_3;
  4358. break;
  4359. case 4: /* 5.5GHz band */
  4360. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_4);
  4361. *eeprom_ch_info = priv->eeprom.band_4_channels;
  4362. *eeprom_ch_index = iwl4965_eeprom_band_4;
  4363. break;
  4364. case 5: /* 5.7GHz band */
  4365. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_5);
  4366. *eeprom_ch_info = priv->eeprom.band_5_channels;
  4367. *eeprom_ch_index = iwl4965_eeprom_band_5;
  4368. break;
  4369. case 6: /* 2.4GHz FAT channels */
  4370. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_6);
  4371. *eeprom_ch_info = priv->eeprom.band_24_channels;
  4372. *eeprom_ch_index = iwl4965_eeprom_band_6;
  4373. break;
  4374. case 7: /* 5 GHz FAT channels */
  4375. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_7);
  4376. *eeprom_ch_info = priv->eeprom.band_52_channels;
  4377. *eeprom_ch_index = iwl4965_eeprom_band_7;
  4378. break;
  4379. default:
  4380. BUG();
  4381. return;
  4382. }
  4383. }
  4384. /**
  4385. * iwl4965_get_channel_info - Find driver's private channel info
  4386. *
  4387. * Based on band and channel number.
  4388. */
  4389. const struct iwl4965_channel_info *iwl4965_get_channel_info(const struct iwl4965_priv *priv,
  4390. enum ieee80211_band band, u16 channel)
  4391. {
  4392. int i;
  4393. switch (band) {
  4394. case IEEE80211_BAND_5GHZ:
  4395. for (i = 14; i < priv->channel_count; i++) {
  4396. if (priv->channel_info[i].channel == channel)
  4397. return &priv->channel_info[i];
  4398. }
  4399. break;
  4400. case IEEE80211_BAND_2GHZ:
  4401. if (channel >= 1 && channel <= 14)
  4402. return &priv->channel_info[channel - 1];
  4403. break;
  4404. default:
  4405. BUG();
  4406. }
  4407. return NULL;
  4408. }
  4409. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  4410. ? # x " " : "")
  4411. /**
  4412. * iwl4965_init_channel_map - Set up driver's info for all possible channels
  4413. */
  4414. static int iwl4965_init_channel_map(struct iwl4965_priv *priv)
  4415. {
  4416. int eeprom_ch_count = 0;
  4417. const u8 *eeprom_ch_index = NULL;
  4418. const struct iwl4965_eeprom_channel *eeprom_ch_info = NULL;
  4419. int band, ch;
  4420. struct iwl4965_channel_info *ch_info;
  4421. if (priv->channel_count) {
  4422. IWL_DEBUG_INFO("Channel map already initialized.\n");
  4423. return 0;
  4424. }
  4425. if (priv->eeprom.version < 0x2f) {
  4426. IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
  4427. priv->eeprom.version);
  4428. return -EINVAL;
  4429. }
  4430. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  4431. priv->channel_count =
  4432. ARRAY_SIZE(iwl4965_eeprom_band_1) +
  4433. ARRAY_SIZE(iwl4965_eeprom_band_2) +
  4434. ARRAY_SIZE(iwl4965_eeprom_band_3) +
  4435. ARRAY_SIZE(iwl4965_eeprom_band_4) +
  4436. ARRAY_SIZE(iwl4965_eeprom_band_5);
  4437. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  4438. priv->channel_info = kzalloc(sizeof(struct iwl4965_channel_info) *
  4439. priv->channel_count, GFP_KERNEL);
  4440. if (!priv->channel_info) {
  4441. IWL_ERROR("Could not allocate channel_info\n");
  4442. priv->channel_count = 0;
  4443. return -ENOMEM;
  4444. }
  4445. ch_info = priv->channel_info;
  4446. /* Loop through the 5 EEPROM bands adding them in order to the
  4447. * channel map we maintain (that contains additional information than
  4448. * what just in the EEPROM) */
  4449. for (band = 1; band <= 5; band++) {
  4450. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4451. &eeprom_ch_info, &eeprom_ch_index);
  4452. /* Loop through each band adding each of the channels */
  4453. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4454. ch_info->channel = eeprom_ch_index[ch];
  4455. ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
  4456. IEEE80211_BAND_5GHZ;
  4457. /* permanently store EEPROM's channel regulatory flags
  4458. * and max power in channel info database. */
  4459. ch_info->eeprom = eeprom_ch_info[ch];
  4460. /* Copy the run-time flags so they are there even on
  4461. * invalid channels */
  4462. ch_info->flags = eeprom_ch_info[ch].flags;
  4463. if (!(is_channel_valid(ch_info))) {
  4464. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  4465. "No traffic\n",
  4466. ch_info->channel,
  4467. ch_info->flags,
  4468. is_channel_a_band(ch_info) ?
  4469. "5.2" : "2.4");
  4470. ch_info++;
  4471. continue;
  4472. }
  4473. /* Initialize regulatory-based run-time data */
  4474. ch_info->max_power_avg = ch_info->curr_txpow =
  4475. eeprom_ch_info[ch].max_power_avg;
  4476. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  4477. ch_info->min_power = 0;
  4478. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s%s(0x%02x"
  4479. " %ddBm): Ad-Hoc %ssupported\n",
  4480. ch_info->channel,
  4481. is_channel_a_band(ch_info) ?
  4482. "5.2" : "2.4",
  4483. CHECK_AND_PRINT(VALID),
  4484. CHECK_AND_PRINT(IBSS),
  4485. CHECK_AND_PRINT(ACTIVE),
  4486. CHECK_AND_PRINT(RADAR),
  4487. CHECK_AND_PRINT(WIDE),
  4488. CHECK_AND_PRINT(NARROW),
  4489. CHECK_AND_PRINT(DFS),
  4490. eeprom_ch_info[ch].flags,
  4491. eeprom_ch_info[ch].max_power_avg,
  4492. ((eeprom_ch_info[ch].
  4493. flags & EEPROM_CHANNEL_IBSS)
  4494. && !(eeprom_ch_info[ch].
  4495. flags & EEPROM_CHANNEL_RADAR))
  4496. ? "" : "not ");
  4497. /* Set the user_txpower_limit to the highest power
  4498. * supported by any channel */
  4499. if (eeprom_ch_info[ch].max_power_avg >
  4500. priv->user_txpower_limit)
  4501. priv->user_txpower_limit =
  4502. eeprom_ch_info[ch].max_power_avg;
  4503. ch_info++;
  4504. }
  4505. }
  4506. /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
  4507. for (band = 6; band <= 7; band++) {
  4508. enum ieee80211_band ieeeband;
  4509. u8 fat_extension_chan;
  4510. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4511. &eeprom_ch_info, &eeprom_ch_index);
  4512. /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
  4513. ieeeband = (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  4514. /* Loop through each band adding each of the channels */
  4515. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4516. if ((band == 6) &&
  4517. ((eeprom_ch_index[ch] == 5) ||
  4518. (eeprom_ch_index[ch] == 6) ||
  4519. (eeprom_ch_index[ch] == 7)))
  4520. fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
  4521. else
  4522. fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
  4523. /* Set up driver's info for lower half */
  4524. iwl4965_set_fat_chan_info(priv, ieeeband,
  4525. eeprom_ch_index[ch],
  4526. &(eeprom_ch_info[ch]),
  4527. fat_extension_chan);
  4528. /* Set up driver's info for upper half */
  4529. iwl4965_set_fat_chan_info(priv, ieeeband,
  4530. (eeprom_ch_index[ch] + 4),
  4531. &(eeprom_ch_info[ch]),
  4532. HT_IE_EXT_CHANNEL_BELOW);
  4533. }
  4534. }
  4535. return 0;
  4536. }
  4537. /*
  4538. * iwl4965_free_channel_map - undo allocations in iwl4965_init_channel_map
  4539. */
  4540. static void iwl4965_free_channel_map(struct iwl4965_priv *priv)
  4541. {
  4542. kfree(priv->channel_info);
  4543. priv->channel_count = 0;
  4544. }
  4545. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  4546. * sending probe req. This should be set long enough to hear probe responses
  4547. * from more than one AP. */
  4548. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  4549. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  4550. /* For faster active scanning, scan will move to the next channel if fewer than
  4551. * PLCP_QUIET_THRESH packets are heard on this channel within
  4552. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  4553. * time if it's a quiet channel (nothing responded to our probe, and there's
  4554. * no other traffic).
  4555. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  4556. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  4557. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  4558. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  4559. * Must be set longer than active dwell time.
  4560. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  4561. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  4562. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  4563. #define IWL_PASSIVE_DWELL_BASE (100)
  4564. #define IWL_CHANNEL_TUNE_TIME 5
  4565. static inline u16 iwl4965_get_active_dwell_time(struct iwl4965_priv *priv,
  4566. enum ieee80211_band band)
  4567. {
  4568. if (band == IEEE80211_BAND_5GHZ)
  4569. return IWL_ACTIVE_DWELL_TIME_52;
  4570. else
  4571. return IWL_ACTIVE_DWELL_TIME_24;
  4572. }
  4573. static u16 iwl4965_get_passive_dwell_time(struct iwl4965_priv *priv,
  4574. enum ieee80211_band band)
  4575. {
  4576. u16 active = iwl4965_get_active_dwell_time(priv, band);
  4577. u16 passive = (band != IEEE80211_BAND_5GHZ) ?
  4578. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  4579. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  4580. if (iwl4965_is_associated(priv)) {
  4581. /* If we're associated, we clamp the maximum passive
  4582. * dwell time to be 98% of the beacon interval (minus
  4583. * 2 * channel tune time) */
  4584. passive = priv->beacon_int;
  4585. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  4586. passive = IWL_PASSIVE_DWELL_BASE;
  4587. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  4588. }
  4589. if (passive <= active)
  4590. passive = active + 1;
  4591. return passive;
  4592. }
  4593. static int iwl4965_get_channels_for_scan(struct iwl4965_priv *priv,
  4594. enum ieee80211_band band,
  4595. u8 is_active, u8 direct_mask,
  4596. struct iwl4965_scan_channel *scan_ch)
  4597. {
  4598. const struct ieee80211_channel *channels = NULL;
  4599. const struct ieee80211_supported_band *sband;
  4600. const struct iwl4965_channel_info *ch_info;
  4601. u16 passive_dwell = 0;
  4602. u16 active_dwell = 0;
  4603. int added, i;
  4604. sband = iwl4965_get_hw_mode(priv, band);
  4605. if (!sband)
  4606. return 0;
  4607. channels = sband->channels;
  4608. active_dwell = iwl4965_get_active_dwell_time(priv, band);
  4609. passive_dwell = iwl4965_get_passive_dwell_time(priv, band);
  4610. for (i = 0, added = 0; i < sband->n_channels; i++) {
  4611. if (ieee80211_frequency_to_channel(channels[i].center_freq) ==
  4612. le16_to_cpu(priv->active_rxon.channel)) {
  4613. if (iwl4965_is_associated(priv)) {
  4614. IWL_DEBUG_SCAN
  4615. ("Skipping current channel %d\n",
  4616. le16_to_cpu(priv->active_rxon.channel));
  4617. continue;
  4618. }
  4619. } else if (priv->only_active_channel)
  4620. continue;
  4621. scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq);
  4622. ch_info = iwl4965_get_channel_info(priv, band,
  4623. scan_ch->channel);
  4624. if (!is_channel_valid(ch_info)) {
  4625. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4626. scan_ch->channel);
  4627. continue;
  4628. }
  4629. if (!is_active || is_channel_passive(ch_info) ||
  4630. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
  4631. scan_ch->type = 0; /* passive */
  4632. else
  4633. scan_ch->type = 1; /* active */
  4634. if (scan_ch->type & 1)
  4635. scan_ch->type |= (direct_mask << 1);
  4636. if (is_channel_narrow(ch_info))
  4637. scan_ch->type |= (1 << 7);
  4638. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4639. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4640. /* Set txpower levels to defaults */
  4641. scan_ch->tpc.dsp_atten = 110;
  4642. /* scan_pwr_info->tpc.dsp_atten; */
  4643. /*scan_pwr_info->tpc.tx_gain; */
  4644. if (band == IEEE80211_BAND_5GHZ)
  4645. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4646. else {
  4647. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4648. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4649. * power level:
  4650. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  4651. */
  4652. }
  4653. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4654. scan_ch->channel,
  4655. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4656. (scan_ch->type & 1) ?
  4657. active_dwell : passive_dwell);
  4658. scan_ch++;
  4659. added++;
  4660. }
  4661. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4662. return added;
  4663. }
  4664. static void iwl4965_init_hw_rates(struct iwl4965_priv *priv,
  4665. struct ieee80211_rate *rates)
  4666. {
  4667. int i;
  4668. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4669. rates[i].bitrate = iwl4965_rates[i].ieee * 5;
  4670. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  4671. rates[i].hw_value_short = i;
  4672. rates[i].flags = 0;
  4673. if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  4674. /*
  4675. * If CCK != 1M then set short preamble rate flag.
  4676. */
  4677. rates[i].flags |= (iwl4965_rates[i].plcp == 10) ?
  4678. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  4679. }
  4680. }
  4681. }
  4682. /**
  4683. * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4684. */
  4685. static int iwl4965_init_geos(struct iwl4965_priv *priv)
  4686. {
  4687. struct iwl4965_channel_info *ch;
  4688. struct ieee80211_supported_band *sband;
  4689. struct ieee80211_channel *channels;
  4690. struct ieee80211_channel *geo_ch;
  4691. struct ieee80211_rate *rates;
  4692. int i = 0;
  4693. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  4694. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  4695. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4696. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4697. return 0;
  4698. }
  4699. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4700. priv->channel_count, GFP_KERNEL);
  4701. if (!channels)
  4702. return -ENOMEM;
  4703. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
  4704. GFP_KERNEL);
  4705. if (!rates) {
  4706. kfree(channels);
  4707. return -ENOMEM;
  4708. }
  4709. /* 5.2GHz channels start after the 2.4GHz channels */
  4710. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4711. sband->channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
  4712. /* just OFDM */
  4713. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  4714. sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
  4715. iwl4965_init_ht_hw_capab(&sband->ht_info, IEEE80211_BAND_5GHZ);
  4716. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4717. sband->channels = channels;
  4718. /* OFDM & CCK */
  4719. sband->bitrates = rates;
  4720. sband->n_bitrates = IWL_RATE_COUNT;
  4721. iwl4965_init_ht_hw_capab(&sband->ht_info, IEEE80211_BAND_2GHZ);
  4722. priv->ieee_channels = channels;
  4723. priv->ieee_rates = rates;
  4724. iwl4965_init_hw_rates(priv, rates);
  4725. for (i = 0; i < priv->channel_count; i++) {
  4726. ch = &priv->channel_info[i];
  4727. /* FIXME: might be removed if scan is OK */
  4728. if (!is_channel_valid(ch))
  4729. continue;
  4730. if (is_channel_a_band(ch))
  4731. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4732. else
  4733. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4734. geo_ch = &sband->channels[sband->n_channels++];
  4735. geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
  4736. geo_ch->max_power = ch->max_power_avg;
  4737. geo_ch->max_antenna_gain = 0xff;
  4738. geo_ch->hw_value = ch->channel;
  4739. if (is_channel_valid(ch)) {
  4740. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  4741. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  4742. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  4743. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  4744. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4745. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  4746. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4747. priv->max_channel_txpower_limit =
  4748. ch->max_power_avg;
  4749. } else {
  4750. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  4751. }
  4752. /* Save flags for reg domain usage */
  4753. geo_ch->orig_flags = geo_ch->flags;
  4754. IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
  4755. ch->channel, geo_ch->center_freq,
  4756. is_channel_a_band(ch) ? "5.2" : "2.4",
  4757. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  4758. "restricted" : "valid",
  4759. geo_ch->flags);
  4760. }
  4761. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) && priv->is_abg) {
  4762. printk(KERN_INFO DRV_NAME
  4763. ": Incorrectly detected BG card as ABG. Please send "
  4764. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4765. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4766. priv->is_abg = 0;
  4767. }
  4768. printk(KERN_INFO DRV_NAME
  4769. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4770. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  4771. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  4772. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->bands[IEEE80211_BAND_2GHZ];
  4773. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->bands[IEEE80211_BAND_5GHZ];
  4774. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4775. return 0;
  4776. }
  4777. /*
  4778. * iwl4965_free_geos - undo allocations in iwl4965_init_geos
  4779. */
  4780. static void iwl4965_free_geos(struct iwl4965_priv *priv)
  4781. {
  4782. kfree(priv->ieee_channels);
  4783. kfree(priv->ieee_rates);
  4784. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4785. }
  4786. /******************************************************************************
  4787. *
  4788. * uCode download functions
  4789. *
  4790. ******************************************************************************/
  4791. static void iwl4965_dealloc_ucode_pci(struct iwl4965_priv *priv)
  4792. {
  4793. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  4794. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  4795. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  4796. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  4797. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  4798. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  4799. }
  4800. /**
  4801. * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
  4802. * looking at all data.
  4803. */
  4804. static int iwl4965_verify_inst_full(struct iwl4965_priv *priv, __le32 *image,
  4805. u32 len)
  4806. {
  4807. u32 val;
  4808. u32 save_len = len;
  4809. int rc = 0;
  4810. u32 errcnt;
  4811. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4812. rc = iwl4965_grab_nic_access(priv);
  4813. if (rc)
  4814. return rc;
  4815. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  4816. errcnt = 0;
  4817. for (; len > 0; len -= sizeof(u32), image++) {
  4818. /* read data comes through single port, auto-incr addr */
  4819. /* NOTE: Use the debugless read so we don't flood kernel log
  4820. * if IWL_DL_IO is set */
  4821. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4822. if (val != le32_to_cpu(*image)) {
  4823. IWL_ERROR("uCode INST section is invalid at "
  4824. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4825. save_len - len, val, le32_to_cpu(*image));
  4826. rc = -EIO;
  4827. errcnt++;
  4828. if (errcnt >= 20)
  4829. break;
  4830. }
  4831. }
  4832. iwl4965_release_nic_access(priv);
  4833. if (!errcnt)
  4834. IWL_DEBUG_INFO
  4835. ("ucode image in INSTRUCTION memory is good\n");
  4836. return rc;
  4837. }
  4838. /**
  4839. * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
  4840. * using sample data 100 bytes apart. If these sample points are good,
  4841. * it's a pretty good bet that everything between them is good, too.
  4842. */
  4843. static int iwl4965_verify_inst_sparse(struct iwl4965_priv *priv, __le32 *image, u32 len)
  4844. {
  4845. u32 val;
  4846. int rc = 0;
  4847. u32 errcnt = 0;
  4848. u32 i;
  4849. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4850. rc = iwl4965_grab_nic_access(priv);
  4851. if (rc)
  4852. return rc;
  4853. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  4854. /* read data comes through single port, auto-incr addr */
  4855. /* NOTE: Use the debugless read so we don't flood kernel log
  4856. * if IWL_DL_IO is set */
  4857. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  4858. i + RTC_INST_LOWER_BOUND);
  4859. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4860. if (val != le32_to_cpu(*image)) {
  4861. #if 0 /* Enable this if you want to see details */
  4862. IWL_ERROR("uCode INST section is invalid at "
  4863. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4864. i, val, *image);
  4865. #endif
  4866. rc = -EIO;
  4867. errcnt++;
  4868. if (errcnt >= 3)
  4869. break;
  4870. }
  4871. }
  4872. iwl4965_release_nic_access(priv);
  4873. return rc;
  4874. }
  4875. /**
  4876. * iwl4965_verify_ucode - determine which instruction image is in SRAM,
  4877. * and verify its contents
  4878. */
  4879. static int iwl4965_verify_ucode(struct iwl4965_priv *priv)
  4880. {
  4881. __le32 *image;
  4882. u32 len;
  4883. int rc = 0;
  4884. /* Try bootstrap */
  4885. image = (__le32 *)priv->ucode_boot.v_addr;
  4886. len = priv->ucode_boot.len;
  4887. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4888. if (rc == 0) {
  4889. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  4890. return 0;
  4891. }
  4892. /* Try initialize */
  4893. image = (__le32 *)priv->ucode_init.v_addr;
  4894. len = priv->ucode_init.len;
  4895. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4896. if (rc == 0) {
  4897. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  4898. return 0;
  4899. }
  4900. /* Try runtime/protocol */
  4901. image = (__le32 *)priv->ucode_code.v_addr;
  4902. len = priv->ucode_code.len;
  4903. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4904. if (rc == 0) {
  4905. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  4906. return 0;
  4907. }
  4908. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  4909. /* Since nothing seems to match, show first several data entries in
  4910. * instruction SRAM, so maybe visual inspection will give a clue.
  4911. * Selection of bootstrap image (vs. other images) is arbitrary. */
  4912. image = (__le32 *)priv->ucode_boot.v_addr;
  4913. len = priv->ucode_boot.len;
  4914. rc = iwl4965_verify_inst_full(priv, image, len);
  4915. return rc;
  4916. }
  4917. /* check contents of special bootstrap uCode SRAM */
  4918. static int iwl4965_verify_bsm(struct iwl4965_priv *priv)
  4919. {
  4920. __le32 *image = priv->ucode_boot.v_addr;
  4921. u32 len = priv->ucode_boot.len;
  4922. u32 reg;
  4923. u32 val;
  4924. IWL_DEBUG_INFO("Begin verify bsm\n");
  4925. /* verify BSM SRAM contents */
  4926. val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
  4927. for (reg = BSM_SRAM_LOWER_BOUND;
  4928. reg < BSM_SRAM_LOWER_BOUND + len;
  4929. reg += sizeof(u32), image ++) {
  4930. val = iwl4965_read_prph(priv, reg);
  4931. if (val != le32_to_cpu(*image)) {
  4932. IWL_ERROR("BSM uCode verification failed at "
  4933. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  4934. BSM_SRAM_LOWER_BOUND,
  4935. reg - BSM_SRAM_LOWER_BOUND, len,
  4936. val, le32_to_cpu(*image));
  4937. return -EIO;
  4938. }
  4939. }
  4940. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  4941. return 0;
  4942. }
  4943. /**
  4944. * iwl4965_load_bsm - Load bootstrap instructions
  4945. *
  4946. * BSM operation:
  4947. *
  4948. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  4949. * in special SRAM that does not power down during RFKILL. When powering back
  4950. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  4951. * the bootstrap program into the on-board processor, and starts it.
  4952. *
  4953. * The bootstrap program loads (via DMA) instructions and data for a new
  4954. * program from host DRAM locations indicated by the host driver in the
  4955. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  4956. * automatically.
  4957. *
  4958. * When initializing the NIC, the host driver points the BSM to the
  4959. * "initialize" uCode image. This uCode sets up some internal data, then
  4960. * notifies host via "initialize alive" that it is complete.
  4961. *
  4962. * The host then replaces the BSM_DRAM_* pointer values to point to the
  4963. * normal runtime uCode instructions and a backup uCode data cache buffer
  4964. * (filled initially with starting data values for the on-board processor),
  4965. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  4966. * which begins normal operation.
  4967. *
  4968. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  4969. * the backup data cache in DRAM before SRAM is powered down.
  4970. *
  4971. * When powering back up, the BSM loads the bootstrap program. This reloads
  4972. * the runtime uCode instructions and the backup data cache into SRAM,
  4973. * and re-launches the runtime uCode from where it left off.
  4974. */
  4975. static int iwl4965_load_bsm(struct iwl4965_priv *priv)
  4976. {
  4977. __le32 *image = priv->ucode_boot.v_addr;
  4978. u32 len = priv->ucode_boot.len;
  4979. dma_addr_t pinst;
  4980. dma_addr_t pdata;
  4981. u32 inst_len;
  4982. u32 data_len;
  4983. int rc;
  4984. int i;
  4985. u32 done;
  4986. u32 reg_offset;
  4987. IWL_DEBUG_INFO("Begin load bsm\n");
  4988. /* make sure bootstrap program is no larger than BSM's SRAM size */
  4989. if (len > IWL_MAX_BSM_SIZE)
  4990. return -EINVAL;
  4991. /* Tell bootstrap uCode where to find the "Initialize" uCode
  4992. * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
  4993. * NOTE: iwl4965_initialize_alive_start() will replace these values,
  4994. * after the "initialize" uCode has run, to point to
  4995. * runtime/protocol instructions and backup data cache. */
  4996. pinst = priv->ucode_init.p_addr >> 4;
  4997. pdata = priv->ucode_init_data.p_addr >> 4;
  4998. inst_len = priv->ucode_init.len;
  4999. data_len = priv->ucode_init_data.len;
  5000. rc = iwl4965_grab_nic_access(priv);
  5001. if (rc)
  5002. return rc;
  5003. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5004. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5005. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  5006. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  5007. /* Fill BSM memory with bootstrap instructions */
  5008. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  5009. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  5010. reg_offset += sizeof(u32), image++)
  5011. _iwl4965_write_prph(priv, reg_offset,
  5012. le32_to_cpu(*image));
  5013. rc = iwl4965_verify_bsm(priv);
  5014. if (rc) {
  5015. iwl4965_release_nic_access(priv);
  5016. return rc;
  5017. }
  5018. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  5019. iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
  5020. iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
  5021. RTC_INST_LOWER_BOUND);
  5022. iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  5023. /* Load bootstrap code into instruction SRAM now,
  5024. * to prepare to load "initialize" uCode */
  5025. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  5026. BSM_WR_CTRL_REG_BIT_START);
  5027. /* Wait for load of bootstrap uCode to finish */
  5028. for (i = 0; i < 100; i++) {
  5029. done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
  5030. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  5031. break;
  5032. udelay(10);
  5033. }
  5034. if (i < 100)
  5035. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  5036. else {
  5037. IWL_ERROR("BSM write did not complete!\n");
  5038. return -EIO;
  5039. }
  5040. /* Enable future boot loads whenever power management unit triggers it
  5041. * (e.g. when powering back up after power-save shutdown) */
  5042. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  5043. BSM_WR_CTRL_REG_BIT_START_EN);
  5044. iwl4965_release_nic_access(priv);
  5045. return 0;
  5046. }
  5047. static void iwl4965_nic_start(struct iwl4965_priv *priv)
  5048. {
  5049. /* Remove all resets to allow NIC to operate */
  5050. iwl4965_write32(priv, CSR_RESET, 0);
  5051. }
  5052. /**
  5053. * iwl4965_read_ucode - Read uCode images from disk file.
  5054. *
  5055. * Copy into buffers for card to fetch via bus-mastering
  5056. */
  5057. static int iwl4965_read_ucode(struct iwl4965_priv *priv)
  5058. {
  5059. struct iwl4965_ucode *ucode;
  5060. int ret;
  5061. const struct firmware *ucode_raw;
  5062. const char *name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode";
  5063. u8 *src;
  5064. size_t len;
  5065. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  5066. /* Ask kernel firmware_class module to get the boot firmware off disk.
  5067. * request_firmware() is synchronous, file is in memory on return. */
  5068. ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  5069. if (ret < 0) {
  5070. IWL_ERROR("%s firmware file req failed: Reason %d\n",
  5071. name, ret);
  5072. goto error;
  5073. }
  5074. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  5075. name, ucode_raw->size);
  5076. /* Make sure that we got at least our header! */
  5077. if (ucode_raw->size < sizeof(*ucode)) {
  5078. IWL_ERROR("File size way too small!\n");
  5079. ret = -EINVAL;
  5080. goto err_release;
  5081. }
  5082. /* Data from ucode file: header followed by uCode images */
  5083. ucode = (void *)ucode_raw->data;
  5084. ver = le32_to_cpu(ucode->ver);
  5085. inst_size = le32_to_cpu(ucode->inst_size);
  5086. data_size = le32_to_cpu(ucode->data_size);
  5087. init_size = le32_to_cpu(ucode->init_size);
  5088. init_data_size = le32_to_cpu(ucode->init_data_size);
  5089. boot_size = le32_to_cpu(ucode->boot_size);
  5090. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  5091. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  5092. inst_size);
  5093. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  5094. data_size);
  5095. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  5096. init_size);
  5097. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  5098. init_data_size);
  5099. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  5100. boot_size);
  5101. /* Verify size of file vs. image size info in file's header */
  5102. if (ucode_raw->size < sizeof(*ucode) +
  5103. inst_size + data_size + init_size +
  5104. init_data_size + boot_size) {
  5105. IWL_DEBUG_INFO("uCode file size %d too small\n",
  5106. (int)ucode_raw->size);
  5107. ret = -EINVAL;
  5108. goto err_release;
  5109. }
  5110. /* Verify that uCode images will fit in card's SRAM */
  5111. if (inst_size > IWL_MAX_INST_SIZE) {
  5112. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  5113. inst_size);
  5114. ret = -EINVAL;
  5115. goto err_release;
  5116. }
  5117. if (data_size > IWL_MAX_DATA_SIZE) {
  5118. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  5119. data_size);
  5120. ret = -EINVAL;
  5121. goto err_release;
  5122. }
  5123. if (init_size > IWL_MAX_INST_SIZE) {
  5124. IWL_DEBUG_INFO
  5125. ("uCode init instr len %d too large to fit in\n",
  5126. init_size);
  5127. ret = -EINVAL;
  5128. goto err_release;
  5129. }
  5130. if (init_data_size > IWL_MAX_DATA_SIZE) {
  5131. IWL_DEBUG_INFO
  5132. ("uCode init data len %d too large to fit in\n",
  5133. init_data_size);
  5134. ret = -EINVAL;
  5135. goto err_release;
  5136. }
  5137. if (boot_size > IWL_MAX_BSM_SIZE) {
  5138. IWL_DEBUG_INFO
  5139. ("uCode boot instr len %d too large to fit in\n",
  5140. boot_size);
  5141. ret = -EINVAL;
  5142. goto err_release;
  5143. }
  5144. /* Allocate ucode buffers for card's bus-master loading ... */
  5145. /* Runtime instructions and 2 copies of data:
  5146. * 1) unmodified from disk
  5147. * 2) backup cache for save/restore during power-downs */
  5148. priv->ucode_code.len = inst_size;
  5149. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  5150. priv->ucode_data.len = data_size;
  5151. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  5152. priv->ucode_data_backup.len = data_size;
  5153. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  5154. /* Initialization instructions and data */
  5155. if (init_size && init_data_size) {
  5156. priv->ucode_init.len = init_size;
  5157. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  5158. priv->ucode_init_data.len = init_data_size;
  5159. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  5160. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  5161. goto err_pci_alloc;
  5162. }
  5163. /* Bootstrap (instructions only, no data) */
  5164. if (boot_size) {
  5165. priv->ucode_boot.len = boot_size;
  5166. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  5167. if (!priv->ucode_boot.v_addr)
  5168. goto err_pci_alloc;
  5169. }
  5170. /* Copy images into buffers for card's bus-master reads ... */
  5171. /* Runtime instructions (first block of data in file) */
  5172. src = &ucode->data[0];
  5173. len = priv->ucode_code.len;
  5174. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  5175. memcpy(priv->ucode_code.v_addr, src, len);
  5176. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  5177. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  5178. /* Runtime data (2nd block)
  5179. * NOTE: Copy into backup buffer will be done in iwl4965_up() */
  5180. src = &ucode->data[inst_size];
  5181. len = priv->ucode_data.len;
  5182. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  5183. memcpy(priv->ucode_data.v_addr, src, len);
  5184. memcpy(priv->ucode_data_backup.v_addr, src, len);
  5185. /* Initialization instructions (3rd block) */
  5186. if (init_size) {
  5187. src = &ucode->data[inst_size + data_size];
  5188. len = priv->ucode_init.len;
  5189. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  5190. len);
  5191. memcpy(priv->ucode_init.v_addr, src, len);
  5192. }
  5193. /* Initialization data (4th block) */
  5194. if (init_data_size) {
  5195. src = &ucode->data[inst_size + data_size + init_size];
  5196. len = priv->ucode_init_data.len;
  5197. IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
  5198. len);
  5199. memcpy(priv->ucode_init_data.v_addr, src, len);
  5200. }
  5201. /* Bootstrap instructions (5th block) */
  5202. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  5203. len = priv->ucode_boot.len;
  5204. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
  5205. memcpy(priv->ucode_boot.v_addr, src, len);
  5206. /* We have our copies now, allow OS release its copies */
  5207. release_firmware(ucode_raw);
  5208. return 0;
  5209. err_pci_alloc:
  5210. IWL_ERROR("failed to allocate pci memory\n");
  5211. ret = -ENOMEM;
  5212. iwl4965_dealloc_ucode_pci(priv);
  5213. err_release:
  5214. release_firmware(ucode_raw);
  5215. error:
  5216. return ret;
  5217. }
  5218. /**
  5219. * iwl4965_set_ucode_ptrs - Set uCode address location
  5220. *
  5221. * Tell initialization uCode where to find runtime uCode.
  5222. *
  5223. * BSM registers initially contain pointers to initialization uCode.
  5224. * We need to replace them to load runtime uCode inst and data,
  5225. * and to save runtime data when powering down.
  5226. */
  5227. static int iwl4965_set_ucode_ptrs(struct iwl4965_priv *priv)
  5228. {
  5229. dma_addr_t pinst;
  5230. dma_addr_t pdata;
  5231. int rc = 0;
  5232. unsigned long flags;
  5233. /* bits 35:4 for 4965 */
  5234. pinst = priv->ucode_code.p_addr >> 4;
  5235. pdata = priv->ucode_data_backup.p_addr >> 4;
  5236. spin_lock_irqsave(&priv->lock, flags);
  5237. rc = iwl4965_grab_nic_access(priv);
  5238. if (rc) {
  5239. spin_unlock_irqrestore(&priv->lock, flags);
  5240. return rc;
  5241. }
  5242. /* Tell bootstrap uCode where to find image to load */
  5243. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5244. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5245. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  5246. priv->ucode_data.len);
  5247. /* Inst bytecount must be last to set up, bit 31 signals uCode
  5248. * that all new ptr/size info is in place */
  5249. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  5250. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  5251. iwl4965_release_nic_access(priv);
  5252. spin_unlock_irqrestore(&priv->lock, flags);
  5253. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  5254. return rc;
  5255. }
  5256. /**
  5257. * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
  5258. *
  5259. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  5260. *
  5261. * The 4965 "initialize" ALIVE reply contains calibration data for:
  5262. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  5263. * (3945 does not contain this data).
  5264. *
  5265. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  5266. */
  5267. static void iwl4965_init_alive_start(struct iwl4965_priv *priv)
  5268. {
  5269. /* Check alive response for "valid" sign from uCode */
  5270. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  5271. /* We had an error bringing up the hardware, so take it
  5272. * all the way back down so we can try again */
  5273. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  5274. goto restart;
  5275. }
  5276. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  5277. * This is a paranoid check, because we would not have gotten the
  5278. * "initialize" alive if code weren't properly loaded. */
  5279. if (iwl4965_verify_ucode(priv)) {
  5280. /* Runtime instruction load was bad;
  5281. * take it all the way back down so we can try again */
  5282. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  5283. goto restart;
  5284. }
  5285. /* Calculate temperature */
  5286. priv->temperature = iwl4965_get_temperature(priv);
  5287. /* Send pointers to protocol/runtime uCode image ... init code will
  5288. * load and launch runtime uCode, which will send us another "Alive"
  5289. * notification. */
  5290. IWL_DEBUG_INFO("Initialization Alive received.\n");
  5291. if (iwl4965_set_ucode_ptrs(priv)) {
  5292. /* Runtime instruction load won't happen;
  5293. * take it all the way back down so we can try again */
  5294. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  5295. goto restart;
  5296. }
  5297. return;
  5298. restart:
  5299. queue_work(priv->workqueue, &priv->restart);
  5300. }
  5301. /**
  5302. * iwl4965_alive_start - called after REPLY_ALIVE notification received
  5303. * from protocol/runtime uCode (initialization uCode's
  5304. * Alive gets handled by iwl4965_init_alive_start()).
  5305. */
  5306. static void iwl4965_alive_start(struct iwl4965_priv *priv)
  5307. {
  5308. int rc = 0;
  5309. IWL_DEBUG_INFO("Runtime Alive received.\n");
  5310. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  5311. /* We had an error bringing up the hardware, so take it
  5312. * all the way back down so we can try again */
  5313. IWL_DEBUG_INFO("Alive failed.\n");
  5314. goto restart;
  5315. }
  5316. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  5317. * This is a paranoid check, because we would not have gotten the
  5318. * "runtime" alive if code weren't properly loaded. */
  5319. if (iwl4965_verify_ucode(priv)) {
  5320. /* Runtime instruction load was bad;
  5321. * take it all the way back down so we can try again */
  5322. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  5323. goto restart;
  5324. }
  5325. iwl4965_clear_stations_table(priv);
  5326. rc = iwl4965_alive_notify(priv);
  5327. if (rc) {
  5328. IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
  5329. rc);
  5330. goto restart;
  5331. }
  5332. /* After the ALIVE response, we can send host commands to 4965 uCode */
  5333. set_bit(STATUS_ALIVE, &priv->status);
  5334. /* Clear out the uCode error bit if it is set */
  5335. clear_bit(STATUS_FW_ERROR, &priv->status);
  5336. if (iwl4965_is_rfkill(priv))
  5337. return;
  5338. ieee80211_start_queues(priv->hw);
  5339. priv->active_rate = priv->rates_mask;
  5340. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  5341. iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  5342. if (iwl4965_is_associated(priv)) {
  5343. struct iwl4965_rxon_cmd *active_rxon =
  5344. (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
  5345. memcpy(&priv->staging_rxon, &priv->active_rxon,
  5346. sizeof(priv->staging_rxon));
  5347. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5348. } else {
  5349. /* Initialize our rx_config data */
  5350. iwl4965_connection_init_rx_config(priv);
  5351. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  5352. }
  5353. /* Configure Bluetooth device coexistence support */
  5354. iwl4965_send_bt_config(priv);
  5355. /* Configure the adapter for unassociated operation */
  5356. iwl4965_commit_rxon(priv);
  5357. /* At this point, the NIC is initialized and operational */
  5358. priv->notif_missed_beacons = 0;
  5359. set_bit(STATUS_READY, &priv->status);
  5360. iwl4965_rf_kill_ct_config(priv);
  5361. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  5362. wake_up_interruptible(&priv->wait_command_queue);
  5363. if (priv->error_recovering)
  5364. iwl4965_error_recovery(priv);
  5365. return;
  5366. restart:
  5367. queue_work(priv->workqueue, &priv->restart);
  5368. }
  5369. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv);
  5370. static void __iwl4965_down(struct iwl4965_priv *priv)
  5371. {
  5372. unsigned long flags;
  5373. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  5374. struct ieee80211_conf *conf = NULL;
  5375. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  5376. conf = ieee80211_get_hw_conf(priv->hw);
  5377. if (!exit_pending)
  5378. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5379. iwl4965_clear_stations_table(priv);
  5380. /* Unblock any waiting calls */
  5381. wake_up_interruptible_all(&priv->wait_command_queue);
  5382. /* Wipe out the EXIT_PENDING status bit if we are not actually
  5383. * exiting the module */
  5384. if (!exit_pending)
  5385. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  5386. /* stop and reset the on-board processor */
  5387. iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  5388. /* tell the device to stop sending interrupts */
  5389. iwl4965_disable_interrupts(priv);
  5390. if (priv->mac80211_registered)
  5391. ieee80211_stop_queues(priv->hw);
  5392. /* If we have not previously called iwl4965_init() then
  5393. * clear all bits but the RF Kill and SUSPEND bits and return */
  5394. if (!iwl4965_is_init(priv)) {
  5395. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5396. STATUS_RF_KILL_HW |
  5397. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5398. STATUS_RF_KILL_SW |
  5399. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  5400. STATUS_GEO_CONFIGURED |
  5401. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5402. STATUS_IN_SUSPEND;
  5403. goto exit;
  5404. }
  5405. /* ...otherwise clear out all the status bits but the RF Kill and
  5406. * SUSPEND bits and continue taking the NIC down. */
  5407. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5408. STATUS_RF_KILL_HW |
  5409. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5410. STATUS_RF_KILL_SW |
  5411. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  5412. STATUS_GEO_CONFIGURED |
  5413. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5414. STATUS_IN_SUSPEND |
  5415. test_bit(STATUS_FW_ERROR, &priv->status) <<
  5416. STATUS_FW_ERROR;
  5417. spin_lock_irqsave(&priv->lock, flags);
  5418. iwl4965_clear_bit(priv, CSR_GP_CNTRL,
  5419. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  5420. spin_unlock_irqrestore(&priv->lock, flags);
  5421. iwl4965_hw_txq_ctx_stop(priv);
  5422. iwl4965_hw_rxq_stop(priv);
  5423. spin_lock_irqsave(&priv->lock, flags);
  5424. if (!iwl4965_grab_nic_access(priv)) {
  5425. iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
  5426. APMG_CLK_VAL_DMA_CLK_RQT);
  5427. iwl4965_release_nic_access(priv);
  5428. }
  5429. spin_unlock_irqrestore(&priv->lock, flags);
  5430. udelay(5);
  5431. iwl4965_hw_nic_stop_master(priv);
  5432. iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  5433. iwl4965_hw_nic_reset(priv);
  5434. exit:
  5435. memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
  5436. if (priv->ibss_beacon)
  5437. dev_kfree_skb(priv->ibss_beacon);
  5438. priv->ibss_beacon = NULL;
  5439. /* clear out any free frames */
  5440. iwl4965_clear_free_frames(priv);
  5441. }
  5442. static void iwl4965_down(struct iwl4965_priv *priv)
  5443. {
  5444. mutex_lock(&priv->mutex);
  5445. __iwl4965_down(priv);
  5446. mutex_unlock(&priv->mutex);
  5447. iwl4965_cancel_deferred_work(priv);
  5448. }
  5449. #define MAX_HW_RESTARTS 5
  5450. static int __iwl4965_up(struct iwl4965_priv *priv)
  5451. {
  5452. int rc, i;
  5453. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5454. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  5455. return -EIO;
  5456. }
  5457. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  5458. IWL_WARNING("Radio disabled by SW RF kill (module "
  5459. "parameter)\n");
  5460. return -ENODEV;
  5461. }
  5462. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  5463. IWL_ERROR("ucode not available for device bringup\n");
  5464. return -EIO;
  5465. }
  5466. /* If platform's RF_KILL switch is NOT set to KILL */
  5467. if (iwl4965_read32(priv, CSR_GP_CNTRL) &
  5468. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  5469. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  5470. else {
  5471. set_bit(STATUS_RF_KILL_HW, &priv->status);
  5472. if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
  5473. IWL_WARNING("Radio disabled by HW RF Kill switch\n");
  5474. return -ENODEV;
  5475. }
  5476. }
  5477. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5478. rc = iwl4965_hw_nic_init(priv);
  5479. if (rc) {
  5480. IWL_ERROR("Unable to int nic\n");
  5481. return rc;
  5482. }
  5483. /* make sure rfkill handshake bits are cleared */
  5484. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5485. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  5486. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  5487. /* clear (again), then enable host interrupts */
  5488. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5489. iwl4965_enable_interrupts(priv);
  5490. /* really make sure rfkill handshake bits are cleared */
  5491. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5492. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5493. /* Copy original ucode data image from disk into backup cache.
  5494. * This will be used to initialize the on-board processor's
  5495. * data SRAM for a clean start when the runtime program first loads. */
  5496. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  5497. priv->ucode_data.len);
  5498. /* We return success when we resume from suspend and rf_kill is on. */
  5499. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  5500. return 0;
  5501. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  5502. iwl4965_clear_stations_table(priv);
  5503. /* load bootstrap state machine,
  5504. * load bootstrap program into processor's memory,
  5505. * prepare to load the "initialize" uCode */
  5506. rc = iwl4965_load_bsm(priv);
  5507. if (rc) {
  5508. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  5509. continue;
  5510. }
  5511. /* start card; "initialize" will load runtime ucode */
  5512. iwl4965_nic_start(priv);
  5513. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  5514. return 0;
  5515. }
  5516. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5517. __iwl4965_down(priv);
  5518. /* tried to restart and config the device for as long as our
  5519. * patience could withstand */
  5520. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  5521. return -EIO;
  5522. }
  5523. /*****************************************************************************
  5524. *
  5525. * Workqueue callbacks
  5526. *
  5527. *****************************************************************************/
  5528. static void iwl4965_bg_init_alive_start(struct work_struct *data)
  5529. {
  5530. struct iwl4965_priv *priv =
  5531. container_of(data, struct iwl4965_priv, init_alive_start.work);
  5532. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5533. return;
  5534. mutex_lock(&priv->mutex);
  5535. iwl4965_init_alive_start(priv);
  5536. mutex_unlock(&priv->mutex);
  5537. }
  5538. static void iwl4965_bg_alive_start(struct work_struct *data)
  5539. {
  5540. struct iwl4965_priv *priv =
  5541. container_of(data, struct iwl4965_priv, alive_start.work);
  5542. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5543. return;
  5544. mutex_lock(&priv->mutex);
  5545. iwl4965_alive_start(priv);
  5546. mutex_unlock(&priv->mutex);
  5547. }
  5548. static void iwl4965_bg_rf_kill(struct work_struct *work)
  5549. {
  5550. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, rf_kill);
  5551. wake_up_interruptible(&priv->wait_command_queue);
  5552. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5553. return;
  5554. mutex_lock(&priv->mutex);
  5555. if (!iwl4965_is_rfkill(priv)) {
  5556. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  5557. "HW and/or SW RF Kill no longer active, restarting "
  5558. "device\n");
  5559. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5560. queue_work(priv->workqueue, &priv->restart);
  5561. } else {
  5562. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  5563. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  5564. "disabled by SW switch\n");
  5565. else
  5566. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  5567. "Kill switch must be turned off for "
  5568. "wireless networking to work.\n");
  5569. }
  5570. mutex_unlock(&priv->mutex);
  5571. }
  5572. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  5573. static void iwl4965_bg_scan_check(struct work_struct *data)
  5574. {
  5575. struct iwl4965_priv *priv =
  5576. container_of(data, struct iwl4965_priv, scan_check.work);
  5577. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5578. return;
  5579. mutex_lock(&priv->mutex);
  5580. if (test_bit(STATUS_SCANNING, &priv->status) ||
  5581. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5582. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  5583. "Scan completion watchdog resetting adapter (%dms)\n",
  5584. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  5585. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5586. iwl4965_send_scan_abort(priv);
  5587. }
  5588. mutex_unlock(&priv->mutex);
  5589. }
  5590. static void iwl4965_bg_request_scan(struct work_struct *data)
  5591. {
  5592. struct iwl4965_priv *priv =
  5593. container_of(data, struct iwl4965_priv, request_scan);
  5594. struct iwl4965_host_cmd cmd = {
  5595. .id = REPLY_SCAN_CMD,
  5596. .len = sizeof(struct iwl4965_scan_cmd),
  5597. .meta.flags = CMD_SIZE_HUGE,
  5598. };
  5599. int rc = 0;
  5600. struct iwl4965_scan_cmd *scan;
  5601. struct ieee80211_conf *conf = NULL;
  5602. u16 cmd_len;
  5603. enum ieee80211_band band;
  5604. u8 direct_mask;
  5605. conf = ieee80211_get_hw_conf(priv->hw);
  5606. mutex_lock(&priv->mutex);
  5607. if (!iwl4965_is_ready(priv)) {
  5608. IWL_WARNING("request scan called when driver not ready.\n");
  5609. goto done;
  5610. }
  5611. /* Make sure the scan wasn't cancelled before this queued work
  5612. * was given the chance to run... */
  5613. if (!test_bit(STATUS_SCANNING, &priv->status))
  5614. goto done;
  5615. /* This should never be called or scheduled if there is currently
  5616. * a scan active in the hardware. */
  5617. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5618. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5619. "Ignoring second request.\n");
  5620. rc = -EIO;
  5621. goto done;
  5622. }
  5623. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5624. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5625. goto done;
  5626. }
  5627. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5628. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5629. goto done;
  5630. }
  5631. if (iwl4965_is_rfkill(priv)) {
  5632. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5633. goto done;
  5634. }
  5635. if (!test_bit(STATUS_READY, &priv->status)) {
  5636. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5637. goto done;
  5638. }
  5639. if (!priv->scan_bands) {
  5640. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5641. goto done;
  5642. }
  5643. if (!priv->scan) {
  5644. priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
  5645. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5646. if (!priv->scan) {
  5647. rc = -ENOMEM;
  5648. goto done;
  5649. }
  5650. }
  5651. scan = priv->scan;
  5652. memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5653. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5654. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5655. if (iwl4965_is_associated(priv)) {
  5656. u16 interval = 0;
  5657. u32 extra;
  5658. u32 suspend_time = 100;
  5659. u32 scan_suspend_time = 100;
  5660. unsigned long flags;
  5661. IWL_DEBUG_INFO("Scanning while associated...\n");
  5662. spin_lock_irqsave(&priv->lock, flags);
  5663. interval = priv->beacon_int;
  5664. spin_unlock_irqrestore(&priv->lock, flags);
  5665. scan->suspend_time = 0;
  5666. scan->max_out_time = cpu_to_le32(200 * 1024);
  5667. if (!interval)
  5668. interval = suspend_time;
  5669. extra = (suspend_time / interval) << 22;
  5670. scan_suspend_time = (extra |
  5671. ((suspend_time % interval) * 1024));
  5672. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5673. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5674. scan_suspend_time, interval);
  5675. }
  5676. /* We should add the ability for user to lock to PASSIVE ONLY */
  5677. if (priv->one_direct_scan) {
  5678. IWL_DEBUG_SCAN
  5679. ("Kicking off one direct scan for '%s'\n",
  5680. iwl4965_escape_essid(priv->direct_ssid,
  5681. priv->direct_ssid_len));
  5682. scan->direct_scan[0].id = WLAN_EID_SSID;
  5683. scan->direct_scan[0].len = priv->direct_ssid_len;
  5684. memcpy(scan->direct_scan[0].ssid,
  5685. priv->direct_ssid, priv->direct_ssid_len);
  5686. direct_mask = 1;
  5687. } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
  5688. scan->direct_scan[0].id = WLAN_EID_SSID;
  5689. scan->direct_scan[0].len = priv->essid_len;
  5690. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5691. direct_mask = 1;
  5692. } else
  5693. direct_mask = 0;
  5694. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5695. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5696. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5697. switch (priv->scan_bands) {
  5698. case 2:
  5699. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5700. scan->tx_cmd.rate_n_flags =
  5701. iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
  5702. RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
  5703. scan->good_CRC_th = 0;
  5704. band = IEEE80211_BAND_2GHZ;
  5705. break;
  5706. case 1:
  5707. scan->tx_cmd.rate_n_flags =
  5708. iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
  5709. RATE_MCS_ANT_B_MSK);
  5710. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5711. band = IEEE80211_BAND_5GHZ;
  5712. break;
  5713. default:
  5714. IWL_WARNING("Invalid scan band count\n");
  5715. goto done;
  5716. }
  5717. /* We don't build a direct scan probe request; the uCode will do
  5718. * that based on the direct_mask added to each channel entry */
  5719. cmd_len = iwl4965_fill_probe_req(priv, band,
  5720. (struct ieee80211_mgmt *)scan->data,
  5721. IWL_MAX_SCAN_SIZE - sizeof(*scan), 0);
  5722. scan->tx_cmd.len = cpu_to_le16(cmd_len);
  5723. /* select Rx chains */
  5724. /* Force use of chains B and C (0x6) for scan Rx.
  5725. * Avoid A (0x1) because of its off-channel reception on A-band.
  5726. * MIMO is not used here, but value is required to make uCode happy. */
  5727. scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
  5728. cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
  5729. (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
  5730. (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
  5731. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5732. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5733. if (direct_mask)
  5734. IWL_DEBUG_SCAN
  5735. ("Initiating direct scan for %s.\n",
  5736. iwl4965_escape_essid(priv->essid, priv->essid_len));
  5737. else
  5738. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5739. scan->channel_count =
  5740. iwl4965_get_channels_for_scan(
  5741. priv, band, 1, /* active */
  5742. direct_mask,
  5743. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5744. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5745. scan->channel_count * sizeof(struct iwl4965_scan_channel);
  5746. cmd.data = scan;
  5747. scan->len = cpu_to_le16(cmd.len);
  5748. set_bit(STATUS_SCAN_HW, &priv->status);
  5749. rc = iwl4965_send_cmd_sync(priv, &cmd);
  5750. if (rc)
  5751. goto done;
  5752. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5753. IWL_SCAN_CHECK_WATCHDOG);
  5754. mutex_unlock(&priv->mutex);
  5755. return;
  5756. done:
  5757. /* inform mac80211 scan aborted */
  5758. queue_work(priv->workqueue, &priv->scan_completed);
  5759. mutex_unlock(&priv->mutex);
  5760. }
  5761. static void iwl4965_bg_up(struct work_struct *data)
  5762. {
  5763. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, up);
  5764. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5765. return;
  5766. mutex_lock(&priv->mutex);
  5767. __iwl4965_up(priv);
  5768. mutex_unlock(&priv->mutex);
  5769. }
  5770. static void iwl4965_bg_restart(struct work_struct *data)
  5771. {
  5772. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, restart);
  5773. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5774. return;
  5775. iwl4965_down(priv);
  5776. queue_work(priv->workqueue, &priv->up);
  5777. }
  5778. static void iwl4965_bg_rx_replenish(struct work_struct *data)
  5779. {
  5780. struct iwl4965_priv *priv =
  5781. container_of(data, struct iwl4965_priv, rx_replenish);
  5782. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5783. return;
  5784. mutex_lock(&priv->mutex);
  5785. iwl4965_rx_replenish(priv);
  5786. mutex_unlock(&priv->mutex);
  5787. }
  5788. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  5789. static void iwl4965_bg_post_associate(struct work_struct *data)
  5790. {
  5791. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv,
  5792. post_associate.work);
  5793. int rc = 0;
  5794. struct ieee80211_conf *conf = NULL;
  5795. DECLARE_MAC_BUF(mac);
  5796. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5797. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  5798. return;
  5799. }
  5800. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  5801. priv->assoc_id,
  5802. print_mac(mac, priv->active_rxon.bssid_addr));
  5803. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5804. return;
  5805. mutex_lock(&priv->mutex);
  5806. if (!priv->vif || !priv->is_open) {
  5807. mutex_unlock(&priv->mutex);
  5808. return;
  5809. }
  5810. iwl4965_scan_cancel_timeout(priv, 200);
  5811. conf = ieee80211_get_hw_conf(priv->hw);
  5812. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5813. iwl4965_commit_rxon(priv);
  5814. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  5815. iwl4965_setup_rxon_timing(priv);
  5816. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5817. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5818. if (rc)
  5819. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5820. "Attempting to continue.\n");
  5821. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5822. #ifdef CONFIG_IWL4965_HT
  5823. if (priv->current_ht_config.is_ht)
  5824. iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
  5825. #endif /* CONFIG_IWL4965_HT*/
  5826. iwl4965_set_rxon_chain(priv);
  5827. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5828. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  5829. priv->assoc_id, priv->beacon_int);
  5830. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5831. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5832. else
  5833. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5834. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5835. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5836. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  5837. else
  5838. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5839. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5840. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5841. }
  5842. iwl4965_commit_rxon(priv);
  5843. switch (priv->iw_mode) {
  5844. case IEEE80211_IF_TYPE_STA:
  5845. iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
  5846. break;
  5847. case IEEE80211_IF_TYPE_IBSS:
  5848. /* clear out the station table */
  5849. iwl4965_clear_stations_table(priv);
  5850. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  5851. iwl4965_rxon_add_station(priv, priv->bssid, 0);
  5852. iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
  5853. iwl4965_send_beacon_cmd(priv);
  5854. break;
  5855. default:
  5856. IWL_ERROR("%s Should not be called in %d mode\n",
  5857. __FUNCTION__, priv->iw_mode);
  5858. break;
  5859. }
  5860. iwl4965_sequence_reset(priv);
  5861. #ifdef CONFIG_IWL4965_SENSITIVITY
  5862. /* Enable Rx differential gain and sensitivity calibrations */
  5863. iwl4965_chain_noise_reset(priv);
  5864. priv->start_calib = 1;
  5865. #endif /* CONFIG_IWL4965_SENSITIVITY */
  5866. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5867. priv->assoc_station_added = 1;
  5868. iwl4965_activate_qos(priv, 0);
  5869. /* we have just associated, don't start scan too early */
  5870. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  5871. mutex_unlock(&priv->mutex);
  5872. }
  5873. static void iwl4965_bg_abort_scan(struct work_struct *work)
  5874. {
  5875. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, abort_scan);
  5876. if (!iwl4965_is_ready(priv))
  5877. return;
  5878. mutex_lock(&priv->mutex);
  5879. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  5880. iwl4965_send_scan_abort(priv);
  5881. mutex_unlock(&priv->mutex);
  5882. }
  5883. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
  5884. static void iwl4965_bg_scan_completed(struct work_struct *work)
  5885. {
  5886. struct iwl4965_priv *priv =
  5887. container_of(work, struct iwl4965_priv, scan_completed);
  5888. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  5889. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5890. return;
  5891. if (test_bit(STATUS_CONF_PENDING, &priv->status))
  5892. iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
  5893. ieee80211_scan_completed(priv->hw);
  5894. /* Since setting the TXPOWER may have been deferred while
  5895. * performing the scan, fire one off */
  5896. mutex_lock(&priv->mutex);
  5897. iwl4965_hw_reg_send_txpower(priv);
  5898. mutex_unlock(&priv->mutex);
  5899. }
  5900. /*****************************************************************************
  5901. *
  5902. * mac80211 entry point functions
  5903. *
  5904. *****************************************************************************/
  5905. #define UCODE_READY_TIMEOUT (2 * HZ)
  5906. static int iwl4965_mac_start(struct ieee80211_hw *hw)
  5907. {
  5908. struct iwl4965_priv *priv = hw->priv;
  5909. int ret;
  5910. IWL_DEBUG_MAC80211("enter\n");
  5911. if (pci_enable_device(priv->pci_dev)) {
  5912. IWL_ERROR("Fail to pci_enable_device\n");
  5913. return -ENODEV;
  5914. }
  5915. pci_restore_state(priv->pci_dev);
  5916. pci_enable_msi(priv->pci_dev);
  5917. ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
  5918. DRV_NAME, priv);
  5919. if (ret) {
  5920. IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
  5921. goto out_disable_msi;
  5922. }
  5923. /* we should be verifying the device is ready to be opened */
  5924. mutex_lock(&priv->mutex);
  5925. memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
  5926. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  5927. * ucode filename and max sizes are card-specific. */
  5928. if (!priv->ucode_code.len) {
  5929. ret = iwl4965_read_ucode(priv);
  5930. if (ret) {
  5931. IWL_ERROR("Could not read microcode: %d\n", ret);
  5932. mutex_unlock(&priv->mutex);
  5933. goto out_release_irq;
  5934. }
  5935. }
  5936. ret = __iwl4965_up(priv);
  5937. mutex_unlock(&priv->mutex);
  5938. if (ret)
  5939. goto out_release_irq;
  5940. IWL_DEBUG_INFO("Start UP work done.\n");
  5941. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  5942. return 0;
  5943. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  5944. * mac80211 will not be run successfully. */
  5945. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  5946. test_bit(STATUS_READY, &priv->status),
  5947. UCODE_READY_TIMEOUT);
  5948. if (!ret) {
  5949. if (!test_bit(STATUS_READY, &priv->status)) {
  5950. IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
  5951. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  5952. ret = -ETIMEDOUT;
  5953. goto out_release_irq;
  5954. }
  5955. }
  5956. priv->is_open = 1;
  5957. IWL_DEBUG_MAC80211("leave\n");
  5958. return 0;
  5959. out_release_irq:
  5960. free_irq(priv->pci_dev->irq, priv);
  5961. out_disable_msi:
  5962. pci_disable_msi(priv->pci_dev);
  5963. pci_disable_device(priv->pci_dev);
  5964. priv->is_open = 0;
  5965. IWL_DEBUG_MAC80211("leave - failed\n");
  5966. return ret;
  5967. }
  5968. static void iwl4965_mac_stop(struct ieee80211_hw *hw)
  5969. {
  5970. struct iwl4965_priv *priv = hw->priv;
  5971. IWL_DEBUG_MAC80211("enter\n");
  5972. if (!priv->is_open) {
  5973. IWL_DEBUG_MAC80211("leave - skip\n");
  5974. return;
  5975. }
  5976. priv->is_open = 0;
  5977. if (iwl4965_is_ready_rf(priv)) {
  5978. /* stop mac, cancel any scan request and clear
  5979. * RXON_FILTER_ASSOC_MSK BIT
  5980. */
  5981. mutex_lock(&priv->mutex);
  5982. iwl4965_scan_cancel_timeout(priv, 100);
  5983. cancel_delayed_work(&priv->post_associate);
  5984. mutex_unlock(&priv->mutex);
  5985. }
  5986. iwl4965_down(priv);
  5987. flush_workqueue(priv->workqueue);
  5988. free_irq(priv->pci_dev->irq, priv);
  5989. pci_disable_msi(priv->pci_dev);
  5990. pci_save_state(priv->pci_dev);
  5991. pci_disable_device(priv->pci_dev);
  5992. IWL_DEBUG_MAC80211("leave\n");
  5993. }
  5994. static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  5995. struct ieee80211_tx_control *ctl)
  5996. {
  5997. struct iwl4965_priv *priv = hw->priv;
  5998. IWL_DEBUG_MAC80211("enter\n");
  5999. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  6000. IWL_DEBUG_MAC80211("leave - monitor\n");
  6001. return -1;
  6002. }
  6003. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  6004. ctl->tx_rate->bitrate);
  6005. if (iwl4965_tx_skb(priv, skb, ctl))
  6006. dev_kfree_skb_any(skb);
  6007. IWL_DEBUG_MAC80211("leave\n");
  6008. return 0;
  6009. }
  6010. static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
  6011. struct ieee80211_if_init_conf *conf)
  6012. {
  6013. struct iwl4965_priv *priv = hw->priv;
  6014. unsigned long flags;
  6015. DECLARE_MAC_BUF(mac);
  6016. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  6017. if (priv->vif) {
  6018. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  6019. return -EOPNOTSUPP;
  6020. }
  6021. spin_lock_irqsave(&priv->lock, flags);
  6022. priv->vif = conf->vif;
  6023. spin_unlock_irqrestore(&priv->lock, flags);
  6024. mutex_lock(&priv->mutex);
  6025. if (conf->mac_addr) {
  6026. IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
  6027. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  6028. }
  6029. if (iwl4965_is_ready(priv))
  6030. iwl4965_set_mode(priv, conf->type);
  6031. mutex_unlock(&priv->mutex);
  6032. IWL_DEBUG_MAC80211("leave\n");
  6033. return 0;
  6034. }
  6035. /**
  6036. * iwl4965_mac_config - mac80211 config callback
  6037. *
  6038. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  6039. * be set inappropriately and the driver currently sets the hardware up to
  6040. * use it whenever needed.
  6041. */
  6042. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  6043. {
  6044. struct iwl4965_priv *priv = hw->priv;
  6045. const struct iwl4965_channel_info *ch_info;
  6046. unsigned long flags;
  6047. int ret = 0;
  6048. mutex_lock(&priv->mutex);
  6049. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
  6050. priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
  6051. if (!iwl4965_is_ready(priv)) {
  6052. IWL_DEBUG_MAC80211("leave - not ready\n");
  6053. ret = -EIO;
  6054. goto out;
  6055. }
  6056. if (unlikely(!iwl4965_param_disable_hw_scan &&
  6057. test_bit(STATUS_SCANNING, &priv->status))) {
  6058. IWL_DEBUG_MAC80211("leave - scanning\n");
  6059. set_bit(STATUS_CONF_PENDING, &priv->status);
  6060. mutex_unlock(&priv->mutex);
  6061. return 0;
  6062. }
  6063. spin_lock_irqsave(&priv->lock, flags);
  6064. ch_info = iwl4965_get_channel_info(priv, conf->channel->band,
  6065. ieee80211_frequency_to_channel(conf->channel->center_freq));
  6066. if (!is_channel_valid(ch_info)) {
  6067. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  6068. spin_unlock_irqrestore(&priv->lock, flags);
  6069. ret = -EINVAL;
  6070. goto out;
  6071. }
  6072. #ifdef CONFIG_IWL4965_HT
  6073. /* if we are switching from ht to 2.4 clear flags
  6074. * from any ht related info since 2.4 does not
  6075. * support ht */
  6076. if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value)
  6077. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6078. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  6079. #endif
  6080. )
  6081. priv->staging_rxon.flags = 0;
  6082. #endif /* CONFIG_IWL4965_HT */
  6083. iwl4965_set_rxon_channel(priv, conf->channel->band,
  6084. ieee80211_frequency_to_channel(conf->channel->center_freq));
  6085. iwl4965_set_flags_for_phymode(priv, conf->channel->band);
  6086. /* The list of supported rates and rate mask can be different
  6087. * for each band; since the band may have changed, reset
  6088. * the rate mask to what mac80211 lists */
  6089. iwl4965_set_rate(priv);
  6090. spin_unlock_irqrestore(&priv->lock, flags);
  6091. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6092. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  6093. iwl4965_hw_channel_switch(priv, conf->channel);
  6094. goto out;
  6095. }
  6096. #endif
  6097. iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
  6098. if (!conf->radio_enabled) {
  6099. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  6100. goto out;
  6101. }
  6102. if (iwl4965_is_rfkill(priv)) {
  6103. IWL_DEBUG_MAC80211("leave - RF kill\n");
  6104. ret = -EIO;
  6105. goto out;
  6106. }
  6107. iwl4965_set_rate(priv);
  6108. if (memcmp(&priv->active_rxon,
  6109. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  6110. iwl4965_commit_rxon(priv);
  6111. else
  6112. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  6113. IWL_DEBUG_MAC80211("leave\n");
  6114. out:
  6115. clear_bit(STATUS_CONF_PENDING, &priv->status);
  6116. mutex_unlock(&priv->mutex);
  6117. return ret;
  6118. }
  6119. static void iwl4965_config_ap(struct iwl4965_priv *priv)
  6120. {
  6121. int rc = 0;
  6122. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6123. return;
  6124. /* The following should be done only at AP bring up */
  6125. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  6126. /* RXON - unassoc (to set timing command) */
  6127. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6128. iwl4965_commit_rxon(priv);
  6129. /* RXON Timing */
  6130. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  6131. iwl4965_setup_rxon_timing(priv);
  6132. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  6133. sizeof(priv->rxon_timing), &priv->rxon_timing);
  6134. if (rc)
  6135. IWL_WARNING("REPLY_RXON_TIMING failed - "
  6136. "Attempting to continue.\n");
  6137. iwl4965_set_rxon_chain(priv);
  6138. /* FIXME: what should be the assoc_id for AP? */
  6139. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  6140. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  6141. priv->staging_rxon.flags |=
  6142. RXON_FLG_SHORT_PREAMBLE_MSK;
  6143. else
  6144. priv->staging_rxon.flags &=
  6145. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6146. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  6147. if (priv->assoc_capability &
  6148. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  6149. priv->staging_rxon.flags |=
  6150. RXON_FLG_SHORT_SLOT_MSK;
  6151. else
  6152. priv->staging_rxon.flags &=
  6153. ~RXON_FLG_SHORT_SLOT_MSK;
  6154. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6155. priv->staging_rxon.flags &=
  6156. ~RXON_FLG_SHORT_SLOT_MSK;
  6157. }
  6158. /* restore RXON assoc */
  6159. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  6160. iwl4965_commit_rxon(priv);
  6161. iwl4965_activate_qos(priv, 1);
  6162. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  6163. }
  6164. iwl4965_send_beacon_cmd(priv);
  6165. /* FIXME - we need to add code here to detect a totally new
  6166. * configuration, reset the AP, unassoc, rxon timing, assoc,
  6167. * clear sta table, add BCAST sta... */
  6168. }
  6169. static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
  6170. struct ieee80211_vif *vif,
  6171. struct ieee80211_if_conf *conf)
  6172. {
  6173. struct iwl4965_priv *priv = hw->priv;
  6174. DECLARE_MAC_BUF(mac);
  6175. unsigned long flags;
  6176. int rc;
  6177. if (conf == NULL)
  6178. return -EIO;
  6179. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  6180. (!conf->beacon || !conf->ssid_len)) {
  6181. IWL_DEBUG_MAC80211
  6182. ("Leaving in AP mode because HostAPD is not ready.\n");
  6183. return 0;
  6184. }
  6185. if (!iwl4965_is_alive(priv))
  6186. return -EAGAIN;
  6187. mutex_lock(&priv->mutex);
  6188. if (conf->bssid)
  6189. IWL_DEBUG_MAC80211("bssid: %s\n",
  6190. print_mac(mac, conf->bssid));
  6191. /*
  6192. * very dubious code was here; the probe filtering flag is never set:
  6193. *
  6194. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  6195. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  6196. */
  6197. if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
  6198. IWL_DEBUG_MAC80211("leave - scanning\n");
  6199. mutex_unlock(&priv->mutex);
  6200. return 0;
  6201. }
  6202. if (priv->vif != vif) {
  6203. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  6204. mutex_unlock(&priv->mutex);
  6205. return 0;
  6206. }
  6207. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  6208. if (!conf->bssid) {
  6209. conf->bssid = priv->mac_addr;
  6210. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  6211. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  6212. print_mac(mac, conf->bssid));
  6213. }
  6214. if (priv->ibss_beacon)
  6215. dev_kfree_skb(priv->ibss_beacon);
  6216. priv->ibss_beacon = conf->beacon;
  6217. }
  6218. if (iwl4965_is_rfkill(priv))
  6219. goto done;
  6220. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  6221. !is_multicast_ether_addr(conf->bssid)) {
  6222. /* If there is currently a HW scan going on in the background
  6223. * then we need to cancel it else the RXON below will fail. */
  6224. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  6225. IWL_WARNING("Aborted scan still in progress "
  6226. "after 100ms\n");
  6227. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  6228. mutex_unlock(&priv->mutex);
  6229. return -EAGAIN;
  6230. }
  6231. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  6232. /* TODO: Audit driver for usage of these members and see
  6233. * if mac80211 deprecates them (priv->bssid looks like it
  6234. * shouldn't be there, but I haven't scanned the IBSS code
  6235. * to verify) - jpk */
  6236. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  6237. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6238. iwl4965_config_ap(priv);
  6239. else {
  6240. rc = iwl4965_commit_rxon(priv);
  6241. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  6242. iwl4965_rxon_add_station(
  6243. priv, priv->active_rxon.bssid_addr, 1);
  6244. }
  6245. } else {
  6246. iwl4965_scan_cancel_timeout(priv, 100);
  6247. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6248. iwl4965_commit_rxon(priv);
  6249. }
  6250. done:
  6251. spin_lock_irqsave(&priv->lock, flags);
  6252. if (!conf->ssid_len)
  6253. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6254. else
  6255. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  6256. priv->essid_len = conf->ssid_len;
  6257. spin_unlock_irqrestore(&priv->lock, flags);
  6258. IWL_DEBUG_MAC80211("leave\n");
  6259. mutex_unlock(&priv->mutex);
  6260. return 0;
  6261. }
  6262. static void iwl4965_configure_filter(struct ieee80211_hw *hw,
  6263. unsigned int changed_flags,
  6264. unsigned int *total_flags,
  6265. int mc_count, struct dev_addr_list *mc_list)
  6266. {
  6267. /*
  6268. * XXX: dummy
  6269. * see also iwl4965_connection_init_rx_config
  6270. */
  6271. *total_flags = 0;
  6272. }
  6273. static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
  6274. struct ieee80211_if_init_conf *conf)
  6275. {
  6276. struct iwl4965_priv *priv = hw->priv;
  6277. IWL_DEBUG_MAC80211("enter\n");
  6278. mutex_lock(&priv->mutex);
  6279. if (iwl4965_is_ready_rf(priv)) {
  6280. iwl4965_scan_cancel_timeout(priv, 100);
  6281. cancel_delayed_work(&priv->post_associate);
  6282. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6283. iwl4965_commit_rxon(priv);
  6284. }
  6285. if (priv->vif == conf->vif) {
  6286. priv->vif = NULL;
  6287. memset(priv->bssid, 0, ETH_ALEN);
  6288. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6289. priv->essid_len = 0;
  6290. }
  6291. mutex_unlock(&priv->mutex);
  6292. IWL_DEBUG_MAC80211("leave\n");
  6293. }
  6294. static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
  6295. struct ieee80211_vif *vif,
  6296. struct ieee80211_bss_conf *bss_conf,
  6297. u32 changes)
  6298. {
  6299. struct iwl4965_priv *priv = hw->priv;
  6300. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  6301. if (bss_conf->use_short_preamble)
  6302. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  6303. else
  6304. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6305. }
  6306. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  6307. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  6308. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  6309. else
  6310. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  6311. }
  6312. if (changes & BSS_CHANGED_ASSOC) {
  6313. /*
  6314. * TODO:
  6315. * do stuff instead of sniffing assoc resp
  6316. */
  6317. }
  6318. if (iwl4965_is_associated(priv))
  6319. iwl4965_send_rxon_assoc(priv);
  6320. }
  6321. static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  6322. {
  6323. int rc = 0;
  6324. unsigned long flags;
  6325. struct iwl4965_priv *priv = hw->priv;
  6326. IWL_DEBUG_MAC80211("enter\n");
  6327. mutex_lock(&priv->mutex);
  6328. spin_lock_irqsave(&priv->lock, flags);
  6329. if (!iwl4965_is_ready_rf(priv)) {
  6330. rc = -EIO;
  6331. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  6332. goto out_unlock;
  6333. }
  6334. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  6335. rc = -EIO;
  6336. IWL_ERROR("ERROR: APs don't scan\n");
  6337. goto out_unlock;
  6338. }
  6339. /* we don't schedule scan within next_scan_jiffies period */
  6340. if (priv->next_scan_jiffies &&
  6341. time_after(priv->next_scan_jiffies, jiffies)) {
  6342. rc = -EAGAIN;
  6343. goto out_unlock;
  6344. }
  6345. /* if we just finished scan ask for delay */
  6346. if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
  6347. IWL_DELAY_NEXT_SCAN, jiffies)) {
  6348. rc = -EAGAIN;
  6349. goto out_unlock;
  6350. }
  6351. if (len) {
  6352. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  6353. iwl4965_escape_essid(ssid, len), (int)len);
  6354. priv->one_direct_scan = 1;
  6355. priv->direct_ssid_len = (u8)
  6356. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  6357. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  6358. } else
  6359. priv->one_direct_scan = 0;
  6360. rc = iwl4965_scan_initiate(priv);
  6361. IWL_DEBUG_MAC80211("leave\n");
  6362. out_unlock:
  6363. spin_unlock_irqrestore(&priv->lock, flags);
  6364. mutex_unlock(&priv->mutex);
  6365. return rc;
  6366. }
  6367. static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  6368. const u8 *local_addr, const u8 *addr,
  6369. struct ieee80211_key_conf *key)
  6370. {
  6371. struct iwl4965_priv *priv = hw->priv;
  6372. DECLARE_MAC_BUF(mac);
  6373. int rc = 0;
  6374. u8 sta_id;
  6375. IWL_DEBUG_MAC80211("enter\n");
  6376. if (!iwl4965_param_hwcrypto) {
  6377. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  6378. return -EOPNOTSUPP;
  6379. }
  6380. if (is_zero_ether_addr(addr))
  6381. /* only support pairwise keys */
  6382. return -EOPNOTSUPP;
  6383. sta_id = iwl4965_hw_find_station(priv, addr);
  6384. if (sta_id == IWL_INVALID_STATION) {
  6385. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  6386. print_mac(mac, addr));
  6387. return -EINVAL;
  6388. }
  6389. mutex_lock(&priv->mutex);
  6390. iwl4965_scan_cancel_timeout(priv, 100);
  6391. switch (cmd) {
  6392. case SET_KEY:
  6393. rc = iwl4965_update_sta_key_info(priv, key, sta_id);
  6394. if (!rc) {
  6395. iwl4965_set_rxon_hwcrypto(priv, 1);
  6396. iwl4965_commit_rxon(priv);
  6397. key->hw_key_idx = sta_id;
  6398. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  6399. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  6400. }
  6401. break;
  6402. case DISABLE_KEY:
  6403. rc = iwl4965_clear_sta_key_info(priv, sta_id);
  6404. if (!rc) {
  6405. iwl4965_set_rxon_hwcrypto(priv, 0);
  6406. iwl4965_commit_rxon(priv);
  6407. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  6408. }
  6409. break;
  6410. default:
  6411. rc = -EINVAL;
  6412. }
  6413. IWL_DEBUG_MAC80211("leave\n");
  6414. mutex_unlock(&priv->mutex);
  6415. return rc;
  6416. }
  6417. static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  6418. const struct ieee80211_tx_queue_params *params)
  6419. {
  6420. struct iwl4965_priv *priv = hw->priv;
  6421. unsigned long flags;
  6422. int q;
  6423. IWL_DEBUG_MAC80211("enter\n");
  6424. if (!iwl4965_is_ready_rf(priv)) {
  6425. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6426. return -EIO;
  6427. }
  6428. if (queue >= AC_NUM) {
  6429. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  6430. return 0;
  6431. }
  6432. if (!priv->qos_data.qos_enable) {
  6433. priv->qos_data.qos_active = 0;
  6434. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  6435. return 0;
  6436. }
  6437. q = AC_NUM - 1 - queue;
  6438. spin_lock_irqsave(&priv->lock, flags);
  6439. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  6440. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  6441. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  6442. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  6443. cpu_to_le16((params->txop * 32));
  6444. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  6445. priv->qos_data.qos_active = 1;
  6446. spin_unlock_irqrestore(&priv->lock, flags);
  6447. mutex_lock(&priv->mutex);
  6448. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6449. iwl4965_activate_qos(priv, 1);
  6450. else if (priv->assoc_id && iwl4965_is_associated(priv))
  6451. iwl4965_activate_qos(priv, 0);
  6452. mutex_unlock(&priv->mutex);
  6453. IWL_DEBUG_MAC80211("leave\n");
  6454. return 0;
  6455. }
  6456. static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
  6457. struct ieee80211_tx_queue_stats *stats)
  6458. {
  6459. struct iwl4965_priv *priv = hw->priv;
  6460. int i, avail;
  6461. struct iwl4965_tx_queue *txq;
  6462. struct iwl4965_queue *q;
  6463. unsigned long flags;
  6464. IWL_DEBUG_MAC80211("enter\n");
  6465. if (!iwl4965_is_ready_rf(priv)) {
  6466. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6467. return -EIO;
  6468. }
  6469. spin_lock_irqsave(&priv->lock, flags);
  6470. for (i = 0; i < AC_NUM; i++) {
  6471. txq = &priv->txq[i];
  6472. q = &txq->q;
  6473. avail = iwl4965_queue_space(q);
  6474. stats->data[i].len = q->n_window - avail;
  6475. stats->data[i].limit = q->n_window - q->high_mark;
  6476. stats->data[i].count = q->n_window;
  6477. }
  6478. spin_unlock_irqrestore(&priv->lock, flags);
  6479. IWL_DEBUG_MAC80211("leave\n");
  6480. return 0;
  6481. }
  6482. static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
  6483. struct ieee80211_low_level_stats *stats)
  6484. {
  6485. IWL_DEBUG_MAC80211("enter\n");
  6486. IWL_DEBUG_MAC80211("leave\n");
  6487. return 0;
  6488. }
  6489. static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
  6490. {
  6491. IWL_DEBUG_MAC80211("enter\n");
  6492. IWL_DEBUG_MAC80211("leave\n");
  6493. return 0;
  6494. }
  6495. static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
  6496. {
  6497. struct iwl4965_priv *priv = hw->priv;
  6498. unsigned long flags;
  6499. mutex_lock(&priv->mutex);
  6500. IWL_DEBUG_MAC80211("enter\n");
  6501. priv->lq_mngr.lq_ready = 0;
  6502. #ifdef CONFIG_IWL4965_HT
  6503. spin_lock_irqsave(&priv->lock, flags);
  6504. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
  6505. spin_unlock_irqrestore(&priv->lock, flags);
  6506. #endif /* CONFIG_IWL4965_HT */
  6507. iwl4965_reset_qos(priv);
  6508. cancel_delayed_work(&priv->post_associate);
  6509. spin_lock_irqsave(&priv->lock, flags);
  6510. priv->assoc_id = 0;
  6511. priv->assoc_capability = 0;
  6512. priv->call_post_assoc_from_beacon = 0;
  6513. priv->assoc_station_added = 0;
  6514. /* new association get rid of ibss beacon skb */
  6515. if (priv->ibss_beacon)
  6516. dev_kfree_skb(priv->ibss_beacon);
  6517. priv->ibss_beacon = NULL;
  6518. priv->beacon_int = priv->hw->conf.beacon_int;
  6519. priv->timestamp1 = 0;
  6520. priv->timestamp0 = 0;
  6521. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  6522. priv->beacon_int = 0;
  6523. spin_unlock_irqrestore(&priv->lock, flags);
  6524. if (!iwl4965_is_ready_rf(priv)) {
  6525. IWL_DEBUG_MAC80211("leave - not ready\n");
  6526. mutex_unlock(&priv->mutex);
  6527. return;
  6528. }
  6529. /* we are restarting association process
  6530. * clear RXON_FILTER_ASSOC_MSK bit
  6531. */
  6532. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  6533. iwl4965_scan_cancel_timeout(priv, 100);
  6534. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6535. iwl4965_commit_rxon(priv);
  6536. }
  6537. /* Per mac80211.h: This is only used in IBSS mode... */
  6538. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6539. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  6540. mutex_unlock(&priv->mutex);
  6541. return;
  6542. }
  6543. priv->only_active_channel = 0;
  6544. iwl4965_set_rate(priv);
  6545. mutex_unlock(&priv->mutex);
  6546. IWL_DEBUG_MAC80211("leave\n");
  6547. }
  6548. static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  6549. struct ieee80211_tx_control *control)
  6550. {
  6551. struct iwl4965_priv *priv = hw->priv;
  6552. unsigned long flags;
  6553. mutex_lock(&priv->mutex);
  6554. IWL_DEBUG_MAC80211("enter\n");
  6555. if (!iwl4965_is_ready_rf(priv)) {
  6556. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6557. mutex_unlock(&priv->mutex);
  6558. return -EIO;
  6559. }
  6560. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6561. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6562. mutex_unlock(&priv->mutex);
  6563. return -EIO;
  6564. }
  6565. spin_lock_irqsave(&priv->lock, flags);
  6566. if (priv->ibss_beacon)
  6567. dev_kfree_skb(priv->ibss_beacon);
  6568. priv->ibss_beacon = skb;
  6569. priv->assoc_id = 0;
  6570. IWL_DEBUG_MAC80211("leave\n");
  6571. spin_unlock_irqrestore(&priv->lock, flags);
  6572. iwl4965_reset_qos(priv);
  6573. queue_work(priv->workqueue, &priv->post_associate.work);
  6574. mutex_unlock(&priv->mutex);
  6575. return 0;
  6576. }
  6577. #ifdef CONFIG_IWL4965_HT
  6578. static void iwl4965_ht_info_fill(struct ieee80211_conf *conf,
  6579. struct iwl4965_priv *priv)
  6580. {
  6581. struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
  6582. struct ieee80211_ht_info *ht_conf = &conf->ht_conf;
  6583. struct ieee80211_ht_bss_info *ht_bss_conf = &conf->ht_bss_conf;
  6584. IWL_DEBUG_MAC80211("enter: \n");
  6585. if (!(conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE)) {
  6586. iwl_conf->is_ht = 0;
  6587. return;
  6588. }
  6589. iwl_conf->is_ht = 1;
  6590. priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6591. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
  6592. iwl_conf->sgf |= 0x1;
  6593. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
  6594. iwl_conf->sgf |= 0x2;
  6595. iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
  6596. iwl_conf->max_amsdu_size =
  6597. !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
  6598. iwl_conf->supported_chan_width =
  6599. !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
  6600. iwl_conf->extension_chan_offset =
  6601. ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
  6602. /* If no above or below channel supplied disable FAT channel */
  6603. if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE &&
  6604. iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW)
  6605. iwl_conf->supported_chan_width = 0;
  6606. iwl_conf->tx_mimo_ps_mode =
  6607. (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6608. memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
  6609. iwl_conf->control_channel = ht_bss_conf->primary_channel;
  6610. iwl_conf->tx_chan_width =
  6611. !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
  6612. iwl_conf->ht_protection =
  6613. ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
  6614. iwl_conf->non_GF_STA_present =
  6615. !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
  6616. IWL_DEBUG_MAC80211("control channel %d\n",
  6617. iwl_conf->control_channel);
  6618. IWL_DEBUG_MAC80211("leave\n");
  6619. }
  6620. static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
  6621. struct ieee80211_conf *conf)
  6622. {
  6623. struct iwl4965_priv *priv = hw->priv;
  6624. IWL_DEBUG_MAC80211("enter: \n");
  6625. iwl4965_ht_info_fill(conf, priv);
  6626. iwl4965_set_rxon_chain(priv);
  6627. if (priv && priv->assoc_id &&
  6628. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  6629. unsigned long flags;
  6630. spin_lock_irqsave(&priv->lock, flags);
  6631. if (priv->beacon_int)
  6632. queue_work(priv->workqueue, &priv->post_associate.work);
  6633. else
  6634. priv->call_post_assoc_from_beacon = 1;
  6635. spin_unlock_irqrestore(&priv->lock, flags);
  6636. }
  6637. IWL_DEBUG_MAC80211("leave:\n");
  6638. return 0;
  6639. }
  6640. #endif /*CONFIG_IWL4965_HT*/
  6641. /*****************************************************************************
  6642. *
  6643. * sysfs attributes
  6644. *
  6645. *****************************************************************************/
  6646. #ifdef CONFIG_IWL4965_DEBUG
  6647. /*
  6648. * The following adds a new attribute to the sysfs representation
  6649. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6650. * used for controlling the debug level.
  6651. *
  6652. * See the level definitions in iwl for details.
  6653. */
  6654. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6655. {
  6656. return sprintf(buf, "0x%08X\n", iwl4965_debug_level);
  6657. }
  6658. static ssize_t store_debug_level(struct device_driver *d,
  6659. const char *buf, size_t count)
  6660. {
  6661. char *p = (char *)buf;
  6662. u32 val;
  6663. val = simple_strtoul(p, &p, 0);
  6664. if (p == buf)
  6665. printk(KERN_INFO DRV_NAME
  6666. ": %s is not in hex or decimal form.\n", buf);
  6667. else
  6668. iwl4965_debug_level = val;
  6669. return strnlen(buf, count);
  6670. }
  6671. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6672. show_debug_level, store_debug_level);
  6673. #endif /* CONFIG_IWL4965_DEBUG */
  6674. static ssize_t show_rf_kill(struct device *d,
  6675. struct device_attribute *attr, char *buf)
  6676. {
  6677. /*
  6678. * 0 - RF kill not enabled
  6679. * 1 - SW based RF kill active (sysfs)
  6680. * 2 - HW based RF kill active
  6681. * 3 - Both HW and SW based RF kill active
  6682. */
  6683. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6684. int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
  6685. (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
  6686. return sprintf(buf, "%i\n", val);
  6687. }
  6688. static ssize_t store_rf_kill(struct device *d,
  6689. struct device_attribute *attr,
  6690. const char *buf, size_t count)
  6691. {
  6692. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6693. mutex_lock(&priv->mutex);
  6694. iwl4965_radio_kill_sw(priv, buf[0] == '1');
  6695. mutex_unlock(&priv->mutex);
  6696. return count;
  6697. }
  6698. static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
  6699. static ssize_t show_temperature(struct device *d,
  6700. struct device_attribute *attr, char *buf)
  6701. {
  6702. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6703. if (!iwl4965_is_alive(priv))
  6704. return -EAGAIN;
  6705. return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
  6706. }
  6707. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6708. static ssize_t show_rs_window(struct device *d,
  6709. struct device_attribute *attr,
  6710. char *buf)
  6711. {
  6712. struct iwl4965_priv *priv = d->driver_data;
  6713. return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6714. }
  6715. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6716. static ssize_t show_tx_power(struct device *d,
  6717. struct device_attribute *attr, char *buf)
  6718. {
  6719. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6720. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6721. }
  6722. static ssize_t store_tx_power(struct device *d,
  6723. struct device_attribute *attr,
  6724. const char *buf, size_t count)
  6725. {
  6726. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6727. char *p = (char *)buf;
  6728. u32 val;
  6729. val = simple_strtoul(p, &p, 10);
  6730. if (p == buf)
  6731. printk(KERN_INFO DRV_NAME
  6732. ": %s is not in decimal form.\n", buf);
  6733. else
  6734. iwl4965_hw_reg_set_txpower(priv, val);
  6735. return count;
  6736. }
  6737. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  6738. static ssize_t show_flags(struct device *d,
  6739. struct device_attribute *attr, char *buf)
  6740. {
  6741. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6742. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  6743. }
  6744. static ssize_t store_flags(struct device *d,
  6745. struct device_attribute *attr,
  6746. const char *buf, size_t count)
  6747. {
  6748. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6749. u32 flags = simple_strtoul(buf, NULL, 0);
  6750. mutex_lock(&priv->mutex);
  6751. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  6752. /* Cancel any currently running scans... */
  6753. if (iwl4965_scan_cancel_timeout(priv, 100))
  6754. IWL_WARNING("Could not cancel scan.\n");
  6755. else {
  6756. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  6757. flags);
  6758. priv->staging_rxon.flags = cpu_to_le32(flags);
  6759. iwl4965_commit_rxon(priv);
  6760. }
  6761. }
  6762. mutex_unlock(&priv->mutex);
  6763. return count;
  6764. }
  6765. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  6766. static ssize_t show_filter_flags(struct device *d,
  6767. struct device_attribute *attr, char *buf)
  6768. {
  6769. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6770. return sprintf(buf, "0x%04X\n",
  6771. le32_to_cpu(priv->active_rxon.filter_flags));
  6772. }
  6773. static ssize_t store_filter_flags(struct device *d,
  6774. struct device_attribute *attr,
  6775. const char *buf, size_t count)
  6776. {
  6777. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6778. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  6779. mutex_lock(&priv->mutex);
  6780. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  6781. /* Cancel any currently running scans... */
  6782. if (iwl4965_scan_cancel_timeout(priv, 100))
  6783. IWL_WARNING("Could not cancel scan.\n");
  6784. else {
  6785. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  6786. "0x%04X\n", filter_flags);
  6787. priv->staging_rxon.filter_flags =
  6788. cpu_to_le32(filter_flags);
  6789. iwl4965_commit_rxon(priv);
  6790. }
  6791. }
  6792. mutex_unlock(&priv->mutex);
  6793. return count;
  6794. }
  6795. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  6796. store_filter_flags);
  6797. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  6798. static ssize_t show_measurement(struct device *d,
  6799. struct device_attribute *attr, char *buf)
  6800. {
  6801. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6802. struct iwl4965_spectrum_notification measure_report;
  6803. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  6804. u8 *data = (u8 *) & measure_report;
  6805. unsigned long flags;
  6806. spin_lock_irqsave(&priv->lock, flags);
  6807. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  6808. spin_unlock_irqrestore(&priv->lock, flags);
  6809. return 0;
  6810. }
  6811. memcpy(&measure_report, &priv->measure_report, size);
  6812. priv->measurement_status = 0;
  6813. spin_unlock_irqrestore(&priv->lock, flags);
  6814. while (size && (PAGE_SIZE - len)) {
  6815. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6816. PAGE_SIZE - len, 1);
  6817. len = strlen(buf);
  6818. if (PAGE_SIZE - len)
  6819. buf[len++] = '\n';
  6820. ofs += 16;
  6821. size -= min(size, 16U);
  6822. }
  6823. return len;
  6824. }
  6825. static ssize_t store_measurement(struct device *d,
  6826. struct device_attribute *attr,
  6827. const char *buf, size_t count)
  6828. {
  6829. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6830. struct ieee80211_measurement_params params = {
  6831. .channel = le16_to_cpu(priv->active_rxon.channel),
  6832. .start_time = cpu_to_le64(priv->last_tsf),
  6833. .duration = cpu_to_le16(1),
  6834. };
  6835. u8 type = IWL_MEASURE_BASIC;
  6836. u8 buffer[32];
  6837. u8 channel;
  6838. if (count) {
  6839. char *p = buffer;
  6840. strncpy(buffer, buf, min(sizeof(buffer), count));
  6841. channel = simple_strtoul(p, NULL, 0);
  6842. if (channel)
  6843. params.channel = channel;
  6844. p = buffer;
  6845. while (*p && *p != ' ')
  6846. p++;
  6847. if (*p)
  6848. type = simple_strtoul(p + 1, NULL, 0);
  6849. }
  6850. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  6851. "channel %d (for '%s')\n", type, params.channel, buf);
  6852. iwl4965_get_measurement(priv, &params, type);
  6853. return count;
  6854. }
  6855. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  6856. show_measurement, store_measurement);
  6857. #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
  6858. static ssize_t store_retry_rate(struct device *d,
  6859. struct device_attribute *attr,
  6860. const char *buf, size_t count)
  6861. {
  6862. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6863. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  6864. if (priv->retry_rate <= 0)
  6865. priv->retry_rate = 1;
  6866. return count;
  6867. }
  6868. static ssize_t show_retry_rate(struct device *d,
  6869. struct device_attribute *attr, char *buf)
  6870. {
  6871. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6872. return sprintf(buf, "%d", priv->retry_rate);
  6873. }
  6874. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  6875. store_retry_rate);
  6876. static ssize_t store_power_level(struct device *d,
  6877. struct device_attribute *attr,
  6878. const char *buf, size_t count)
  6879. {
  6880. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6881. int rc;
  6882. int mode;
  6883. mode = simple_strtoul(buf, NULL, 0);
  6884. mutex_lock(&priv->mutex);
  6885. if (!iwl4965_is_ready(priv)) {
  6886. rc = -EAGAIN;
  6887. goto out;
  6888. }
  6889. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  6890. mode = IWL_POWER_AC;
  6891. else
  6892. mode |= IWL_POWER_ENABLED;
  6893. if (mode != priv->power_mode) {
  6894. rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  6895. if (rc) {
  6896. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  6897. goto out;
  6898. }
  6899. priv->power_mode = mode;
  6900. }
  6901. rc = count;
  6902. out:
  6903. mutex_unlock(&priv->mutex);
  6904. return rc;
  6905. }
  6906. #define MAX_WX_STRING 80
  6907. /* Values are in microsecond */
  6908. static const s32 timeout_duration[] = {
  6909. 350000,
  6910. 250000,
  6911. 75000,
  6912. 37000,
  6913. 25000,
  6914. };
  6915. static const s32 period_duration[] = {
  6916. 400000,
  6917. 700000,
  6918. 1000000,
  6919. 1000000,
  6920. 1000000
  6921. };
  6922. static ssize_t show_power_level(struct device *d,
  6923. struct device_attribute *attr, char *buf)
  6924. {
  6925. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6926. int level = IWL_POWER_LEVEL(priv->power_mode);
  6927. char *p = buf;
  6928. p += sprintf(p, "%d ", level);
  6929. switch (level) {
  6930. case IWL_POWER_MODE_CAM:
  6931. case IWL_POWER_AC:
  6932. p += sprintf(p, "(AC)");
  6933. break;
  6934. case IWL_POWER_BATTERY:
  6935. p += sprintf(p, "(BATTERY)");
  6936. break;
  6937. default:
  6938. p += sprintf(p,
  6939. "(Timeout %dms, Period %dms)",
  6940. timeout_duration[level - 1] / 1000,
  6941. period_duration[level - 1] / 1000);
  6942. }
  6943. if (!(priv->power_mode & IWL_POWER_ENABLED))
  6944. p += sprintf(p, " OFF\n");
  6945. else
  6946. p += sprintf(p, " \n");
  6947. return (p - buf + 1);
  6948. }
  6949. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  6950. store_power_level);
  6951. static ssize_t show_channels(struct device *d,
  6952. struct device_attribute *attr, char *buf)
  6953. {
  6954. /* all this shit doesn't belong into sysfs anyway */
  6955. return 0;
  6956. }
  6957. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  6958. static ssize_t show_statistics(struct device *d,
  6959. struct device_attribute *attr, char *buf)
  6960. {
  6961. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6962. u32 size = sizeof(struct iwl4965_notif_statistics);
  6963. u32 len = 0, ofs = 0;
  6964. u8 *data = (u8 *) & priv->statistics;
  6965. int rc = 0;
  6966. if (!iwl4965_is_alive(priv))
  6967. return -EAGAIN;
  6968. mutex_lock(&priv->mutex);
  6969. rc = iwl4965_send_statistics_request(priv);
  6970. mutex_unlock(&priv->mutex);
  6971. if (rc) {
  6972. len = sprintf(buf,
  6973. "Error sending statistics request: 0x%08X\n", rc);
  6974. return len;
  6975. }
  6976. while (size && (PAGE_SIZE - len)) {
  6977. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6978. PAGE_SIZE - len, 1);
  6979. len = strlen(buf);
  6980. if (PAGE_SIZE - len)
  6981. buf[len++] = '\n';
  6982. ofs += 16;
  6983. size -= min(size, 16U);
  6984. }
  6985. return len;
  6986. }
  6987. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  6988. static ssize_t show_antenna(struct device *d,
  6989. struct device_attribute *attr, char *buf)
  6990. {
  6991. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6992. if (!iwl4965_is_alive(priv))
  6993. return -EAGAIN;
  6994. return sprintf(buf, "%d\n", priv->antenna);
  6995. }
  6996. static ssize_t store_antenna(struct device *d,
  6997. struct device_attribute *attr,
  6998. const char *buf, size_t count)
  6999. {
  7000. int ant;
  7001. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7002. if (count == 0)
  7003. return 0;
  7004. if (sscanf(buf, "%1i", &ant) != 1) {
  7005. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  7006. return count;
  7007. }
  7008. if ((ant >= 0) && (ant <= 2)) {
  7009. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  7010. priv->antenna = (enum iwl4965_antenna)ant;
  7011. } else
  7012. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  7013. return count;
  7014. }
  7015. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  7016. static ssize_t show_status(struct device *d,
  7017. struct device_attribute *attr, char *buf)
  7018. {
  7019. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7020. if (!iwl4965_is_alive(priv))
  7021. return -EAGAIN;
  7022. return sprintf(buf, "0x%08x\n", (int)priv->status);
  7023. }
  7024. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  7025. static ssize_t dump_error_log(struct device *d,
  7026. struct device_attribute *attr,
  7027. const char *buf, size_t count)
  7028. {
  7029. char *p = (char *)buf;
  7030. if (p[0] == '1')
  7031. iwl4965_dump_nic_error_log((struct iwl4965_priv *)d->driver_data);
  7032. return strnlen(buf, count);
  7033. }
  7034. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  7035. static ssize_t dump_event_log(struct device *d,
  7036. struct device_attribute *attr,
  7037. const char *buf, size_t count)
  7038. {
  7039. char *p = (char *)buf;
  7040. if (p[0] == '1')
  7041. iwl4965_dump_nic_event_log((struct iwl4965_priv *)d->driver_data);
  7042. return strnlen(buf, count);
  7043. }
  7044. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  7045. /*****************************************************************************
  7046. *
  7047. * driver setup and teardown
  7048. *
  7049. *****************************************************************************/
  7050. static void iwl4965_setup_deferred_work(struct iwl4965_priv *priv)
  7051. {
  7052. priv->workqueue = create_workqueue(DRV_NAME);
  7053. init_waitqueue_head(&priv->wait_command_queue);
  7054. INIT_WORK(&priv->up, iwl4965_bg_up);
  7055. INIT_WORK(&priv->restart, iwl4965_bg_restart);
  7056. INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
  7057. INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
  7058. INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
  7059. INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
  7060. INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
  7061. INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
  7062. INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
  7063. INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
  7064. INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
  7065. INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
  7066. iwl4965_hw_setup_deferred_work(priv);
  7067. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  7068. iwl4965_irq_tasklet, (unsigned long)priv);
  7069. }
  7070. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv)
  7071. {
  7072. iwl4965_hw_cancel_deferred_work(priv);
  7073. cancel_delayed_work_sync(&priv->init_alive_start);
  7074. cancel_delayed_work(&priv->scan_check);
  7075. cancel_delayed_work(&priv->alive_start);
  7076. cancel_delayed_work(&priv->post_associate);
  7077. cancel_work_sync(&priv->beacon_update);
  7078. }
  7079. static struct attribute *iwl4965_sysfs_entries[] = {
  7080. &dev_attr_antenna.attr,
  7081. &dev_attr_channels.attr,
  7082. &dev_attr_dump_errors.attr,
  7083. &dev_attr_dump_events.attr,
  7084. &dev_attr_flags.attr,
  7085. &dev_attr_filter_flags.attr,
  7086. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  7087. &dev_attr_measurement.attr,
  7088. #endif
  7089. &dev_attr_power_level.attr,
  7090. &dev_attr_retry_rate.attr,
  7091. &dev_attr_rf_kill.attr,
  7092. &dev_attr_rs_window.attr,
  7093. &dev_attr_statistics.attr,
  7094. &dev_attr_status.attr,
  7095. &dev_attr_temperature.attr,
  7096. &dev_attr_tx_power.attr,
  7097. NULL
  7098. };
  7099. static struct attribute_group iwl4965_attribute_group = {
  7100. .name = NULL, /* put in device directory */
  7101. .attrs = iwl4965_sysfs_entries,
  7102. };
  7103. static struct ieee80211_ops iwl4965_hw_ops = {
  7104. .tx = iwl4965_mac_tx,
  7105. .start = iwl4965_mac_start,
  7106. .stop = iwl4965_mac_stop,
  7107. .add_interface = iwl4965_mac_add_interface,
  7108. .remove_interface = iwl4965_mac_remove_interface,
  7109. .config = iwl4965_mac_config,
  7110. .config_interface = iwl4965_mac_config_interface,
  7111. .configure_filter = iwl4965_configure_filter,
  7112. .set_key = iwl4965_mac_set_key,
  7113. .get_stats = iwl4965_mac_get_stats,
  7114. .get_tx_stats = iwl4965_mac_get_tx_stats,
  7115. .conf_tx = iwl4965_mac_conf_tx,
  7116. .get_tsf = iwl4965_mac_get_tsf,
  7117. .reset_tsf = iwl4965_mac_reset_tsf,
  7118. .beacon_update = iwl4965_mac_beacon_update,
  7119. .bss_info_changed = iwl4965_bss_info_changed,
  7120. #ifdef CONFIG_IWL4965_HT
  7121. .conf_ht = iwl4965_mac_conf_ht,
  7122. .ampdu_action = iwl4965_mac_ampdu_action,
  7123. #endif /* CONFIG_IWL4965_HT */
  7124. .hw_scan = iwl4965_mac_hw_scan
  7125. };
  7126. static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  7127. {
  7128. int err = 0;
  7129. struct iwl4965_priv *priv;
  7130. struct ieee80211_hw *hw;
  7131. int i;
  7132. DECLARE_MAC_BUF(mac);
  7133. /* Disabling hardware scan means that mac80211 will perform scans
  7134. * "the hard way", rather than using device's scan. */
  7135. if (iwl4965_param_disable_hw_scan) {
  7136. IWL_DEBUG_INFO("Disabling hw_scan\n");
  7137. iwl4965_hw_ops.hw_scan = NULL;
  7138. }
  7139. if ((iwl4965_param_queues_num > IWL_MAX_NUM_QUEUES) ||
  7140. (iwl4965_param_queues_num < IWL_MIN_NUM_QUEUES)) {
  7141. IWL_ERROR("invalid queues_num, should be between %d and %d\n",
  7142. IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
  7143. err = -EINVAL;
  7144. goto out;
  7145. }
  7146. /* mac80211 allocates memory for this device instance, including
  7147. * space for this driver's private structure */
  7148. hw = ieee80211_alloc_hw(sizeof(struct iwl4965_priv), &iwl4965_hw_ops);
  7149. if (hw == NULL) {
  7150. IWL_ERROR("Can not allocate network device\n");
  7151. err = -ENOMEM;
  7152. goto out;
  7153. }
  7154. SET_IEEE80211_DEV(hw, &pdev->dev);
  7155. hw->rate_control_algorithm = "iwl-4965-rs";
  7156. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  7157. priv = hw->priv;
  7158. priv->hw = hw;
  7159. priv->pci_dev = pdev;
  7160. priv->antenna = (enum iwl4965_antenna)iwl4965_param_antenna;
  7161. #ifdef CONFIG_IWL4965_DEBUG
  7162. iwl4965_debug_level = iwl4965_param_debug;
  7163. atomic_set(&priv->restrict_refcnt, 0);
  7164. #endif
  7165. priv->retry_rate = 1;
  7166. priv->ibss_beacon = NULL;
  7167. /* Tell mac80211 and its clients (e.g. Wireless Extensions)
  7168. * the range of signal quality values that we'll provide.
  7169. * Negative values for level/noise indicate that we'll provide dBm.
  7170. * For WE, at least, non-0 values here *enable* display of values
  7171. * in app (iwconfig). */
  7172. hw->max_rssi = -20; /* signal level, negative indicates dBm */
  7173. hw->max_noise = -20; /* noise level, negative indicates dBm */
  7174. hw->max_signal = 100; /* link quality indication (%) */
  7175. /* Tell mac80211 our Tx characteristics */
  7176. hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
  7177. /* Default value; 4 EDCA QOS priorities */
  7178. hw->queues = 4;
  7179. #ifdef CONFIG_IWL4965_HT
  7180. /* Enhanced value; more queues, to support 11n aggregation */
  7181. hw->queues = 16;
  7182. #endif /* CONFIG_IWL4965_HT */
  7183. spin_lock_init(&priv->lock);
  7184. spin_lock_init(&priv->power_data.lock);
  7185. spin_lock_init(&priv->sta_lock);
  7186. spin_lock_init(&priv->hcmd_lock);
  7187. spin_lock_init(&priv->lq_mngr.lock);
  7188. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
  7189. INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
  7190. INIT_LIST_HEAD(&priv->free_frames);
  7191. mutex_init(&priv->mutex);
  7192. if (pci_enable_device(pdev)) {
  7193. err = -ENODEV;
  7194. goto out_ieee80211_free_hw;
  7195. }
  7196. pci_set_master(pdev);
  7197. /* Clear the driver's (not device's) station table */
  7198. iwl4965_clear_stations_table(priv);
  7199. priv->data_retry_limit = -1;
  7200. priv->ieee_channels = NULL;
  7201. priv->ieee_rates = NULL;
  7202. priv->band = IEEE80211_BAND_2GHZ;
  7203. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  7204. if (!err)
  7205. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  7206. if (err) {
  7207. printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
  7208. goto out_pci_disable_device;
  7209. }
  7210. pci_set_drvdata(pdev, priv);
  7211. err = pci_request_regions(pdev, DRV_NAME);
  7212. if (err)
  7213. goto out_pci_disable_device;
  7214. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  7215. * PCI Tx retries from interfering with C3 CPU state */
  7216. pci_write_config_byte(pdev, 0x41, 0x00);
  7217. priv->hw_base = pci_iomap(pdev, 0, 0);
  7218. if (!priv->hw_base) {
  7219. err = -ENODEV;
  7220. goto out_pci_release_regions;
  7221. }
  7222. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  7223. (unsigned long long) pci_resource_len(pdev, 0));
  7224. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  7225. /* Initialize module parameter values here */
  7226. /* Disable radio (SW RF KILL) via parameter when loading driver */
  7227. if (iwl4965_param_disable) {
  7228. set_bit(STATUS_RF_KILL_SW, &priv->status);
  7229. IWL_DEBUG_INFO("Radio disabled.\n");
  7230. }
  7231. priv->iw_mode = IEEE80211_IF_TYPE_STA;
  7232. priv->ps_mode = 0;
  7233. priv->use_ant_b_for_management_frame = 1; /* start with ant B */
  7234. priv->valid_antenna = 0x7; /* assume all 3 connected */
  7235. priv->ps_mode = IWL_MIMO_PS_NONE;
  7236. /* Choose which receivers/antennas to use */
  7237. iwl4965_set_rxon_chain(priv);
  7238. printk(KERN_INFO DRV_NAME
  7239. ": Detected Intel Wireless WiFi Link 4965AGN\n");
  7240. /* Device-specific setup */
  7241. if (iwl4965_hw_set_hw_setting(priv)) {
  7242. IWL_ERROR("failed to set hw settings\n");
  7243. goto out_iounmap;
  7244. }
  7245. if (iwl4965_param_qos_enable)
  7246. priv->qos_data.qos_enable = 1;
  7247. iwl4965_reset_qos(priv);
  7248. priv->qos_data.qos_active = 0;
  7249. priv->qos_data.qos_cap.val = 0;
  7250. iwl4965_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
  7251. iwl4965_setup_deferred_work(priv);
  7252. iwl4965_setup_rx_handlers(priv);
  7253. priv->rates_mask = IWL_RATES_MASK;
  7254. /* If power management is turned on, default to AC mode */
  7255. priv->power_mode = IWL_POWER_AC;
  7256. priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
  7257. iwl4965_disable_interrupts(priv);
  7258. err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7259. if (err) {
  7260. IWL_ERROR("failed to create sysfs device attributes\n");
  7261. goto out_release_irq;
  7262. }
  7263. /* nic init */
  7264. iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  7265. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  7266. iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  7267. err = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
  7268. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  7269. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  7270. if (err < 0) {
  7271. IWL_DEBUG_INFO("Failed to init the card\n");
  7272. goto out_remove_sysfs;
  7273. }
  7274. /* Read the EEPROM */
  7275. err = iwl4965_eeprom_init(priv);
  7276. if (err) {
  7277. IWL_ERROR("Unable to init EEPROM\n");
  7278. goto out_remove_sysfs;
  7279. }
  7280. /* MAC Address location in EEPROM same for 3945/4965 */
  7281. get_eeprom_mac(priv, priv->mac_addr);
  7282. IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
  7283. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  7284. err = iwl4965_init_channel_map(priv);
  7285. if (err) {
  7286. IWL_ERROR("initializing regulatory failed: %d\n", err);
  7287. goto out_remove_sysfs;
  7288. }
  7289. err = iwl4965_init_geos(priv);
  7290. if (err) {
  7291. IWL_ERROR("initializing geos failed: %d\n", err);
  7292. goto out_free_channel_map;
  7293. }
  7294. iwl4965_rate_control_register(priv->hw);
  7295. err = ieee80211_register_hw(priv->hw);
  7296. if (err) {
  7297. IWL_ERROR("Failed to register network device (error %d)\n", err);
  7298. goto out_free_geos;
  7299. }
  7300. priv->hw->conf.beacon_int = 100;
  7301. priv->mac80211_registered = 1;
  7302. pci_save_state(pdev);
  7303. pci_disable_device(pdev);
  7304. return 0;
  7305. out_free_geos:
  7306. iwl4965_free_geos(priv);
  7307. out_free_channel_map:
  7308. iwl4965_free_channel_map(priv);
  7309. out_remove_sysfs:
  7310. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7311. out_release_irq:
  7312. destroy_workqueue(priv->workqueue);
  7313. priv->workqueue = NULL;
  7314. iwl4965_unset_hw_setting(priv);
  7315. out_iounmap:
  7316. pci_iounmap(pdev, priv->hw_base);
  7317. out_pci_release_regions:
  7318. pci_release_regions(pdev);
  7319. out_pci_disable_device:
  7320. pci_disable_device(pdev);
  7321. pci_set_drvdata(pdev, NULL);
  7322. out_ieee80211_free_hw:
  7323. ieee80211_free_hw(priv->hw);
  7324. out:
  7325. return err;
  7326. }
  7327. static void iwl4965_pci_remove(struct pci_dev *pdev)
  7328. {
  7329. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7330. struct list_head *p, *q;
  7331. int i;
  7332. if (!priv)
  7333. return;
  7334. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  7335. set_bit(STATUS_EXIT_PENDING, &priv->status);
  7336. iwl4965_down(priv);
  7337. /* Free MAC hash list for ADHOC */
  7338. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  7339. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  7340. list_del(p);
  7341. kfree(list_entry(p, struct iwl4965_ibss_seq, list));
  7342. }
  7343. }
  7344. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7345. iwl4965_dealloc_ucode_pci(priv);
  7346. if (priv->rxq.bd)
  7347. iwl4965_rx_queue_free(priv, &priv->rxq);
  7348. iwl4965_hw_txq_ctx_free(priv);
  7349. iwl4965_unset_hw_setting(priv);
  7350. iwl4965_clear_stations_table(priv);
  7351. if (priv->mac80211_registered) {
  7352. ieee80211_unregister_hw(priv->hw);
  7353. iwl4965_rate_control_unregister(priv->hw);
  7354. }
  7355. /*netif_stop_queue(dev); */
  7356. flush_workqueue(priv->workqueue);
  7357. /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
  7358. * priv->workqueue... so we can't take down the workqueue
  7359. * until now... */
  7360. destroy_workqueue(priv->workqueue);
  7361. priv->workqueue = NULL;
  7362. pci_iounmap(pdev, priv->hw_base);
  7363. pci_release_regions(pdev);
  7364. pci_disable_device(pdev);
  7365. pci_set_drvdata(pdev, NULL);
  7366. iwl4965_free_channel_map(priv);
  7367. iwl4965_free_geos(priv);
  7368. if (priv->ibss_beacon)
  7369. dev_kfree_skb(priv->ibss_beacon);
  7370. ieee80211_free_hw(priv->hw);
  7371. }
  7372. #ifdef CONFIG_PM
  7373. static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  7374. {
  7375. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7376. if (priv->is_open) {
  7377. set_bit(STATUS_IN_SUSPEND, &priv->status);
  7378. iwl4965_mac_stop(priv->hw);
  7379. priv->is_open = 1;
  7380. }
  7381. pci_set_power_state(pdev, PCI_D3hot);
  7382. return 0;
  7383. }
  7384. static int iwl4965_pci_resume(struct pci_dev *pdev)
  7385. {
  7386. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7387. pci_set_power_state(pdev, PCI_D0);
  7388. if (priv->is_open)
  7389. iwl4965_mac_start(priv->hw);
  7390. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  7391. return 0;
  7392. }
  7393. #endif /* CONFIG_PM */
  7394. /*****************************************************************************
  7395. *
  7396. * driver and module entry point
  7397. *
  7398. *****************************************************************************/
  7399. static struct pci_driver iwl4965_driver = {
  7400. .name = DRV_NAME,
  7401. .id_table = iwl4965_hw_card_ids,
  7402. .probe = iwl4965_pci_probe,
  7403. .remove = __devexit_p(iwl4965_pci_remove),
  7404. #ifdef CONFIG_PM
  7405. .suspend = iwl4965_pci_suspend,
  7406. .resume = iwl4965_pci_resume,
  7407. #endif
  7408. };
  7409. static int __init iwl4965_init(void)
  7410. {
  7411. int ret;
  7412. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  7413. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  7414. ret = pci_register_driver(&iwl4965_driver);
  7415. if (ret) {
  7416. IWL_ERROR("Unable to initialize PCI module\n");
  7417. return ret;
  7418. }
  7419. #ifdef CONFIG_IWL4965_DEBUG
  7420. ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7421. if (ret) {
  7422. IWL_ERROR("Unable to create driver sysfs file\n");
  7423. pci_unregister_driver(&iwl4965_driver);
  7424. return ret;
  7425. }
  7426. #endif
  7427. return ret;
  7428. }
  7429. static void __exit iwl4965_exit(void)
  7430. {
  7431. #ifdef CONFIG_IWL4965_DEBUG
  7432. driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7433. #endif
  7434. pci_unregister_driver(&iwl4965_driver);
  7435. }
  7436. module_param_named(antenna, iwl4965_param_antenna, int, 0444);
  7437. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  7438. module_param_named(disable, iwl4965_param_disable, int, 0444);
  7439. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  7440. module_param_named(hwcrypto, iwl4965_param_hwcrypto, int, 0444);
  7441. MODULE_PARM_DESC(hwcrypto,
  7442. "using hardware crypto engine (default 0 [software])\n");
  7443. module_param_named(debug, iwl4965_param_debug, int, 0444);
  7444. MODULE_PARM_DESC(debug, "debug output mask");
  7445. module_param_named(disable_hw_scan, iwl4965_param_disable_hw_scan, int, 0444);
  7446. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  7447. module_param_named(queues_num, iwl4965_param_queues_num, int, 0444);
  7448. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  7449. /* QoS */
  7450. module_param_named(qos_enable, iwl4965_param_qos_enable, int, 0444);
  7451. MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
  7452. module_param_named(amsdu_size_8K, iwl4965_param_amsdu_size_8K, int, 0444);
  7453. MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
  7454. module_exit(iwl4965_exit);
  7455. module_init(iwl4965_init);