Kconfig 8.5 KB

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  1. menu "Platform support"
  2. choice
  3. prompt "Machine type"
  4. depends on PPC64 || 6xx
  5. default PPC_MULTIPLATFORM
  6. config PPC_MULTIPLATFORM
  7. bool "Generic desktop/server/laptop"
  8. help
  9. Select this option if configuring for an IBM pSeries or
  10. RS/6000 machine, an Apple machine, or a PReP, CHRP,
  11. Maple or Cell-based machine.
  12. config PPC_82xx
  13. bool "Freescale 82xx"
  14. depends on 6xx
  15. select WANT_DEVICE_TREE
  16. config PPC_83xx
  17. bool "Freescale 83xx"
  18. depends on 6xx
  19. select FSL_SOC
  20. select MPC83xx
  21. select IPIC
  22. select WANT_DEVICE_TREE
  23. select FSL_EMB_PERFMON
  24. config PPC_86xx
  25. bool "Freescale 86xx"
  26. depends on 6xx
  27. select FSL_SOC
  28. select ALTIVEC
  29. help
  30. The Freescale E600 SoCs have 74xx cores.
  31. endchoice
  32. config CLASSIC32
  33. def_bool y
  34. depends on 6xx && PPC_MULTIPLATFORM
  35. source "arch/powerpc/platforms/pseries/Kconfig"
  36. source "arch/powerpc/platforms/iseries/Kconfig"
  37. source "arch/powerpc/platforms/chrp/Kconfig"
  38. source "arch/powerpc/platforms/52xx/Kconfig"
  39. source "arch/powerpc/platforms/powermac/Kconfig"
  40. source "arch/powerpc/platforms/prep/Kconfig"
  41. source "arch/powerpc/platforms/maple/Kconfig"
  42. source "arch/powerpc/platforms/pasemi/Kconfig"
  43. source "arch/powerpc/platforms/celleb/Kconfig"
  44. source "arch/powerpc/platforms/ps3/Kconfig"
  45. source "arch/powerpc/platforms/cell/Kconfig"
  46. source "arch/powerpc/platforms/8xx/Kconfig"
  47. source "arch/powerpc/platforms/82xx/Kconfig"
  48. source "arch/powerpc/platforms/83xx/Kconfig"
  49. source "arch/powerpc/platforms/85xx/Kconfig"
  50. source "arch/powerpc/platforms/86xx/Kconfig"
  51. source "arch/powerpc/platforms/embedded6xx/Kconfig"
  52. source "arch/powerpc/platforms/44x/Kconfig"
  53. source "arch/powerpc/platforms/40x/Kconfig"
  54. config PPC_NATIVE
  55. bool
  56. depends on PPC_MULTIPLATFORM
  57. help
  58. Support for running natively on the hardware, i.e. without
  59. a hypervisor. This option is not user-selectable but should
  60. be selected by all platforms that need it.
  61. config UDBG_RTAS_CONSOLE
  62. bool "RTAS based debug console"
  63. depends on PPC_RTAS
  64. default n
  65. config PPC_UDBG_BEAT
  66. bool "BEAT based debug console"
  67. depends on PPC_CELLEB
  68. default n
  69. config XICS
  70. depends on PPC_PSERIES
  71. bool
  72. default y
  73. config IPIC
  74. bool
  75. default n
  76. config MPIC
  77. bool
  78. default n
  79. config MPIC_WEIRD
  80. bool
  81. default n
  82. config PPC_I8259
  83. bool
  84. default n
  85. config U3_DART
  86. bool
  87. depends on PPC_MULTIPLATFORM && PPC64
  88. default n
  89. config PPC_RTAS
  90. bool
  91. default n
  92. config RTAS_ERROR_LOGGING
  93. bool
  94. depends on PPC_RTAS
  95. default n
  96. config RTAS_PROC
  97. bool "Proc interface to RTAS"
  98. depends on PPC_RTAS
  99. default y
  100. config RTAS_FLASH
  101. tristate "Firmware flash interface"
  102. depends on PPC64 && RTAS_PROC
  103. config PPC_PMI
  104. tristate "Support for PMI"
  105. depends on PPC_IBM_CELL_BLADE
  106. help
  107. PMI (Platform Management Interrupt) is a way to
  108. communicate with the BMC (Baseboard Management Controller).
  109. It is used in some IBM Cell blades.
  110. default m
  111. config MMIO_NVRAM
  112. bool
  113. default n
  114. config MPIC_U3_HT_IRQS
  115. bool
  116. depends on PPC_MAPLE
  117. default y
  118. config MPIC_BROKEN_REGREAD
  119. bool
  120. depends on MPIC
  121. help
  122. This option enables a MPIC driver workaround for some chips
  123. that have a bug that causes some interrupt source information
  124. to not read back properly. It is safe to use on other chips as
  125. well, but enabling it uses about 8KB of memory to keep copies
  126. of the register contents in software.
  127. config IBMVIO
  128. depends on PPC_PSERIES || PPC_ISERIES
  129. bool
  130. default y
  131. config IBMEBUS
  132. depends on PPC_PSERIES
  133. bool "Support for GX bus based adapters"
  134. help
  135. Bus device driver for GX bus based adapters.
  136. config PPC_MPC106
  137. bool
  138. default n
  139. config PPC_970_NAP
  140. bool
  141. default n
  142. config PPC_INDIRECT_IO
  143. bool
  144. select GENERIC_IOMAP
  145. default n
  146. config GENERIC_IOMAP
  147. bool
  148. default n
  149. source "drivers/cpufreq/Kconfig"
  150. menu "CPU Frequency drivers"
  151. depends on CPU_FREQ
  152. config CPU_FREQ_PMAC
  153. bool "Support for Apple PowerBooks"
  154. depends on ADB_PMU && PPC32
  155. select CPU_FREQ_TABLE
  156. help
  157. This adds support for frequency switching on Apple PowerBooks,
  158. this currently includes some models of iBook & Titanium
  159. PowerBook.
  160. config CPU_FREQ_PMAC64
  161. bool "Support for some Apple G5s"
  162. depends on PPC_PMAC && PPC64
  163. select CPU_FREQ_TABLE
  164. help
  165. This adds support for frequency switching on Apple iMac G5,
  166. and some of the more recent desktop G5 machines as well.
  167. config PPC_PASEMI_CPUFREQ
  168. bool "Support for PA Semi PWRficient"
  169. depends on PPC_PASEMI
  170. default y
  171. select CPU_FREQ_TABLE
  172. help
  173. This adds the support for frequency switching on PA Semi
  174. PWRficient processors.
  175. endmenu
  176. config PPC601_SYNC_FIX
  177. bool "Workarounds for PPC601 bugs"
  178. depends on 6xx && (PPC_PREP || PPC_PMAC)
  179. help
  180. Some versions of the PPC601 (the first PowerPC chip) have bugs which
  181. mean that extra synchronization instructions are required near
  182. certain instructions, typically those that make major changes to the
  183. CPU state. These extra instructions reduce performance slightly.
  184. If you say N here, these extra instructions will not be included,
  185. resulting in a kernel which will run faster but may not run at all
  186. on some systems with the PPC601 chip.
  187. If in doubt, say Y here.
  188. config TAU
  189. bool "On-chip CPU temperature sensor support"
  190. depends on CLASSIC32
  191. help
  192. G3 and G4 processors have an on-chip temperature sensor called the
  193. 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
  194. temperature within 2-4 degrees Celsius. This option shows the current
  195. on-die temperature in /proc/cpuinfo if the cpu supports it.
  196. Unfortunately, on some chip revisions, this sensor is very inaccurate
  197. and in many cases, does not work at all, so don't assume the cpu
  198. temp is actually what /proc/cpuinfo says it is.
  199. config TAU_INT
  200. bool "Interrupt driven TAU driver (DANGEROUS)"
  201. depends on TAU
  202. ---help---
  203. The TAU supports an interrupt driven mode which causes an interrupt
  204. whenever the temperature goes out of range. This is the fastest way
  205. to get notified the temp has exceeded a range. With this option off,
  206. a timer is used to re-check the temperature periodically.
  207. However, on some cpus it appears that the TAU interrupt hardware
  208. is buggy and can cause a situation which would lead unexplained hard
  209. lockups.
  210. Unless you are extending the TAU driver, or enjoy kernel/hardware
  211. debugging, leave this option off.
  212. config TAU_AVERAGE
  213. bool "Average high and low temp"
  214. depends on TAU
  215. ---help---
  216. The TAU hardware can compare the temperature to an upper and lower
  217. bound. The default behavior is to show both the upper and lower
  218. bound in /proc/cpuinfo. If the range is large, the temperature is
  219. either changing a lot, or the TAU hardware is broken (likely on some
  220. G4's). If the range is small (around 4 degrees), the temperature is
  221. relatively stable. If you say Y here, a single temperature value,
  222. halfway between the upper and lower bounds, will be reported in
  223. /proc/cpuinfo.
  224. If in doubt, say N here.
  225. config QUICC_ENGINE
  226. bool
  227. select PPC_LIB_RHEAP
  228. select CRC32
  229. help
  230. The QUICC Engine (QE) is a new generation of communications
  231. coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
  232. Selecting this option means that you wish to build a kernel
  233. for a machine with a QE coprocessor.
  234. config CPM2
  235. bool "Enable support for the CPM2 (Communications Processor Module)"
  236. depends on MPC85xx || 8260
  237. select CPM
  238. select PPC_LIB_RHEAP
  239. help
  240. The CPM2 (Communications Processor Module) is a coprocessor on
  241. embedded CPUs made by Freescale. Selecting this option means that
  242. you wish to build a kernel for a machine with a CPM2 coprocessor
  243. on it (826x, 827x, 8560).
  244. config PPC_CPM_NEW_BINDING
  245. bool
  246. depends on CPM1 || CPM2
  247. help
  248. Select this if your board has been converted to use the new
  249. device tree bindings for CPM, and no longer needs the
  250. ioport callbacks or the platform device glue code.
  251. The fs_enet and cpm_uart drivers will be built as
  252. of_platform devices.
  253. config AXON_RAM
  254. tristate "Axon DDR2 memory device driver"
  255. depends on PPC_IBM_CELL_BLADE
  256. default m
  257. help
  258. It registers one block device per Axon's DDR2 memory bank found
  259. on a system. Block devices are called axonram?, their major and
  260. minor numbers are available in /proc/devices, /proc/partitions or
  261. in /sys/block/axonram?/dev.
  262. config FSL_ULI1575
  263. bool
  264. default n
  265. select GENERIC_ISA_DMA
  266. help
  267. Supports for the ULI1575 PCIe south bridge that exists on some
  268. Freescale reference boards. The boards all use the ULI in pretty
  269. much the same way.
  270. config CPM
  271. bool
  272. config OF_RTC
  273. bool
  274. help
  275. Uses information from the OF or flattened device tree to instatiate
  276. platform devices for direct mapped RTC chips like the DS1742 or DS1743.
  277. source "arch/powerpc/sysdev/bestcomm/Kconfig"
  278. endmenu