mpparse.c 25 KB

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  1. /*
  2. * Intel Multiprocessor Specification 1.1 and 1.4
  3. * compliant MP-table parsing routines.
  4. *
  5. * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
  6. * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
  7. * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
  8. */
  9. #include <linux/mm.h>
  10. #include <linux/init.h>
  11. #include <linux/delay.h>
  12. #include <linux/bootmem.h>
  13. #include <linux/kernel_stat.h>
  14. #include <linux/mc146818rtc.h>
  15. #include <linux/bitops.h>
  16. #include <linux/acpi.h>
  17. #include <linux/module.h>
  18. #include <linux/smp.h>
  19. #include <asm/mtrr.h>
  20. #include <asm/mpspec.h>
  21. #include <asm/pgalloc.h>
  22. #include <asm/io_apic.h>
  23. #include <asm/proto.h>
  24. #include <asm/bios_ebda.h>
  25. #include <asm/e820.h>
  26. #include <asm/trampoline.h>
  27. #include <asm/setup.h>
  28. #include <asm/smp.h>
  29. #include <mach_apic.h>
  30. #ifdef CONFIG_X86_32
  31. #include <mach_apicdef.h>
  32. #include <mach_mpparse.h>
  33. #endif
  34. /*
  35. * Checksum an MP configuration block.
  36. */
  37. static int __init mpf_checksum(unsigned char *mp, int len)
  38. {
  39. int sum = 0;
  40. while (len--)
  41. sum += *mp++;
  42. return sum & 0xFF;
  43. }
  44. static void __init MP_processor_info(struct mpc_cpu *m)
  45. {
  46. int apicid;
  47. char *bootup_cpu = "";
  48. if (!(m->cpuflag & CPU_ENABLED)) {
  49. disabled_cpus++;
  50. return;
  51. }
  52. if (x86_quirks->mpc_apic_id)
  53. apicid = x86_quirks->mpc_apic_id(m);
  54. else
  55. apicid = m->apicid;
  56. if (m->cpuflag & CPU_BOOTPROCESSOR) {
  57. bootup_cpu = " (Bootup-CPU)";
  58. boot_cpu_physical_apicid = m->apicid;
  59. }
  60. printk(KERN_INFO "Processor #%d%s\n", m->apicid, bootup_cpu);
  61. generic_processor_info(apicid, m->apicver);
  62. }
  63. #ifdef CONFIG_X86_IO_APIC
  64. static void __init MP_bus_info(struct mpc_bus *m)
  65. {
  66. char str[7];
  67. memcpy(str, m->bustype, 6);
  68. str[6] = 0;
  69. if (x86_quirks->mpc_oem_bus_info)
  70. x86_quirks->mpc_oem_bus_info(m, str);
  71. else
  72. apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str);
  73. #if MAX_MP_BUSSES < 256
  74. if (m->busid >= MAX_MP_BUSSES) {
  75. printk(KERN_WARNING "MP table busid value (%d) for bustype %s "
  76. " is too large, max. supported is %d\n",
  77. m->busid, str, MAX_MP_BUSSES - 1);
  78. return;
  79. }
  80. #endif
  81. if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
  82. set_bit(m->busid, mp_bus_not_pci);
  83. #if defined(CONFIG_EISA) || defined(CONFIG_MCA)
  84. mp_bus_id_to_type[m->busid] = MP_BUS_ISA;
  85. #endif
  86. } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
  87. if (x86_quirks->mpc_oem_pci_bus)
  88. x86_quirks->mpc_oem_pci_bus(m);
  89. clear_bit(m->busid, mp_bus_not_pci);
  90. #if defined(CONFIG_EISA) || defined(CONFIG_MCA)
  91. mp_bus_id_to_type[m->busid] = MP_BUS_PCI;
  92. } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
  93. mp_bus_id_to_type[m->busid] = MP_BUS_EISA;
  94. } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) {
  95. mp_bus_id_to_type[m->busid] = MP_BUS_MCA;
  96. #endif
  97. } else
  98. printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);
  99. }
  100. #endif
  101. #ifdef CONFIG_X86_IO_APIC
  102. static int bad_ioapic(unsigned long address)
  103. {
  104. if (nr_ioapics >= MAX_IO_APICS) {
  105. printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
  106. "(found %d)\n", MAX_IO_APICS, nr_ioapics);
  107. panic("Recompile kernel with bigger MAX_IO_APICS!\n");
  108. }
  109. if (!address) {
  110. printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
  111. " found in table, skipping!\n");
  112. return 1;
  113. }
  114. return 0;
  115. }
  116. static void __init MP_ioapic_info(struct mpc_ioapic *m)
  117. {
  118. if (!(m->flags & MPC_APIC_USABLE))
  119. return;
  120. printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n",
  121. m->apicid, m->apicver, m->apicaddr);
  122. if (bad_ioapic(m->apicaddr))
  123. return;
  124. mp_ioapics[nr_ioapics].apicaddr = m->apicaddr;
  125. mp_ioapics[nr_ioapics].apicid = m->apicid;
  126. mp_ioapics[nr_ioapics].type = m->type;
  127. mp_ioapics[nr_ioapics].apicver = m->apicver;
  128. mp_ioapics[nr_ioapics].flags = m->flags;
  129. nr_ioapics++;
  130. }
  131. static void print_MP_intsrc_info(struct mpc_intsrc *m)
  132. {
  133. apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
  134. " IRQ %02x, APIC ID %x, APIC INT %02x\n",
  135. m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus,
  136. m->srcbusirq, m->dstapic, m->dstirq);
  137. }
  138. static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq)
  139. {
  140. apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
  141. " IRQ %02x, APIC ID %x, APIC INT %02x\n",
  142. mp_irq->irqtype, mp_irq->irqflag & 3,
  143. (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus,
  144. mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq);
  145. }
  146. static void __init assign_to_mp_irq(struct mpc_intsrc *m,
  147. struct mpc_intsrc *mp_irq)
  148. {
  149. mp_irq->dstapic = m->dstapic;
  150. mp_irq->type = m->type;
  151. mp_irq->irqtype = m->irqtype;
  152. mp_irq->irqflag = m->irqflag;
  153. mp_irq->srcbus = m->srcbus;
  154. mp_irq->srcbusirq = m->srcbusirq;
  155. mp_irq->dstirq = m->dstirq;
  156. }
  157. static void __init assign_to_mpc_intsrc(struct mpc_intsrc *mp_irq,
  158. struct mpc_intsrc *m)
  159. {
  160. m->dstapic = mp_irq->dstapic;
  161. m->type = mp_irq->type;
  162. m->irqtype = mp_irq->irqtype;
  163. m->irqflag = mp_irq->irqflag;
  164. m->srcbus = mp_irq->srcbus;
  165. m->srcbusirq = mp_irq->srcbusirq;
  166. m->dstirq = mp_irq->dstirq;
  167. }
  168. static int __init mp_irq_mpc_intsrc_cmp(struct mpc_intsrc *mp_irq,
  169. struct mpc_intsrc *m)
  170. {
  171. if (mp_irq->dstapic != m->dstapic)
  172. return 1;
  173. if (mp_irq->type != m->type)
  174. return 2;
  175. if (mp_irq->irqtype != m->irqtype)
  176. return 3;
  177. if (mp_irq->irqflag != m->irqflag)
  178. return 4;
  179. if (mp_irq->srcbus != m->srcbus)
  180. return 5;
  181. if (mp_irq->srcbusirq != m->srcbusirq)
  182. return 6;
  183. if (mp_irq->dstirq != m->dstirq)
  184. return 7;
  185. return 0;
  186. }
  187. static void __init MP_intsrc_info(struct mpc_intsrc *m)
  188. {
  189. int i;
  190. print_MP_intsrc_info(m);
  191. for (i = 0; i < mp_irq_entries; i++) {
  192. if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m))
  193. return;
  194. }
  195. assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
  196. if (++mp_irq_entries == MAX_IRQ_SOURCES)
  197. panic("Max # of irq sources exceeded!!\n");
  198. }
  199. #endif
  200. static void __init MP_lintsrc_info(struct mpc_lintsrc *m)
  201. {
  202. apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x,"
  203. " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
  204. m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid,
  205. m->srcbusirq, m->destapic, m->destapiclint);
  206. }
  207. /*
  208. * Read/parse the MPC
  209. */
  210. static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str)
  211. {
  212. if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) {
  213. printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
  214. mpc->signature[0], mpc->signature[1],
  215. mpc->signature[2], mpc->signature[3]);
  216. return 0;
  217. }
  218. if (mpf_checksum((unsigned char *)mpc, mpc->length)) {
  219. printk(KERN_ERR "MPTABLE: checksum error!\n");
  220. return 0;
  221. }
  222. if (mpc->spec != 0x01 && mpc->spec != 0x04) {
  223. printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
  224. mpc->spec);
  225. return 0;
  226. }
  227. if (!mpc->lapic) {
  228. printk(KERN_ERR "MPTABLE: null local APIC address!\n");
  229. return 0;
  230. }
  231. memcpy(oem, mpc->oem, 8);
  232. oem[8] = 0;
  233. printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem);
  234. memcpy(str, mpc->productid, 12);
  235. str[12] = 0;
  236. printk(KERN_INFO "MPTABLE: Product ID: %s\n", str);
  237. printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->lapic);
  238. return 1;
  239. }
  240. static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
  241. {
  242. char str[16];
  243. char oem[10];
  244. int count = sizeof(*mpc);
  245. unsigned char *mpt = ((unsigned char *)mpc) + count;
  246. if (!smp_check_mpc(mpc, oem, str))
  247. return 0;
  248. #ifdef CONFIG_X86_32
  249. mps_oem_check(mpc, oem, str);
  250. #endif
  251. /* save the local APIC address, it might be non-default */
  252. if (!acpi_lapic)
  253. mp_lapic_addr = mpc->lapic;
  254. if (early)
  255. return 1;
  256. if (mpc->oemptr && x86_quirks->smp_read_mpc_oem) {
  257. struct mpc_oemtable *oem_table = (void *)(long)mpc->oemptr;
  258. x86_quirks->smp_read_mpc_oem(oem_table, mpc->oemsize);
  259. }
  260. /*
  261. * Now process the configuration blocks.
  262. */
  263. if (x86_quirks->mpc_record)
  264. *x86_quirks->mpc_record = 0;
  265. while (count < mpc->length) {
  266. switch (*mpt) {
  267. case MP_PROCESSOR:
  268. {
  269. struct mpc_cpu *m = (struct mpc_cpu *)mpt;
  270. /* ACPI may have already provided this data */
  271. if (!acpi_lapic)
  272. MP_processor_info(m);
  273. mpt += sizeof(*m);
  274. count += sizeof(*m);
  275. break;
  276. }
  277. case MP_BUS:
  278. {
  279. struct mpc_bus *m = (struct mpc_bus *)mpt;
  280. #ifdef CONFIG_X86_IO_APIC
  281. MP_bus_info(m);
  282. #endif
  283. mpt += sizeof(*m);
  284. count += sizeof(*m);
  285. break;
  286. }
  287. case MP_IOAPIC:
  288. {
  289. #ifdef CONFIG_X86_IO_APIC
  290. struct mpc_ioapic *m = (struct mpc_ioapic *)mpt;
  291. MP_ioapic_info(m);
  292. #endif
  293. mpt += sizeof(struct mpc_ioapic);
  294. count += sizeof(struct mpc_ioapic);
  295. break;
  296. }
  297. case MP_INTSRC:
  298. {
  299. #ifdef CONFIG_X86_IO_APIC
  300. struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
  301. MP_intsrc_info(m);
  302. #endif
  303. mpt += sizeof(struct mpc_intsrc);
  304. count += sizeof(struct mpc_intsrc);
  305. break;
  306. }
  307. case MP_LINTSRC:
  308. {
  309. struct mpc_lintsrc *m =
  310. (struct mpc_lintsrc *)mpt;
  311. MP_lintsrc_info(m);
  312. mpt += sizeof(*m);
  313. count += sizeof(*m);
  314. break;
  315. }
  316. default:
  317. /* wrong mptable */
  318. printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n");
  319. printk(KERN_ERR "type %x\n", *mpt);
  320. print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
  321. 1, mpc, mpc->length, 1);
  322. count = mpc->length;
  323. break;
  324. }
  325. if (x86_quirks->mpc_record)
  326. (*x86_quirks->mpc_record)++;
  327. }
  328. #ifdef CONFIG_X86_GENERICARCH
  329. generic_bigsmp_probe();
  330. #endif
  331. if (apic->setup_apic_routing)
  332. apic->setup_apic_routing();
  333. if (!num_processors)
  334. printk(KERN_ERR "MPTABLE: no processors registered!\n");
  335. return num_processors;
  336. }
  337. #ifdef CONFIG_X86_IO_APIC
  338. static int __init ELCR_trigger(unsigned int irq)
  339. {
  340. unsigned int port;
  341. port = 0x4d0 + (irq >> 3);
  342. return (inb(port) >> (irq & 7)) & 1;
  343. }
  344. static void __init construct_default_ioirq_mptable(int mpc_default_type)
  345. {
  346. struct mpc_intsrc intsrc;
  347. int i;
  348. int ELCR_fallback = 0;
  349. intsrc.type = MP_INTSRC;
  350. intsrc.irqflag = 0; /* conforming */
  351. intsrc.srcbus = 0;
  352. intsrc.dstapic = mp_ioapics[0].apicid;
  353. intsrc.irqtype = mp_INT;
  354. /*
  355. * If true, we have an ISA/PCI system with no IRQ entries
  356. * in the MP table. To prevent the PCI interrupts from being set up
  357. * incorrectly, we try to use the ELCR. The sanity check to see if
  358. * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
  359. * never be level sensitive, so we simply see if the ELCR agrees.
  360. * If it does, we assume it's valid.
  361. */
  362. if (mpc_default_type == 5) {
  363. printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
  364. "falling back to ELCR\n");
  365. if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
  366. ELCR_trigger(13))
  367. printk(KERN_ERR "ELCR contains invalid data... "
  368. "not using ELCR\n");
  369. else {
  370. printk(KERN_INFO
  371. "Using ELCR to identify PCI interrupts\n");
  372. ELCR_fallback = 1;
  373. }
  374. }
  375. for (i = 0; i < 16; i++) {
  376. switch (mpc_default_type) {
  377. case 2:
  378. if (i == 0 || i == 13)
  379. continue; /* IRQ0 & IRQ13 not connected */
  380. /* fall through */
  381. default:
  382. if (i == 2)
  383. continue; /* IRQ2 is never connected */
  384. }
  385. if (ELCR_fallback) {
  386. /*
  387. * If the ELCR indicates a level-sensitive interrupt, we
  388. * copy that information over to the MP table in the
  389. * irqflag field (level sensitive, active high polarity).
  390. */
  391. if (ELCR_trigger(i))
  392. intsrc.irqflag = 13;
  393. else
  394. intsrc.irqflag = 0;
  395. }
  396. intsrc.srcbusirq = i;
  397. intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
  398. MP_intsrc_info(&intsrc);
  399. }
  400. intsrc.irqtype = mp_ExtINT;
  401. intsrc.srcbusirq = 0;
  402. intsrc.dstirq = 0; /* 8259A to INTIN0 */
  403. MP_intsrc_info(&intsrc);
  404. }
  405. static void __init construct_ioapic_table(int mpc_default_type)
  406. {
  407. struct mpc_ioapic ioapic;
  408. struct mpc_bus bus;
  409. bus.type = MP_BUS;
  410. bus.busid = 0;
  411. switch (mpc_default_type) {
  412. default:
  413. printk(KERN_ERR "???\nUnknown standard configuration %d\n",
  414. mpc_default_type);
  415. /* fall through */
  416. case 1:
  417. case 5:
  418. memcpy(bus.bustype, "ISA ", 6);
  419. break;
  420. case 2:
  421. case 6:
  422. case 3:
  423. memcpy(bus.bustype, "EISA ", 6);
  424. break;
  425. case 4:
  426. case 7:
  427. memcpy(bus.bustype, "MCA ", 6);
  428. }
  429. MP_bus_info(&bus);
  430. if (mpc_default_type > 4) {
  431. bus.busid = 1;
  432. memcpy(bus.bustype, "PCI ", 6);
  433. MP_bus_info(&bus);
  434. }
  435. ioapic.type = MP_IOAPIC;
  436. ioapic.apicid = 2;
  437. ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
  438. ioapic.flags = MPC_APIC_USABLE;
  439. ioapic.apicaddr = 0xFEC00000;
  440. MP_ioapic_info(&ioapic);
  441. /*
  442. * We set up most of the low 16 IO-APIC pins according to MPS rules.
  443. */
  444. construct_default_ioirq_mptable(mpc_default_type);
  445. }
  446. #else
  447. static inline void __init construct_ioapic_table(int mpc_default_type) { }
  448. #endif
  449. static inline void __init construct_default_ISA_mptable(int mpc_default_type)
  450. {
  451. struct mpc_cpu processor;
  452. struct mpc_lintsrc lintsrc;
  453. int linttypes[2] = { mp_ExtINT, mp_NMI };
  454. int i;
  455. /*
  456. * local APIC has default address
  457. */
  458. mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
  459. /*
  460. * 2 CPUs, numbered 0 & 1.
  461. */
  462. processor.type = MP_PROCESSOR;
  463. /* Either an integrated APIC or a discrete 82489DX. */
  464. processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
  465. processor.cpuflag = CPU_ENABLED;
  466. processor.cpufeature = (boot_cpu_data.x86 << 8) |
  467. (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask;
  468. processor.featureflag = boot_cpu_data.x86_capability[0];
  469. processor.reserved[0] = 0;
  470. processor.reserved[1] = 0;
  471. for (i = 0; i < 2; i++) {
  472. processor.apicid = i;
  473. MP_processor_info(&processor);
  474. }
  475. construct_ioapic_table(mpc_default_type);
  476. lintsrc.type = MP_LINTSRC;
  477. lintsrc.irqflag = 0; /* conforming */
  478. lintsrc.srcbusid = 0;
  479. lintsrc.srcbusirq = 0;
  480. lintsrc.destapic = MP_APIC_ALL;
  481. for (i = 0; i < 2; i++) {
  482. lintsrc.irqtype = linttypes[i];
  483. lintsrc.destapiclint = i;
  484. MP_lintsrc_info(&lintsrc);
  485. }
  486. }
  487. static struct mpf_intel *mpf_found;
  488. /*
  489. * Scan the memory blocks for an SMP configuration block.
  490. */
  491. static void __init __get_smp_config(unsigned int early)
  492. {
  493. struct mpf_intel *mpf = mpf_found;
  494. if (!mpf)
  495. return;
  496. if (acpi_lapic && early)
  497. return;
  498. /*
  499. * MPS doesn't support hyperthreading, aka only have
  500. * thread 0 apic id in MPS table
  501. */
  502. if (acpi_lapic && acpi_ioapic)
  503. return;
  504. if (x86_quirks->mach_get_smp_config) {
  505. if (x86_quirks->mach_get_smp_config(early))
  506. return;
  507. }
  508. printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
  509. mpf->specification);
  510. #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
  511. if (mpf->feature2 & (1 << 7)) {
  512. printk(KERN_INFO " IMCR and PIC compatibility mode.\n");
  513. pic_mode = 1;
  514. } else {
  515. printk(KERN_INFO " Virtual Wire compatibility mode.\n");
  516. pic_mode = 0;
  517. }
  518. #endif
  519. /*
  520. * Now see if we need to read further.
  521. */
  522. if (mpf->feature1 != 0) {
  523. if (early) {
  524. /*
  525. * local APIC has default address
  526. */
  527. mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
  528. return;
  529. }
  530. printk(KERN_INFO "Default MP configuration #%d\n",
  531. mpf->feature1);
  532. construct_default_ISA_mptable(mpf->feature1);
  533. } else if (mpf->physptr) {
  534. /*
  535. * Read the physical hardware table. Anything here will
  536. * override the defaults.
  537. */
  538. if (!smp_read_mpc(phys_to_virt(mpf->physptr), early)) {
  539. #ifdef CONFIG_X86_LOCAL_APIC
  540. smp_found_config = 0;
  541. #endif
  542. printk(KERN_ERR
  543. "BIOS bug, MP table errors detected!...\n");
  544. printk(KERN_ERR "... disabling SMP support. "
  545. "(tell your hw vendor)\n");
  546. return;
  547. }
  548. if (early)
  549. return;
  550. #ifdef CONFIG_X86_IO_APIC
  551. /*
  552. * If there are no explicit MP IRQ entries, then we are
  553. * broken. We set up most of the low 16 IO-APIC pins to
  554. * ISA defaults and hope it will work.
  555. */
  556. if (!mp_irq_entries) {
  557. struct mpc_bus bus;
  558. printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
  559. "using default mptable. "
  560. "(tell your hw vendor)\n");
  561. bus.type = MP_BUS;
  562. bus.busid = 0;
  563. memcpy(bus.bustype, "ISA ", 6);
  564. MP_bus_info(&bus);
  565. construct_default_ioirq_mptable(0);
  566. }
  567. #endif
  568. } else
  569. BUG();
  570. if (!early)
  571. printk(KERN_INFO "Processors: %d\n", num_processors);
  572. /*
  573. * Only use the first configuration found.
  574. */
  575. }
  576. void __init early_get_smp_config(void)
  577. {
  578. __get_smp_config(1);
  579. }
  580. void __init get_smp_config(void)
  581. {
  582. __get_smp_config(0);
  583. }
  584. static int __init smp_scan_config(unsigned long base, unsigned long length,
  585. unsigned reserve)
  586. {
  587. unsigned int *bp = phys_to_virt(base);
  588. struct mpf_intel *mpf;
  589. apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n",
  590. bp, length);
  591. BUILD_BUG_ON(sizeof(*mpf) != 16);
  592. while (length > 0) {
  593. mpf = (struct mpf_intel *)bp;
  594. if ((*bp == SMP_MAGIC_IDENT) &&
  595. (mpf->length == 1) &&
  596. !mpf_checksum((unsigned char *)bp, 16) &&
  597. ((mpf->specification == 1)
  598. || (mpf->specification == 4))) {
  599. #ifdef CONFIG_X86_LOCAL_APIC
  600. smp_found_config = 1;
  601. #endif
  602. mpf_found = mpf;
  603. printk(KERN_INFO "found SMP MP-table at [%p] %08lx\n",
  604. mpf, virt_to_phys(mpf));
  605. if (!reserve)
  606. return 1;
  607. reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE,
  608. BOOTMEM_DEFAULT);
  609. if (mpf->physptr) {
  610. unsigned long size = PAGE_SIZE;
  611. #ifdef CONFIG_X86_32
  612. /*
  613. * We cannot access to MPC table to compute
  614. * table size yet, as only few megabytes from
  615. * the bottom is mapped now.
  616. * PC-9800's MPC table places on the very last
  617. * of physical memory; so that simply reserving
  618. * PAGE_SIZE from mpf->physptr yields BUG()
  619. * in reserve_bootmem.
  620. */
  621. unsigned long end = max_low_pfn * PAGE_SIZE;
  622. if (mpf->physptr + size > end)
  623. size = end - mpf->physptr;
  624. #endif
  625. reserve_bootmem_generic(mpf->physptr, size,
  626. BOOTMEM_DEFAULT);
  627. }
  628. return 1;
  629. }
  630. bp += 4;
  631. length -= 16;
  632. }
  633. return 0;
  634. }
  635. static void __init __find_smp_config(unsigned int reserve)
  636. {
  637. unsigned int address;
  638. if (x86_quirks->mach_find_smp_config) {
  639. if (x86_quirks->mach_find_smp_config(reserve))
  640. return;
  641. }
  642. /*
  643. * FIXME: Linux assumes you have 640K of base ram..
  644. * this continues the error...
  645. *
  646. * 1) Scan the bottom 1K for a signature
  647. * 2) Scan the top 1K of base RAM
  648. * 3) Scan the 64K of bios
  649. */
  650. if (smp_scan_config(0x0, 0x400, reserve) ||
  651. smp_scan_config(639 * 0x400, 0x400, reserve) ||
  652. smp_scan_config(0xF0000, 0x10000, reserve))
  653. return;
  654. /*
  655. * If it is an SMP machine we should know now, unless the
  656. * configuration is in an EISA/MCA bus machine with an
  657. * extended bios data area.
  658. *
  659. * there is a real-mode segmented pointer pointing to the
  660. * 4K EBDA area at 0x40E, calculate and scan it here.
  661. *
  662. * NOTE! There are Linux loaders that will corrupt the EBDA
  663. * area, and as such this kind of SMP config may be less
  664. * trustworthy, simply because the SMP table may have been
  665. * stomped on during early boot. These loaders are buggy and
  666. * should be fixed.
  667. *
  668. * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
  669. */
  670. address = get_bios_ebda();
  671. if (address)
  672. smp_scan_config(address, 0x400, reserve);
  673. }
  674. void __init early_find_smp_config(void)
  675. {
  676. __find_smp_config(0);
  677. }
  678. void __init find_smp_config(void)
  679. {
  680. __find_smp_config(1);
  681. }
  682. #ifdef CONFIG_X86_IO_APIC
  683. static u8 __initdata irq_used[MAX_IRQ_SOURCES];
  684. static int __init get_MP_intsrc_index(struct mpc_intsrc *m)
  685. {
  686. int i;
  687. if (m->irqtype != mp_INT)
  688. return 0;
  689. if (m->irqflag != 0x0f)
  690. return 0;
  691. /* not legacy */
  692. for (i = 0; i < mp_irq_entries; i++) {
  693. if (mp_irqs[i].irqtype != mp_INT)
  694. continue;
  695. if (mp_irqs[i].irqflag != 0x0f)
  696. continue;
  697. if (mp_irqs[i].srcbus != m->srcbus)
  698. continue;
  699. if (mp_irqs[i].srcbusirq != m->srcbusirq)
  700. continue;
  701. if (irq_used[i]) {
  702. /* already claimed */
  703. return -2;
  704. }
  705. irq_used[i] = 1;
  706. return i;
  707. }
  708. /* not found */
  709. return -1;
  710. }
  711. #define SPARE_SLOT_NUM 20
  712. static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM];
  713. #endif
  714. static int __init replace_intsrc_all(struct mpc_table *mpc,
  715. unsigned long mpc_new_phys,
  716. unsigned long mpc_new_length)
  717. {
  718. #ifdef CONFIG_X86_IO_APIC
  719. int i;
  720. int nr_m_spare = 0;
  721. #endif
  722. int count = sizeof(*mpc);
  723. unsigned char *mpt = ((unsigned char *)mpc) + count;
  724. printk(KERN_INFO "mpc_length %x\n", mpc->length);
  725. while (count < mpc->length) {
  726. switch (*mpt) {
  727. case MP_PROCESSOR:
  728. {
  729. struct mpc_cpu *m = (struct mpc_cpu *)mpt;
  730. mpt += sizeof(*m);
  731. count += sizeof(*m);
  732. break;
  733. }
  734. case MP_BUS:
  735. {
  736. struct mpc_bus *m = (struct mpc_bus *)mpt;
  737. mpt += sizeof(*m);
  738. count += sizeof(*m);
  739. break;
  740. }
  741. case MP_IOAPIC:
  742. {
  743. mpt += sizeof(struct mpc_ioapic);
  744. count += sizeof(struct mpc_ioapic);
  745. break;
  746. }
  747. case MP_INTSRC:
  748. {
  749. #ifdef CONFIG_X86_IO_APIC
  750. struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
  751. printk(KERN_INFO "OLD ");
  752. print_MP_intsrc_info(m);
  753. i = get_MP_intsrc_index(m);
  754. if (i > 0) {
  755. assign_to_mpc_intsrc(&mp_irqs[i], m);
  756. printk(KERN_INFO "NEW ");
  757. print_mp_irq_info(&mp_irqs[i]);
  758. } else if (!i) {
  759. /* legacy, do nothing */
  760. } else if (nr_m_spare < SPARE_SLOT_NUM) {
  761. /*
  762. * not found (-1), or duplicated (-2)
  763. * are invalid entries,
  764. * we need to use the slot later
  765. */
  766. m_spare[nr_m_spare] = m;
  767. nr_m_spare++;
  768. }
  769. #endif
  770. mpt += sizeof(struct mpc_intsrc);
  771. count += sizeof(struct mpc_intsrc);
  772. break;
  773. }
  774. case MP_LINTSRC:
  775. {
  776. struct mpc_lintsrc *m =
  777. (struct mpc_lintsrc *)mpt;
  778. mpt += sizeof(*m);
  779. count += sizeof(*m);
  780. break;
  781. }
  782. default:
  783. /* wrong mptable */
  784. printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n");
  785. printk(KERN_ERR "type %x\n", *mpt);
  786. print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
  787. 1, mpc, mpc->length, 1);
  788. goto out;
  789. }
  790. }
  791. #ifdef CONFIG_X86_IO_APIC
  792. for (i = 0; i < mp_irq_entries; i++) {
  793. if (irq_used[i])
  794. continue;
  795. if (mp_irqs[i].irqtype != mp_INT)
  796. continue;
  797. if (mp_irqs[i].irqflag != 0x0f)
  798. continue;
  799. if (nr_m_spare > 0) {
  800. printk(KERN_INFO "*NEW* found ");
  801. nr_m_spare--;
  802. assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]);
  803. m_spare[nr_m_spare] = NULL;
  804. } else {
  805. struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
  806. count += sizeof(struct mpc_intsrc);
  807. if (!mpc_new_phys) {
  808. printk(KERN_INFO "No spare slots, try to append...take your risk, new mpc_length %x\n", count);
  809. } else {
  810. if (count <= mpc_new_length)
  811. printk(KERN_INFO "No spare slots, try to append..., new mpc_length %x\n", count);
  812. else {
  813. printk(KERN_ERR "mpc_new_length %lx is too small\n", mpc_new_length);
  814. goto out;
  815. }
  816. }
  817. assign_to_mpc_intsrc(&mp_irqs[i], m);
  818. mpc->length = count;
  819. mpt += sizeof(struct mpc_intsrc);
  820. }
  821. print_mp_irq_info(&mp_irqs[i]);
  822. }
  823. #endif
  824. out:
  825. /* update checksum */
  826. mpc->checksum = 0;
  827. mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length);
  828. return 0;
  829. }
  830. static int __initdata enable_update_mptable;
  831. static int __init update_mptable_setup(char *str)
  832. {
  833. enable_update_mptable = 1;
  834. return 0;
  835. }
  836. early_param("update_mptable", update_mptable_setup);
  837. static unsigned long __initdata mpc_new_phys;
  838. static unsigned long mpc_new_length __initdata = 4096;
  839. /* alloc_mptable or alloc_mptable=4k */
  840. static int __initdata alloc_mptable;
  841. static int __init parse_alloc_mptable_opt(char *p)
  842. {
  843. enable_update_mptable = 1;
  844. alloc_mptable = 1;
  845. if (!p)
  846. return 0;
  847. mpc_new_length = memparse(p, &p);
  848. return 0;
  849. }
  850. early_param("alloc_mptable", parse_alloc_mptable_opt);
  851. void __init early_reserve_e820_mpc_new(void)
  852. {
  853. if (enable_update_mptable && alloc_mptable) {
  854. u64 startt = 0;
  855. #ifdef CONFIG_X86_TRAMPOLINE
  856. startt = TRAMPOLINE_BASE;
  857. #endif
  858. mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4);
  859. }
  860. }
  861. static int __init update_mp_table(void)
  862. {
  863. char str[16];
  864. char oem[10];
  865. struct mpf_intel *mpf;
  866. struct mpc_table *mpc, *mpc_new;
  867. if (!enable_update_mptable)
  868. return 0;
  869. mpf = mpf_found;
  870. if (!mpf)
  871. return 0;
  872. /*
  873. * Now see if we need to go further.
  874. */
  875. if (mpf->feature1 != 0)
  876. return 0;
  877. if (!mpf->physptr)
  878. return 0;
  879. mpc = phys_to_virt(mpf->physptr);
  880. if (!smp_check_mpc(mpc, oem, str))
  881. return 0;
  882. printk(KERN_INFO "mpf: %lx\n", virt_to_phys(mpf));
  883. printk(KERN_INFO "physptr: %x\n", mpf->physptr);
  884. if (mpc_new_phys && mpc->length > mpc_new_length) {
  885. mpc_new_phys = 0;
  886. printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n",
  887. mpc_new_length);
  888. }
  889. if (!mpc_new_phys) {
  890. unsigned char old, new;
  891. /* check if we can change the postion */
  892. mpc->checksum = 0;
  893. old = mpf_checksum((unsigned char *)mpc, mpc->length);
  894. mpc->checksum = 0xff;
  895. new = mpf_checksum((unsigned char *)mpc, mpc->length);
  896. if (old == new) {
  897. printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n");
  898. return 0;
  899. }
  900. printk(KERN_INFO "use in-positon replacing\n");
  901. } else {
  902. mpf->physptr = mpc_new_phys;
  903. mpc_new = phys_to_virt(mpc_new_phys);
  904. memcpy(mpc_new, mpc, mpc->length);
  905. mpc = mpc_new;
  906. /* check if we can modify that */
  907. if (mpc_new_phys - mpf->physptr) {
  908. struct mpf_intel *mpf_new;
  909. /* steal 16 bytes from [0, 1k) */
  910. printk(KERN_INFO "mpf new: %x\n", 0x400 - 16);
  911. mpf_new = phys_to_virt(0x400 - 16);
  912. memcpy(mpf_new, mpf, 16);
  913. mpf = mpf_new;
  914. mpf->physptr = mpc_new_phys;
  915. }
  916. mpf->checksum = 0;
  917. mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16);
  918. printk(KERN_INFO "physptr new: %x\n", mpf->physptr);
  919. }
  920. /*
  921. * only replace the one with mp_INT and
  922. * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
  923. * already in mp_irqs , stored by ... and mp_config_acpi_gsi,
  924. * may need pci=routeirq for all coverage
  925. */
  926. replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length);
  927. return 0;
  928. }
  929. late_initcall(update_mp_table);