ice1712.c 82 KB

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  1. /*
  2. * ALSA driver for ICEnsemble ICE1712 (Envy24)
  3. *
  4. * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. *
  20. */
  21. /*
  22. NOTES:
  23. - spdif nonaudio consumer mode does not work (at least with my
  24. Sony STR-DB830)
  25. */
  26. /*
  27. * Changes:
  28. *
  29. * 2002.09.09 Takashi Iwai <tiwai@suse.de>
  30. * split the code to several files. each low-level routine
  31. * is stored in the local file and called from registration
  32. * function from card_info struct.
  33. *
  34. * 2002.11.26 James Stafford <jstafford@ampltd.com>
  35. * Added support for VT1724 (Envy24HT)
  36. * I have left out support for 176.4 and 192 KHz for the moment.
  37. * I also haven't done anything with the internal S/PDIF transmitter or the MPU-401
  38. *
  39. * 2003.02.20 Taksahi Iwai <tiwai@suse.de>
  40. * Split vt1724 part to an independent driver.
  41. * The GPIO is accessed through the callback functions now.
  42. *
  43. * 2004.03.31 Doug McLain <nostar@comcast.net>
  44. * Added support for Event Electronics EZ8 card to hoontech.c.
  45. */
  46. #include <linux/io.h>
  47. #include <linux/delay.h>
  48. #include <linux/interrupt.h>
  49. #include <linux/init.h>
  50. #include <linux/pci.h>
  51. #include <linux/dma-mapping.h>
  52. #include <linux/slab.h>
  53. #include <linux/moduleparam.h>
  54. #include <linux/mutex.h>
  55. #include <sound/core.h>
  56. #include <sound/cs8427.h>
  57. #include <sound/info.h>
  58. #include <sound/initval.h>
  59. #include <sound/tlv.h>
  60. #include <sound/asoundef.h>
  61. #include "ice1712.h"
  62. /* lowlevel routines */
  63. #include "delta.h"
  64. #include "ews.h"
  65. #include "hoontech.h"
  66. MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
  67. MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)");
  68. MODULE_LICENSE("GPL");
  69. MODULE_SUPPORTED_DEVICE("{"
  70. HOONTECH_DEVICE_DESC
  71. DELTA_DEVICE_DESC
  72. EWS_DEVICE_DESC
  73. "{ICEnsemble,Generic ICE1712},"
  74. "{ICEnsemble,Generic Envy24}}");
  75. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  76. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  77. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */
  78. static char *model[SNDRV_CARDS];
  79. static int omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */
  80. static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transciever reset timeout value in msec */
  81. static int dxr_enable[SNDRV_CARDS]; /* DXR enable for DMX6FIRE */
  82. module_param_array(index, int, NULL, 0444);
  83. MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard.");
  84. module_param_array(id, charp, NULL, 0444);
  85. MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard.");
  86. module_param_array(enable, bool, NULL, 0444);
  87. MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard.");
  88. module_param_array(omni, bool, NULL, 0444);
  89. MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support.");
  90. module_param_array(cs8427_timeout, int, NULL, 0444);
  91. MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution.");
  92. module_param_array(model, charp, NULL, 0444);
  93. MODULE_PARM_DESC(model, "Use the given board model.");
  94. module_param_array(dxr_enable, int, NULL, 0444);
  95. MODULE_PARM_DESC(dxr_enable, "Enable DXR support for Terratec DMX6FIRE.");
  96. static DEFINE_PCI_DEVICE_TABLE(snd_ice1712_ids) = {
  97. { PCI_VDEVICE(ICE, PCI_DEVICE_ID_ICE_1712), 0 }, /* ICE1712 */
  98. { 0, }
  99. };
  100. MODULE_DEVICE_TABLE(pci, snd_ice1712_ids);
  101. static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice);
  102. static int snd_ice1712_build_controls(struct snd_ice1712 *ice);
  103. static int PRO_RATE_LOCKED;
  104. static int PRO_RATE_RESET = 1;
  105. static unsigned int PRO_RATE_DEFAULT = 44100;
  106. /*
  107. * Basic I/O
  108. */
  109. /* check whether the clock mode is spdif-in */
  110. static inline int is_spdif_master(struct snd_ice1712 *ice)
  111. {
  112. return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0;
  113. }
  114. static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
  115. {
  116. return is_spdif_master(ice) || PRO_RATE_LOCKED;
  117. }
  118. static inline void snd_ice1712_ds_write(struct snd_ice1712 *ice, u8 channel, u8 addr, u32 data)
  119. {
  120. outb((channel << 4) | addr, ICEDS(ice, INDEX));
  121. outl(data, ICEDS(ice, DATA));
  122. }
  123. static inline u32 snd_ice1712_ds_read(struct snd_ice1712 *ice, u8 channel, u8 addr)
  124. {
  125. outb((channel << 4) | addr, ICEDS(ice, INDEX));
  126. return inl(ICEDS(ice, DATA));
  127. }
  128. static void snd_ice1712_ac97_write(struct snd_ac97 *ac97,
  129. unsigned short reg,
  130. unsigned short val)
  131. {
  132. struct snd_ice1712 *ice = ac97->private_data;
  133. int tm;
  134. unsigned char old_cmd = 0;
  135. for (tm = 0; tm < 0x10000; tm++) {
  136. old_cmd = inb(ICEREG(ice, AC97_CMD));
  137. if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
  138. continue;
  139. if (!(old_cmd & ICE1712_AC97_READY))
  140. continue;
  141. break;
  142. }
  143. outb(reg, ICEREG(ice, AC97_INDEX));
  144. outw(val, ICEREG(ice, AC97_DATA));
  145. old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
  146. outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD));
  147. for (tm = 0; tm < 0x10000; tm++)
  148. if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
  149. break;
  150. }
  151. static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97,
  152. unsigned short reg)
  153. {
  154. struct snd_ice1712 *ice = ac97->private_data;
  155. int tm;
  156. unsigned char old_cmd = 0;
  157. for (tm = 0; tm < 0x10000; tm++) {
  158. old_cmd = inb(ICEREG(ice, AC97_CMD));
  159. if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
  160. continue;
  161. if (!(old_cmd & ICE1712_AC97_READY))
  162. continue;
  163. break;
  164. }
  165. outb(reg, ICEREG(ice, AC97_INDEX));
  166. outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD));
  167. for (tm = 0; tm < 0x10000; tm++)
  168. if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
  169. break;
  170. if (tm >= 0x10000) /* timeout */
  171. return ~0;
  172. return inw(ICEREG(ice, AC97_DATA));
  173. }
  174. /*
  175. * pro ac97 section
  176. */
  177. static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97,
  178. unsigned short reg,
  179. unsigned short val)
  180. {
  181. struct snd_ice1712 *ice = ac97->private_data;
  182. int tm;
  183. unsigned char old_cmd = 0;
  184. for (tm = 0; tm < 0x10000; tm++) {
  185. old_cmd = inb(ICEMT(ice, AC97_CMD));
  186. if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
  187. continue;
  188. if (!(old_cmd & ICE1712_AC97_READY))
  189. continue;
  190. break;
  191. }
  192. outb(reg, ICEMT(ice, AC97_INDEX));
  193. outw(val, ICEMT(ice, AC97_DATA));
  194. old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
  195. outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD));
  196. for (tm = 0; tm < 0x10000; tm++)
  197. if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
  198. break;
  199. }
  200. static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97,
  201. unsigned short reg)
  202. {
  203. struct snd_ice1712 *ice = ac97->private_data;
  204. int tm;
  205. unsigned char old_cmd = 0;
  206. for (tm = 0; tm < 0x10000; tm++) {
  207. old_cmd = inb(ICEMT(ice, AC97_CMD));
  208. if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
  209. continue;
  210. if (!(old_cmd & ICE1712_AC97_READY))
  211. continue;
  212. break;
  213. }
  214. outb(reg, ICEMT(ice, AC97_INDEX));
  215. outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD));
  216. for (tm = 0; tm < 0x10000; tm++)
  217. if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
  218. break;
  219. if (tm >= 0x10000) /* timeout */
  220. return ~0;
  221. return inw(ICEMT(ice, AC97_DATA));
  222. }
  223. /*
  224. * consumer ac97 digital mix
  225. */
  226. #define snd_ice1712_digmix_route_ac97_info snd_ctl_boolean_mono_info
  227. static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  228. {
  229. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  230. ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0;
  231. return 0;
  232. }
  233. static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  234. {
  235. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  236. unsigned char val, nval;
  237. spin_lock_irq(&ice->reg_lock);
  238. val = inb(ICEMT(ice, MONITOR_ROUTECTRL));
  239. nval = val & ~ICE1712_ROUTE_AC97;
  240. if (ucontrol->value.integer.value[0])
  241. nval |= ICE1712_ROUTE_AC97;
  242. outb(nval, ICEMT(ice, MONITOR_ROUTECTRL));
  243. spin_unlock_irq(&ice->reg_lock);
  244. return val != nval;
  245. }
  246. static struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 __devinitdata = {
  247. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  248. .name = "Digital Mixer To AC97",
  249. .info = snd_ice1712_digmix_route_ac97_info,
  250. .get = snd_ice1712_digmix_route_ac97_get,
  251. .put = snd_ice1712_digmix_route_ac97_put,
  252. };
  253. /*
  254. * gpio operations
  255. */
  256. static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
  257. {
  258. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data);
  259. inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
  260. }
  261. static unsigned int snd_ice1712_get_gpio_dir(struct snd_ice1712 *ice)
  262. {
  263. return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION);
  264. }
  265. static unsigned int snd_ice1712_get_gpio_mask(struct snd_ice1712 *ice)
  266. {
  267. return snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK);
  268. }
  269. static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
  270. {
  271. snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data);
  272. inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
  273. }
  274. static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice)
  275. {
  276. return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  277. }
  278. static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val)
  279. {
  280. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val);
  281. inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
  282. }
  283. /*
  284. *
  285. * CS8427 interface
  286. *
  287. */
  288. /*
  289. * change the input clock selection
  290. * spdif_clock = 1 - IEC958 input, 0 - Envy24
  291. */
  292. static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock)
  293. {
  294. unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */
  295. unsigned char val, nval;
  296. int res = 0;
  297. snd_i2c_lock(ice->i2c);
  298. if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) {
  299. snd_i2c_unlock(ice->i2c);
  300. return -EIO;
  301. }
  302. if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) {
  303. snd_i2c_unlock(ice->i2c);
  304. return -EIO;
  305. }
  306. nval = val & 0xf0;
  307. if (spdif_clock)
  308. nval |= 0x01;
  309. else
  310. nval |= 0x04;
  311. if (val != nval) {
  312. reg[1] = nval;
  313. if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) {
  314. res = -EIO;
  315. } else {
  316. res++;
  317. }
  318. }
  319. snd_i2c_unlock(ice->i2c);
  320. return res;
  321. }
  322. /*
  323. * spdif callbacks
  324. */
  325. static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
  326. {
  327. snd_cs8427_iec958_active(ice->cs8427, 1);
  328. }
  329. static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
  330. {
  331. snd_cs8427_iec958_active(ice->cs8427, 0);
  332. }
  333. static void setup_cs8427(struct snd_ice1712 *ice, int rate)
  334. {
  335. snd_cs8427_iec958_pcm(ice->cs8427, rate);
  336. }
  337. /*
  338. * create and initialize callbacks for cs8427 interface
  339. */
  340. int __devinit snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr)
  341. {
  342. int err;
  343. err = snd_cs8427_create(ice->i2c, addr,
  344. (ice->cs8427_timeout * HZ) / 1000, &ice->cs8427);
  345. if (err < 0) {
  346. snd_printk(KERN_ERR "CS8427 initialization failed\n");
  347. return err;
  348. }
  349. ice->spdif.ops.open = open_cs8427;
  350. ice->spdif.ops.close = close_cs8427;
  351. ice->spdif.ops.setup_rate = setup_cs8427;
  352. return 0;
  353. }
  354. static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master)
  355. {
  356. /* change CS8427 clock source too */
  357. if (ice->cs8427)
  358. snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master);
  359. /* notify ak4524 chip as well */
  360. if (spdif_is_master) {
  361. unsigned int i;
  362. for (i = 0; i < ice->akm_codecs; i++) {
  363. if (ice->akm[i].ops.set_rate_val)
  364. ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
  365. }
  366. }
  367. }
  368. /*
  369. * Interrupt handler
  370. */
  371. static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id)
  372. {
  373. struct snd_ice1712 *ice = dev_id;
  374. unsigned char status;
  375. int handled = 0;
  376. while (1) {
  377. status = inb(ICEREG(ice, IRQSTAT));
  378. if (status == 0)
  379. break;
  380. handled = 1;
  381. if (status & ICE1712_IRQ_MPU1) {
  382. if (ice->rmidi[0])
  383. snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data);
  384. outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT));
  385. status &= ~ICE1712_IRQ_MPU1;
  386. }
  387. if (status & ICE1712_IRQ_TIMER)
  388. outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT));
  389. if (status & ICE1712_IRQ_MPU2) {
  390. if (ice->rmidi[1])
  391. snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data);
  392. outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT));
  393. status &= ~ICE1712_IRQ_MPU2;
  394. }
  395. if (status & ICE1712_IRQ_PROPCM) {
  396. unsigned char mtstat = inb(ICEMT(ice, IRQ));
  397. if (mtstat & ICE1712_MULTI_PBKSTATUS) {
  398. if (ice->playback_pro_substream)
  399. snd_pcm_period_elapsed(ice->playback_pro_substream);
  400. outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ));
  401. }
  402. if (mtstat & ICE1712_MULTI_CAPSTATUS) {
  403. if (ice->capture_pro_substream)
  404. snd_pcm_period_elapsed(ice->capture_pro_substream);
  405. outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ));
  406. }
  407. }
  408. if (status & ICE1712_IRQ_FM)
  409. outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT));
  410. if (status & ICE1712_IRQ_PBKDS) {
  411. u32 idx;
  412. u16 pbkstatus;
  413. struct snd_pcm_substream *substream;
  414. pbkstatus = inw(ICEDS(ice, INTSTAT));
  415. /* printk(KERN_DEBUG "pbkstatus = 0x%x\n", pbkstatus); */
  416. for (idx = 0; idx < 6; idx++) {
  417. if ((pbkstatus & (3 << (idx * 2))) == 0)
  418. continue;
  419. substream = ice->playback_con_substream_ds[idx];
  420. if (substream != NULL)
  421. snd_pcm_period_elapsed(substream);
  422. outw(3 << (idx * 2), ICEDS(ice, INTSTAT));
  423. }
  424. outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT));
  425. }
  426. if (status & ICE1712_IRQ_CONCAP) {
  427. if (ice->capture_con_substream)
  428. snd_pcm_period_elapsed(ice->capture_con_substream);
  429. outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT));
  430. }
  431. if (status & ICE1712_IRQ_CONPBK) {
  432. if (ice->playback_con_substream)
  433. snd_pcm_period_elapsed(ice->playback_con_substream);
  434. outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT));
  435. }
  436. }
  437. return IRQ_RETVAL(handled);
  438. }
  439. /*
  440. * PCM part - misc
  441. */
  442. static int snd_ice1712_hw_params(struct snd_pcm_substream *substream,
  443. struct snd_pcm_hw_params *hw_params)
  444. {
  445. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  446. }
  447. static int snd_ice1712_hw_free(struct snd_pcm_substream *substream)
  448. {
  449. return snd_pcm_lib_free_pages(substream);
  450. }
  451. /*
  452. * PCM part - consumer I/O
  453. */
  454. static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream,
  455. int cmd)
  456. {
  457. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  458. int result = 0;
  459. u32 tmp;
  460. spin_lock(&ice->reg_lock);
  461. tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL);
  462. if (cmd == SNDRV_PCM_TRIGGER_START) {
  463. tmp |= 1;
  464. } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
  465. tmp &= ~1;
  466. } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
  467. tmp |= 2;
  468. } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
  469. tmp &= ~2;
  470. } else {
  471. result = -EINVAL;
  472. }
  473. snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
  474. spin_unlock(&ice->reg_lock);
  475. return result;
  476. }
  477. static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream,
  478. int cmd)
  479. {
  480. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  481. int result = 0;
  482. u32 tmp;
  483. spin_lock(&ice->reg_lock);
  484. tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL);
  485. if (cmd == SNDRV_PCM_TRIGGER_START) {
  486. tmp |= 1;
  487. } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
  488. tmp &= ~1;
  489. } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
  490. tmp |= 2;
  491. } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
  492. tmp &= ~2;
  493. } else {
  494. result = -EINVAL;
  495. }
  496. snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp);
  497. spin_unlock(&ice->reg_lock);
  498. return result;
  499. }
  500. static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream,
  501. int cmd)
  502. {
  503. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  504. int result = 0;
  505. u8 tmp;
  506. spin_lock(&ice->reg_lock);
  507. tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL);
  508. if (cmd == SNDRV_PCM_TRIGGER_START) {
  509. tmp |= 1;
  510. } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
  511. tmp &= ~1;
  512. } else {
  513. result = -EINVAL;
  514. }
  515. snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
  516. spin_unlock(&ice->reg_lock);
  517. return result;
  518. }
  519. static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream)
  520. {
  521. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  522. struct snd_pcm_runtime *runtime = substream->runtime;
  523. u32 period_size, buf_size, rate, tmp;
  524. period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
  525. buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
  526. tmp = 0x0000;
  527. if (snd_pcm_format_width(runtime->format) == 16)
  528. tmp |= 0x10;
  529. if (runtime->channels == 2)
  530. tmp |= 0x08;
  531. rate = (runtime->rate * 8192) / 375;
  532. if (rate > 0x000fffff)
  533. rate = 0x000fffff;
  534. spin_lock_irq(&ice->reg_lock);
  535. outb(0, ice->ddma_port + 15);
  536. outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b);
  537. outl(runtime->dma_addr, ice->ddma_port + 0);
  538. outw(buf_size, ice->ddma_port + 4);
  539. snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff);
  540. snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff);
  541. snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff);
  542. snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
  543. snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff);
  544. snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8);
  545. snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0);
  546. snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0);
  547. spin_unlock_irq(&ice->reg_lock);
  548. return 0;
  549. }
  550. static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream)
  551. {
  552. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  553. struct snd_pcm_runtime *runtime = substream->runtime;
  554. u32 period_size, buf_size, rate, tmp, chn;
  555. period_size = snd_pcm_lib_period_bytes(substream) - 1;
  556. buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
  557. tmp = 0x0064;
  558. if (snd_pcm_format_width(runtime->format) == 16)
  559. tmp &= ~0x04;
  560. if (runtime->channels == 2)
  561. tmp |= 0x08;
  562. rate = (runtime->rate * 8192) / 375;
  563. if (rate > 0x000fffff)
  564. rate = 0x000fffff;
  565. ice->playback_con_active_buf[substream->number] = 0;
  566. ice->playback_con_virt_addr[substream->number] = runtime->dma_addr;
  567. chn = substream->number * 2;
  568. spin_lock_irq(&ice->reg_lock);
  569. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr);
  570. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size);
  571. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0));
  572. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size);
  573. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate);
  574. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0);
  575. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp);
  576. if (runtime->channels == 2) {
  577. snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate);
  578. snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0);
  579. }
  580. spin_unlock_irq(&ice->reg_lock);
  581. return 0;
  582. }
  583. static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream)
  584. {
  585. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  586. struct snd_pcm_runtime *runtime = substream->runtime;
  587. u32 period_size, buf_size;
  588. u8 tmp;
  589. period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
  590. buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
  591. tmp = 0x06;
  592. if (snd_pcm_format_width(runtime->format) == 16)
  593. tmp &= ~0x04;
  594. if (runtime->channels == 2)
  595. tmp &= ~0x02;
  596. spin_lock_irq(&ice->reg_lock);
  597. outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR));
  598. outw(buf_size, ICEREG(ice, CONCAP_COUNT));
  599. snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8);
  600. snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff);
  601. snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
  602. spin_unlock_irq(&ice->reg_lock);
  603. snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
  604. return 0;
  605. }
  606. static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream)
  607. {
  608. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  609. struct snd_pcm_runtime *runtime = substream->runtime;
  610. size_t ptr;
  611. if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1))
  612. return 0;
  613. ptr = runtime->buffer_size - inw(ice->ddma_port + 4);
  614. if (ptr == runtime->buffer_size)
  615. ptr = 0;
  616. return bytes_to_frames(substream->runtime, ptr);
  617. }
  618. static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream)
  619. {
  620. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  621. u8 addr;
  622. size_t ptr;
  623. if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1))
  624. return 0;
  625. if (ice->playback_con_active_buf[substream->number])
  626. addr = ICE1712_DSC_ADDR1;
  627. else
  628. addr = ICE1712_DSC_ADDR0;
  629. ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) -
  630. ice->playback_con_virt_addr[substream->number];
  631. if (ptr == substream->runtime->buffer_size)
  632. ptr = 0;
  633. return bytes_to_frames(substream->runtime, ptr);
  634. }
  635. static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream)
  636. {
  637. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  638. size_t ptr;
  639. if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1))
  640. return 0;
  641. ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr;
  642. if (ptr == substream->runtime->buffer_size)
  643. ptr = 0;
  644. return bytes_to_frames(substream->runtime, ptr);
  645. }
  646. static const struct snd_pcm_hardware snd_ice1712_playback = {
  647. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  648. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  649. SNDRV_PCM_INFO_MMAP_VALID |
  650. SNDRV_PCM_INFO_PAUSE),
  651. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  652. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  653. .rate_min = 4000,
  654. .rate_max = 48000,
  655. .channels_min = 1,
  656. .channels_max = 2,
  657. .buffer_bytes_max = (64*1024),
  658. .period_bytes_min = 64,
  659. .period_bytes_max = (64*1024),
  660. .periods_min = 1,
  661. .periods_max = 1024,
  662. .fifo_size = 0,
  663. };
  664. static const struct snd_pcm_hardware snd_ice1712_playback_ds = {
  665. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  666. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  667. SNDRV_PCM_INFO_MMAP_VALID |
  668. SNDRV_PCM_INFO_PAUSE),
  669. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  670. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  671. .rate_min = 4000,
  672. .rate_max = 48000,
  673. .channels_min = 1,
  674. .channels_max = 2,
  675. .buffer_bytes_max = (128*1024),
  676. .period_bytes_min = 64,
  677. .period_bytes_max = (128*1024),
  678. .periods_min = 2,
  679. .periods_max = 2,
  680. .fifo_size = 0,
  681. };
  682. static const struct snd_pcm_hardware snd_ice1712_capture = {
  683. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  684. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  685. SNDRV_PCM_INFO_MMAP_VALID),
  686. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  687. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  688. .rate_min = 4000,
  689. .rate_max = 48000,
  690. .channels_min = 1,
  691. .channels_max = 2,
  692. .buffer_bytes_max = (64*1024),
  693. .period_bytes_min = 64,
  694. .period_bytes_max = (64*1024),
  695. .periods_min = 1,
  696. .periods_max = 1024,
  697. .fifo_size = 0,
  698. };
  699. static int snd_ice1712_playback_open(struct snd_pcm_substream *substream)
  700. {
  701. struct snd_pcm_runtime *runtime = substream->runtime;
  702. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  703. ice->playback_con_substream = substream;
  704. runtime->hw = snd_ice1712_playback;
  705. return 0;
  706. }
  707. static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream)
  708. {
  709. struct snd_pcm_runtime *runtime = substream->runtime;
  710. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  711. u32 tmp;
  712. ice->playback_con_substream_ds[substream->number] = substream;
  713. runtime->hw = snd_ice1712_playback_ds;
  714. spin_lock_irq(&ice->reg_lock);
  715. tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2));
  716. outw(tmp, ICEDS(ice, INTMASK));
  717. spin_unlock_irq(&ice->reg_lock);
  718. return 0;
  719. }
  720. static int snd_ice1712_capture_open(struct snd_pcm_substream *substream)
  721. {
  722. struct snd_pcm_runtime *runtime = substream->runtime;
  723. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  724. ice->capture_con_substream = substream;
  725. runtime->hw = snd_ice1712_capture;
  726. runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC];
  727. if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000))
  728. runtime->hw.rate_min = 48000;
  729. return 0;
  730. }
  731. static int snd_ice1712_playback_close(struct snd_pcm_substream *substream)
  732. {
  733. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  734. ice->playback_con_substream = NULL;
  735. return 0;
  736. }
  737. static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream)
  738. {
  739. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  740. u32 tmp;
  741. spin_lock_irq(&ice->reg_lock);
  742. tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2));
  743. outw(tmp, ICEDS(ice, INTMASK));
  744. spin_unlock_irq(&ice->reg_lock);
  745. ice->playback_con_substream_ds[substream->number] = NULL;
  746. return 0;
  747. }
  748. static int snd_ice1712_capture_close(struct snd_pcm_substream *substream)
  749. {
  750. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  751. ice->capture_con_substream = NULL;
  752. return 0;
  753. }
  754. static struct snd_pcm_ops snd_ice1712_playback_ops = {
  755. .open = snd_ice1712_playback_open,
  756. .close = snd_ice1712_playback_close,
  757. .ioctl = snd_pcm_lib_ioctl,
  758. .hw_params = snd_ice1712_hw_params,
  759. .hw_free = snd_ice1712_hw_free,
  760. .prepare = snd_ice1712_playback_prepare,
  761. .trigger = snd_ice1712_playback_trigger,
  762. .pointer = snd_ice1712_playback_pointer,
  763. };
  764. static struct snd_pcm_ops snd_ice1712_playback_ds_ops = {
  765. .open = snd_ice1712_playback_ds_open,
  766. .close = snd_ice1712_playback_ds_close,
  767. .ioctl = snd_pcm_lib_ioctl,
  768. .hw_params = snd_ice1712_hw_params,
  769. .hw_free = snd_ice1712_hw_free,
  770. .prepare = snd_ice1712_playback_ds_prepare,
  771. .trigger = snd_ice1712_playback_ds_trigger,
  772. .pointer = snd_ice1712_playback_ds_pointer,
  773. };
  774. static struct snd_pcm_ops snd_ice1712_capture_ops = {
  775. .open = snd_ice1712_capture_open,
  776. .close = snd_ice1712_capture_close,
  777. .ioctl = snd_pcm_lib_ioctl,
  778. .hw_params = snd_ice1712_hw_params,
  779. .hw_free = snd_ice1712_hw_free,
  780. .prepare = snd_ice1712_capture_prepare,
  781. .trigger = snd_ice1712_capture_trigger,
  782. .pointer = snd_ice1712_capture_pointer,
  783. };
  784. static int __devinit snd_ice1712_pcm(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
  785. {
  786. struct snd_pcm *pcm;
  787. int err;
  788. if (rpcm)
  789. *rpcm = NULL;
  790. err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm);
  791. if (err < 0)
  792. return err;
  793. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops);
  794. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops);
  795. pcm->private_data = ice;
  796. pcm->info_flags = 0;
  797. strcpy(pcm->name, "ICE1712 consumer");
  798. ice->pcm = pcm;
  799. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  800. snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
  801. if (rpcm)
  802. *rpcm = pcm;
  803. printk(KERN_WARNING "Consumer PCM code does not work well at the moment --jk\n");
  804. return 0;
  805. }
  806. static int __devinit snd_ice1712_pcm_ds(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
  807. {
  808. struct snd_pcm *pcm;
  809. int err;
  810. if (rpcm)
  811. *rpcm = NULL;
  812. err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm);
  813. if (err < 0)
  814. return err;
  815. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops);
  816. pcm->private_data = ice;
  817. pcm->info_flags = 0;
  818. strcpy(pcm->name, "ICE1712 consumer (DS)");
  819. ice->pcm_ds = pcm;
  820. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  821. snd_dma_pci_data(ice->pci), 64*1024, 128*1024);
  822. if (rpcm)
  823. *rpcm = pcm;
  824. return 0;
  825. }
  826. /*
  827. * PCM code - professional part (multitrack)
  828. */
  829. static unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000,
  830. 32000, 44100, 48000, 64000, 88200, 96000 };
  831. static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
  832. .count = ARRAY_SIZE(rates),
  833. .list = rates,
  834. .mask = 0,
  835. };
  836. static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream,
  837. int cmd)
  838. {
  839. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  840. switch (cmd) {
  841. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  842. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  843. {
  844. unsigned int what;
  845. unsigned int old;
  846. if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
  847. return -EINVAL;
  848. what = ICE1712_PLAYBACK_PAUSE;
  849. snd_pcm_trigger_done(substream, substream);
  850. spin_lock(&ice->reg_lock);
  851. old = inl(ICEMT(ice, PLAYBACK_CONTROL));
  852. if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
  853. old |= what;
  854. else
  855. old &= ~what;
  856. outl(old, ICEMT(ice, PLAYBACK_CONTROL));
  857. spin_unlock(&ice->reg_lock);
  858. break;
  859. }
  860. case SNDRV_PCM_TRIGGER_START:
  861. case SNDRV_PCM_TRIGGER_STOP:
  862. {
  863. unsigned int what = 0;
  864. unsigned int old;
  865. struct snd_pcm_substream *s;
  866. snd_pcm_group_for_each_entry(s, substream) {
  867. if (s == ice->playback_pro_substream) {
  868. what |= ICE1712_PLAYBACK_START;
  869. snd_pcm_trigger_done(s, substream);
  870. } else if (s == ice->capture_pro_substream) {
  871. what |= ICE1712_CAPTURE_START_SHADOW;
  872. snd_pcm_trigger_done(s, substream);
  873. }
  874. }
  875. spin_lock(&ice->reg_lock);
  876. old = inl(ICEMT(ice, PLAYBACK_CONTROL));
  877. if (cmd == SNDRV_PCM_TRIGGER_START)
  878. old |= what;
  879. else
  880. old &= ~what;
  881. outl(old, ICEMT(ice, PLAYBACK_CONTROL));
  882. spin_unlock(&ice->reg_lock);
  883. break;
  884. }
  885. default:
  886. return -EINVAL;
  887. }
  888. return 0;
  889. }
  890. /*
  891. */
  892. static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force)
  893. {
  894. unsigned long flags;
  895. unsigned char val, old;
  896. unsigned int i;
  897. switch (rate) {
  898. case 8000: val = 6; break;
  899. case 9600: val = 3; break;
  900. case 11025: val = 10; break;
  901. case 12000: val = 2; break;
  902. case 16000: val = 5; break;
  903. case 22050: val = 9; break;
  904. case 24000: val = 1; break;
  905. case 32000: val = 4; break;
  906. case 44100: val = 8; break;
  907. case 48000: val = 0; break;
  908. case 64000: val = 15; break;
  909. case 88200: val = 11; break;
  910. case 96000: val = 7; break;
  911. default:
  912. snd_BUG();
  913. val = 0;
  914. rate = 48000;
  915. break;
  916. }
  917. spin_lock_irqsave(&ice->reg_lock, flags);
  918. if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW|
  919. ICE1712_PLAYBACK_PAUSE|
  920. ICE1712_PLAYBACK_START)) {
  921. __out:
  922. spin_unlock_irqrestore(&ice->reg_lock, flags);
  923. return;
  924. }
  925. if (!force && is_pro_rate_locked(ice))
  926. goto __out;
  927. old = inb(ICEMT(ice, RATE));
  928. if (!force && old == val)
  929. goto __out;
  930. outb(val, ICEMT(ice, RATE));
  931. spin_unlock_irqrestore(&ice->reg_lock, flags);
  932. if (ice->gpio.set_pro_rate)
  933. ice->gpio.set_pro_rate(ice, rate);
  934. for (i = 0; i < ice->akm_codecs; i++) {
  935. if (ice->akm[i].ops.set_rate_val)
  936. ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
  937. }
  938. if (ice->spdif.ops.setup_rate)
  939. ice->spdif.ops.setup_rate(ice, rate);
  940. }
  941. static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream)
  942. {
  943. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  944. ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream);
  945. spin_lock_irq(&ice->reg_lock);
  946. outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR));
  947. outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE));
  948. outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT));
  949. spin_unlock_irq(&ice->reg_lock);
  950. return 0;
  951. }
  952. static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream,
  953. struct snd_pcm_hw_params *hw_params)
  954. {
  955. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  956. snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
  957. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  958. }
  959. static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream)
  960. {
  961. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  962. ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream);
  963. spin_lock_irq(&ice->reg_lock);
  964. outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR));
  965. outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE));
  966. outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT));
  967. spin_unlock_irq(&ice->reg_lock);
  968. return 0;
  969. }
  970. static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream,
  971. struct snd_pcm_hw_params *hw_params)
  972. {
  973. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  974. snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
  975. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  976. }
  977. static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream)
  978. {
  979. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  980. size_t ptr;
  981. if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START))
  982. return 0;
  983. ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2);
  984. if (ptr == substream->runtime->buffer_size)
  985. ptr = 0;
  986. return bytes_to_frames(substream->runtime, ptr);
  987. }
  988. static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream)
  989. {
  990. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  991. size_t ptr;
  992. if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW))
  993. return 0;
  994. ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2);
  995. if (ptr == substream->runtime->buffer_size)
  996. ptr = 0;
  997. return bytes_to_frames(substream->runtime, ptr);
  998. }
  999. static const struct snd_pcm_hardware snd_ice1712_playback_pro = {
  1000. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  1001. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  1002. SNDRV_PCM_INFO_MMAP_VALID |
  1003. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  1004. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  1005. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
  1006. .rate_min = 4000,
  1007. .rate_max = 96000,
  1008. .channels_min = 10,
  1009. .channels_max = 10,
  1010. .buffer_bytes_max = (256*1024),
  1011. .period_bytes_min = 10 * 4 * 2,
  1012. .period_bytes_max = 131040,
  1013. .periods_min = 1,
  1014. .periods_max = 1024,
  1015. .fifo_size = 0,
  1016. };
  1017. static const struct snd_pcm_hardware snd_ice1712_capture_pro = {
  1018. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  1019. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  1020. SNDRV_PCM_INFO_MMAP_VALID |
  1021. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  1022. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  1023. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
  1024. .rate_min = 4000,
  1025. .rate_max = 96000,
  1026. .channels_min = 12,
  1027. .channels_max = 12,
  1028. .buffer_bytes_max = (256*1024),
  1029. .period_bytes_min = 12 * 4 * 2,
  1030. .period_bytes_max = 131040,
  1031. .periods_min = 1,
  1032. .periods_max = 1024,
  1033. .fifo_size = 0,
  1034. };
  1035. static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream)
  1036. {
  1037. struct snd_pcm_runtime *runtime = substream->runtime;
  1038. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1039. ice->playback_pro_substream = substream;
  1040. runtime->hw = snd_ice1712_playback_pro;
  1041. snd_pcm_set_sync(substream);
  1042. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1043. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
  1044. if (is_pro_rate_locked(ice)) {
  1045. runtime->hw.rate_min = PRO_RATE_DEFAULT;
  1046. runtime->hw.rate_max = PRO_RATE_DEFAULT;
  1047. }
  1048. if (ice->spdif.ops.open)
  1049. ice->spdif.ops.open(ice, substream);
  1050. return 0;
  1051. }
  1052. static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream)
  1053. {
  1054. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1055. struct snd_pcm_runtime *runtime = substream->runtime;
  1056. ice->capture_pro_substream = substream;
  1057. runtime->hw = snd_ice1712_capture_pro;
  1058. snd_pcm_set_sync(substream);
  1059. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1060. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
  1061. if (is_pro_rate_locked(ice)) {
  1062. runtime->hw.rate_min = PRO_RATE_DEFAULT;
  1063. runtime->hw.rate_max = PRO_RATE_DEFAULT;
  1064. }
  1065. return 0;
  1066. }
  1067. static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream)
  1068. {
  1069. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1070. if (PRO_RATE_RESET)
  1071. snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  1072. ice->playback_pro_substream = NULL;
  1073. if (ice->spdif.ops.close)
  1074. ice->spdif.ops.close(ice, substream);
  1075. return 0;
  1076. }
  1077. static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream)
  1078. {
  1079. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1080. if (PRO_RATE_RESET)
  1081. snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  1082. ice->capture_pro_substream = NULL;
  1083. return 0;
  1084. }
  1085. static struct snd_pcm_ops snd_ice1712_playback_pro_ops = {
  1086. .open = snd_ice1712_playback_pro_open,
  1087. .close = snd_ice1712_playback_pro_close,
  1088. .ioctl = snd_pcm_lib_ioctl,
  1089. .hw_params = snd_ice1712_playback_pro_hw_params,
  1090. .hw_free = snd_ice1712_hw_free,
  1091. .prepare = snd_ice1712_playback_pro_prepare,
  1092. .trigger = snd_ice1712_pro_trigger,
  1093. .pointer = snd_ice1712_playback_pro_pointer,
  1094. };
  1095. static struct snd_pcm_ops snd_ice1712_capture_pro_ops = {
  1096. .open = snd_ice1712_capture_pro_open,
  1097. .close = snd_ice1712_capture_pro_close,
  1098. .ioctl = snd_pcm_lib_ioctl,
  1099. .hw_params = snd_ice1712_capture_pro_hw_params,
  1100. .hw_free = snd_ice1712_hw_free,
  1101. .prepare = snd_ice1712_capture_pro_prepare,
  1102. .trigger = snd_ice1712_pro_trigger,
  1103. .pointer = snd_ice1712_capture_pro_pointer,
  1104. };
  1105. static int __devinit snd_ice1712_pcm_profi(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
  1106. {
  1107. struct snd_pcm *pcm;
  1108. int err;
  1109. if (rpcm)
  1110. *rpcm = NULL;
  1111. err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm);
  1112. if (err < 0)
  1113. return err;
  1114. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops);
  1115. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops);
  1116. pcm->private_data = ice;
  1117. pcm->info_flags = 0;
  1118. strcpy(pcm->name, "ICE1712 multi");
  1119. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1120. snd_dma_pci_data(ice->pci), 256*1024, 256*1024);
  1121. ice->pcm_pro = pcm;
  1122. if (rpcm)
  1123. *rpcm = pcm;
  1124. if (ice->cs8427) {
  1125. /* assign channels to iec958 */
  1126. err = snd_cs8427_iec958_build(ice->cs8427,
  1127. pcm->streams[0].substream,
  1128. pcm->streams[1].substream);
  1129. if (err < 0)
  1130. return err;
  1131. }
  1132. err = snd_ice1712_build_pro_mixer(ice);
  1133. if (err < 0)
  1134. return err;
  1135. return 0;
  1136. }
  1137. /*
  1138. * Mixer section
  1139. */
  1140. static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index)
  1141. {
  1142. unsigned int vol = ice->pro_volumes[index];
  1143. unsigned short val = 0;
  1144. val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f;
  1145. val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8;
  1146. outb(index, ICEMT(ice, MONITOR_INDEX));
  1147. outw(val, ICEMT(ice, MONITOR_VOLUME));
  1148. }
  1149. #define snd_ice1712_pro_mixer_switch_info snd_ctl_boolean_stereo_info
  1150. static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1151. {
  1152. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1153. int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
  1154. kcontrol->private_value;
  1155. spin_lock_irq(&ice->reg_lock);
  1156. ucontrol->value.integer.value[0] =
  1157. !((ice->pro_volumes[priv_idx] >> 15) & 1);
  1158. ucontrol->value.integer.value[1] =
  1159. !((ice->pro_volumes[priv_idx] >> 31) & 1);
  1160. spin_unlock_irq(&ice->reg_lock);
  1161. return 0;
  1162. }
  1163. static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1164. {
  1165. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1166. int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
  1167. kcontrol->private_value;
  1168. unsigned int nval, change;
  1169. nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) |
  1170. (ucontrol->value.integer.value[1] ? 0 : 0x80000000);
  1171. spin_lock_irq(&ice->reg_lock);
  1172. nval |= ice->pro_volumes[priv_idx] & ~0x80008000;
  1173. change = nval != ice->pro_volumes[priv_idx];
  1174. ice->pro_volumes[priv_idx] = nval;
  1175. snd_ice1712_update_volume(ice, priv_idx);
  1176. spin_unlock_irq(&ice->reg_lock);
  1177. return change;
  1178. }
  1179. static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1180. {
  1181. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1182. uinfo->count = 2;
  1183. uinfo->value.integer.min = 0;
  1184. uinfo->value.integer.max = 96;
  1185. return 0;
  1186. }
  1187. static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1188. {
  1189. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1190. int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
  1191. kcontrol->private_value;
  1192. spin_lock_irq(&ice->reg_lock);
  1193. ucontrol->value.integer.value[0] =
  1194. (ice->pro_volumes[priv_idx] >> 0) & 127;
  1195. ucontrol->value.integer.value[1] =
  1196. (ice->pro_volumes[priv_idx] >> 16) & 127;
  1197. spin_unlock_irq(&ice->reg_lock);
  1198. return 0;
  1199. }
  1200. static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1201. {
  1202. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1203. int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
  1204. kcontrol->private_value;
  1205. unsigned int nval, change;
  1206. nval = (ucontrol->value.integer.value[0] & 127) |
  1207. ((ucontrol->value.integer.value[1] & 127) << 16);
  1208. spin_lock_irq(&ice->reg_lock);
  1209. nval |= ice->pro_volumes[priv_idx] & ~0x007f007f;
  1210. change = nval != ice->pro_volumes[priv_idx];
  1211. ice->pro_volumes[priv_idx] = nval;
  1212. snd_ice1712_update_volume(ice, priv_idx);
  1213. spin_unlock_irq(&ice->reg_lock);
  1214. return change;
  1215. }
  1216. static const DECLARE_TLV_DB_SCALE(db_scale_playback, -14400, 150, 0);
  1217. static struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] __devinitdata = {
  1218. {
  1219. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1220. .name = "Multi Playback Switch",
  1221. .info = snd_ice1712_pro_mixer_switch_info,
  1222. .get = snd_ice1712_pro_mixer_switch_get,
  1223. .put = snd_ice1712_pro_mixer_switch_put,
  1224. .private_value = 0,
  1225. .count = 10,
  1226. },
  1227. {
  1228. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1229. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1230. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1231. .name = "Multi Playback Volume",
  1232. .info = snd_ice1712_pro_mixer_volume_info,
  1233. .get = snd_ice1712_pro_mixer_volume_get,
  1234. .put = snd_ice1712_pro_mixer_volume_put,
  1235. .private_value = 0,
  1236. .count = 10,
  1237. .tlv = { .p = db_scale_playback }
  1238. },
  1239. };
  1240. static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch __devinitdata = {
  1241. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1242. .name = "H/W Multi Capture Switch",
  1243. .info = snd_ice1712_pro_mixer_switch_info,
  1244. .get = snd_ice1712_pro_mixer_switch_get,
  1245. .put = snd_ice1712_pro_mixer_switch_put,
  1246. .private_value = 10,
  1247. };
  1248. static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch __devinitdata = {
  1249. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1250. .name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, SWITCH),
  1251. .info = snd_ice1712_pro_mixer_switch_info,
  1252. .get = snd_ice1712_pro_mixer_switch_get,
  1253. .put = snd_ice1712_pro_mixer_switch_put,
  1254. .private_value = 18,
  1255. .count = 2,
  1256. };
  1257. static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume __devinitdata = {
  1258. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1259. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1260. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1261. .name = "H/W Multi Capture Volume",
  1262. .info = snd_ice1712_pro_mixer_volume_info,
  1263. .get = snd_ice1712_pro_mixer_volume_get,
  1264. .put = snd_ice1712_pro_mixer_volume_put,
  1265. .private_value = 10,
  1266. .tlv = { .p = db_scale_playback }
  1267. };
  1268. static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume __devinitdata = {
  1269. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1270. .name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, VOLUME),
  1271. .info = snd_ice1712_pro_mixer_volume_info,
  1272. .get = snd_ice1712_pro_mixer_volume_get,
  1273. .put = snd_ice1712_pro_mixer_volume_put,
  1274. .private_value = 18,
  1275. .count = 2,
  1276. };
  1277. static int __devinit snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice)
  1278. {
  1279. struct snd_card *card = ice->card;
  1280. unsigned int idx;
  1281. int err;
  1282. /* multi-channel mixer */
  1283. for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) {
  1284. err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice));
  1285. if (err < 0)
  1286. return err;
  1287. }
  1288. if (ice->num_total_adcs > 0) {
  1289. struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch;
  1290. tmp.count = ice->num_total_adcs;
  1291. err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
  1292. if (err < 0)
  1293. return err;
  1294. }
  1295. err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice));
  1296. if (err < 0)
  1297. return err;
  1298. if (ice->num_total_adcs > 0) {
  1299. struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume;
  1300. tmp.count = ice->num_total_adcs;
  1301. err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
  1302. if (err < 0)
  1303. return err;
  1304. }
  1305. err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice));
  1306. if (err < 0)
  1307. return err;
  1308. /* initialize volumes */
  1309. for (idx = 0; idx < 10; idx++) {
  1310. ice->pro_volumes[idx] = 0x80008000; /* mute */
  1311. snd_ice1712_update_volume(ice, idx);
  1312. }
  1313. for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) {
  1314. ice->pro_volumes[idx] = 0x80008000; /* mute */
  1315. snd_ice1712_update_volume(ice, idx);
  1316. }
  1317. for (idx = 18; idx < 20; idx++) {
  1318. ice->pro_volumes[idx] = 0x80008000; /* mute */
  1319. snd_ice1712_update_volume(ice, idx);
  1320. }
  1321. return 0;
  1322. }
  1323. static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97)
  1324. {
  1325. struct snd_ice1712 *ice = ac97->private_data;
  1326. ice->ac97 = NULL;
  1327. }
  1328. static int __devinit snd_ice1712_ac97_mixer(struct snd_ice1712 *ice)
  1329. {
  1330. int err, bus_num = 0;
  1331. struct snd_ac97_template ac97;
  1332. struct snd_ac97_bus *pbus;
  1333. static struct snd_ac97_bus_ops con_ops = {
  1334. .write = snd_ice1712_ac97_write,
  1335. .read = snd_ice1712_ac97_read,
  1336. };
  1337. static struct snd_ac97_bus_ops pro_ops = {
  1338. .write = snd_ice1712_pro_ac97_write,
  1339. .read = snd_ice1712_pro_ac97_read,
  1340. };
  1341. if (ice_has_con_ac97(ice)) {
  1342. err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus);
  1343. if (err < 0)
  1344. return err;
  1345. memset(&ac97, 0, sizeof(ac97));
  1346. ac97.private_data = ice;
  1347. ac97.private_free = snd_ice1712_mixer_free_ac97;
  1348. err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
  1349. if (err < 0)
  1350. printk(KERN_WARNING "ice1712: cannot initialize ac97 for consumer, skipped\n");
  1351. else {
  1352. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97, ice));
  1353. if (err < 0)
  1354. return err;
  1355. return 0;
  1356. }
  1357. }
  1358. if (!(ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) {
  1359. err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus);
  1360. if (err < 0)
  1361. return err;
  1362. memset(&ac97, 0, sizeof(ac97));
  1363. ac97.private_data = ice;
  1364. ac97.private_free = snd_ice1712_mixer_free_ac97;
  1365. err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
  1366. if (err < 0)
  1367. printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
  1368. else
  1369. return 0;
  1370. }
  1371. /* I2S mixer only */
  1372. strcat(ice->card->mixername, "ICE1712 - multitrack");
  1373. return 0;
  1374. }
  1375. /*
  1376. *
  1377. */
  1378. static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx)
  1379. {
  1380. return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8);
  1381. }
  1382. static void snd_ice1712_proc_read(struct snd_info_entry *entry,
  1383. struct snd_info_buffer *buffer)
  1384. {
  1385. struct snd_ice1712 *ice = entry->private_data;
  1386. unsigned int idx;
  1387. snd_iprintf(buffer, "%s\n\n", ice->card->longname);
  1388. snd_iprintf(buffer, "EEPROM:\n");
  1389. snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
  1390. snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
  1391. snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
  1392. snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]);
  1393. snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]);
  1394. snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]);
  1395. snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]);
  1396. snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask);
  1397. snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate);
  1398. snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir);
  1399. snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO));
  1400. snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO));
  1401. snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO));
  1402. snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]);
  1403. for (idx = 0; idx < 4; idx++)
  1404. snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]);
  1405. for (idx = 0; idx < 4; idx++)
  1406. snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]);
  1407. for (idx = 0x1c; idx < ice->eeprom.size; idx++)
  1408. snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]);
  1409. snd_iprintf(buffer, "\nRegisters:\n");
  1410. snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03)));
  1411. snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE)));
  1412. snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT)));
  1413. snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE)));
  1414. snd_iprintf(buffer, " GPIO_DATA : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice));
  1415. snd_iprintf(buffer, " GPIO_WRITE_MASK : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK));
  1416. snd_iprintf(buffer, " GPIO_DIRECTION : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION));
  1417. }
  1418. static void __devinit snd_ice1712_proc_init(struct snd_ice1712 *ice)
  1419. {
  1420. struct snd_info_entry *entry;
  1421. if (!snd_card_proc_new(ice->card, "ice1712", &entry))
  1422. snd_info_set_text_ops(entry, ice, snd_ice1712_proc_read);
  1423. }
  1424. /*
  1425. *
  1426. */
  1427. static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol,
  1428. struct snd_ctl_elem_info *uinfo)
  1429. {
  1430. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1431. uinfo->count = sizeof(struct snd_ice1712_eeprom);
  1432. return 0;
  1433. }
  1434. static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol,
  1435. struct snd_ctl_elem_value *ucontrol)
  1436. {
  1437. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1438. memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
  1439. return 0;
  1440. }
  1441. static struct snd_kcontrol_new snd_ice1712_eeprom __devinitdata = {
  1442. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  1443. .name = "ICE1712 EEPROM",
  1444. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1445. .info = snd_ice1712_eeprom_info,
  1446. .get = snd_ice1712_eeprom_get
  1447. };
  1448. /*
  1449. */
  1450. static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol,
  1451. struct snd_ctl_elem_info *uinfo)
  1452. {
  1453. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1454. uinfo->count = 1;
  1455. return 0;
  1456. }
  1457. static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol,
  1458. struct snd_ctl_elem_value *ucontrol)
  1459. {
  1460. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1461. if (ice->spdif.ops.default_get)
  1462. ice->spdif.ops.default_get(ice, ucontrol);
  1463. return 0;
  1464. }
  1465. static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol,
  1466. struct snd_ctl_elem_value *ucontrol)
  1467. {
  1468. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1469. if (ice->spdif.ops.default_put)
  1470. return ice->spdif.ops.default_put(ice, ucontrol);
  1471. return 0;
  1472. }
  1473. static struct snd_kcontrol_new snd_ice1712_spdif_default __devinitdata =
  1474. {
  1475. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1476. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
  1477. .info = snd_ice1712_spdif_info,
  1478. .get = snd_ice1712_spdif_default_get,
  1479. .put = snd_ice1712_spdif_default_put
  1480. };
  1481. static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol,
  1482. struct snd_ctl_elem_value *ucontrol)
  1483. {
  1484. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1485. if (ice->spdif.ops.default_get) {
  1486. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1487. IEC958_AES0_PROFESSIONAL |
  1488. IEC958_AES0_CON_NOT_COPYRIGHT |
  1489. IEC958_AES0_CON_EMPHASIS;
  1490. ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
  1491. IEC958_AES1_CON_CATEGORY;
  1492. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
  1493. } else {
  1494. ucontrol->value.iec958.status[0] = 0xff;
  1495. ucontrol->value.iec958.status[1] = 0xff;
  1496. ucontrol->value.iec958.status[2] = 0xff;
  1497. ucontrol->value.iec958.status[3] = 0xff;
  1498. ucontrol->value.iec958.status[4] = 0xff;
  1499. }
  1500. return 0;
  1501. }
  1502. static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol,
  1503. struct snd_ctl_elem_value *ucontrol)
  1504. {
  1505. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1506. if (ice->spdif.ops.default_get) {
  1507. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1508. IEC958_AES0_PROFESSIONAL |
  1509. IEC958_AES0_PRO_FS |
  1510. IEC958_AES0_PRO_EMPHASIS;
  1511. ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE;
  1512. } else {
  1513. ucontrol->value.iec958.status[0] = 0xff;
  1514. ucontrol->value.iec958.status[1] = 0xff;
  1515. ucontrol->value.iec958.status[2] = 0xff;
  1516. ucontrol->value.iec958.status[3] = 0xff;
  1517. ucontrol->value.iec958.status[4] = 0xff;
  1518. }
  1519. return 0;
  1520. }
  1521. static struct snd_kcontrol_new snd_ice1712_spdif_maskc __devinitdata =
  1522. {
  1523. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1524. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1525. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
  1526. .info = snd_ice1712_spdif_info,
  1527. .get = snd_ice1712_spdif_maskc_get,
  1528. };
  1529. static struct snd_kcontrol_new snd_ice1712_spdif_maskp __devinitdata =
  1530. {
  1531. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1532. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1533. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
  1534. .info = snd_ice1712_spdif_info,
  1535. .get = snd_ice1712_spdif_maskp_get,
  1536. };
  1537. static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol,
  1538. struct snd_ctl_elem_value *ucontrol)
  1539. {
  1540. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1541. if (ice->spdif.ops.stream_get)
  1542. ice->spdif.ops.stream_get(ice, ucontrol);
  1543. return 0;
  1544. }
  1545. static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol,
  1546. struct snd_ctl_elem_value *ucontrol)
  1547. {
  1548. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1549. if (ice->spdif.ops.stream_put)
  1550. return ice->spdif.ops.stream_put(ice, ucontrol);
  1551. return 0;
  1552. }
  1553. static struct snd_kcontrol_new snd_ice1712_spdif_stream __devinitdata =
  1554. {
  1555. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1556. SNDRV_CTL_ELEM_ACCESS_INACTIVE),
  1557. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1558. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM),
  1559. .info = snd_ice1712_spdif_info,
  1560. .get = snd_ice1712_spdif_stream_get,
  1561. .put = snd_ice1712_spdif_stream_put
  1562. };
  1563. int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol,
  1564. struct snd_ctl_elem_value *ucontrol)
  1565. {
  1566. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1567. unsigned char mask = kcontrol->private_value & 0xff;
  1568. int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
  1569. snd_ice1712_save_gpio_status(ice);
  1570. ucontrol->value.integer.value[0] =
  1571. (snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert;
  1572. snd_ice1712_restore_gpio_status(ice);
  1573. return 0;
  1574. }
  1575. int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
  1576. struct snd_ctl_elem_value *ucontrol)
  1577. {
  1578. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1579. unsigned char mask = kcontrol->private_value & 0xff;
  1580. int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
  1581. unsigned int val, nval;
  1582. if (kcontrol->private_value & (1 << 31))
  1583. return -EPERM;
  1584. nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert;
  1585. snd_ice1712_save_gpio_status(ice);
  1586. val = snd_ice1712_gpio_read(ice);
  1587. nval |= val & ~mask;
  1588. if (val != nval)
  1589. snd_ice1712_gpio_write(ice, nval);
  1590. snd_ice1712_restore_gpio_status(ice);
  1591. return val != nval;
  1592. }
  1593. /*
  1594. * rate
  1595. */
  1596. static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
  1597. struct snd_ctl_elem_info *uinfo)
  1598. {
  1599. static const char * const texts[] = {
  1600. "8000", /* 0: 6 */
  1601. "9600", /* 1: 3 */
  1602. "11025", /* 2: 10 */
  1603. "12000", /* 3: 2 */
  1604. "16000", /* 4: 5 */
  1605. "22050", /* 5: 9 */
  1606. "24000", /* 6: 1 */
  1607. "32000", /* 7: 4 */
  1608. "44100", /* 8: 8 */
  1609. "48000", /* 9: 0 */
  1610. "64000", /* 10: 15 */
  1611. "88200", /* 11: 11 */
  1612. "96000", /* 12: 7 */
  1613. "IEC958 Input", /* 13: -- */
  1614. };
  1615. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1616. uinfo->count = 1;
  1617. uinfo->value.enumerated.items = 14;
  1618. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1619. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1620. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1621. return 0;
  1622. }
  1623. static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
  1624. struct snd_ctl_elem_value *ucontrol)
  1625. {
  1626. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1627. static const unsigned char xlate[16] = {
  1628. 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10
  1629. };
  1630. unsigned char val;
  1631. spin_lock_irq(&ice->reg_lock);
  1632. if (is_spdif_master(ice)) {
  1633. ucontrol->value.enumerated.item[0] = 13;
  1634. } else {
  1635. val = xlate[inb(ICEMT(ice, RATE)) & 15];
  1636. if (val == 255) {
  1637. snd_BUG();
  1638. val = 0;
  1639. }
  1640. ucontrol->value.enumerated.item[0] = val;
  1641. }
  1642. spin_unlock_irq(&ice->reg_lock);
  1643. return 0;
  1644. }
  1645. static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
  1646. struct snd_ctl_elem_value *ucontrol)
  1647. {
  1648. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1649. static const unsigned int xrate[13] = {
  1650. 8000, 9600, 11025, 12000, 16000, 22050, 24000,
  1651. 32000, 44100, 48000, 64000, 88200, 96000
  1652. };
  1653. unsigned char oval;
  1654. int change = 0;
  1655. spin_lock_irq(&ice->reg_lock);
  1656. oval = inb(ICEMT(ice, RATE));
  1657. if (ucontrol->value.enumerated.item[0] == 13) {
  1658. outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE));
  1659. } else {
  1660. PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
  1661. spin_unlock_irq(&ice->reg_lock);
  1662. snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
  1663. spin_lock_irq(&ice->reg_lock);
  1664. }
  1665. change = inb(ICEMT(ice, RATE)) != oval;
  1666. spin_unlock_irq(&ice->reg_lock);
  1667. if ((oval & ICE1712_SPDIF_MASTER) !=
  1668. (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER))
  1669. snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice));
  1670. return change;
  1671. }
  1672. static struct snd_kcontrol_new snd_ice1712_pro_internal_clock __devinitdata = {
  1673. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1674. .name = "Multi Track Internal Clock",
  1675. .info = snd_ice1712_pro_internal_clock_info,
  1676. .get = snd_ice1712_pro_internal_clock_get,
  1677. .put = snd_ice1712_pro_internal_clock_put
  1678. };
  1679. static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol,
  1680. struct snd_ctl_elem_info *uinfo)
  1681. {
  1682. static const char * const texts[] = {
  1683. "8000", /* 0: 6 */
  1684. "9600", /* 1: 3 */
  1685. "11025", /* 2: 10 */
  1686. "12000", /* 3: 2 */
  1687. "16000", /* 4: 5 */
  1688. "22050", /* 5: 9 */
  1689. "24000", /* 6: 1 */
  1690. "32000", /* 7: 4 */
  1691. "44100", /* 8: 8 */
  1692. "48000", /* 9: 0 */
  1693. "64000", /* 10: 15 */
  1694. "88200", /* 11: 11 */
  1695. "96000", /* 12: 7 */
  1696. /* "IEC958 Input", 13: -- */
  1697. };
  1698. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1699. uinfo->count = 1;
  1700. uinfo->value.enumerated.items = 13;
  1701. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1702. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1703. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1704. return 0;
  1705. }
  1706. static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol,
  1707. struct snd_ctl_elem_value *ucontrol)
  1708. {
  1709. int val;
  1710. static const unsigned int xrate[13] = {
  1711. 8000, 9600, 11025, 12000, 16000, 22050, 24000,
  1712. 32000, 44100, 48000, 64000, 88200, 96000
  1713. };
  1714. for (val = 0; val < 13; val++) {
  1715. if (xrate[val] == PRO_RATE_DEFAULT)
  1716. break;
  1717. }
  1718. ucontrol->value.enumerated.item[0] = val;
  1719. return 0;
  1720. }
  1721. static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol,
  1722. struct snd_ctl_elem_value *ucontrol)
  1723. {
  1724. static const unsigned int xrate[13] = {
  1725. 8000, 9600, 11025, 12000, 16000, 22050, 24000,
  1726. 32000, 44100, 48000, 64000, 88200, 96000
  1727. };
  1728. unsigned char oval;
  1729. int change = 0;
  1730. oval = PRO_RATE_DEFAULT;
  1731. PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
  1732. change = PRO_RATE_DEFAULT != oval;
  1733. return change;
  1734. }
  1735. static struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default __devinitdata = {
  1736. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1737. .name = "Multi Track Internal Clock Default",
  1738. .info = snd_ice1712_pro_internal_clock_default_info,
  1739. .get = snd_ice1712_pro_internal_clock_default_get,
  1740. .put = snd_ice1712_pro_internal_clock_default_put
  1741. };
  1742. #define snd_ice1712_pro_rate_locking_info snd_ctl_boolean_mono_info
  1743. static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
  1744. struct snd_ctl_elem_value *ucontrol)
  1745. {
  1746. ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
  1747. return 0;
  1748. }
  1749. static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
  1750. struct snd_ctl_elem_value *ucontrol)
  1751. {
  1752. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1753. int change = 0, nval;
  1754. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1755. spin_lock_irq(&ice->reg_lock);
  1756. change = PRO_RATE_LOCKED != nval;
  1757. PRO_RATE_LOCKED = nval;
  1758. spin_unlock_irq(&ice->reg_lock);
  1759. return change;
  1760. }
  1761. static struct snd_kcontrol_new snd_ice1712_pro_rate_locking __devinitdata = {
  1762. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1763. .name = "Multi Track Rate Locking",
  1764. .info = snd_ice1712_pro_rate_locking_info,
  1765. .get = snd_ice1712_pro_rate_locking_get,
  1766. .put = snd_ice1712_pro_rate_locking_put
  1767. };
  1768. #define snd_ice1712_pro_rate_reset_info snd_ctl_boolean_mono_info
  1769. static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
  1770. struct snd_ctl_elem_value *ucontrol)
  1771. {
  1772. ucontrol->value.integer.value[0] = PRO_RATE_RESET;
  1773. return 0;
  1774. }
  1775. static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
  1776. struct snd_ctl_elem_value *ucontrol)
  1777. {
  1778. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1779. int change = 0, nval;
  1780. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1781. spin_lock_irq(&ice->reg_lock);
  1782. change = PRO_RATE_RESET != nval;
  1783. PRO_RATE_RESET = nval;
  1784. spin_unlock_irq(&ice->reg_lock);
  1785. return change;
  1786. }
  1787. static struct snd_kcontrol_new snd_ice1712_pro_rate_reset __devinitdata = {
  1788. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1789. .name = "Multi Track Rate Reset",
  1790. .info = snd_ice1712_pro_rate_reset_info,
  1791. .get = snd_ice1712_pro_rate_reset_get,
  1792. .put = snd_ice1712_pro_rate_reset_put
  1793. };
  1794. /*
  1795. * routing
  1796. */
  1797. static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol,
  1798. struct snd_ctl_elem_info *uinfo)
  1799. {
  1800. static const char * const texts[] = {
  1801. "PCM Out", /* 0 */
  1802. "H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */
  1803. "H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */
  1804. "IEC958 In L", "IEC958 In R", /* 9-10 */
  1805. "Digital Mixer", /* 11 - optional */
  1806. };
  1807. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1808. uinfo->count = 1;
  1809. uinfo->value.enumerated.items =
  1810. snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11;
  1811. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1812. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1813. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1814. return 0;
  1815. }
  1816. static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol,
  1817. struct snd_ctl_elem_value *ucontrol)
  1818. {
  1819. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1820. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1821. unsigned int val, cval;
  1822. spin_lock_irq(&ice->reg_lock);
  1823. val = inw(ICEMT(ice, ROUTE_PSDOUT03));
  1824. cval = inl(ICEMT(ice, ROUTE_CAPTURE));
  1825. spin_unlock_irq(&ice->reg_lock);
  1826. val >>= ((idx % 2) * 8) + ((idx / 2) * 2);
  1827. val &= 3;
  1828. cval >>= ((idx / 2) * 8) + ((idx % 2) * 4);
  1829. if (val == 1 && idx < 2)
  1830. ucontrol->value.enumerated.item[0] = 11;
  1831. else if (val == 2)
  1832. ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
  1833. else if (val == 3)
  1834. ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
  1835. else
  1836. ucontrol->value.enumerated.item[0] = 0;
  1837. return 0;
  1838. }
  1839. static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol,
  1840. struct snd_ctl_elem_value *ucontrol)
  1841. {
  1842. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1843. int change, shift;
  1844. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1845. unsigned int val, old_val, nval;
  1846. /* update PSDOUT */
  1847. if (ucontrol->value.enumerated.item[0] >= 11)
  1848. nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */
  1849. else if (ucontrol->value.enumerated.item[0] >= 9)
  1850. nval = 3; /* spdif in */
  1851. else if (ucontrol->value.enumerated.item[0] >= 1)
  1852. nval = 2; /* analog in */
  1853. else
  1854. nval = 0; /* pcm */
  1855. shift = ((idx % 2) * 8) + ((idx / 2) * 2);
  1856. spin_lock_irq(&ice->reg_lock);
  1857. val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03));
  1858. val &= ~(0x03 << shift);
  1859. val |= nval << shift;
  1860. change = val != old_val;
  1861. if (change)
  1862. outw(val, ICEMT(ice, ROUTE_PSDOUT03));
  1863. spin_unlock_irq(&ice->reg_lock);
  1864. if (nval < 2) /* dig mixer of pcm */
  1865. return change;
  1866. /* update CAPTURE */
  1867. spin_lock_irq(&ice->reg_lock);
  1868. val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE));
  1869. shift = ((idx / 2) * 8) + ((idx % 2) * 4);
  1870. if (nval == 2) { /* analog in */
  1871. nval = ucontrol->value.enumerated.item[0] - 1;
  1872. val &= ~(0x07 << shift);
  1873. val |= nval << shift;
  1874. } else { /* spdif in */
  1875. nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
  1876. val &= ~(0x08 << shift);
  1877. val |= nval << shift;
  1878. }
  1879. if (val != old_val) {
  1880. change = 1;
  1881. outl(val, ICEMT(ice, ROUTE_CAPTURE));
  1882. }
  1883. spin_unlock_irq(&ice->reg_lock);
  1884. return change;
  1885. }
  1886. static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
  1887. struct snd_ctl_elem_value *ucontrol)
  1888. {
  1889. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1890. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1891. unsigned int val, cval;
  1892. val = inw(ICEMT(ice, ROUTE_SPDOUT));
  1893. cval = (val >> (idx * 4 + 8)) & 0x0f;
  1894. val = (val >> (idx * 2)) & 0x03;
  1895. if (val == 1)
  1896. ucontrol->value.enumerated.item[0] = 11;
  1897. else if (val == 2)
  1898. ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
  1899. else if (val == 3)
  1900. ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
  1901. else
  1902. ucontrol->value.enumerated.item[0] = 0;
  1903. return 0;
  1904. }
  1905. static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
  1906. struct snd_ctl_elem_value *ucontrol)
  1907. {
  1908. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1909. int change, shift;
  1910. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1911. unsigned int val, old_val, nval;
  1912. /* update SPDOUT */
  1913. spin_lock_irq(&ice->reg_lock);
  1914. val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT));
  1915. if (ucontrol->value.enumerated.item[0] >= 11)
  1916. nval = 1;
  1917. else if (ucontrol->value.enumerated.item[0] >= 9)
  1918. nval = 3;
  1919. else if (ucontrol->value.enumerated.item[0] >= 1)
  1920. nval = 2;
  1921. else
  1922. nval = 0;
  1923. shift = idx * 2;
  1924. val &= ~(0x03 << shift);
  1925. val |= nval << shift;
  1926. shift = idx * 4 + 8;
  1927. if (nval == 2) {
  1928. nval = ucontrol->value.enumerated.item[0] - 1;
  1929. val &= ~(0x07 << shift);
  1930. val |= nval << shift;
  1931. } else if (nval == 3) {
  1932. nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
  1933. val &= ~(0x08 << shift);
  1934. val |= nval << shift;
  1935. }
  1936. change = val != old_val;
  1937. if (change)
  1938. outw(val, ICEMT(ice, ROUTE_SPDOUT));
  1939. spin_unlock_irq(&ice->reg_lock);
  1940. return change;
  1941. }
  1942. static struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route __devinitdata = {
  1943. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1944. .name = "H/W Playback Route",
  1945. .info = snd_ice1712_pro_route_info,
  1946. .get = snd_ice1712_pro_route_analog_get,
  1947. .put = snd_ice1712_pro_route_analog_put,
  1948. };
  1949. static struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route __devinitdata = {
  1950. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1951. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
  1952. .info = snd_ice1712_pro_route_info,
  1953. .get = snd_ice1712_pro_route_spdif_get,
  1954. .put = snd_ice1712_pro_route_spdif_put,
  1955. .count = 2,
  1956. };
  1957. static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol,
  1958. struct snd_ctl_elem_info *uinfo)
  1959. {
  1960. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1961. uinfo->count = 1;
  1962. uinfo->value.integer.min = 0;
  1963. uinfo->value.integer.max = 255;
  1964. return 0;
  1965. }
  1966. static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol,
  1967. struct snd_ctl_elem_value *ucontrol)
  1968. {
  1969. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1970. ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE));
  1971. return 0;
  1972. }
  1973. static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol,
  1974. struct snd_ctl_elem_value *ucontrol)
  1975. {
  1976. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1977. int change;
  1978. spin_lock_irq(&ice->reg_lock);
  1979. change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0];
  1980. outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE));
  1981. spin_unlock_irq(&ice->reg_lock);
  1982. return change;
  1983. }
  1984. static struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate __devinitdata = {
  1985. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1986. .name = "Multi Track Volume Rate",
  1987. .info = snd_ice1712_pro_volume_rate_info,
  1988. .get = snd_ice1712_pro_volume_rate_get,
  1989. .put = snd_ice1712_pro_volume_rate_put
  1990. };
  1991. static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol,
  1992. struct snd_ctl_elem_info *uinfo)
  1993. {
  1994. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1995. uinfo->count = 22;
  1996. uinfo->value.integer.min = 0;
  1997. uinfo->value.integer.max = 255;
  1998. return 0;
  1999. }
  2000. static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol,
  2001. struct snd_ctl_elem_value *ucontrol)
  2002. {
  2003. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  2004. int idx;
  2005. spin_lock_irq(&ice->reg_lock);
  2006. for (idx = 0; idx < 22; idx++) {
  2007. outb(idx, ICEMT(ice, MONITOR_PEAKINDEX));
  2008. ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA));
  2009. }
  2010. spin_unlock_irq(&ice->reg_lock);
  2011. return 0;
  2012. }
  2013. static struct snd_kcontrol_new snd_ice1712_mixer_pro_peak __devinitdata = {
  2014. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  2015. .name = "Multi Track Peak",
  2016. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  2017. .info = snd_ice1712_pro_peak_info,
  2018. .get = snd_ice1712_pro_peak_get
  2019. };
  2020. /*
  2021. *
  2022. */
  2023. /*
  2024. * list of available boards
  2025. */
  2026. static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
  2027. snd_ice1712_hoontech_cards,
  2028. snd_ice1712_delta_cards,
  2029. snd_ice1712_ews_cards,
  2030. NULL,
  2031. };
  2032. static unsigned char __devinit snd_ice1712_read_i2c(struct snd_ice1712 *ice,
  2033. unsigned char dev,
  2034. unsigned char addr)
  2035. {
  2036. long t = 0x10000;
  2037. outb(addr, ICEREG(ice, I2C_BYTE_ADDR));
  2038. outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR));
  2039. while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ;
  2040. return inb(ICEREG(ice, I2C_DATA));
  2041. }
  2042. static int __devinit snd_ice1712_read_eeprom(struct snd_ice1712 *ice,
  2043. const char *modelname)
  2044. {
  2045. int dev = 0xa0; /* EEPROM device address */
  2046. unsigned int i, size;
  2047. struct snd_ice1712_card_info * const *tbl, *c;
  2048. if (!modelname || !*modelname) {
  2049. ice->eeprom.subvendor = 0;
  2050. if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0)
  2051. ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) |
  2052. (snd_ice1712_read_i2c(ice, dev, 0x01) << 8) |
  2053. (snd_ice1712_read_i2c(ice, dev, 0x02) << 16) |
  2054. (snd_ice1712_read_i2c(ice, dev, 0x03) << 24);
  2055. if (ice->eeprom.subvendor == 0 ||
  2056. ice->eeprom.subvendor == (unsigned int)-1) {
  2057. /* invalid subvendor from EEPROM, try the PCI subststem ID instead */
  2058. u16 vendor, device;
  2059. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
  2060. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
  2061. ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
  2062. if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
  2063. printk(KERN_ERR "ice1712: No valid ID is found\n");
  2064. return -ENXIO;
  2065. }
  2066. }
  2067. }
  2068. for (tbl = card_tables; *tbl; tbl++) {
  2069. for (c = *tbl; c->subvendor; c++) {
  2070. if (modelname && c->model && !strcmp(modelname, c->model)) {
  2071. printk(KERN_INFO "ice1712: Using board model %s\n", c->name);
  2072. ice->eeprom.subvendor = c->subvendor;
  2073. } else if (c->subvendor != ice->eeprom.subvendor)
  2074. continue;
  2075. if (!c->eeprom_size || !c->eeprom_data)
  2076. goto found;
  2077. /* if the EEPROM is given by the driver, use it */
  2078. snd_printdd("using the defined eeprom..\n");
  2079. ice->eeprom.version = 1;
  2080. ice->eeprom.size = c->eeprom_size + 6;
  2081. memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
  2082. goto read_skipped;
  2083. }
  2084. }
  2085. printk(KERN_WARNING "ice1712: No matching model found for ID 0x%x\n",
  2086. ice->eeprom.subvendor);
  2087. found:
  2088. ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04);
  2089. if (ice->eeprom.size < 6)
  2090. ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */
  2091. else if (ice->eeprom.size > 32) {
  2092. snd_printk(KERN_ERR "invalid EEPROM (size = %i)\n", ice->eeprom.size);
  2093. return -EIO;
  2094. }
  2095. ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05);
  2096. if (ice->eeprom.version != 1) {
  2097. snd_printk(KERN_ERR "invalid EEPROM version %i\n",
  2098. ice->eeprom.version);
  2099. /* return -EIO; */
  2100. }
  2101. size = ice->eeprom.size - 6;
  2102. for (i = 0; i < size; i++)
  2103. ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6);
  2104. read_skipped:
  2105. ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK];
  2106. ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE];
  2107. ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR];
  2108. return 0;
  2109. }
  2110. static int __devinit snd_ice1712_chip_init(struct snd_ice1712 *ice)
  2111. {
  2112. outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL));
  2113. udelay(200);
  2114. outb(ICE1712_NATIVE, ICEREG(ice, CONTROL));
  2115. udelay(200);
  2116. if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE &&
  2117. !ice->dxr_enable)
  2118. /* Set eeprom value to limit active ADCs and DACs to 6;
  2119. * Also disable AC97 as no hardware in standard 6fire card/box
  2120. * Note: DXR extensions are not currently supported
  2121. */
  2122. ice->eeprom.data[ICE_EEP1_CODEC] = 0x3a;
  2123. pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]);
  2124. pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]);
  2125. pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]);
  2126. pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]);
  2127. if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24) {
  2128. ice->gpio.write_mask = ice->eeprom.gpiomask;
  2129. ice->gpio.direction = ice->eeprom.gpiodir;
  2130. snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK,
  2131. ice->eeprom.gpiomask);
  2132. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
  2133. ice->eeprom.gpiodir);
  2134. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
  2135. ice->eeprom.gpiostate);
  2136. } else {
  2137. ice->gpio.write_mask = 0xc0;
  2138. ice->gpio.direction = 0xff;
  2139. snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0);
  2140. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff);
  2141. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
  2142. ICE1712_STDSP24_CLOCK_BIT);
  2143. }
  2144. snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0);
  2145. if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) {
  2146. outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD));
  2147. udelay(100);
  2148. outb(0, ICEREG(ice, AC97_CMD));
  2149. udelay(200);
  2150. snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0);
  2151. }
  2152. snd_ice1712_set_pro_rate(ice, 48000, 1);
  2153. return 0;
  2154. }
  2155. int __devinit snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice)
  2156. {
  2157. int err;
  2158. struct snd_kcontrol *kctl;
  2159. if (snd_BUG_ON(!ice->pcm_pro))
  2160. return -EIO;
  2161. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice));
  2162. if (err < 0)
  2163. return err;
  2164. kctl->id.device = ice->pcm_pro->device;
  2165. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice));
  2166. if (err < 0)
  2167. return err;
  2168. kctl->id.device = ice->pcm_pro->device;
  2169. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice));
  2170. if (err < 0)
  2171. return err;
  2172. kctl->id.device = ice->pcm_pro->device;
  2173. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice));
  2174. if (err < 0)
  2175. return err;
  2176. kctl->id.device = ice->pcm_pro->device;
  2177. ice->spdif.stream_ctl = kctl;
  2178. return 0;
  2179. }
  2180. static int __devinit snd_ice1712_build_controls(struct snd_ice1712 *ice)
  2181. {
  2182. int err;
  2183. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice));
  2184. if (err < 0)
  2185. return err;
  2186. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice));
  2187. if (err < 0)
  2188. return err;
  2189. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice));
  2190. if (err < 0)
  2191. return err;
  2192. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice));
  2193. if (err < 0)
  2194. return err;
  2195. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice));
  2196. if (err < 0)
  2197. return err;
  2198. if (ice->num_total_dacs > 0) {
  2199. struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route;
  2200. tmp.count = ice->num_total_dacs;
  2201. err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
  2202. if (err < 0)
  2203. return err;
  2204. }
  2205. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice));
  2206. if (err < 0)
  2207. return err;
  2208. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice));
  2209. if (err < 0)
  2210. return err;
  2211. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice));
  2212. if (err < 0)
  2213. return err;
  2214. return 0;
  2215. }
  2216. static int snd_ice1712_free(struct snd_ice1712 *ice)
  2217. {
  2218. if (!ice->port)
  2219. goto __hw_end;
  2220. /* mask all interrupts */
  2221. outb(0xc0, ICEMT(ice, IRQ));
  2222. outb(0xff, ICEREG(ice, IRQMASK));
  2223. /* --- */
  2224. __hw_end:
  2225. if (ice->irq >= 0)
  2226. free_irq(ice->irq, ice);
  2227. if (ice->port)
  2228. pci_release_regions(ice->pci);
  2229. snd_ice1712_akm4xxx_free(ice);
  2230. pci_disable_device(ice->pci);
  2231. kfree(ice->spec);
  2232. kfree(ice);
  2233. return 0;
  2234. }
  2235. static int snd_ice1712_dev_free(struct snd_device *device)
  2236. {
  2237. struct snd_ice1712 *ice = device->device_data;
  2238. return snd_ice1712_free(ice);
  2239. }
  2240. static int __devinit snd_ice1712_create(struct snd_card *card,
  2241. struct pci_dev *pci,
  2242. const char *modelname,
  2243. int omni,
  2244. int cs8427_timeout,
  2245. int dxr_enable,
  2246. struct snd_ice1712 **r_ice1712)
  2247. {
  2248. struct snd_ice1712 *ice;
  2249. int err;
  2250. static struct snd_device_ops ops = {
  2251. .dev_free = snd_ice1712_dev_free,
  2252. };
  2253. *r_ice1712 = NULL;
  2254. /* enable PCI device */
  2255. err = pci_enable_device(pci);
  2256. if (err < 0)
  2257. return err;
  2258. /* check, if we can restrict PCI DMA transfers to 28 bits */
  2259. if (pci_set_dma_mask(pci, DMA_BIT_MASK(28)) < 0 ||
  2260. pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(28)) < 0) {
  2261. snd_printk(KERN_ERR "architecture does not support 28bit PCI busmaster DMA\n");
  2262. pci_disable_device(pci);
  2263. return -ENXIO;
  2264. }
  2265. ice = kzalloc(sizeof(*ice), GFP_KERNEL);
  2266. if (ice == NULL) {
  2267. pci_disable_device(pci);
  2268. return -ENOMEM;
  2269. }
  2270. ice->omni = omni ? 1 : 0;
  2271. if (cs8427_timeout < 1)
  2272. cs8427_timeout = 1;
  2273. else if (cs8427_timeout > 1000)
  2274. cs8427_timeout = 1000;
  2275. ice->cs8427_timeout = cs8427_timeout;
  2276. ice->dxr_enable = dxr_enable;
  2277. spin_lock_init(&ice->reg_lock);
  2278. mutex_init(&ice->gpio_mutex);
  2279. mutex_init(&ice->i2c_mutex);
  2280. mutex_init(&ice->open_mutex);
  2281. ice->gpio.set_mask = snd_ice1712_set_gpio_mask;
  2282. ice->gpio.get_mask = snd_ice1712_get_gpio_mask;
  2283. ice->gpio.set_dir = snd_ice1712_set_gpio_dir;
  2284. ice->gpio.get_dir = snd_ice1712_get_gpio_dir;
  2285. ice->gpio.set_data = snd_ice1712_set_gpio_data;
  2286. ice->gpio.get_data = snd_ice1712_get_gpio_data;
  2287. ice->spdif.cs8403_bits =
  2288. ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */
  2289. 0x10 | /* no emphasis */
  2290. 0x20); /* PCM encoder/decoder */
  2291. ice->card = card;
  2292. ice->pci = pci;
  2293. ice->irq = -1;
  2294. pci_set_master(pci);
  2295. pci_write_config_word(ice->pci, 0x40, 0x807f);
  2296. pci_write_config_word(ice->pci, 0x42, 0x0006);
  2297. snd_ice1712_proc_init(ice);
  2298. synchronize_irq(pci->irq);
  2299. err = pci_request_regions(pci, "ICE1712");
  2300. if (err < 0) {
  2301. kfree(ice);
  2302. pci_disable_device(pci);
  2303. return err;
  2304. }
  2305. ice->port = pci_resource_start(pci, 0);
  2306. ice->ddma_port = pci_resource_start(pci, 1);
  2307. ice->dmapath_port = pci_resource_start(pci, 2);
  2308. ice->profi_port = pci_resource_start(pci, 3);
  2309. if (request_irq(pci->irq, snd_ice1712_interrupt, IRQF_SHARED,
  2310. "ICE1712", ice)) {
  2311. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  2312. snd_ice1712_free(ice);
  2313. return -EIO;
  2314. }
  2315. ice->irq = pci->irq;
  2316. if (snd_ice1712_read_eeprom(ice, modelname) < 0) {
  2317. snd_ice1712_free(ice);
  2318. return -EIO;
  2319. }
  2320. if (snd_ice1712_chip_init(ice) < 0) {
  2321. snd_ice1712_free(ice);
  2322. return -EIO;
  2323. }
  2324. /* unmask used interrupts */
  2325. outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ?
  2326. ICE1712_IRQ_MPU2 : 0) |
  2327. ((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ?
  2328. ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0),
  2329. ICEREG(ice, IRQMASK));
  2330. outb(0x00, ICEMT(ice, IRQ));
  2331. err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops);
  2332. if (err < 0) {
  2333. snd_ice1712_free(ice);
  2334. return err;
  2335. }
  2336. snd_card_set_dev(card, &pci->dev);
  2337. *r_ice1712 = ice;
  2338. return 0;
  2339. }
  2340. /*
  2341. *
  2342. * Registration
  2343. *
  2344. */
  2345. static struct snd_ice1712_card_info no_matched __devinitdata;
  2346. static int __devinit snd_ice1712_probe(struct pci_dev *pci,
  2347. const struct pci_device_id *pci_id)
  2348. {
  2349. static int dev;
  2350. struct snd_card *card;
  2351. struct snd_ice1712 *ice;
  2352. int pcm_dev = 0, err;
  2353. struct snd_ice1712_card_info * const *tbl, *c;
  2354. if (dev >= SNDRV_CARDS)
  2355. return -ENODEV;
  2356. if (!enable[dev]) {
  2357. dev++;
  2358. return -ENOENT;
  2359. }
  2360. err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
  2361. if (err < 0)
  2362. return err;
  2363. strcpy(card->driver, "ICE1712");
  2364. strcpy(card->shortname, "ICEnsemble ICE1712");
  2365. err = snd_ice1712_create(card, pci, model[dev], omni[dev],
  2366. cs8427_timeout[dev], dxr_enable[dev], &ice);
  2367. if (err < 0) {
  2368. snd_card_free(card);
  2369. return err;
  2370. }
  2371. for (tbl = card_tables; *tbl; tbl++) {
  2372. for (c = *tbl; c->subvendor; c++) {
  2373. if (c->subvendor == ice->eeprom.subvendor) {
  2374. strcpy(card->shortname, c->name);
  2375. if (c->driver) /* specific driver? */
  2376. strcpy(card->driver, c->driver);
  2377. if (c->chip_init) {
  2378. err = c->chip_init(ice);
  2379. if (err < 0) {
  2380. snd_card_free(card);
  2381. return err;
  2382. }
  2383. }
  2384. goto __found;
  2385. }
  2386. }
  2387. }
  2388. c = &no_matched;
  2389. __found:
  2390. err = snd_ice1712_pcm_profi(ice, pcm_dev++, NULL);
  2391. if (err < 0) {
  2392. snd_card_free(card);
  2393. return err;
  2394. }
  2395. if (ice_has_con_ac97(ice)) {
  2396. err = snd_ice1712_pcm(ice, pcm_dev++, NULL);
  2397. if (err < 0) {
  2398. snd_card_free(card);
  2399. return err;
  2400. }
  2401. }
  2402. err = snd_ice1712_ac97_mixer(ice);
  2403. if (err < 0) {
  2404. snd_card_free(card);
  2405. return err;
  2406. }
  2407. err = snd_ice1712_build_controls(ice);
  2408. if (err < 0) {
  2409. snd_card_free(card);
  2410. return err;
  2411. }
  2412. if (c->build_controls) {
  2413. err = c->build_controls(ice);
  2414. if (err < 0) {
  2415. snd_card_free(card);
  2416. return err;
  2417. }
  2418. }
  2419. if (ice_has_con_ac97(ice)) {
  2420. err = snd_ice1712_pcm_ds(ice, pcm_dev++, NULL);
  2421. if (err < 0) {
  2422. snd_card_free(card);
  2423. return err;
  2424. }
  2425. }
  2426. if (!c->no_mpu401) {
  2427. err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
  2428. ICEREG(ice, MPU1_CTRL),
  2429. (c->mpu401_1_info_flags | MPU401_INFO_INTEGRATED),
  2430. ice->irq, 0, &ice->rmidi[0]);
  2431. if (err < 0) {
  2432. snd_card_free(card);
  2433. return err;
  2434. }
  2435. if (c->mpu401_1_name)
  2436. /* Prefered name available in card_info */
  2437. snprintf(ice->rmidi[0]->name,
  2438. sizeof(ice->rmidi[0]->name),
  2439. "%s %d", c->mpu401_1_name, card->number);
  2440. if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) {
  2441. /* 2nd port used */
  2442. err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712,
  2443. ICEREG(ice, MPU2_CTRL),
  2444. (c->mpu401_2_info_flags | MPU401_INFO_INTEGRATED),
  2445. ice->irq, 0, &ice->rmidi[1]);
  2446. if (err < 0) {
  2447. snd_card_free(card);
  2448. return err;
  2449. }
  2450. if (c->mpu401_2_name)
  2451. /* Prefered name available in card_info */
  2452. snprintf(ice->rmidi[1]->name,
  2453. sizeof(ice->rmidi[1]->name),
  2454. "%s %d", c->mpu401_2_name,
  2455. card->number);
  2456. }
  2457. }
  2458. snd_ice1712_set_input_clock_source(ice, 0);
  2459. sprintf(card->longname, "%s at 0x%lx, irq %i",
  2460. card->shortname, ice->port, ice->irq);
  2461. err = snd_card_register(card);
  2462. if (err < 0) {
  2463. snd_card_free(card);
  2464. return err;
  2465. }
  2466. pci_set_drvdata(pci, card);
  2467. dev++;
  2468. return 0;
  2469. }
  2470. static void __devexit snd_ice1712_remove(struct pci_dev *pci)
  2471. {
  2472. snd_card_free(pci_get_drvdata(pci));
  2473. pci_set_drvdata(pci, NULL);
  2474. }
  2475. static struct pci_driver driver = {
  2476. .name = "ICE1712",
  2477. .id_table = snd_ice1712_ids,
  2478. .probe = snd_ice1712_probe,
  2479. .remove = __devexit_p(snd_ice1712_remove),
  2480. };
  2481. static int __init alsa_card_ice1712_init(void)
  2482. {
  2483. return pci_register_driver(&driver);
  2484. }
  2485. static void __exit alsa_card_ice1712_exit(void)
  2486. {
  2487. pci_unregister_driver(&driver);
  2488. }
  2489. module_init(alsa_card_ice1712_init)
  2490. module_exit(alsa_card_ice1712_exit)