patch_hdmi.c 25 KB

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  1. /*
  2. *
  3. * patch_hdmi.c - routines for HDMI/DisplayPort codecs
  4. *
  5. * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
  6. *
  7. * Authors:
  8. * Wu Fengguang <wfg@linux.intel.com>
  9. *
  10. * Maintained by:
  11. * Wu Fengguang <wfg@linux.intel.com>
  12. *
  13. * This program is free software; you can redistribute it and/or modify it
  14. * under the terms of the GNU General Public License as published by the Free
  15. * Software Foundation; either version 2 of the License, or (at your option)
  16. * any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful, but
  19. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  20. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  21. * for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software Foundation,
  25. * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  26. */
  27. struct hdmi_spec {
  28. int num_cvts;
  29. int num_pins;
  30. hda_nid_t cvt[MAX_HDMI_CVTS+1]; /* audio sources */
  31. hda_nid_t pin[MAX_HDMI_PINS+1]; /* audio sinks */
  32. /*
  33. * source connection for each pin
  34. */
  35. hda_nid_t pin_cvt[MAX_HDMI_PINS+1];
  36. /*
  37. * HDMI sink attached to each pin
  38. */
  39. struct hdmi_eld sink_eld[MAX_HDMI_PINS];
  40. /*
  41. * export one pcm per pipe
  42. */
  43. struct hda_pcm pcm_rec[MAX_HDMI_CVTS];
  44. struct hda_pcm_stream codec_pcm_pars[MAX_HDMI_CVTS];
  45. /*
  46. * nvhdmi specific
  47. */
  48. struct hda_multi_out multiout;
  49. unsigned int codec_type;
  50. /* misc flags */
  51. /* PD bit indicates only the update, not the current state */
  52. unsigned int old_pin_detect:1;
  53. };
  54. struct hdmi_audio_infoframe {
  55. u8 type; /* 0x84 */
  56. u8 ver; /* 0x01 */
  57. u8 len; /* 0x0a */
  58. u8 checksum; /* PB0 */
  59. u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
  60. u8 SS01_SF24;
  61. u8 CXT04;
  62. u8 CA;
  63. u8 LFEPBL01_LSV36_DM_INH7;
  64. u8 reserved[5]; /* PB6 - PB10 */
  65. };
  66. /*
  67. * CEA speaker placement:
  68. *
  69. * FLH FCH FRH
  70. * FLW FL FLC FC FRC FR FRW
  71. *
  72. * LFE
  73. * TC
  74. *
  75. * RL RLC RC RRC RR
  76. *
  77. * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
  78. * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
  79. */
  80. enum cea_speaker_placement {
  81. FL = (1 << 0), /* Front Left */
  82. FC = (1 << 1), /* Front Center */
  83. FR = (1 << 2), /* Front Right */
  84. FLC = (1 << 3), /* Front Left Center */
  85. FRC = (1 << 4), /* Front Right Center */
  86. RL = (1 << 5), /* Rear Left */
  87. RC = (1 << 6), /* Rear Center */
  88. RR = (1 << 7), /* Rear Right */
  89. RLC = (1 << 8), /* Rear Left Center */
  90. RRC = (1 << 9), /* Rear Right Center */
  91. LFE = (1 << 10), /* Low Frequency Effect */
  92. FLW = (1 << 11), /* Front Left Wide */
  93. FRW = (1 << 12), /* Front Right Wide */
  94. FLH = (1 << 13), /* Front Left High */
  95. FCH = (1 << 14), /* Front Center High */
  96. FRH = (1 << 15), /* Front Right High */
  97. TC = (1 << 16), /* Top Center */
  98. };
  99. /*
  100. * ELD SA bits in the CEA Speaker Allocation data block
  101. */
  102. static int eld_speaker_allocation_bits[] = {
  103. [0] = FL | FR,
  104. [1] = LFE,
  105. [2] = FC,
  106. [3] = RL | RR,
  107. [4] = RC,
  108. [5] = FLC | FRC,
  109. [6] = RLC | RRC,
  110. /* the following are not defined in ELD yet */
  111. [7] = FLW | FRW,
  112. [8] = FLH | FRH,
  113. [9] = TC,
  114. [10] = FCH,
  115. };
  116. struct cea_channel_speaker_allocation {
  117. int ca_index;
  118. int speakers[8];
  119. /* derived values, just for convenience */
  120. int channels;
  121. int spk_mask;
  122. };
  123. /*
  124. * ALSA sequence is:
  125. *
  126. * surround40 surround41 surround50 surround51 surround71
  127. * ch0 front left = = = =
  128. * ch1 front right = = = =
  129. * ch2 rear left = = = =
  130. * ch3 rear right = = = =
  131. * ch4 LFE center center center
  132. * ch5 LFE LFE
  133. * ch6 side left
  134. * ch7 side right
  135. *
  136. * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
  137. */
  138. static int hdmi_channel_mapping[0x32][8] = {
  139. /* stereo */
  140. [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
  141. /* 2.1 */
  142. [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
  143. /* Dolby Surround */
  144. [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
  145. /* surround40 */
  146. [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
  147. /* 4ch */
  148. [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
  149. /* surround41 */
  150. [0x09] = { 0x00, 0x11, 0x24, 0x34, 0x43, 0xf2, 0xf6, 0xf7 },
  151. /* surround50 */
  152. [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
  153. /* surround51 */
  154. [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
  155. /* 7.1 */
  156. [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
  157. };
  158. /*
  159. * This is an ordered list!
  160. *
  161. * The preceding ones have better chances to be selected by
  162. * hdmi_setup_channel_allocation().
  163. */
  164. static struct cea_channel_speaker_allocation channel_allocations[] = {
  165. /* channel: 7 6 5 4 3 2 1 0 */
  166. { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
  167. /* 2.1 */
  168. { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
  169. /* Dolby Surround */
  170. { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
  171. /* surround40 */
  172. { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
  173. /* surround41 */
  174. { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
  175. /* surround50 */
  176. { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
  177. /* surround51 */
  178. { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
  179. /* 6.1 */
  180. { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
  181. /* surround71 */
  182. { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
  183. { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
  184. { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
  185. { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
  186. { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
  187. { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
  188. { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
  189. { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
  190. { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
  191. { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
  192. { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
  193. { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
  194. { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
  195. { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
  196. { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
  197. { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
  198. { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
  199. { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
  200. { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
  201. { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
  202. { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
  203. { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
  204. { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
  205. { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
  206. { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
  207. { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
  208. { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
  209. { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
  210. { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
  211. { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
  212. { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
  213. { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
  214. { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
  215. { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
  216. { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
  217. { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
  218. { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
  219. { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
  220. { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
  221. { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
  222. { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
  223. { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
  224. };
  225. /*
  226. * HDMI routines
  227. */
  228. static int hda_node_index(hda_nid_t *nids, hda_nid_t nid)
  229. {
  230. int i;
  231. for (i = 0; nids[i]; i++)
  232. if (nids[i] == nid)
  233. return i;
  234. snd_printk(KERN_WARNING "HDMI: nid %d not registered\n", nid);
  235. return -EINVAL;
  236. }
  237. static void hdmi_get_show_eld(struct hda_codec *codec, hda_nid_t pin_nid,
  238. struct hdmi_eld *eld)
  239. {
  240. if (!snd_hdmi_get_eld(eld, codec, pin_nid))
  241. snd_hdmi_show_eld(eld);
  242. }
  243. #ifdef BE_PARANOID
  244. static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  245. int *packet_index, int *byte_index)
  246. {
  247. int val;
  248. val = snd_hda_codec_read(codec, pin_nid, 0,
  249. AC_VERB_GET_HDMI_DIP_INDEX, 0);
  250. *packet_index = val >> 5;
  251. *byte_index = val & 0x1f;
  252. }
  253. #endif
  254. static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  255. int packet_index, int byte_index)
  256. {
  257. int val;
  258. val = (packet_index << 5) | (byte_index & 0x1f);
  259. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
  260. }
  261. static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
  262. unsigned char val)
  263. {
  264. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
  265. }
  266. static void hdmi_enable_output(struct hda_codec *codec, hda_nid_t pin_nid)
  267. {
  268. /* Unmute */
  269. if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
  270. snd_hda_codec_write(codec, pin_nid, 0,
  271. AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
  272. /* Enable pin out */
  273. snd_hda_codec_write(codec, pin_nid, 0,
  274. AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
  275. }
  276. static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t nid)
  277. {
  278. return 1 + snd_hda_codec_read(codec, nid, 0,
  279. AC_VERB_GET_CVT_CHAN_COUNT, 0);
  280. }
  281. static void hdmi_set_channel_count(struct hda_codec *codec,
  282. hda_nid_t nid, int chs)
  283. {
  284. if (chs != hdmi_get_channel_count(codec, nid))
  285. snd_hda_codec_write(codec, nid, 0,
  286. AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
  287. }
  288. /*
  289. * Channel mapping routines
  290. */
  291. /*
  292. * Compute derived values in channel_allocations[].
  293. */
  294. static void init_channel_allocations(void)
  295. {
  296. int i, j;
  297. struct cea_channel_speaker_allocation *p;
  298. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  299. p = channel_allocations + i;
  300. p->channels = 0;
  301. p->spk_mask = 0;
  302. for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
  303. if (p->speakers[j]) {
  304. p->channels++;
  305. p->spk_mask |= p->speakers[j];
  306. }
  307. }
  308. }
  309. /*
  310. * The transformation takes two steps:
  311. *
  312. * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
  313. * spk_mask => (channel_allocations[]) => ai->CA
  314. *
  315. * TODO: it could select the wrong CA from multiple candidates.
  316. */
  317. static int hdmi_setup_channel_allocation(struct hda_codec *codec, hda_nid_t nid,
  318. struct hdmi_audio_infoframe *ai)
  319. {
  320. struct hdmi_spec *spec = codec->spec;
  321. struct hdmi_eld *eld;
  322. int i;
  323. int spk_mask = 0;
  324. int channels = 1 + (ai->CC02_CT47 & 0x7);
  325. char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
  326. /*
  327. * CA defaults to 0 for basic stereo audio
  328. */
  329. if (channels <= 2)
  330. return 0;
  331. i = hda_node_index(spec->pin_cvt, nid);
  332. if (i < 0)
  333. return 0;
  334. eld = &spec->sink_eld[i];
  335. /*
  336. * HDMI sink's ELD info cannot always be retrieved for now, e.g.
  337. * in console or for audio devices. Assume the highest speakers
  338. * configuration, to _not_ prohibit multi-channel audio playback.
  339. */
  340. if (!eld->spk_alloc)
  341. eld->spk_alloc = 0xffff;
  342. /*
  343. * expand ELD's speaker allocation mask
  344. *
  345. * ELD tells the speaker mask in a compact(paired) form,
  346. * expand ELD's notions to match the ones used by Audio InfoFrame.
  347. */
  348. for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
  349. if (eld->spk_alloc & (1 << i))
  350. spk_mask |= eld_speaker_allocation_bits[i];
  351. }
  352. /* search for the first working match in the CA table */
  353. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  354. if (channels == channel_allocations[i].channels &&
  355. (spk_mask & channel_allocations[i].spk_mask) ==
  356. channel_allocations[i].spk_mask) {
  357. ai->CA = channel_allocations[i].ca_index;
  358. break;
  359. }
  360. }
  361. snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
  362. snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
  363. ai->CA, channels, buf);
  364. return ai->CA;
  365. }
  366. static void hdmi_debug_channel_mapping(struct hda_codec *codec,
  367. hda_nid_t pin_nid)
  368. {
  369. #ifdef CONFIG_SND_DEBUG_VERBOSE
  370. int i;
  371. int slot;
  372. for (i = 0; i < 8; i++) {
  373. slot = snd_hda_codec_read(codec, pin_nid, 0,
  374. AC_VERB_GET_HDMI_CHAN_SLOT, i);
  375. printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
  376. slot >> 4, slot & 0xf);
  377. }
  378. #endif
  379. }
  380. static void hdmi_setup_channel_mapping(struct hda_codec *codec,
  381. hda_nid_t pin_nid,
  382. struct hdmi_audio_infoframe *ai)
  383. {
  384. int i;
  385. int ca = ai->CA;
  386. int err;
  387. if (hdmi_channel_mapping[ca][1] == 0) {
  388. for (i = 0; i < channel_allocations[ca].channels; i++)
  389. hdmi_channel_mapping[ca][i] = i | (i << 4);
  390. for (; i < 8; i++)
  391. hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
  392. }
  393. for (i = 0; i < 8; i++) {
  394. err = snd_hda_codec_write(codec, pin_nid, 0,
  395. AC_VERB_SET_HDMI_CHAN_SLOT,
  396. hdmi_channel_mapping[ca][i]);
  397. if (err) {
  398. snd_printdd(KERN_NOTICE
  399. "HDMI: channel mapping failed\n");
  400. break;
  401. }
  402. }
  403. hdmi_debug_channel_mapping(codec, pin_nid);
  404. }
  405. /*
  406. * Audio InfoFrame routines
  407. */
  408. /*
  409. * Enable Audio InfoFrame Transmission
  410. */
  411. static void hdmi_start_infoframe_trans(struct hda_codec *codec,
  412. hda_nid_t pin_nid)
  413. {
  414. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  415. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  416. AC_DIPXMIT_BEST);
  417. }
  418. /*
  419. * Disable Audio InfoFrame Transmission
  420. */
  421. static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
  422. hda_nid_t pin_nid)
  423. {
  424. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  425. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  426. AC_DIPXMIT_DISABLE);
  427. }
  428. static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
  429. {
  430. #ifdef CONFIG_SND_DEBUG_VERBOSE
  431. int i;
  432. int size;
  433. size = snd_hdmi_get_eld_size(codec, pin_nid);
  434. printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
  435. for (i = 0; i < 8; i++) {
  436. size = snd_hda_codec_read(codec, pin_nid, 0,
  437. AC_VERB_GET_HDMI_DIP_SIZE, i);
  438. printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
  439. }
  440. #endif
  441. }
  442. static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
  443. {
  444. #ifdef BE_PARANOID
  445. int i, j;
  446. int size;
  447. int pi, bi;
  448. for (i = 0; i < 8; i++) {
  449. size = snd_hda_codec_read(codec, pin_nid, 0,
  450. AC_VERB_GET_HDMI_DIP_SIZE, i);
  451. if (size == 0)
  452. continue;
  453. hdmi_set_dip_index(codec, pin_nid, i, 0x0);
  454. for (j = 1; j < 1000; j++) {
  455. hdmi_write_dip_byte(codec, pin_nid, 0x0);
  456. hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
  457. if (pi != i)
  458. snd_printd(KERN_INFO "dip index %d: %d != %d\n",
  459. bi, pi, i);
  460. if (bi == 0) /* byte index wrapped around */
  461. break;
  462. }
  463. snd_printd(KERN_INFO
  464. "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
  465. i, size, j);
  466. }
  467. #endif
  468. }
  469. static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *ai)
  470. {
  471. u8 *bytes = (u8 *)ai;
  472. u8 sum = 0;
  473. int i;
  474. ai->checksum = 0;
  475. for (i = 0; i < sizeof(*ai); i++)
  476. sum += bytes[i];
  477. ai->checksum = -sum;
  478. }
  479. static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
  480. hda_nid_t pin_nid,
  481. struct hdmi_audio_infoframe *ai)
  482. {
  483. u8 *bytes = (u8 *)ai;
  484. int i;
  485. hdmi_debug_dip_size(codec, pin_nid);
  486. hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
  487. hdmi_checksum_audio_infoframe(ai);
  488. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  489. for (i = 0; i < sizeof(*ai); i++)
  490. hdmi_write_dip_byte(codec, pin_nid, bytes[i]);
  491. }
  492. static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
  493. struct hdmi_audio_infoframe *ai)
  494. {
  495. u8 *bytes = (u8 *)ai;
  496. u8 val;
  497. int i;
  498. if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
  499. != AC_DIPXMIT_BEST)
  500. return false;
  501. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  502. for (i = 0; i < sizeof(*ai); i++) {
  503. val = snd_hda_codec_read(codec, pin_nid, 0,
  504. AC_VERB_GET_HDMI_DIP_DATA, 0);
  505. if (val != bytes[i])
  506. return false;
  507. }
  508. return true;
  509. }
  510. static void hdmi_setup_audio_infoframe(struct hda_codec *codec, hda_nid_t nid,
  511. struct snd_pcm_substream *substream)
  512. {
  513. struct hdmi_spec *spec = codec->spec;
  514. hda_nid_t pin_nid;
  515. int i;
  516. struct hdmi_audio_infoframe ai = {
  517. .type = 0x84,
  518. .ver = 0x01,
  519. .len = 0x0a,
  520. .CC02_CT47 = substream->runtime->channels - 1,
  521. };
  522. hdmi_setup_channel_allocation(codec, nid, &ai);
  523. for (i = 0; i < spec->num_pins; i++) {
  524. if (spec->pin_cvt[i] != nid)
  525. continue;
  526. if (!spec->sink_eld[i].monitor_present)
  527. continue;
  528. pin_nid = spec->pin[i];
  529. if (!hdmi_infoframe_uptodate(codec, pin_nid, &ai)) {
  530. snd_printdd("hdmi_setup_audio_infoframe: "
  531. "cvt=%d pin=%d channels=%d\n",
  532. nid, pin_nid,
  533. substream->runtime->channels);
  534. hdmi_setup_channel_mapping(codec, pin_nid, &ai);
  535. hdmi_stop_infoframe_trans(codec, pin_nid);
  536. hdmi_fill_audio_infoframe(codec, pin_nid, &ai);
  537. hdmi_start_infoframe_trans(codec, pin_nid);
  538. }
  539. }
  540. }
  541. /*
  542. * Unsolicited events
  543. */
  544. static void hdmi_present_sense(struct hda_codec *codec, hda_nid_t pin_nid,
  545. struct hdmi_eld *eld);
  546. static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
  547. {
  548. struct hdmi_spec *spec = codec->spec;
  549. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  550. int pind = !!(res & AC_UNSOL_RES_PD);
  551. int eldv = !!(res & AC_UNSOL_RES_ELDV);
  552. int index;
  553. printk(KERN_INFO
  554. "HDMI hot plug event: Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
  555. tag, pind, eldv);
  556. index = hda_node_index(spec->pin, tag);
  557. if (index < 0)
  558. return;
  559. if (spec->old_pin_detect) {
  560. if (pind)
  561. hdmi_present_sense(codec, tag, &spec->sink_eld[index]);
  562. pind = spec->sink_eld[index].monitor_present;
  563. }
  564. spec->sink_eld[index].monitor_present = pind;
  565. spec->sink_eld[index].eld_valid = eldv;
  566. if (pind && eldv) {
  567. hdmi_get_show_eld(codec, spec->pin[index],
  568. &spec->sink_eld[index]);
  569. /* TODO: do real things about ELD */
  570. }
  571. }
  572. static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
  573. {
  574. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  575. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  576. int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
  577. int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
  578. printk(KERN_INFO
  579. "HDMI CP event: PIN=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
  580. tag,
  581. subtag,
  582. cp_state,
  583. cp_ready);
  584. /* TODO */
  585. if (cp_state)
  586. ;
  587. if (cp_ready)
  588. ;
  589. }
  590. static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
  591. {
  592. struct hdmi_spec *spec = codec->spec;
  593. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  594. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  595. if (hda_node_index(spec->pin, tag) < 0) {
  596. snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
  597. return;
  598. }
  599. if (subtag == 0)
  600. hdmi_intrinsic_event(codec, res);
  601. else
  602. hdmi_non_intrinsic_event(codec, res);
  603. }
  604. /*
  605. * Callbacks
  606. */
  607. /* HBR should be Non-PCM, 8 channels */
  608. #define is_hbr_format(format) \
  609. ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
  610. static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t nid,
  611. u32 stream_tag, int format)
  612. {
  613. struct hdmi_spec *spec = codec->spec;
  614. int pinctl;
  615. int new_pinctl = 0;
  616. int i;
  617. for (i = 0; i < spec->num_pins; i++) {
  618. if (spec->pin_cvt[i] != nid)
  619. continue;
  620. if (!(snd_hda_query_pin_caps(codec, spec->pin[i]) & AC_PINCAP_HBR))
  621. continue;
  622. pinctl = snd_hda_codec_read(codec, spec->pin[i], 0,
  623. AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
  624. new_pinctl = pinctl & ~AC_PINCTL_EPT;
  625. if (is_hbr_format(format))
  626. new_pinctl |= AC_PINCTL_EPT_HBR;
  627. else
  628. new_pinctl |= AC_PINCTL_EPT_NATIVE;
  629. snd_printdd("hdmi_setup_stream: "
  630. "NID=0x%x, %spinctl=0x%x\n",
  631. spec->pin[i],
  632. pinctl == new_pinctl ? "" : "new-",
  633. new_pinctl);
  634. if (pinctl != new_pinctl)
  635. snd_hda_codec_write(codec, spec->pin[i], 0,
  636. AC_VERB_SET_PIN_WIDGET_CONTROL,
  637. new_pinctl);
  638. }
  639. if (is_hbr_format(format) && !new_pinctl) {
  640. snd_printdd("hdmi_setup_stream: HBR is not supported\n");
  641. return -EINVAL;
  642. }
  643. snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
  644. return 0;
  645. }
  646. /*
  647. * HDA PCM callbacks
  648. */
  649. static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
  650. struct hda_codec *codec,
  651. struct snd_pcm_substream *substream)
  652. {
  653. struct hdmi_spec *spec = codec->spec;
  654. struct hdmi_eld *eld;
  655. struct hda_pcm_stream *codec_pars;
  656. unsigned int idx;
  657. for (idx = 0; idx < spec->num_cvts; idx++)
  658. if (hinfo->nid == spec->cvt[idx])
  659. break;
  660. if (snd_BUG_ON(idx >= spec->num_cvts) ||
  661. snd_BUG_ON(idx >= spec->num_pins))
  662. return -EINVAL;
  663. /* save the PCM info the codec provides */
  664. codec_pars = &spec->codec_pcm_pars[idx];
  665. if (!codec_pars->rates)
  666. *codec_pars = *hinfo;
  667. eld = &spec->sink_eld[idx];
  668. if (eld->sad_count > 0) {
  669. hdmi_eld_update_pcm_info(eld, hinfo, codec_pars);
  670. if (hinfo->channels_min > hinfo->channels_max ||
  671. !hinfo->rates || !hinfo->formats)
  672. return -ENODEV;
  673. } else {
  674. /* fallback to the codec default */
  675. hinfo->channels_min = codec_pars->channels_min;
  676. hinfo->channels_max = codec_pars->channels_max;
  677. hinfo->rates = codec_pars->rates;
  678. hinfo->formats = codec_pars->formats;
  679. hinfo->maxbps = codec_pars->maxbps;
  680. }
  681. return 0;
  682. }
  683. /*
  684. * HDA/HDMI auto parsing
  685. */
  686. static int hdmi_read_pin_conn(struct hda_codec *codec, hda_nid_t pin_nid)
  687. {
  688. struct hdmi_spec *spec = codec->spec;
  689. hda_nid_t conn_list[HDA_MAX_CONNECTIONS];
  690. int conn_len, curr;
  691. int index;
  692. if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
  693. snd_printk(KERN_WARNING
  694. "HDMI: pin %d wcaps %#x "
  695. "does not support connection list\n",
  696. pin_nid, get_wcaps(codec, pin_nid));
  697. return -EINVAL;
  698. }
  699. conn_len = snd_hda_get_connections(codec, pin_nid, conn_list,
  700. HDA_MAX_CONNECTIONS);
  701. if (conn_len > 1)
  702. curr = snd_hda_codec_read(codec, pin_nid, 0,
  703. AC_VERB_GET_CONNECT_SEL, 0);
  704. else
  705. curr = 0;
  706. index = hda_node_index(spec->pin, pin_nid);
  707. if (index < 0)
  708. return -EINVAL;
  709. spec->pin_cvt[index] = conn_list[curr];
  710. return 0;
  711. }
  712. static void hdmi_present_sense(struct hda_codec *codec, hda_nid_t pin_nid,
  713. struct hdmi_eld *eld)
  714. {
  715. int present = snd_hda_pin_sense(codec, pin_nid);
  716. eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
  717. eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
  718. if (present & AC_PINSENSE_ELDV)
  719. hdmi_get_show_eld(codec, pin_nid, eld);
  720. }
  721. static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
  722. {
  723. struct hdmi_spec *spec = codec->spec;
  724. if (spec->num_pins >= MAX_HDMI_PINS) {
  725. snd_printk(KERN_WARNING
  726. "HDMI: no space for pin %d\n", pin_nid);
  727. return -E2BIG;
  728. }
  729. hdmi_present_sense(codec, pin_nid, &spec->sink_eld[spec->num_pins]);
  730. spec->pin[spec->num_pins] = pin_nid;
  731. spec->num_pins++;
  732. /*
  733. * It is assumed that converter nodes come first in the node list and
  734. * hence have been registered and usable now.
  735. */
  736. return hdmi_read_pin_conn(codec, pin_nid);
  737. }
  738. static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t nid)
  739. {
  740. struct hdmi_spec *spec = codec->spec;
  741. if (spec->num_cvts >= MAX_HDMI_CVTS) {
  742. snd_printk(KERN_WARNING
  743. "HDMI: no space for converter %d\n", nid);
  744. return -E2BIG;
  745. }
  746. spec->cvt[spec->num_cvts] = nid;
  747. spec->num_cvts++;
  748. return 0;
  749. }
  750. static int hdmi_parse_codec(struct hda_codec *codec)
  751. {
  752. hda_nid_t nid;
  753. int i, nodes;
  754. nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
  755. if (!nid || nodes < 0) {
  756. snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
  757. return -EINVAL;
  758. }
  759. for (i = 0; i < nodes; i++, nid++) {
  760. unsigned int caps;
  761. unsigned int type;
  762. caps = snd_hda_param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP);
  763. type = get_wcaps_type(caps);
  764. if (!(caps & AC_WCAP_DIGITAL))
  765. continue;
  766. switch (type) {
  767. case AC_WID_AUD_OUT:
  768. hdmi_add_cvt(codec, nid);
  769. break;
  770. case AC_WID_PIN:
  771. caps = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
  772. if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
  773. continue;
  774. hdmi_add_pin(codec, nid);
  775. break;
  776. }
  777. }
  778. /*
  779. * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
  780. * can be lost and presence sense verb will become inaccurate if the
  781. * HDA link is powered off at hot plug or hw initialization time.
  782. */
  783. #ifdef CONFIG_SND_HDA_POWER_SAVE
  784. if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
  785. AC_PWRST_EPSS))
  786. codec->bus->power_keep_link_on = 1;
  787. #endif
  788. return 0;
  789. }