ehci-dbg.c 29 KB

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  1. /*
  2. * Copyright (c) 2001-2002 by David Brownell
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the
  6. * Free Software Foundation; either version 2 of the License, or (at your
  7. * option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  12. * for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software Foundation,
  16. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. */
  18. /* this file is part of ehci-hcd.c */
  19. #define ehci_dbg(ehci, fmt, args...) \
  20. dev_dbg (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
  21. #define ehci_err(ehci, fmt, args...) \
  22. dev_err (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
  23. #define ehci_info(ehci, fmt, args...) \
  24. dev_info (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
  25. #define ehci_warn(ehci, fmt, args...) \
  26. dev_warn (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
  27. #ifdef VERBOSE_DEBUG
  28. # define vdbg dbg
  29. # define ehci_vdbg ehci_dbg
  30. #else
  31. # define vdbg(fmt,args...) do { } while (0)
  32. # define ehci_vdbg(ehci, fmt, args...) do { } while (0)
  33. #endif
  34. #ifdef DEBUG
  35. /* check the values in the HCSPARAMS register
  36. * (host controller _Structural_ parameters)
  37. * see EHCI spec, Table 2-4 for each value
  38. */
  39. static void dbg_hcs_params (struct ehci_hcd *ehci, char *label)
  40. {
  41. u32 params = ehci_readl(ehci, &ehci->caps->hcs_params);
  42. ehci_dbg (ehci,
  43. "%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n",
  44. label, params,
  45. HCS_DEBUG_PORT (params),
  46. HCS_INDICATOR (params) ? " ind" : "",
  47. HCS_N_CC (params),
  48. HCS_N_PCC (params),
  49. HCS_PORTROUTED (params) ? "" : " ordered",
  50. HCS_PPC (params) ? "" : " !ppc",
  51. HCS_N_PORTS (params)
  52. );
  53. /* Port routing, per EHCI 0.95 Spec, Section 2.2.5 */
  54. if (HCS_PORTROUTED (params)) {
  55. int i;
  56. char buf [46], tmp [7], byte;
  57. buf[0] = 0;
  58. for (i = 0; i < HCS_N_PORTS (params); i++) {
  59. // FIXME MIPS won't readb() ...
  60. byte = readb (&ehci->caps->portroute[(i>>1)]);
  61. sprintf(tmp, "%d ",
  62. ((i & 0x1) ? ((byte)&0xf) : ((byte>>4)&0xf)));
  63. strcat(buf, tmp);
  64. }
  65. ehci_dbg (ehci, "%s portroute %s\n",
  66. label, buf);
  67. }
  68. }
  69. #else
  70. static inline void dbg_hcs_params (struct ehci_hcd *ehci, char *label) {}
  71. #endif
  72. #ifdef DEBUG
  73. /* check the values in the HCCPARAMS register
  74. * (host controller _Capability_ parameters)
  75. * see EHCI Spec, Table 2-5 for each value
  76. * */
  77. static void dbg_hcc_params (struct ehci_hcd *ehci, char *label)
  78. {
  79. u32 params = ehci_readl(ehci, &ehci->caps->hcc_params);
  80. if (HCC_ISOC_CACHE (params)) {
  81. ehci_dbg (ehci,
  82. "%s hcc_params %04x caching frame %s%s%s\n",
  83. label, params,
  84. HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
  85. HCC_CANPARK(params) ? " park" : "",
  86. HCC_64BIT_ADDR(params) ? " 64 bit addr" : "");
  87. } else {
  88. ehci_dbg (ehci,
  89. "%s hcc_params %04x thresh %d uframes %s%s%s%s%s%s%s\n",
  90. label,
  91. params,
  92. HCC_ISOC_THRES(params),
  93. HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
  94. HCC_CANPARK(params) ? " park" : "",
  95. HCC_64BIT_ADDR(params) ? " 64 bit addr" : "",
  96. HCC_LPM(params) ? " LPM" : "",
  97. HCC_PER_PORT_CHANGE_EVENT(params) ? " ppce" : "",
  98. HCC_HW_PREFETCH(params) ? " hw prefetch" : "",
  99. HCC_32FRAME_PERIODIC_LIST(params) ?
  100. " 32 peridic list" : "");
  101. }
  102. }
  103. #else
  104. static inline void dbg_hcc_params (struct ehci_hcd *ehci, char *label) {}
  105. #endif
  106. #ifdef DEBUG
  107. static void __maybe_unused
  108. dbg_qtd (const char *label, struct ehci_hcd *ehci, struct ehci_qtd *qtd)
  109. {
  110. ehci_dbg(ehci, "%s td %p n%08x %08x t%08x p0=%08x\n", label, qtd,
  111. hc32_to_cpup(ehci, &qtd->hw_next),
  112. hc32_to_cpup(ehci, &qtd->hw_alt_next),
  113. hc32_to_cpup(ehci, &qtd->hw_token),
  114. hc32_to_cpup(ehci, &qtd->hw_buf [0]));
  115. if (qtd->hw_buf [1])
  116. ehci_dbg(ehci, " p1=%08x p2=%08x p3=%08x p4=%08x\n",
  117. hc32_to_cpup(ehci, &qtd->hw_buf[1]),
  118. hc32_to_cpup(ehci, &qtd->hw_buf[2]),
  119. hc32_to_cpup(ehci, &qtd->hw_buf[3]),
  120. hc32_to_cpup(ehci, &qtd->hw_buf[4]));
  121. }
  122. static void __maybe_unused
  123. dbg_qh (const char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
  124. {
  125. struct ehci_qh_hw *hw = qh->hw;
  126. ehci_dbg (ehci, "%s qh %p n%08x info %x %x qtd %x\n", label,
  127. qh, hw->hw_next, hw->hw_info1, hw->hw_info2, hw->hw_current);
  128. dbg_qtd("overlay", ehci, (struct ehci_qtd *) &hw->hw_qtd_next);
  129. }
  130. static void __maybe_unused
  131. dbg_itd (const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd)
  132. {
  133. ehci_dbg (ehci, "%s [%d] itd %p, next %08x, urb %p\n",
  134. label, itd->frame, itd, hc32_to_cpu(ehci, itd->hw_next),
  135. itd->urb);
  136. ehci_dbg (ehci,
  137. " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
  138. hc32_to_cpu(ehci, itd->hw_transaction[0]),
  139. hc32_to_cpu(ehci, itd->hw_transaction[1]),
  140. hc32_to_cpu(ehci, itd->hw_transaction[2]),
  141. hc32_to_cpu(ehci, itd->hw_transaction[3]),
  142. hc32_to_cpu(ehci, itd->hw_transaction[4]),
  143. hc32_to_cpu(ehci, itd->hw_transaction[5]),
  144. hc32_to_cpu(ehci, itd->hw_transaction[6]),
  145. hc32_to_cpu(ehci, itd->hw_transaction[7]));
  146. ehci_dbg (ehci,
  147. " buf: %08x %08x %08x %08x %08x %08x %08x\n",
  148. hc32_to_cpu(ehci, itd->hw_bufp[0]),
  149. hc32_to_cpu(ehci, itd->hw_bufp[1]),
  150. hc32_to_cpu(ehci, itd->hw_bufp[2]),
  151. hc32_to_cpu(ehci, itd->hw_bufp[3]),
  152. hc32_to_cpu(ehci, itd->hw_bufp[4]),
  153. hc32_to_cpu(ehci, itd->hw_bufp[5]),
  154. hc32_to_cpu(ehci, itd->hw_bufp[6]));
  155. ehci_dbg (ehci, " index: %d %d %d %d %d %d %d %d\n",
  156. itd->index[0], itd->index[1], itd->index[2],
  157. itd->index[3], itd->index[4], itd->index[5],
  158. itd->index[6], itd->index[7]);
  159. }
  160. static void __maybe_unused
  161. dbg_sitd (const char *label, struct ehci_hcd *ehci, struct ehci_sitd *sitd)
  162. {
  163. ehci_dbg (ehci, "%s [%d] sitd %p, next %08x, urb %p\n",
  164. label, sitd->frame, sitd, hc32_to_cpu(ehci, sitd->hw_next),
  165. sitd->urb);
  166. ehci_dbg (ehci,
  167. " addr %08x sched %04x result %08x buf %08x %08x\n",
  168. hc32_to_cpu(ehci, sitd->hw_fullspeed_ep),
  169. hc32_to_cpu(ehci, sitd->hw_uframe),
  170. hc32_to_cpu(ehci, sitd->hw_results),
  171. hc32_to_cpu(ehci, sitd->hw_buf[0]),
  172. hc32_to_cpu(ehci, sitd->hw_buf[1]));
  173. }
  174. static int __maybe_unused
  175. dbg_status_buf (char *buf, unsigned len, const char *label, u32 status)
  176. {
  177. return scnprintf (buf, len,
  178. "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s%s",
  179. label, label [0] ? " " : "", status,
  180. (status & STS_PPCE_MASK) ? " PPCE" : "",
  181. (status & STS_ASS) ? " Async" : "",
  182. (status & STS_PSS) ? " Periodic" : "",
  183. (status & STS_RECL) ? " Recl" : "",
  184. (status & STS_HALT) ? " Halt" : "",
  185. (status & STS_IAA) ? " IAA" : "",
  186. (status & STS_FATAL) ? " FATAL" : "",
  187. (status & STS_FLR) ? " FLR" : "",
  188. (status & STS_PCD) ? " PCD" : "",
  189. (status & STS_ERR) ? " ERR" : "",
  190. (status & STS_INT) ? " INT" : ""
  191. );
  192. }
  193. static int __maybe_unused
  194. dbg_intr_buf (char *buf, unsigned len, const char *label, u32 enable)
  195. {
  196. return scnprintf (buf, len,
  197. "%s%sintrenable %02x%s%s%s%s%s%s%s",
  198. label, label [0] ? " " : "", enable,
  199. (enable & STS_PPCE_MASK) ? " PPCE" : "",
  200. (enable & STS_IAA) ? " IAA" : "",
  201. (enable & STS_FATAL) ? " FATAL" : "",
  202. (enable & STS_FLR) ? " FLR" : "",
  203. (enable & STS_PCD) ? " PCD" : "",
  204. (enable & STS_ERR) ? " ERR" : "",
  205. (enable & STS_INT) ? " INT" : ""
  206. );
  207. }
  208. static const char *const fls_strings [] =
  209. { "1024", "512", "256", "??" };
  210. static int
  211. dbg_command_buf (char *buf, unsigned len, const char *label, u32 command)
  212. {
  213. return scnprintf (buf, len,
  214. "%s%scommand %07x %s%s%s%s%s%s=%d ithresh=%d%s%s%s%s "
  215. "period=%s%s %s",
  216. label, label [0] ? " " : "", command,
  217. (command & CMD_HIRD) ? " HIRD" : "",
  218. (command & CMD_PPCEE) ? " PPCEE" : "",
  219. (command & CMD_FSP) ? " FSP" : "",
  220. (command & CMD_ASPE) ? " ASPE" : "",
  221. (command & CMD_PSPE) ? " PSPE" : "",
  222. (command & CMD_PARK) ? " park" : "(park)",
  223. CMD_PARK_CNT (command),
  224. (command >> 16) & 0x3f,
  225. (command & CMD_LRESET) ? " LReset" : "",
  226. (command & CMD_IAAD) ? " IAAD" : "",
  227. (command & CMD_ASE) ? " Async" : "",
  228. (command & CMD_PSE) ? " Periodic" : "",
  229. fls_strings [(command >> 2) & 0x3],
  230. (command & CMD_RESET) ? " Reset" : "",
  231. (command & CMD_RUN) ? "RUN" : "HALT"
  232. );
  233. }
  234. static int
  235. dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status)
  236. {
  237. char *sig;
  238. /* signaling state */
  239. switch (status & (3 << 10)) {
  240. case 0 << 10: sig = "se0"; break;
  241. case 1 << 10: sig = "k"; break; /* low speed */
  242. case 2 << 10: sig = "j"; break;
  243. default: sig = "?"; break;
  244. }
  245. return scnprintf (buf, len,
  246. "%s%sport:%d status %06x %d %s%s%s%s%s%s "
  247. "sig=%s%s%s%s%s%s%s%s%s%s%s",
  248. label, label [0] ? " " : "", port, status,
  249. status>>25,/*device address */
  250. (status & PORT_SSTS)>>23 == PORTSC_SUSPEND_STS_ACK ?
  251. " ACK" : "",
  252. (status & PORT_SSTS)>>23 == PORTSC_SUSPEND_STS_NYET ?
  253. " NYET" : "",
  254. (status & PORT_SSTS)>>23 == PORTSC_SUSPEND_STS_STALL ?
  255. " STALL" : "",
  256. (status & PORT_SSTS)>>23 == PORTSC_SUSPEND_STS_ERR ?
  257. " ERR" : "",
  258. (status & PORT_POWER) ? " POWER" : "",
  259. (status & PORT_OWNER) ? " OWNER" : "",
  260. sig,
  261. (status & PORT_LPM) ? " LPM" : "",
  262. (status & PORT_RESET) ? " RESET" : "",
  263. (status & PORT_SUSPEND) ? " SUSPEND" : "",
  264. (status & PORT_RESUME) ? " RESUME" : "",
  265. (status & PORT_OCC) ? " OCC" : "",
  266. (status & PORT_OC) ? " OC" : "",
  267. (status & PORT_PEC) ? " PEC" : "",
  268. (status & PORT_PE) ? " PE" : "",
  269. (status & PORT_CSC) ? " CSC" : "",
  270. (status & PORT_CONNECT) ? " CONNECT" : "");
  271. }
  272. #else
  273. static inline void __maybe_unused
  274. dbg_qh (char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
  275. {}
  276. static inline int __maybe_unused
  277. dbg_status_buf (char *buf, unsigned len, const char *label, u32 status)
  278. { return 0; }
  279. static inline int __maybe_unused
  280. dbg_command_buf (char *buf, unsigned len, const char *label, u32 command)
  281. { return 0; }
  282. static inline int __maybe_unused
  283. dbg_intr_buf (char *buf, unsigned len, const char *label, u32 enable)
  284. { return 0; }
  285. static inline int __maybe_unused
  286. dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status)
  287. { return 0; }
  288. #endif /* DEBUG */
  289. /* functions have the "wrong" filename when they're output... */
  290. #define dbg_status(ehci, label, status) { \
  291. char _buf [80]; \
  292. dbg_status_buf (_buf, sizeof _buf, label, status); \
  293. ehci_dbg (ehci, "%s\n", _buf); \
  294. }
  295. #define dbg_cmd(ehci, label, command) { \
  296. char _buf [80]; \
  297. dbg_command_buf (_buf, sizeof _buf, label, command); \
  298. ehci_dbg (ehci, "%s\n", _buf); \
  299. }
  300. #define dbg_port(ehci, label, port, status) { \
  301. char _buf [80]; \
  302. dbg_port_buf (_buf, sizeof _buf, label, port, status); \
  303. ehci_dbg (ehci, "%s\n", _buf); \
  304. }
  305. /*-------------------------------------------------------------------------*/
  306. #ifdef STUB_DEBUG_FILES
  307. static inline void create_debug_files (struct ehci_hcd *bus) { }
  308. static inline void remove_debug_files (struct ehci_hcd *bus) { }
  309. #else
  310. /* troubleshooting help: expose state in debugfs */
  311. static int debug_async_open(struct inode *, struct file *);
  312. static int debug_periodic_open(struct inode *, struct file *);
  313. static int debug_registers_open(struct inode *, struct file *);
  314. static int debug_async_open(struct inode *, struct file *);
  315. static int debug_lpm_open(struct inode *, struct file *);
  316. static ssize_t debug_lpm_read(struct file *file, char __user *user_buf,
  317. size_t count, loff_t *ppos);
  318. static ssize_t debug_lpm_write(struct file *file, const char __user *buffer,
  319. size_t count, loff_t *ppos);
  320. static int debug_lpm_close(struct inode *inode, struct file *file);
  321. static ssize_t debug_output(struct file*, char __user*, size_t, loff_t*);
  322. static int debug_close(struct inode *, struct file *);
  323. static const struct file_operations debug_async_fops = {
  324. .owner = THIS_MODULE,
  325. .open = debug_async_open,
  326. .read = debug_output,
  327. .release = debug_close,
  328. };
  329. static const struct file_operations debug_periodic_fops = {
  330. .owner = THIS_MODULE,
  331. .open = debug_periodic_open,
  332. .read = debug_output,
  333. .release = debug_close,
  334. };
  335. static const struct file_operations debug_registers_fops = {
  336. .owner = THIS_MODULE,
  337. .open = debug_registers_open,
  338. .read = debug_output,
  339. .release = debug_close,
  340. };
  341. static const struct file_operations debug_lpm_fops = {
  342. .owner = THIS_MODULE,
  343. .open = debug_lpm_open,
  344. .read = debug_lpm_read,
  345. .write = debug_lpm_write,
  346. .release = debug_lpm_close,
  347. };
  348. static struct dentry *ehci_debug_root;
  349. struct debug_buffer {
  350. ssize_t (*fill_func)(struct debug_buffer *); /* fill method */
  351. struct usb_bus *bus;
  352. struct mutex mutex; /* protect filling of buffer */
  353. size_t count; /* number of characters filled into buffer */
  354. char *output_buf;
  355. size_t alloc_size;
  356. };
  357. #define speed_char(info1) ({ char tmp; \
  358. switch (info1 & (3 << 12)) { \
  359. case 0 << 12: tmp = 'f'; break; \
  360. case 1 << 12: tmp = 'l'; break; \
  361. case 2 << 12: tmp = 'h'; break; \
  362. default: tmp = '?'; break; \
  363. }; tmp; })
  364. static inline char token_mark(struct ehci_hcd *ehci, __hc32 token)
  365. {
  366. __u32 v = hc32_to_cpu(ehci, token);
  367. if (v & QTD_STS_ACTIVE)
  368. return '*';
  369. if (v & QTD_STS_HALT)
  370. return '-';
  371. if (!IS_SHORT_READ (v))
  372. return ' ';
  373. /* tries to advance through hw_alt_next */
  374. return '/';
  375. }
  376. static void qh_lines (
  377. struct ehci_hcd *ehci,
  378. struct ehci_qh *qh,
  379. char **nextp,
  380. unsigned *sizep
  381. )
  382. {
  383. u32 scratch;
  384. u32 hw_curr;
  385. struct list_head *entry;
  386. struct ehci_qtd *td;
  387. unsigned temp;
  388. unsigned size = *sizep;
  389. char *next = *nextp;
  390. char mark;
  391. __le32 list_end = EHCI_LIST_END(ehci);
  392. struct ehci_qh_hw *hw = qh->hw;
  393. if (hw->hw_qtd_next == list_end) /* NEC does this */
  394. mark = '@';
  395. else
  396. mark = token_mark(ehci, hw->hw_token);
  397. if (mark == '/') { /* qh_alt_next controls qh advance? */
  398. if ((hw->hw_alt_next & QTD_MASK(ehci))
  399. == ehci->async->hw->hw_alt_next)
  400. mark = '#'; /* blocked */
  401. else if (hw->hw_alt_next == list_end)
  402. mark = '.'; /* use hw_qtd_next */
  403. /* else alt_next points to some other qtd */
  404. }
  405. scratch = hc32_to_cpup(ehci, &hw->hw_info1);
  406. hw_curr = (mark == '*') ? hc32_to_cpup(ehci, &hw->hw_current) : 0;
  407. temp = scnprintf (next, size,
  408. "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)",
  409. qh, scratch & 0x007f,
  410. speed_char (scratch),
  411. (scratch >> 8) & 0x000f,
  412. scratch, hc32_to_cpup(ehci, &hw->hw_info2),
  413. hc32_to_cpup(ehci, &hw->hw_token), mark,
  414. (cpu_to_hc32(ehci, QTD_TOGGLE) & hw->hw_token)
  415. ? "data1" : "data0",
  416. (hc32_to_cpup(ehci, &hw->hw_alt_next) >> 1) & 0x0f);
  417. size -= temp;
  418. next += temp;
  419. /* hc may be modifying the list as we read it ... */
  420. list_for_each (entry, &qh->qtd_list) {
  421. td = list_entry (entry, struct ehci_qtd, qtd_list);
  422. scratch = hc32_to_cpup(ehci, &td->hw_token);
  423. mark = ' ';
  424. if (hw_curr == td->qtd_dma)
  425. mark = '*';
  426. else if (hw->hw_qtd_next == cpu_to_hc32(ehci, td->qtd_dma))
  427. mark = '+';
  428. else if (QTD_LENGTH (scratch)) {
  429. if (td->hw_alt_next == ehci->async->hw->hw_alt_next)
  430. mark = '#';
  431. else if (td->hw_alt_next != list_end)
  432. mark = '/';
  433. }
  434. temp = snprintf (next, size,
  435. "\n\t%p%c%s len=%d %08x urb %p",
  436. td, mark, ({ char *tmp;
  437. switch ((scratch>>8)&0x03) {
  438. case 0: tmp = "out"; break;
  439. case 1: tmp = "in"; break;
  440. case 2: tmp = "setup"; break;
  441. default: tmp = "?"; break;
  442. } tmp;}),
  443. (scratch >> 16) & 0x7fff,
  444. scratch,
  445. td->urb);
  446. if (size < temp)
  447. temp = size;
  448. size -= temp;
  449. next += temp;
  450. if (temp == size)
  451. goto done;
  452. }
  453. temp = snprintf (next, size, "\n");
  454. if (size < temp)
  455. temp = size;
  456. size -= temp;
  457. next += temp;
  458. done:
  459. *sizep = size;
  460. *nextp = next;
  461. }
  462. static ssize_t fill_async_buffer(struct debug_buffer *buf)
  463. {
  464. struct usb_hcd *hcd;
  465. struct ehci_hcd *ehci;
  466. unsigned long flags;
  467. unsigned temp, size;
  468. char *next;
  469. struct ehci_qh *qh;
  470. hcd = bus_to_hcd(buf->bus);
  471. ehci = hcd_to_ehci (hcd);
  472. next = buf->output_buf;
  473. size = buf->alloc_size;
  474. *next = 0;
  475. /* dumps a snapshot of the async schedule.
  476. * usually empty except for long-term bulk reads, or head.
  477. * one QH per line, and TDs we know about
  478. */
  479. spin_lock_irqsave (&ehci->lock, flags);
  480. for (qh = ehci->async->qh_next.qh; size > 0 && qh; qh = qh->qh_next.qh)
  481. qh_lines (ehci, qh, &next, &size);
  482. if (ehci->reclaim && size > 0) {
  483. temp = scnprintf (next, size, "\nreclaim =\n");
  484. size -= temp;
  485. next += temp;
  486. for (qh = ehci->reclaim; size > 0 && qh; qh = qh->reclaim)
  487. qh_lines (ehci, qh, &next, &size);
  488. }
  489. spin_unlock_irqrestore (&ehci->lock, flags);
  490. return strlen(buf->output_buf);
  491. }
  492. #define DBG_SCHED_LIMIT 64
  493. static ssize_t fill_periodic_buffer(struct debug_buffer *buf)
  494. {
  495. struct usb_hcd *hcd;
  496. struct ehci_hcd *ehci;
  497. unsigned long flags;
  498. union ehci_shadow p, *seen;
  499. unsigned temp, size, seen_count;
  500. char *next;
  501. unsigned i;
  502. __hc32 tag;
  503. if (!(seen = kmalloc (DBG_SCHED_LIMIT * sizeof *seen, GFP_ATOMIC)))
  504. return 0;
  505. seen_count = 0;
  506. hcd = bus_to_hcd(buf->bus);
  507. ehci = hcd_to_ehci (hcd);
  508. next = buf->output_buf;
  509. size = buf->alloc_size;
  510. temp = scnprintf (next, size, "size = %d\n", ehci->periodic_size);
  511. size -= temp;
  512. next += temp;
  513. /* dump a snapshot of the periodic schedule.
  514. * iso changes, interrupt usually doesn't.
  515. */
  516. spin_lock_irqsave (&ehci->lock, flags);
  517. for (i = 0; i < ehci->periodic_size; i++) {
  518. p = ehci->pshadow [i];
  519. if (likely (!p.ptr))
  520. continue;
  521. tag = Q_NEXT_TYPE(ehci, ehci->periodic [i]);
  522. temp = scnprintf (next, size, "%4d: ", i);
  523. size -= temp;
  524. next += temp;
  525. do {
  526. struct ehci_qh_hw *hw;
  527. switch (hc32_to_cpu(ehci, tag)) {
  528. case Q_TYPE_QH:
  529. hw = p.qh->hw;
  530. temp = scnprintf (next, size, " qh%d-%04x/%p",
  531. p.qh->period,
  532. hc32_to_cpup(ehci,
  533. &hw->hw_info2)
  534. /* uframe masks */
  535. & (QH_CMASK | QH_SMASK),
  536. p.qh);
  537. size -= temp;
  538. next += temp;
  539. /* don't repeat what follows this qh */
  540. for (temp = 0; temp < seen_count; temp++) {
  541. if (seen [temp].ptr != p.ptr)
  542. continue;
  543. if (p.qh->qh_next.ptr) {
  544. temp = scnprintf (next, size,
  545. " ...");
  546. size -= temp;
  547. next += temp;
  548. }
  549. break;
  550. }
  551. /* show more info the first time around */
  552. if (temp == seen_count) {
  553. u32 scratch = hc32_to_cpup(ehci,
  554. &hw->hw_info1);
  555. struct ehci_qtd *qtd;
  556. char *type = "";
  557. /* count tds, get ep direction */
  558. temp = 0;
  559. list_for_each_entry (qtd,
  560. &p.qh->qtd_list,
  561. qtd_list) {
  562. temp++;
  563. switch (0x03 & (hc32_to_cpu(
  564. ehci,
  565. qtd->hw_token) >> 8)) {
  566. case 0: type = "out"; continue;
  567. case 1: type = "in"; continue;
  568. }
  569. }
  570. temp = scnprintf (next, size,
  571. " (%c%d ep%d%s "
  572. "[%d/%d] q%d p%d)",
  573. speed_char (scratch),
  574. scratch & 0x007f,
  575. (scratch >> 8) & 0x000f, type,
  576. p.qh->usecs, p.qh->c_usecs,
  577. temp,
  578. 0x7ff & (scratch >> 16));
  579. if (seen_count < DBG_SCHED_LIMIT)
  580. seen [seen_count++].qh = p.qh;
  581. } else
  582. temp = 0;
  583. if (p.qh) {
  584. tag = Q_NEXT_TYPE(ehci, hw->hw_next);
  585. p = p.qh->qh_next;
  586. }
  587. break;
  588. case Q_TYPE_FSTN:
  589. temp = scnprintf (next, size,
  590. " fstn-%8x/%p", p.fstn->hw_prev,
  591. p.fstn);
  592. tag = Q_NEXT_TYPE(ehci, p.fstn->hw_next);
  593. p = p.fstn->fstn_next;
  594. break;
  595. case Q_TYPE_ITD:
  596. temp = scnprintf (next, size,
  597. " itd/%p", p.itd);
  598. tag = Q_NEXT_TYPE(ehci, p.itd->hw_next);
  599. p = p.itd->itd_next;
  600. break;
  601. case Q_TYPE_SITD:
  602. temp = scnprintf (next, size,
  603. " sitd%d-%04x/%p",
  604. p.sitd->stream->interval,
  605. hc32_to_cpup(ehci, &p.sitd->hw_uframe)
  606. & 0x0000ffff,
  607. p.sitd);
  608. tag = Q_NEXT_TYPE(ehci, p.sitd->hw_next);
  609. p = p.sitd->sitd_next;
  610. break;
  611. }
  612. size -= temp;
  613. next += temp;
  614. } while (p.ptr);
  615. temp = scnprintf (next, size, "\n");
  616. size -= temp;
  617. next += temp;
  618. }
  619. spin_unlock_irqrestore (&ehci->lock, flags);
  620. kfree (seen);
  621. return buf->alloc_size - size;
  622. }
  623. #undef DBG_SCHED_LIMIT
  624. static ssize_t fill_registers_buffer(struct debug_buffer *buf)
  625. {
  626. struct usb_hcd *hcd;
  627. struct ehci_hcd *ehci;
  628. unsigned long flags;
  629. unsigned temp, size, i;
  630. char *next, scratch [80];
  631. static char fmt [] = "%*s\n";
  632. static char label [] = "";
  633. hcd = bus_to_hcd(buf->bus);
  634. ehci = hcd_to_ehci (hcd);
  635. next = buf->output_buf;
  636. size = buf->alloc_size;
  637. spin_lock_irqsave (&ehci->lock, flags);
  638. if (!HCD_HW_ACCESSIBLE(hcd)) {
  639. size = scnprintf (next, size,
  640. "bus %s, device %s\n"
  641. "%s\n"
  642. "SUSPENDED (no register access)\n",
  643. hcd->self.controller->bus->name,
  644. dev_name(hcd->self.controller),
  645. hcd->product_desc);
  646. goto done;
  647. }
  648. /* Capability Registers */
  649. i = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase));
  650. temp = scnprintf (next, size,
  651. "bus %s, device %s\n"
  652. "%s\n"
  653. "EHCI %x.%02x, hcd state %d\n",
  654. hcd->self.controller->bus->name,
  655. dev_name(hcd->self.controller),
  656. hcd->product_desc,
  657. i >> 8, i & 0x0ff, hcd->state);
  658. size -= temp;
  659. next += temp;
  660. #ifdef CONFIG_PCI
  661. /* EHCI 0.96 and later may have "extended capabilities" */
  662. if (hcd->self.controller->bus == &pci_bus_type) {
  663. struct pci_dev *pdev;
  664. u32 offset, cap, cap2;
  665. unsigned count = 256/4;
  666. pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
  667. offset = HCC_EXT_CAPS(ehci_readl(ehci,
  668. &ehci->caps->hcc_params));
  669. while (offset && count--) {
  670. pci_read_config_dword (pdev, offset, &cap);
  671. switch (cap & 0xff) {
  672. case 1:
  673. temp = scnprintf (next, size,
  674. "ownership %08x%s%s\n", cap,
  675. (cap & (1 << 24)) ? " linux" : "",
  676. (cap & (1 << 16)) ? " firmware" : "");
  677. size -= temp;
  678. next += temp;
  679. offset += 4;
  680. pci_read_config_dword (pdev, offset, &cap2);
  681. temp = scnprintf (next, size,
  682. "SMI sts/enable 0x%08x\n", cap2);
  683. size -= temp;
  684. next += temp;
  685. break;
  686. case 0: /* illegal reserved capability */
  687. cap = 0;
  688. /* FALLTHROUGH */
  689. default: /* unknown */
  690. break;
  691. }
  692. temp = (cap >> 8) & 0xff;
  693. }
  694. }
  695. #endif
  696. // FIXME interpret both types of params
  697. i = ehci_readl(ehci, &ehci->caps->hcs_params);
  698. temp = scnprintf (next, size, "structural params 0x%08x\n", i);
  699. size -= temp;
  700. next += temp;
  701. i = ehci_readl(ehci, &ehci->caps->hcc_params);
  702. temp = scnprintf (next, size, "capability params 0x%08x\n", i);
  703. size -= temp;
  704. next += temp;
  705. /* Operational Registers */
  706. temp = dbg_status_buf (scratch, sizeof scratch, label,
  707. ehci_readl(ehci, &ehci->regs->status));
  708. temp = scnprintf (next, size, fmt, temp, scratch);
  709. size -= temp;
  710. next += temp;
  711. temp = dbg_command_buf (scratch, sizeof scratch, label,
  712. ehci_readl(ehci, &ehci->regs->command));
  713. temp = scnprintf (next, size, fmt, temp, scratch);
  714. size -= temp;
  715. next += temp;
  716. temp = dbg_intr_buf (scratch, sizeof scratch, label,
  717. ehci_readl(ehci, &ehci->regs->intr_enable));
  718. temp = scnprintf (next, size, fmt, temp, scratch);
  719. size -= temp;
  720. next += temp;
  721. temp = scnprintf (next, size, "uframe %04x\n",
  722. ehci_readl(ehci, &ehci->regs->frame_index));
  723. size -= temp;
  724. next += temp;
  725. for (i = 1; i <= HCS_N_PORTS (ehci->hcs_params); i++) {
  726. temp = dbg_port_buf (scratch, sizeof scratch, label, i,
  727. ehci_readl(ehci,
  728. &ehci->regs->port_status[i - 1]));
  729. temp = scnprintf (next, size, fmt, temp, scratch);
  730. size -= temp;
  731. next += temp;
  732. if (i == HCS_DEBUG_PORT(ehci->hcs_params) && ehci->debug) {
  733. temp = scnprintf (next, size,
  734. " debug control %08x\n",
  735. ehci_readl(ehci,
  736. &ehci->debug->control));
  737. size -= temp;
  738. next += temp;
  739. }
  740. }
  741. if (ehci->reclaim) {
  742. temp = scnprintf(next, size, "reclaim qh %p\n", ehci->reclaim);
  743. size -= temp;
  744. next += temp;
  745. }
  746. #ifdef EHCI_STATS
  747. temp = scnprintf (next, size,
  748. "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
  749. ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
  750. ehci->stats.lost_iaa);
  751. size -= temp;
  752. next += temp;
  753. temp = scnprintf (next, size, "complete %ld unlink %ld\n",
  754. ehci->stats.complete, ehci->stats.unlink);
  755. size -= temp;
  756. next += temp;
  757. #endif
  758. done:
  759. spin_unlock_irqrestore (&ehci->lock, flags);
  760. return buf->alloc_size - size;
  761. }
  762. static struct debug_buffer *alloc_buffer(struct usb_bus *bus,
  763. ssize_t (*fill_func)(struct debug_buffer *))
  764. {
  765. struct debug_buffer *buf;
  766. buf = kzalloc(sizeof(struct debug_buffer), GFP_KERNEL);
  767. if (buf) {
  768. buf->bus = bus;
  769. buf->fill_func = fill_func;
  770. mutex_init(&buf->mutex);
  771. buf->alloc_size = PAGE_SIZE;
  772. }
  773. return buf;
  774. }
  775. static int fill_buffer(struct debug_buffer *buf)
  776. {
  777. int ret = 0;
  778. if (!buf->output_buf)
  779. buf->output_buf = (char *)vmalloc(buf->alloc_size);
  780. if (!buf->output_buf) {
  781. ret = -ENOMEM;
  782. goto out;
  783. }
  784. ret = buf->fill_func(buf);
  785. if (ret >= 0) {
  786. buf->count = ret;
  787. ret = 0;
  788. }
  789. out:
  790. return ret;
  791. }
  792. static ssize_t debug_output(struct file *file, char __user *user_buf,
  793. size_t len, loff_t *offset)
  794. {
  795. struct debug_buffer *buf = file->private_data;
  796. int ret = 0;
  797. mutex_lock(&buf->mutex);
  798. if (buf->count == 0) {
  799. ret = fill_buffer(buf);
  800. if (ret != 0) {
  801. mutex_unlock(&buf->mutex);
  802. goto out;
  803. }
  804. }
  805. mutex_unlock(&buf->mutex);
  806. ret = simple_read_from_buffer(user_buf, len, offset,
  807. buf->output_buf, buf->count);
  808. out:
  809. return ret;
  810. }
  811. static int debug_close(struct inode *inode, struct file *file)
  812. {
  813. struct debug_buffer *buf = file->private_data;
  814. if (buf) {
  815. vfree(buf->output_buf);
  816. kfree(buf);
  817. }
  818. return 0;
  819. }
  820. static int debug_async_open(struct inode *inode, struct file *file)
  821. {
  822. file->private_data = alloc_buffer(inode->i_private, fill_async_buffer);
  823. return file->private_data ? 0 : -ENOMEM;
  824. }
  825. static int debug_periodic_open(struct inode *inode, struct file *file)
  826. {
  827. struct debug_buffer *buf;
  828. buf = alloc_buffer(inode->i_private, fill_periodic_buffer);
  829. if (!buf)
  830. return -ENOMEM;
  831. buf->alloc_size = (sizeof(void *) == 4 ? 6 : 8)*PAGE_SIZE;
  832. file->private_data = buf;
  833. return 0;
  834. }
  835. static int debug_registers_open(struct inode *inode, struct file *file)
  836. {
  837. file->private_data = alloc_buffer(inode->i_private,
  838. fill_registers_buffer);
  839. return file->private_data ? 0 : -ENOMEM;
  840. }
  841. static int debug_lpm_open(struct inode *inode, struct file *file)
  842. {
  843. file->private_data = inode->i_private;
  844. return 0;
  845. }
  846. static int debug_lpm_close(struct inode *inode, struct file *file)
  847. {
  848. return 0;
  849. }
  850. static ssize_t debug_lpm_read(struct file *file, char __user *user_buf,
  851. size_t count, loff_t *ppos)
  852. {
  853. /* TODO: show lpm stats */
  854. return 0;
  855. }
  856. static ssize_t debug_lpm_write(struct file *file, const char __user *user_buf,
  857. size_t count, loff_t *ppos)
  858. {
  859. struct usb_hcd *hcd;
  860. struct ehci_hcd *ehci;
  861. char buf[50];
  862. size_t len;
  863. u32 temp;
  864. unsigned long port;
  865. u32 __iomem *portsc ;
  866. u32 params;
  867. hcd = bus_to_hcd(file->private_data);
  868. ehci = hcd_to_ehci(hcd);
  869. len = min(count, sizeof(buf) - 1);
  870. if (copy_from_user(buf, user_buf, len))
  871. return -EFAULT;
  872. buf[len] = '\0';
  873. if (len > 0 && buf[len - 1] == '\n')
  874. buf[len - 1] = '\0';
  875. if (strncmp(buf, "enable", 5) == 0) {
  876. if (strict_strtoul(buf + 7, 10, &port))
  877. return -EINVAL;
  878. params = ehci_readl(ehci, &ehci->caps->hcs_params);
  879. if (port > HCS_N_PORTS(params)) {
  880. ehci_dbg(ehci, "ERR: LPM on bad port %lu\n", port);
  881. return -ENODEV;
  882. }
  883. portsc = &ehci->regs->port_status[port-1];
  884. temp = ehci_readl(ehci, portsc);
  885. if (!(temp & PORT_DEV_ADDR)) {
  886. ehci_dbg(ehci, "LPM: no device attached\n");
  887. return -ENODEV;
  888. }
  889. temp |= PORT_LPM;
  890. ehci_writel(ehci, temp, portsc);
  891. printk(KERN_INFO "force enable LPM for port %lu\n", port);
  892. } else if (strncmp(buf, "hird=", 5) == 0) {
  893. unsigned long hird;
  894. if (strict_strtoul(buf + 5, 16, &hird))
  895. return -EINVAL;
  896. printk(KERN_INFO "setting hird %s %lu\n", buf + 6, hird);
  897. temp = ehci_readl(ehci, &ehci->regs->command);
  898. temp &= ~CMD_HIRD;
  899. temp |= hird << 24;
  900. ehci_writel(ehci, temp, &ehci->regs->command);
  901. } else if (strncmp(buf, "disable", 7) == 0) {
  902. if (strict_strtoul(buf + 8, 10, &port))
  903. return -EINVAL;
  904. params = ehci_readl(ehci, &ehci->caps->hcs_params);
  905. if (port > HCS_N_PORTS(params)) {
  906. ehci_dbg(ehci, "ERR: LPM off bad port %lu\n", port);
  907. return -ENODEV;
  908. }
  909. portsc = &ehci->regs->port_status[port-1];
  910. temp = ehci_readl(ehci, portsc);
  911. if (!(temp & PORT_DEV_ADDR)) {
  912. ehci_dbg(ehci, "ERR: no device attached\n");
  913. return -ENODEV;
  914. }
  915. temp &= ~PORT_LPM;
  916. ehci_writel(ehci, temp, portsc);
  917. printk(KERN_INFO "disabled LPM for port %lu\n", port);
  918. } else
  919. return -EOPNOTSUPP;
  920. return count;
  921. }
  922. static inline void create_debug_files (struct ehci_hcd *ehci)
  923. {
  924. struct usb_bus *bus = &ehci_to_hcd(ehci)->self;
  925. ehci->debug_dir = debugfs_create_dir(bus->bus_name, ehci_debug_root);
  926. if (!ehci->debug_dir)
  927. return;
  928. if (!debugfs_create_file("async", S_IRUGO, ehci->debug_dir, bus,
  929. &debug_async_fops))
  930. goto file_error;
  931. if (!debugfs_create_file("periodic", S_IRUGO, ehci->debug_dir, bus,
  932. &debug_periodic_fops))
  933. goto file_error;
  934. if (!debugfs_create_file("registers", S_IRUGO, ehci->debug_dir, bus,
  935. &debug_registers_fops))
  936. goto file_error;
  937. if (!debugfs_create_file("lpm", S_IRUGO|S_IWUGO, ehci->debug_dir, bus,
  938. &debug_lpm_fops))
  939. goto file_error;
  940. return;
  941. file_error:
  942. debugfs_remove_recursive(ehci->debug_dir);
  943. }
  944. static inline void remove_debug_files (struct ehci_hcd *ehci)
  945. {
  946. debugfs_remove_recursive(ehci->debug_dir);
  947. }
  948. #endif /* STUB_DEBUG_FILES */