fsl_mxc_udc.c 2.4 KB

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  1. /*
  2. * Copyright (C) 2009
  3. * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
  4. *
  5. * Description:
  6. * Helper routines for i.MX3x SoCs from Freescale, needed by the fsl_usb2_udc.c
  7. * driver to function correctly on these systems.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. */
  14. #include <linux/clk.h>
  15. #include <linux/delay.h>
  16. #include <linux/err.h>
  17. #include <linux/fsl_devices.h>
  18. #include <linux/platform_device.h>
  19. #include <mach/hardware.h>
  20. static struct clk *mxc_ahb_clk;
  21. static struct clk *mxc_usb_clk;
  22. int fsl_udc_clk_init(struct platform_device *pdev)
  23. {
  24. struct fsl_usb2_platform_data *pdata;
  25. unsigned long freq;
  26. int ret;
  27. pdata = pdev->dev.platform_data;
  28. if (!cpu_is_mx35() && !cpu_is_mx25()) {
  29. mxc_ahb_clk = clk_get(&pdev->dev, "usb_ahb");
  30. if (IS_ERR(mxc_ahb_clk))
  31. return PTR_ERR(mxc_ahb_clk);
  32. ret = clk_enable(mxc_ahb_clk);
  33. if (ret < 0) {
  34. dev_err(&pdev->dev, "clk_enable(\"usb_ahb\") failed\n");
  35. goto eenahb;
  36. }
  37. }
  38. /* make sure USB_CLK is running at 60 MHz +/- 1000 Hz */
  39. mxc_usb_clk = clk_get(&pdev->dev, "usb");
  40. if (IS_ERR(mxc_usb_clk)) {
  41. dev_err(&pdev->dev, "clk_get(\"usb\") failed\n");
  42. ret = PTR_ERR(mxc_usb_clk);
  43. goto egusb;
  44. }
  45. if (!cpu_is_mx51()) {
  46. freq = clk_get_rate(mxc_usb_clk);
  47. if (pdata->phy_mode != FSL_USB2_PHY_ULPI &&
  48. (freq < 59999000 || freq > 60001000)) {
  49. dev_err(&pdev->dev, "USB_CLK=%lu, should be 60MHz\n", freq);
  50. ret = -EINVAL;
  51. goto eclkrate;
  52. }
  53. }
  54. ret = clk_enable(mxc_usb_clk);
  55. if (ret < 0) {
  56. dev_err(&pdev->dev, "clk_enable(\"usb_clk\") failed\n");
  57. goto eenusb;
  58. }
  59. return 0;
  60. eenusb:
  61. eclkrate:
  62. clk_put(mxc_usb_clk);
  63. mxc_usb_clk = NULL;
  64. egusb:
  65. if (!cpu_is_mx35())
  66. clk_disable(mxc_ahb_clk);
  67. eenahb:
  68. if (!cpu_is_mx35())
  69. clk_put(mxc_ahb_clk);
  70. return ret;
  71. }
  72. void fsl_udc_clk_finalize(struct platform_device *pdev)
  73. {
  74. struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
  75. /* ULPI transceivers don't need usbpll */
  76. if (pdata->phy_mode == FSL_USB2_PHY_ULPI) {
  77. clk_disable(mxc_usb_clk);
  78. clk_put(mxc_usb_clk);
  79. mxc_usb_clk = NULL;
  80. }
  81. }
  82. void fsl_udc_clk_release(void)
  83. {
  84. if (mxc_usb_clk) {
  85. clk_disable(mxc_usb_clk);
  86. clk_put(mxc_usb_clk);
  87. }
  88. if (!cpu_is_mx35()) {
  89. clk_disable(mxc_ahb_clk);
  90. clk_put(mxc_ahb_clk);
  91. }
  92. }