pcmcia.c 20 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853
  1. /*
  2. * Sonics Silicon Backplane
  3. * PCMCIA-Hostbus related functions
  4. *
  5. * Copyright 2006 Johannes Berg <johannes@sipsolutions.net>
  6. * Copyright 2007-2008 Michael Buesch <mb@bu3sch.de>
  7. *
  8. * Licensed under the GNU/GPL. See COPYING for details.
  9. */
  10. #include <linux/ssb/ssb.h>
  11. #include <linux/delay.h>
  12. #include <linux/io.h>
  13. #include <linux/etherdevice.h>
  14. #include <pcmcia/cs.h>
  15. #include <pcmcia/cistpl.h>
  16. #include <pcmcia/ciscode.h>
  17. #include <pcmcia/ds.h>
  18. #include <pcmcia/cisreg.h>
  19. #include "ssb_private.h"
  20. /* Define the following to 1 to enable a printk on each coreswitch. */
  21. #define SSB_VERBOSE_PCMCIACORESWITCH_DEBUG 0
  22. /* PCMCIA configuration registers */
  23. #define SSB_PCMCIA_ADDRESS0 0x2E
  24. #define SSB_PCMCIA_ADDRESS1 0x30
  25. #define SSB_PCMCIA_ADDRESS2 0x32
  26. #define SSB_PCMCIA_MEMSEG 0x34
  27. #define SSB_PCMCIA_SPROMCTL 0x36
  28. #define SSB_PCMCIA_SPROMCTL_IDLE 0
  29. #define SSB_PCMCIA_SPROMCTL_WRITE 1
  30. #define SSB_PCMCIA_SPROMCTL_READ 2
  31. #define SSB_PCMCIA_SPROMCTL_WRITEEN 4
  32. #define SSB_PCMCIA_SPROMCTL_WRITEDIS 7
  33. #define SSB_PCMCIA_SPROMCTL_DONE 8
  34. #define SSB_PCMCIA_SPROM_DATALO 0x38
  35. #define SSB_PCMCIA_SPROM_DATAHI 0x3A
  36. #define SSB_PCMCIA_SPROM_ADDRLO 0x3C
  37. #define SSB_PCMCIA_SPROM_ADDRHI 0x3E
  38. /* Hardware invariants CIS tuples */
  39. #define SSB_PCMCIA_CIS 0x80
  40. #define SSB_PCMCIA_CIS_ID 0x01
  41. #define SSB_PCMCIA_CIS_BOARDREV 0x02
  42. #define SSB_PCMCIA_CIS_PA 0x03
  43. #define SSB_PCMCIA_CIS_PA_PA0B0_LO 0
  44. #define SSB_PCMCIA_CIS_PA_PA0B0_HI 1
  45. #define SSB_PCMCIA_CIS_PA_PA0B1_LO 2
  46. #define SSB_PCMCIA_CIS_PA_PA0B1_HI 3
  47. #define SSB_PCMCIA_CIS_PA_PA0B2_LO 4
  48. #define SSB_PCMCIA_CIS_PA_PA0B2_HI 5
  49. #define SSB_PCMCIA_CIS_PA_ITSSI 6
  50. #define SSB_PCMCIA_CIS_PA_MAXPOW 7
  51. #define SSB_PCMCIA_CIS_OEMNAME 0x04
  52. #define SSB_PCMCIA_CIS_CCODE 0x05
  53. #define SSB_PCMCIA_CIS_ANTENNA 0x06
  54. #define SSB_PCMCIA_CIS_ANTGAIN 0x07
  55. #define SSB_PCMCIA_CIS_BFLAGS 0x08
  56. #define SSB_PCMCIA_CIS_LEDS 0x09
  57. /* PCMCIA SPROM size. */
  58. #define SSB_PCMCIA_SPROM_SIZE 256
  59. #define SSB_PCMCIA_SPROM_SIZE_BYTES (SSB_PCMCIA_SPROM_SIZE * sizeof(u16))
  60. /* Write to a PCMCIA configuration register. */
  61. static int ssb_pcmcia_cfg_write(struct ssb_bus *bus, u8 offset, u8 value)
  62. {
  63. int res;
  64. res = pcmcia_write_config_byte(bus->host_pcmcia, offset, value);
  65. if (unlikely(res != 0))
  66. return -EBUSY;
  67. return 0;
  68. }
  69. /* Read from a PCMCIA configuration register. */
  70. static int ssb_pcmcia_cfg_read(struct ssb_bus *bus, u8 offset, u8 *value)
  71. {
  72. int res;
  73. res = pcmcia_read_config_byte(bus->host_pcmcia, offset, value);
  74. if (unlikely(res != 0))
  75. return -EBUSY;
  76. return 0;
  77. }
  78. int ssb_pcmcia_switch_coreidx(struct ssb_bus *bus,
  79. u8 coreidx)
  80. {
  81. int err;
  82. int attempts = 0;
  83. u32 cur_core;
  84. u32 addr;
  85. u32 read_addr;
  86. u8 val;
  87. addr = (coreidx * SSB_CORE_SIZE) + SSB_ENUM_BASE;
  88. while (1) {
  89. err = ssb_pcmcia_cfg_write(bus, SSB_PCMCIA_ADDRESS0,
  90. (addr & 0x0000F000) >> 12);
  91. if (err)
  92. goto error;
  93. err = ssb_pcmcia_cfg_write(bus, SSB_PCMCIA_ADDRESS1,
  94. (addr & 0x00FF0000) >> 16);
  95. if (err)
  96. goto error;
  97. err = ssb_pcmcia_cfg_write(bus, SSB_PCMCIA_ADDRESS2,
  98. (addr & 0xFF000000) >> 24);
  99. if (err)
  100. goto error;
  101. read_addr = 0;
  102. err = ssb_pcmcia_cfg_read(bus, SSB_PCMCIA_ADDRESS0, &val);
  103. if (err)
  104. goto error;
  105. read_addr |= ((u32)(val & 0x0F)) << 12;
  106. err = ssb_pcmcia_cfg_read(bus, SSB_PCMCIA_ADDRESS1, &val);
  107. if (err)
  108. goto error;
  109. read_addr |= ((u32)val) << 16;
  110. err = ssb_pcmcia_cfg_read(bus, SSB_PCMCIA_ADDRESS2, &val);
  111. if (err)
  112. goto error;
  113. read_addr |= ((u32)val) << 24;
  114. cur_core = (read_addr - SSB_ENUM_BASE) / SSB_CORE_SIZE;
  115. if (cur_core == coreidx)
  116. break;
  117. err = -ETIMEDOUT;
  118. if (attempts++ > SSB_BAR0_MAX_RETRIES)
  119. goto error;
  120. udelay(10);
  121. }
  122. return 0;
  123. error:
  124. ssb_printk(KERN_ERR PFX "Failed to switch to core %u\n", coreidx);
  125. return err;
  126. }
  127. int ssb_pcmcia_switch_core(struct ssb_bus *bus,
  128. struct ssb_device *dev)
  129. {
  130. int err;
  131. #if SSB_VERBOSE_PCMCIACORESWITCH_DEBUG
  132. ssb_printk(KERN_INFO PFX
  133. "Switching to %s core, index %d\n",
  134. ssb_core_name(dev->id.coreid),
  135. dev->core_index);
  136. #endif
  137. err = ssb_pcmcia_switch_coreidx(bus, dev->core_index);
  138. if (!err)
  139. bus->mapped_device = dev;
  140. return err;
  141. }
  142. int ssb_pcmcia_switch_segment(struct ssb_bus *bus, u8 seg)
  143. {
  144. int attempts = 0;
  145. int err;
  146. u8 val;
  147. SSB_WARN_ON((seg != 0) && (seg != 1));
  148. while (1) {
  149. err = ssb_pcmcia_cfg_write(bus, SSB_PCMCIA_MEMSEG, seg);
  150. if (err)
  151. goto error;
  152. err = ssb_pcmcia_cfg_read(bus, SSB_PCMCIA_MEMSEG, &val);
  153. if (err)
  154. goto error;
  155. if (val == seg)
  156. break;
  157. err = -ETIMEDOUT;
  158. if (unlikely(attempts++ > SSB_BAR0_MAX_RETRIES))
  159. goto error;
  160. udelay(10);
  161. }
  162. bus->mapped_pcmcia_seg = seg;
  163. return 0;
  164. error:
  165. ssb_printk(KERN_ERR PFX "Failed to switch pcmcia segment\n");
  166. return err;
  167. }
  168. static int select_core_and_segment(struct ssb_device *dev,
  169. u16 *offset)
  170. {
  171. struct ssb_bus *bus = dev->bus;
  172. int err;
  173. u8 need_segment;
  174. if (*offset >= 0x800) {
  175. *offset -= 0x800;
  176. need_segment = 1;
  177. } else
  178. need_segment = 0;
  179. if (unlikely(dev != bus->mapped_device)) {
  180. err = ssb_pcmcia_switch_core(bus, dev);
  181. if (unlikely(err))
  182. return err;
  183. }
  184. if (unlikely(need_segment != bus->mapped_pcmcia_seg)) {
  185. err = ssb_pcmcia_switch_segment(bus, need_segment);
  186. if (unlikely(err))
  187. return err;
  188. }
  189. return 0;
  190. }
  191. static u8 ssb_pcmcia_read8(struct ssb_device *dev, u16 offset)
  192. {
  193. struct ssb_bus *bus = dev->bus;
  194. unsigned long flags;
  195. int err;
  196. u8 value = 0xFF;
  197. spin_lock_irqsave(&bus->bar_lock, flags);
  198. err = select_core_and_segment(dev, &offset);
  199. if (likely(!err))
  200. value = readb(bus->mmio + offset);
  201. spin_unlock_irqrestore(&bus->bar_lock, flags);
  202. return value;
  203. }
  204. static u16 ssb_pcmcia_read16(struct ssb_device *dev, u16 offset)
  205. {
  206. struct ssb_bus *bus = dev->bus;
  207. unsigned long flags;
  208. int err;
  209. u16 value = 0xFFFF;
  210. spin_lock_irqsave(&bus->bar_lock, flags);
  211. err = select_core_and_segment(dev, &offset);
  212. if (likely(!err))
  213. value = readw(bus->mmio + offset);
  214. spin_unlock_irqrestore(&bus->bar_lock, flags);
  215. return value;
  216. }
  217. static u32 ssb_pcmcia_read32(struct ssb_device *dev, u16 offset)
  218. {
  219. struct ssb_bus *bus = dev->bus;
  220. unsigned long flags;
  221. int err;
  222. u32 lo = 0xFFFFFFFF, hi = 0xFFFFFFFF;
  223. spin_lock_irqsave(&bus->bar_lock, flags);
  224. err = select_core_and_segment(dev, &offset);
  225. if (likely(!err)) {
  226. lo = readw(bus->mmio + offset);
  227. hi = readw(bus->mmio + offset + 2);
  228. }
  229. spin_unlock_irqrestore(&bus->bar_lock, flags);
  230. return (lo | (hi << 16));
  231. }
  232. #ifdef CONFIG_SSB_BLOCKIO
  233. static void ssb_pcmcia_block_read(struct ssb_device *dev, void *buffer,
  234. size_t count, u16 offset, u8 reg_width)
  235. {
  236. struct ssb_bus *bus = dev->bus;
  237. unsigned long flags;
  238. void __iomem *addr = bus->mmio + offset;
  239. int err;
  240. spin_lock_irqsave(&bus->bar_lock, flags);
  241. err = select_core_and_segment(dev, &offset);
  242. if (unlikely(err)) {
  243. memset(buffer, 0xFF, count);
  244. goto unlock;
  245. }
  246. switch (reg_width) {
  247. case sizeof(u8): {
  248. u8 *buf = buffer;
  249. while (count) {
  250. *buf = __raw_readb(addr);
  251. buf++;
  252. count--;
  253. }
  254. break;
  255. }
  256. case sizeof(u16): {
  257. __le16 *buf = buffer;
  258. SSB_WARN_ON(count & 1);
  259. while (count) {
  260. *buf = (__force __le16)__raw_readw(addr);
  261. buf++;
  262. count -= 2;
  263. }
  264. break;
  265. }
  266. case sizeof(u32): {
  267. __le16 *buf = buffer;
  268. SSB_WARN_ON(count & 3);
  269. while (count) {
  270. *buf = (__force __le16)__raw_readw(addr);
  271. buf++;
  272. *buf = (__force __le16)__raw_readw(addr + 2);
  273. buf++;
  274. count -= 4;
  275. }
  276. break;
  277. }
  278. default:
  279. SSB_WARN_ON(1);
  280. }
  281. unlock:
  282. spin_unlock_irqrestore(&bus->bar_lock, flags);
  283. }
  284. #endif /* CONFIG_SSB_BLOCKIO */
  285. static void ssb_pcmcia_write8(struct ssb_device *dev, u16 offset, u8 value)
  286. {
  287. struct ssb_bus *bus = dev->bus;
  288. unsigned long flags;
  289. int err;
  290. spin_lock_irqsave(&bus->bar_lock, flags);
  291. err = select_core_and_segment(dev, &offset);
  292. if (likely(!err))
  293. writeb(value, bus->mmio + offset);
  294. mmiowb();
  295. spin_unlock_irqrestore(&bus->bar_lock, flags);
  296. }
  297. static void ssb_pcmcia_write16(struct ssb_device *dev, u16 offset, u16 value)
  298. {
  299. struct ssb_bus *bus = dev->bus;
  300. unsigned long flags;
  301. int err;
  302. spin_lock_irqsave(&bus->bar_lock, flags);
  303. err = select_core_and_segment(dev, &offset);
  304. if (likely(!err))
  305. writew(value, bus->mmio + offset);
  306. mmiowb();
  307. spin_unlock_irqrestore(&bus->bar_lock, flags);
  308. }
  309. static void ssb_pcmcia_write32(struct ssb_device *dev, u16 offset, u32 value)
  310. {
  311. struct ssb_bus *bus = dev->bus;
  312. unsigned long flags;
  313. int err;
  314. spin_lock_irqsave(&bus->bar_lock, flags);
  315. err = select_core_and_segment(dev, &offset);
  316. if (likely(!err)) {
  317. writew((value & 0x0000FFFF), bus->mmio + offset);
  318. writew(((value & 0xFFFF0000) >> 16), bus->mmio + offset + 2);
  319. }
  320. mmiowb();
  321. spin_unlock_irqrestore(&bus->bar_lock, flags);
  322. }
  323. #ifdef CONFIG_SSB_BLOCKIO
  324. static void ssb_pcmcia_block_write(struct ssb_device *dev, const void *buffer,
  325. size_t count, u16 offset, u8 reg_width)
  326. {
  327. struct ssb_bus *bus = dev->bus;
  328. unsigned long flags;
  329. void __iomem *addr = bus->mmio + offset;
  330. int err;
  331. spin_lock_irqsave(&bus->bar_lock, flags);
  332. err = select_core_and_segment(dev, &offset);
  333. if (unlikely(err))
  334. goto unlock;
  335. switch (reg_width) {
  336. case sizeof(u8): {
  337. const u8 *buf = buffer;
  338. while (count) {
  339. __raw_writeb(*buf, addr);
  340. buf++;
  341. count--;
  342. }
  343. break;
  344. }
  345. case sizeof(u16): {
  346. const __le16 *buf = buffer;
  347. SSB_WARN_ON(count & 1);
  348. while (count) {
  349. __raw_writew((__force u16)(*buf), addr);
  350. buf++;
  351. count -= 2;
  352. }
  353. break;
  354. }
  355. case sizeof(u32): {
  356. const __le16 *buf = buffer;
  357. SSB_WARN_ON(count & 3);
  358. while (count) {
  359. __raw_writew((__force u16)(*buf), addr);
  360. buf++;
  361. __raw_writew((__force u16)(*buf), addr + 2);
  362. buf++;
  363. count -= 4;
  364. }
  365. break;
  366. }
  367. default:
  368. SSB_WARN_ON(1);
  369. }
  370. unlock:
  371. mmiowb();
  372. spin_unlock_irqrestore(&bus->bar_lock, flags);
  373. }
  374. #endif /* CONFIG_SSB_BLOCKIO */
  375. /* Not "static", as it's used in main.c */
  376. const struct ssb_bus_ops ssb_pcmcia_ops = {
  377. .read8 = ssb_pcmcia_read8,
  378. .read16 = ssb_pcmcia_read16,
  379. .read32 = ssb_pcmcia_read32,
  380. .write8 = ssb_pcmcia_write8,
  381. .write16 = ssb_pcmcia_write16,
  382. .write32 = ssb_pcmcia_write32,
  383. #ifdef CONFIG_SSB_BLOCKIO
  384. .block_read = ssb_pcmcia_block_read,
  385. .block_write = ssb_pcmcia_block_write,
  386. #endif
  387. };
  388. static int ssb_pcmcia_sprom_command(struct ssb_bus *bus, u8 command)
  389. {
  390. unsigned int i;
  391. int err;
  392. u8 value;
  393. err = ssb_pcmcia_cfg_write(bus, SSB_PCMCIA_SPROMCTL, command);
  394. if (err)
  395. return err;
  396. for (i = 0; i < 1000; i++) {
  397. err = ssb_pcmcia_cfg_read(bus, SSB_PCMCIA_SPROMCTL, &value);
  398. if (err)
  399. return err;
  400. if (value & SSB_PCMCIA_SPROMCTL_DONE)
  401. return 0;
  402. udelay(10);
  403. }
  404. return -ETIMEDOUT;
  405. }
  406. /* offset is the 16bit word offset */
  407. static int ssb_pcmcia_sprom_read(struct ssb_bus *bus, u16 offset, u16 *value)
  408. {
  409. int err;
  410. u8 lo, hi;
  411. offset *= 2; /* Make byte offset */
  412. err = ssb_pcmcia_cfg_write(bus, SSB_PCMCIA_SPROM_ADDRLO,
  413. (offset & 0x00FF));
  414. if (err)
  415. return err;
  416. err = ssb_pcmcia_cfg_write(bus, SSB_PCMCIA_SPROM_ADDRHI,
  417. (offset & 0xFF00) >> 8);
  418. if (err)
  419. return err;
  420. err = ssb_pcmcia_sprom_command(bus, SSB_PCMCIA_SPROMCTL_READ);
  421. if (err)
  422. return err;
  423. err = ssb_pcmcia_cfg_read(bus, SSB_PCMCIA_SPROM_DATALO, &lo);
  424. if (err)
  425. return err;
  426. err = ssb_pcmcia_cfg_read(bus, SSB_PCMCIA_SPROM_DATAHI, &hi);
  427. if (err)
  428. return err;
  429. *value = (lo | (((u16)hi) << 8));
  430. return 0;
  431. }
  432. /* offset is the 16bit word offset */
  433. static int ssb_pcmcia_sprom_write(struct ssb_bus *bus, u16 offset, u16 value)
  434. {
  435. int err;
  436. offset *= 2; /* Make byte offset */
  437. err = ssb_pcmcia_cfg_write(bus, SSB_PCMCIA_SPROM_ADDRLO,
  438. (offset & 0x00FF));
  439. if (err)
  440. return err;
  441. err = ssb_pcmcia_cfg_write(bus, SSB_PCMCIA_SPROM_ADDRHI,
  442. (offset & 0xFF00) >> 8);
  443. if (err)
  444. return err;
  445. err = ssb_pcmcia_cfg_write(bus, SSB_PCMCIA_SPROM_DATALO,
  446. (value & 0x00FF));
  447. if (err)
  448. return err;
  449. err = ssb_pcmcia_cfg_write(bus, SSB_PCMCIA_SPROM_DATAHI,
  450. (value & 0xFF00) >> 8);
  451. if (err)
  452. return err;
  453. err = ssb_pcmcia_sprom_command(bus, SSB_PCMCIA_SPROMCTL_WRITE);
  454. if (err)
  455. return err;
  456. msleep(20);
  457. return 0;
  458. }
  459. /* Read the SPROM image. bufsize is in 16bit words. */
  460. static int ssb_pcmcia_sprom_read_all(struct ssb_bus *bus, u16 *sprom)
  461. {
  462. int err, i;
  463. for (i = 0; i < SSB_PCMCIA_SPROM_SIZE; i++) {
  464. err = ssb_pcmcia_sprom_read(bus, i, &sprom[i]);
  465. if (err)
  466. return err;
  467. }
  468. return 0;
  469. }
  470. /* Write the SPROM image. size is in 16bit words. */
  471. static int ssb_pcmcia_sprom_write_all(struct ssb_bus *bus, const u16 *sprom)
  472. {
  473. int i, err;
  474. bool failed = 0;
  475. size_t size = SSB_PCMCIA_SPROM_SIZE;
  476. ssb_printk(KERN_NOTICE PFX
  477. "Writing SPROM. Do NOT turn off the power! "
  478. "Please stand by...\n");
  479. err = ssb_pcmcia_sprom_command(bus, SSB_PCMCIA_SPROMCTL_WRITEEN);
  480. if (err) {
  481. ssb_printk(KERN_NOTICE PFX
  482. "Could not enable SPROM write access.\n");
  483. return -EBUSY;
  484. }
  485. ssb_printk(KERN_NOTICE PFX "[ 0%%");
  486. msleep(500);
  487. for (i = 0; i < size; i++) {
  488. if (i == size / 4)
  489. ssb_printk("25%%");
  490. else if (i == size / 2)
  491. ssb_printk("50%%");
  492. else if (i == (size * 3) / 4)
  493. ssb_printk("75%%");
  494. else if (i % 2)
  495. ssb_printk(".");
  496. err = ssb_pcmcia_sprom_write(bus, i, sprom[i]);
  497. if (err) {
  498. ssb_printk(KERN_NOTICE PFX
  499. "Failed to write to SPROM.\n");
  500. failed = 1;
  501. break;
  502. }
  503. }
  504. err = ssb_pcmcia_sprom_command(bus, SSB_PCMCIA_SPROMCTL_WRITEDIS);
  505. if (err) {
  506. ssb_printk(KERN_NOTICE PFX
  507. "Could not disable SPROM write access.\n");
  508. failed = 1;
  509. }
  510. msleep(500);
  511. if (!failed) {
  512. ssb_printk("100%% ]\n");
  513. ssb_printk(KERN_NOTICE PFX "SPROM written.\n");
  514. }
  515. return failed ? -EBUSY : 0;
  516. }
  517. static int ssb_pcmcia_sprom_check_crc(const u16 *sprom, size_t size)
  518. {
  519. //TODO
  520. return 0;
  521. }
  522. #define GOTO_ERROR_ON(condition, description) do { \
  523. if (unlikely(condition)) { \
  524. error_description = description; \
  525. goto error; \
  526. } \
  527. } while (0)
  528. static int ssb_pcmcia_get_mac(struct pcmcia_device *p_dev,
  529. tuple_t *tuple,
  530. void *priv)
  531. {
  532. struct ssb_sprom *sprom = priv;
  533. if (tuple->TupleData[0] != CISTPL_FUNCE_LAN_NODE_ID)
  534. return -EINVAL;
  535. if (tuple->TupleDataLen != ETH_ALEN + 2)
  536. return -EINVAL;
  537. if (tuple->TupleData[1] != ETH_ALEN)
  538. return -EINVAL;
  539. memcpy(sprom->il0mac, &tuple->TupleData[2], ETH_ALEN);
  540. return 0;
  541. };
  542. static int ssb_pcmcia_do_get_invariants(struct pcmcia_device *p_dev,
  543. tuple_t *tuple,
  544. void *priv)
  545. {
  546. struct ssb_init_invariants *iv = priv;
  547. struct ssb_sprom *sprom = &iv->sprom;
  548. struct ssb_boardinfo *bi = &iv->boardinfo;
  549. const char *error_description;
  550. GOTO_ERROR_ON(tuple->TupleDataLen < 1, "VEN tpl < 1");
  551. switch (tuple->TupleData[0]) {
  552. case SSB_PCMCIA_CIS_ID:
  553. GOTO_ERROR_ON((tuple->TupleDataLen != 5) &&
  554. (tuple->TupleDataLen != 7),
  555. "id tpl size");
  556. bi->vendor = tuple->TupleData[1] |
  557. ((u16)tuple->TupleData[2] << 8);
  558. break;
  559. case SSB_PCMCIA_CIS_BOARDREV:
  560. GOTO_ERROR_ON(tuple->TupleDataLen != 2,
  561. "boardrev tpl size");
  562. sprom->board_rev = tuple->TupleData[1];
  563. break;
  564. case SSB_PCMCIA_CIS_PA:
  565. GOTO_ERROR_ON((tuple->TupleDataLen != 9) &&
  566. (tuple->TupleDataLen != 10),
  567. "pa tpl size");
  568. sprom->pa0b0 = tuple->TupleData[1] |
  569. ((u16)tuple->TupleData[2] << 8);
  570. sprom->pa0b1 = tuple->TupleData[3] |
  571. ((u16)tuple->TupleData[4] << 8);
  572. sprom->pa0b2 = tuple->TupleData[5] |
  573. ((u16)tuple->TupleData[6] << 8);
  574. sprom->itssi_a = tuple->TupleData[7];
  575. sprom->itssi_bg = tuple->TupleData[7];
  576. sprom->maxpwr_a = tuple->TupleData[8];
  577. sprom->maxpwr_bg = tuple->TupleData[8];
  578. break;
  579. case SSB_PCMCIA_CIS_OEMNAME:
  580. /* We ignore this. */
  581. break;
  582. case SSB_PCMCIA_CIS_CCODE:
  583. GOTO_ERROR_ON(tuple->TupleDataLen != 2,
  584. "ccode tpl size");
  585. sprom->country_code = tuple->TupleData[1];
  586. break;
  587. case SSB_PCMCIA_CIS_ANTENNA:
  588. GOTO_ERROR_ON(tuple->TupleDataLen != 2,
  589. "ant tpl size");
  590. sprom->ant_available_a = tuple->TupleData[1];
  591. sprom->ant_available_bg = tuple->TupleData[1];
  592. break;
  593. case SSB_PCMCIA_CIS_ANTGAIN:
  594. GOTO_ERROR_ON(tuple->TupleDataLen != 2,
  595. "antg tpl size");
  596. sprom->antenna_gain.ghz24.a0 = tuple->TupleData[1];
  597. sprom->antenna_gain.ghz24.a1 = tuple->TupleData[1];
  598. sprom->antenna_gain.ghz24.a2 = tuple->TupleData[1];
  599. sprom->antenna_gain.ghz24.a3 = tuple->TupleData[1];
  600. sprom->antenna_gain.ghz5.a0 = tuple->TupleData[1];
  601. sprom->antenna_gain.ghz5.a1 = tuple->TupleData[1];
  602. sprom->antenna_gain.ghz5.a2 = tuple->TupleData[1];
  603. sprom->antenna_gain.ghz5.a3 = tuple->TupleData[1];
  604. break;
  605. case SSB_PCMCIA_CIS_BFLAGS:
  606. GOTO_ERROR_ON((tuple->TupleDataLen != 3) &&
  607. (tuple->TupleDataLen != 5),
  608. "bfl tpl size");
  609. sprom->boardflags_lo = tuple->TupleData[1] |
  610. ((u16)tuple->TupleData[2] << 8);
  611. break;
  612. case SSB_PCMCIA_CIS_LEDS:
  613. GOTO_ERROR_ON(tuple->TupleDataLen != 5,
  614. "leds tpl size");
  615. sprom->gpio0 = tuple->TupleData[1];
  616. sprom->gpio1 = tuple->TupleData[2];
  617. sprom->gpio2 = tuple->TupleData[3];
  618. sprom->gpio3 = tuple->TupleData[4];
  619. break;
  620. }
  621. return -ENOSPC; /* continue with next entry */
  622. error:
  623. ssb_printk(KERN_ERR PFX
  624. "PCMCIA: Failed to fetch device invariants: %s\n",
  625. error_description);
  626. return -ENODEV;
  627. }
  628. int ssb_pcmcia_get_invariants(struct ssb_bus *bus,
  629. struct ssb_init_invariants *iv)
  630. {
  631. struct ssb_sprom *sprom = &iv->sprom;
  632. int res;
  633. memset(sprom, 0xFF, sizeof(*sprom));
  634. sprom->revision = 1;
  635. sprom->boardflags_lo = 0;
  636. sprom->boardflags_hi = 0;
  637. /* First fetch the MAC address. */
  638. res = pcmcia_loop_tuple(bus->host_pcmcia, CISTPL_FUNCE,
  639. ssb_pcmcia_get_mac, sprom);
  640. if (res != 0) {
  641. ssb_printk(KERN_ERR PFX
  642. "PCMCIA: Failed to fetch MAC address\n");
  643. return -ENODEV;
  644. }
  645. /* Fetch the vendor specific tuples. */
  646. res = pcmcia_loop_tuple(bus->host_pcmcia, SSB_PCMCIA_CIS,
  647. ssb_pcmcia_do_get_invariants, sprom);
  648. if ((res == 0) || (res == -ENOSPC))
  649. return 0;
  650. ssb_printk(KERN_ERR PFX
  651. "PCMCIA: Failed to fetch device invariants\n");
  652. return -ENODEV;
  653. }
  654. static ssize_t ssb_pcmcia_attr_sprom_show(struct device *pcmciadev,
  655. struct device_attribute *attr,
  656. char *buf)
  657. {
  658. struct pcmcia_device *pdev =
  659. container_of(pcmciadev, struct pcmcia_device, dev);
  660. struct ssb_bus *bus;
  661. bus = ssb_pcmcia_dev_to_bus(pdev);
  662. if (!bus)
  663. return -ENODEV;
  664. return ssb_attr_sprom_show(bus, buf,
  665. ssb_pcmcia_sprom_read_all);
  666. }
  667. static ssize_t ssb_pcmcia_attr_sprom_store(struct device *pcmciadev,
  668. struct device_attribute *attr,
  669. const char *buf, size_t count)
  670. {
  671. struct pcmcia_device *pdev =
  672. container_of(pcmciadev, struct pcmcia_device, dev);
  673. struct ssb_bus *bus;
  674. bus = ssb_pcmcia_dev_to_bus(pdev);
  675. if (!bus)
  676. return -ENODEV;
  677. return ssb_attr_sprom_store(bus, buf, count,
  678. ssb_pcmcia_sprom_check_crc,
  679. ssb_pcmcia_sprom_write_all);
  680. }
  681. static DEVICE_ATTR(ssb_sprom, 0600,
  682. ssb_pcmcia_attr_sprom_show,
  683. ssb_pcmcia_attr_sprom_store);
  684. static int ssb_pcmcia_cor_setup(struct ssb_bus *bus, u8 cor)
  685. {
  686. u8 val;
  687. int err;
  688. err = ssb_pcmcia_cfg_read(bus, cor, &val);
  689. if (err)
  690. return err;
  691. val &= ~COR_SOFT_RESET;
  692. val |= COR_FUNC_ENA | COR_IREQ_ENA | COR_LEVEL_REQ;
  693. err = ssb_pcmcia_cfg_write(bus, cor, val);
  694. if (err)
  695. return err;
  696. msleep(40);
  697. return 0;
  698. }
  699. /* Initialize the PCMCIA hardware. This is called on Init and Resume. */
  700. int ssb_pcmcia_hardware_setup(struct ssb_bus *bus)
  701. {
  702. int err;
  703. if (bus->bustype != SSB_BUSTYPE_PCMCIA)
  704. return 0;
  705. /* Switch segment to a known state and sync
  706. * bus->mapped_pcmcia_seg with hardware state. */
  707. ssb_pcmcia_switch_segment(bus, 0);
  708. /* Init the COR register. */
  709. err = ssb_pcmcia_cor_setup(bus, CISREG_COR);
  710. if (err)
  711. return err;
  712. /* Some cards also need this register to get poked. */
  713. err = ssb_pcmcia_cor_setup(bus, CISREG_COR + 0x80);
  714. if (err)
  715. return err;
  716. return 0;
  717. }
  718. void ssb_pcmcia_exit(struct ssb_bus *bus)
  719. {
  720. if (bus->bustype != SSB_BUSTYPE_PCMCIA)
  721. return;
  722. device_remove_file(&bus->host_pcmcia->dev, &dev_attr_ssb_sprom);
  723. }
  724. int ssb_pcmcia_init(struct ssb_bus *bus)
  725. {
  726. int err;
  727. if (bus->bustype != SSB_BUSTYPE_PCMCIA)
  728. return 0;
  729. err = ssb_pcmcia_hardware_setup(bus);
  730. if (err)
  731. goto error;
  732. bus->sprom_size = SSB_PCMCIA_SPROM_SIZE;
  733. mutex_init(&bus->sprom_mutex);
  734. err = device_create_file(&bus->host_pcmcia->dev, &dev_attr_ssb_sprom);
  735. if (err)
  736. goto error;
  737. return 0;
  738. error:
  739. ssb_printk(KERN_ERR PFX "Failed to initialize PCMCIA host device\n");
  740. return err;
  741. }