qla_init.c 142 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2010 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_gbl.h"
  9. #include <linux/delay.h>
  10. #include <linux/slab.h>
  11. #include <linux/vmalloc.h>
  12. #include "qla_devtbl.h"
  13. #ifdef CONFIG_SPARC
  14. #include <asm/prom.h>
  15. #endif
  16. /*
  17. * QLogic ISP2x00 Hardware Support Function Prototypes.
  18. */
  19. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  20. static int qla2x00_setup_chip(scsi_qla_host_t *);
  21. static int qla2x00_init_rings(scsi_qla_host_t *);
  22. static int qla2x00_fw_ready(scsi_qla_host_t *);
  23. static int qla2x00_configure_hba(scsi_qla_host_t *);
  24. static int qla2x00_configure_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  26. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  27. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  28. static int qla2x00_device_resync(scsi_qla_host_t *);
  29. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  30. uint16_t *);
  31. static int qla2x00_restart_isp(scsi_qla_host_t *);
  32. static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *);
  33. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  34. static int qla84xx_init_chip(scsi_qla_host_t *);
  35. static int qla25xx_init_queues(struct qla_hw_data *);
  36. /* SRB Extensions ---------------------------------------------------------- */
  37. static void
  38. qla2x00_ctx_sp_timeout(unsigned long __data)
  39. {
  40. srb_t *sp = (srb_t *)__data;
  41. struct srb_ctx *ctx;
  42. struct srb_iocb *iocb;
  43. fc_port_t *fcport = sp->fcport;
  44. struct qla_hw_data *ha = fcport->vha->hw;
  45. struct req_que *req;
  46. unsigned long flags;
  47. spin_lock_irqsave(&ha->hardware_lock, flags);
  48. req = ha->req_q_map[0];
  49. req->outstanding_cmds[sp->handle] = NULL;
  50. ctx = sp->ctx;
  51. iocb = ctx->u.iocb_cmd;
  52. iocb->timeout(sp);
  53. iocb->free(sp);
  54. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  55. }
  56. static void
  57. qla2x00_ctx_sp_free(srb_t *sp)
  58. {
  59. struct srb_ctx *ctx = sp->ctx;
  60. struct srb_iocb *iocb = ctx->u.iocb_cmd;
  61. struct scsi_qla_host *vha = sp->fcport->vha;
  62. del_timer_sync(&iocb->timer);
  63. kfree(iocb);
  64. kfree(ctx);
  65. mempool_free(sp, sp->fcport->vha->hw->srb_mempool);
  66. QLA_VHA_MARK_NOT_BUSY(vha);
  67. }
  68. inline srb_t *
  69. qla2x00_get_ctx_sp(scsi_qla_host_t *vha, fc_port_t *fcport, size_t size,
  70. unsigned long tmo)
  71. {
  72. srb_t *sp = NULL;
  73. struct qla_hw_data *ha = vha->hw;
  74. struct srb_ctx *ctx;
  75. struct srb_iocb *iocb;
  76. uint8_t bail;
  77. QLA_VHA_MARK_BUSY(vha, bail);
  78. if (bail)
  79. return NULL;
  80. sp = mempool_alloc(ha->srb_mempool, GFP_KERNEL);
  81. if (!sp)
  82. goto done;
  83. ctx = kzalloc(size, GFP_KERNEL);
  84. if (!ctx) {
  85. mempool_free(sp, ha->srb_mempool);
  86. sp = NULL;
  87. goto done;
  88. }
  89. iocb = kzalloc(sizeof(struct srb_iocb), GFP_KERNEL);
  90. if (!iocb) {
  91. mempool_free(sp, ha->srb_mempool);
  92. sp = NULL;
  93. kfree(ctx);
  94. goto done;
  95. }
  96. memset(sp, 0, sizeof(*sp));
  97. sp->fcport = fcport;
  98. sp->ctx = ctx;
  99. ctx->u.iocb_cmd = iocb;
  100. iocb->free = qla2x00_ctx_sp_free;
  101. init_timer(&iocb->timer);
  102. if (!tmo)
  103. goto done;
  104. iocb->timer.expires = jiffies + tmo * HZ;
  105. iocb->timer.data = (unsigned long)sp;
  106. iocb->timer.function = qla2x00_ctx_sp_timeout;
  107. add_timer(&iocb->timer);
  108. done:
  109. if (!sp)
  110. QLA_VHA_MARK_NOT_BUSY(vha);
  111. return sp;
  112. }
  113. /* Asynchronous Login/Logout Routines -------------------------------------- */
  114. static inline unsigned long
  115. qla2x00_get_async_timeout(struct scsi_qla_host *vha)
  116. {
  117. unsigned long tmo;
  118. struct qla_hw_data *ha = vha->hw;
  119. /* Firmware should use switch negotiated r_a_tov for timeout. */
  120. tmo = ha->r_a_tov / 10 * 2;
  121. if (!IS_FWI2_CAPABLE(ha)) {
  122. /*
  123. * Except for earlier ISPs where the timeout is seeded from the
  124. * initialization control block.
  125. */
  126. tmo = ha->login_timeout;
  127. }
  128. return tmo;
  129. }
  130. static void
  131. qla2x00_async_iocb_timeout(srb_t *sp)
  132. {
  133. fc_port_t *fcport = sp->fcport;
  134. struct srb_ctx *ctx = sp->ctx;
  135. DEBUG2(printk(KERN_WARNING
  136. "scsi(%ld:%x): Async-%s timeout - portid=%02x%02x%02x.\n",
  137. fcport->vha->host_no, sp->handle,
  138. ctx->name, fcport->d_id.b.domain,
  139. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  140. fcport->flags &= ~FCF_ASYNC_SENT;
  141. if (ctx->type == SRB_LOGIN_CMD) {
  142. struct srb_iocb *lio = ctx->u.iocb_cmd;
  143. qla2x00_post_async_logout_work(fcport->vha, fcport, NULL);
  144. /* Retry as needed. */
  145. lio->u.logio.data[0] = MBS_COMMAND_ERROR;
  146. lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
  147. QLA_LOGIO_LOGIN_RETRIED : 0;
  148. qla2x00_post_async_login_done_work(fcport->vha, fcport,
  149. lio->u.logio.data);
  150. }
  151. }
  152. static void
  153. qla2x00_async_login_ctx_done(srb_t *sp)
  154. {
  155. struct srb_ctx *ctx = sp->ctx;
  156. struct srb_iocb *lio = ctx->u.iocb_cmd;
  157. qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport,
  158. lio->u.logio.data);
  159. lio->free(sp);
  160. }
  161. int
  162. qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
  163. uint16_t *data)
  164. {
  165. srb_t *sp;
  166. struct srb_ctx *ctx;
  167. struct srb_iocb *lio;
  168. int rval;
  169. rval = QLA_FUNCTION_FAILED;
  170. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  171. qla2x00_get_async_timeout(vha) + 2);
  172. if (!sp)
  173. goto done;
  174. ctx = sp->ctx;
  175. ctx->type = SRB_LOGIN_CMD;
  176. ctx->name = "login";
  177. lio = ctx->u.iocb_cmd;
  178. lio->timeout = qla2x00_async_iocb_timeout;
  179. lio->done = qla2x00_async_login_ctx_done;
  180. lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
  181. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  182. lio->u.logio.flags |= SRB_LOGIN_RETRIED;
  183. rval = qla2x00_start_sp(sp);
  184. if (rval != QLA_SUCCESS)
  185. goto done_free_sp;
  186. DEBUG2(printk(KERN_DEBUG
  187. "scsi(%ld:%x): Async-login - loop-id=%x portid=%02x%02x%02x "
  188. "retries=%d.\n", fcport->vha->host_no, sp->handle, fcport->loop_id,
  189. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
  190. fcport->login_retry));
  191. return rval;
  192. done_free_sp:
  193. lio->free(sp);
  194. done:
  195. return rval;
  196. }
  197. static void
  198. qla2x00_async_logout_ctx_done(srb_t *sp)
  199. {
  200. struct srb_ctx *ctx = sp->ctx;
  201. struct srb_iocb *lio = ctx->u.iocb_cmd;
  202. qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport,
  203. lio->u.logio.data);
  204. lio->free(sp);
  205. }
  206. int
  207. qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
  208. {
  209. srb_t *sp;
  210. struct srb_ctx *ctx;
  211. struct srb_iocb *lio;
  212. int rval;
  213. rval = QLA_FUNCTION_FAILED;
  214. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  215. qla2x00_get_async_timeout(vha) + 2);
  216. if (!sp)
  217. goto done;
  218. ctx = sp->ctx;
  219. ctx->type = SRB_LOGOUT_CMD;
  220. ctx->name = "logout";
  221. lio = ctx->u.iocb_cmd;
  222. lio->timeout = qla2x00_async_iocb_timeout;
  223. lio->done = qla2x00_async_logout_ctx_done;
  224. rval = qla2x00_start_sp(sp);
  225. if (rval != QLA_SUCCESS)
  226. goto done_free_sp;
  227. DEBUG2(printk(KERN_DEBUG
  228. "scsi(%ld:%x): Async-logout - loop-id=%x portid=%02x%02x%02x.\n",
  229. fcport->vha->host_no, sp->handle, fcport->loop_id,
  230. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  231. return rval;
  232. done_free_sp:
  233. lio->free(sp);
  234. done:
  235. return rval;
  236. }
  237. static void
  238. qla2x00_async_adisc_ctx_done(srb_t *sp)
  239. {
  240. struct srb_ctx *ctx = sp->ctx;
  241. struct srb_iocb *lio = ctx->u.iocb_cmd;
  242. qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport,
  243. lio->u.logio.data);
  244. lio->free(sp);
  245. }
  246. int
  247. qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
  248. uint16_t *data)
  249. {
  250. srb_t *sp;
  251. struct srb_ctx *ctx;
  252. struct srb_iocb *lio;
  253. int rval;
  254. rval = QLA_FUNCTION_FAILED;
  255. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  256. qla2x00_get_async_timeout(vha) + 2);
  257. if (!sp)
  258. goto done;
  259. ctx = sp->ctx;
  260. ctx->type = SRB_ADISC_CMD;
  261. ctx->name = "adisc";
  262. lio = ctx->u.iocb_cmd;
  263. lio->timeout = qla2x00_async_iocb_timeout;
  264. lio->done = qla2x00_async_adisc_ctx_done;
  265. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  266. lio->u.logio.flags |= SRB_LOGIN_RETRIED;
  267. rval = qla2x00_start_sp(sp);
  268. if (rval != QLA_SUCCESS)
  269. goto done_free_sp;
  270. DEBUG2(printk(KERN_DEBUG
  271. "scsi(%ld:%x): Async-adisc - loop-id=%x portid=%02x%02x%02x.\n",
  272. fcport->vha->host_no, sp->handle, fcport->loop_id,
  273. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  274. return rval;
  275. done_free_sp:
  276. lio->free(sp);
  277. done:
  278. return rval;
  279. }
  280. static void
  281. qla2x00_async_tm_cmd_ctx_done(srb_t *sp)
  282. {
  283. struct srb_ctx *ctx = sp->ctx;
  284. struct srb_iocb *iocb = (struct srb_iocb *)ctx->u.iocb_cmd;
  285. qla2x00_async_tm_cmd_done(sp->fcport->vha, sp->fcport, iocb);
  286. iocb->free(sp);
  287. }
  288. int
  289. qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
  290. uint32_t tag)
  291. {
  292. struct scsi_qla_host *vha = fcport->vha;
  293. srb_t *sp;
  294. struct srb_ctx *ctx;
  295. struct srb_iocb *tcf;
  296. int rval;
  297. rval = QLA_FUNCTION_FAILED;
  298. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  299. qla2x00_get_async_timeout(vha) + 2);
  300. if (!sp)
  301. goto done;
  302. ctx = sp->ctx;
  303. ctx->type = SRB_TM_CMD;
  304. ctx->name = "tmf";
  305. tcf = ctx->u.iocb_cmd;
  306. tcf->u.tmf.flags = flags;
  307. tcf->u.tmf.lun = lun;
  308. tcf->u.tmf.data = tag;
  309. tcf->timeout = qla2x00_async_iocb_timeout;
  310. tcf->done = qla2x00_async_tm_cmd_ctx_done;
  311. rval = qla2x00_start_sp(sp);
  312. if (rval != QLA_SUCCESS)
  313. goto done_free_sp;
  314. DEBUG2(printk(KERN_DEBUG
  315. "scsi(%ld:%x): Async-tmf - loop-id=%x portid=%02x%02x%02x.\n",
  316. fcport->vha->host_no, sp->handle, fcport->loop_id,
  317. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  318. return rval;
  319. done_free_sp:
  320. tcf->free(sp);
  321. done:
  322. return rval;
  323. }
  324. void
  325. qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  326. uint16_t *data)
  327. {
  328. int rval;
  329. switch (data[0]) {
  330. case MBS_COMMAND_COMPLETE:
  331. if (fcport->flags & FCF_FCP2_DEVICE) {
  332. fcport->flags |= FCF_ASYNC_SENT;
  333. qla2x00_post_async_adisc_work(vha, fcport, data);
  334. break;
  335. }
  336. qla2x00_update_fcport(vha, fcport);
  337. break;
  338. case MBS_COMMAND_ERROR:
  339. fcport->flags &= ~FCF_ASYNC_SENT;
  340. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  341. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  342. else
  343. qla2x00_mark_device_lost(vha, fcport, 1, 1);
  344. break;
  345. case MBS_PORT_ID_USED:
  346. fcport->loop_id = data[1];
  347. qla2x00_post_async_logout_work(vha, fcport, NULL);
  348. qla2x00_post_async_login_work(vha, fcport, NULL);
  349. break;
  350. case MBS_LOOP_ID_USED:
  351. fcport->loop_id++;
  352. rval = qla2x00_find_new_loop_id(vha, fcport);
  353. if (rval != QLA_SUCCESS) {
  354. fcport->flags &= ~FCF_ASYNC_SENT;
  355. qla2x00_mark_device_lost(vha, fcport, 1, 1);
  356. break;
  357. }
  358. qla2x00_post_async_login_work(vha, fcport, NULL);
  359. break;
  360. }
  361. return;
  362. }
  363. void
  364. qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  365. uint16_t *data)
  366. {
  367. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  368. return;
  369. }
  370. void
  371. qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  372. uint16_t *data)
  373. {
  374. if (data[0] == MBS_COMMAND_COMPLETE) {
  375. qla2x00_update_fcport(vha, fcport);
  376. return;
  377. }
  378. /* Retry login. */
  379. fcport->flags &= ~FCF_ASYNC_SENT;
  380. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  381. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  382. else
  383. qla2x00_mark_device_lost(vha, fcport, 1, 1);
  384. return;
  385. }
  386. void
  387. qla2x00_async_tm_cmd_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  388. struct srb_iocb *iocb)
  389. {
  390. int rval;
  391. uint32_t flags;
  392. uint16_t lun;
  393. flags = iocb->u.tmf.flags;
  394. lun = (uint16_t)iocb->u.tmf.lun;
  395. /* Issue Marker IOCB */
  396. rval = qla2x00_marker(vha, vha->hw->req_q_map[0],
  397. vha->hw->rsp_q_map[0], fcport->loop_id, lun,
  398. flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
  399. if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) {
  400. DEBUG2_3_11(printk(KERN_WARNING
  401. "%s(%ld): TM IOCB failed (%x).\n",
  402. __func__, vha->host_no, rval));
  403. }
  404. return;
  405. }
  406. /****************************************************************************/
  407. /* QLogic ISP2x00 Hardware Support Functions. */
  408. /****************************************************************************/
  409. /*
  410. * qla2x00_initialize_adapter
  411. * Initialize board.
  412. *
  413. * Input:
  414. * ha = adapter block pointer.
  415. *
  416. * Returns:
  417. * 0 = success
  418. */
  419. int
  420. qla2x00_initialize_adapter(scsi_qla_host_t *vha)
  421. {
  422. int rval;
  423. struct qla_hw_data *ha = vha->hw;
  424. struct req_que *req = ha->req_q_map[0];
  425. /* Clear adapter flags. */
  426. vha->flags.online = 0;
  427. ha->flags.chip_reset_done = 0;
  428. vha->flags.reset_active = 0;
  429. ha->flags.pci_channel_io_perm_failure = 0;
  430. ha->flags.eeh_busy = 0;
  431. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  432. atomic_set(&vha->loop_state, LOOP_DOWN);
  433. vha->device_flags = DFLG_NO_CABLE;
  434. vha->dpc_flags = 0;
  435. vha->flags.management_server_logged_in = 0;
  436. vha->marker_needed = 0;
  437. ha->isp_abort_cnt = 0;
  438. ha->beacon_blink_led = 0;
  439. set_bit(0, ha->req_qid_map);
  440. set_bit(0, ha->rsp_qid_map);
  441. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  442. rval = ha->isp_ops->pci_config(vha);
  443. if (rval) {
  444. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  445. vha->host_no));
  446. return (rval);
  447. }
  448. ha->isp_ops->reset_chip(vha);
  449. rval = qla2xxx_get_flash_info(vha);
  450. if (rval) {
  451. DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n",
  452. vha->host_no));
  453. return (rval);
  454. }
  455. ha->isp_ops->get_flash_version(vha, req->ring);
  456. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  457. ha->isp_ops->nvram_config(vha);
  458. if (ha->flags.disable_serdes) {
  459. /* Mask HBA via NVRAM settings? */
  460. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  461. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  462. vha->port_name[0], vha->port_name[1],
  463. vha->port_name[2], vha->port_name[3],
  464. vha->port_name[4], vha->port_name[5],
  465. vha->port_name[6], vha->port_name[7]);
  466. return QLA_FUNCTION_FAILED;
  467. }
  468. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  469. if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
  470. rval = ha->isp_ops->chip_diag(vha);
  471. if (rval)
  472. return (rval);
  473. rval = qla2x00_setup_chip(vha);
  474. if (rval)
  475. return (rval);
  476. }
  477. if (IS_QLA84XX(ha)) {
  478. ha->cs84xx = qla84xx_get_chip(vha);
  479. if (!ha->cs84xx) {
  480. qla_printk(KERN_ERR, ha,
  481. "Unable to configure ISP84XX.\n");
  482. return QLA_FUNCTION_FAILED;
  483. }
  484. }
  485. rval = qla2x00_init_rings(vha);
  486. ha->flags.chip_reset_done = 1;
  487. if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
  488. /* Issue verify 84xx FW IOCB to complete 84xx initialization */
  489. rval = qla84xx_init_chip(vha);
  490. if (rval != QLA_SUCCESS) {
  491. qla_printk(KERN_ERR, ha,
  492. "Unable to initialize ISP84XX.\n");
  493. qla84xx_put_chip(vha);
  494. }
  495. }
  496. if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
  497. qla24xx_read_fcp_prio_cfg(vha);
  498. return (rval);
  499. }
  500. /**
  501. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  502. * @ha: HA context
  503. *
  504. * Returns 0 on success.
  505. */
  506. int
  507. qla2100_pci_config(scsi_qla_host_t *vha)
  508. {
  509. uint16_t w;
  510. unsigned long flags;
  511. struct qla_hw_data *ha = vha->hw;
  512. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  513. pci_set_master(ha->pdev);
  514. pci_try_set_mwi(ha->pdev);
  515. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  516. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  517. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  518. pci_disable_rom(ha->pdev);
  519. /* Get PCI bus information. */
  520. spin_lock_irqsave(&ha->hardware_lock, flags);
  521. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  522. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  523. return QLA_SUCCESS;
  524. }
  525. /**
  526. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  527. * @ha: HA context
  528. *
  529. * Returns 0 on success.
  530. */
  531. int
  532. qla2300_pci_config(scsi_qla_host_t *vha)
  533. {
  534. uint16_t w;
  535. unsigned long flags = 0;
  536. uint32_t cnt;
  537. struct qla_hw_data *ha = vha->hw;
  538. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  539. pci_set_master(ha->pdev);
  540. pci_try_set_mwi(ha->pdev);
  541. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  542. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  543. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  544. w &= ~PCI_COMMAND_INTX_DISABLE;
  545. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  546. /*
  547. * If this is a 2300 card and not 2312, reset the
  548. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  549. * the 2310 also reports itself as a 2300 so we need to get the
  550. * fb revision level -- a 6 indicates it really is a 2300 and
  551. * not a 2310.
  552. */
  553. if (IS_QLA2300(ha)) {
  554. spin_lock_irqsave(&ha->hardware_lock, flags);
  555. /* Pause RISC. */
  556. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  557. for (cnt = 0; cnt < 30000; cnt++) {
  558. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  559. break;
  560. udelay(10);
  561. }
  562. /* Select FPM registers. */
  563. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  564. RD_REG_WORD(&reg->ctrl_status);
  565. /* Get the fb rev level */
  566. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  567. if (ha->fb_rev == FPM_2300)
  568. pci_clear_mwi(ha->pdev);
  569. /* Deselect FPM registers. */
  570. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  571. RD_REG_WORD(&reg->ctrl_status);
  572. /* Release RISC module. */
  573. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  574. for (cnt = 0; cnt < 30000; cnt++) {
  575. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  576. break;
  577. udelay(10);
  578. }
  579. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  580. }
  581. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  582. pci_disable_rom(ha->pdev);
  583. /* Get PCI bus information. */
  584. spin_lock_irqsave(&ha->hardware_lock, flags);
  585. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  586. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  587. return QLA_SUCCESS;
  588. }
  589. /**
  590. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  591. * @ha: HA context
  592. *
  593. * Returns 0 on success.
  594. */
  595. int
  596. qla24xx_pci_config(scsi_qla_host_t *vha)
  597. {
  598. uint16_t w;
  599. unsigned long flags = 0;
  600. struct qla_hw_data *ha = vha->hw;
  601. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  602. pci_set_master(ha->pdev);
  603. pci_try_set_mwi(ha->pdev);
  604. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  605. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  606. w &= ~PCI_COMMAND_INTX_DISABLE;
  607. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  608. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  609. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  610. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  611. pcix_set_mmrbc(ha->pdev, 2048);
  612. /* PCIe -- adjust Maximum Read Request Size (2048). */
  613. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  614. pcie_set_readrq(ha->pdev, 2048);
  615. pci_disable_rom(ha->pdev);
  616. ha->chip_revision = ha->pdev->revision;
  617. /* Get PCI bus information. */
  618. spin_lock_irqsave(&ha->hardware_lock, flags);
  619. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  620. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  621. return QLA_SUCCESS;
  622. }
  623. /**
  624. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  625. * @ha: HA context
  626. *
  627. * Returns 0 on success.
  628. */
  629. int
  630. qla25xx_pci_config(scsi_qla_host_t *vha)
  631. {
  632. uint16_t w;
  633. struct qla_hw_data *ha = vha->hw;
  634. pci_set_master(ha->pdev);
  635. pci_try_set_mwi(ha->pdev);
  636. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  637. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  638. w &= ~PCI_COMMAND_INTX_DISABLE;
  639. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  640. /* PCIe -- adjust Maximum Read Request Size (2048). */
  641. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  642. pcie_set_readrq(ha->pdev, 2048);
  643. pci_disable_rom(ha->pdev);
  644. ha->chip_revision = ha->pdev->revision;
  645. return QLA_SUCCESS;
  646. }
  647. /**
  648. * qla2x00_isp_firmware() - Choose firmware image.
  649. * @ha: HA context
  650. *
  651. * Returns 0 on success.
  652. */
  653. static int
  654. qla2x00_isp_firmware(scsi_qla_host_t *vha)
  655. {
  656. int rval;
  657. uint16_t loop_id, topo, sw_cap;
  658. uint8_t domain, area, al_pa;
  659. struct qla_hw_data *ha = vha->hw;
  660. /* Assume loading risc code */
  661. rval = QLA_FUNCTION_FAILED;
  662. if (ha->flags.disable_risc_code_load) {
  663. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  664. vha->host_no));
  665. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  666. /* Verify checksum of loaded RISC code. */
  667. rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
  668. if (rval == QLA_SUCCESS) {
  669. /* And, verify we are not in ROM code. */
  670. rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
  671. &area, &domain, &topo, &sw_cap);
  672. }
  673. }
  674. if (rval) {
  675. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  676. vha->host_no));
  677. }
  678. return (rval);
  679. }
  680. /**
  681. * qla2x00_reset_chip() - Reset ISP chip.
  682. * @ha: HA context
  683. *
  684. * Returns 0 on success.
  685. */
  686. void
  687. qla2x00_reset_chip(scsi_qla_host_t *vha)
  688. {
  689. unsigned long flags = 0;
  690. struct qla_hw_data *ha = vha->hw;
  691. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  692. uint32_t cnt;
  693. uint16_t cmd;
  694. if (unlikely(pci_channel_offline(ha->pdev)))
  695. return;
  696. ha->isp_ops->disable_intrs(ha);
  697. spin_lock_irqsave(&ha->hardware_lock, flags);
  698. /* Turn off master enable */
  699. cmd = 0;
  700. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  701. cmd &= ~PCI_COMMAND_MASTER;
  702. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  703. if (!IS_QLA2100(ha)) {
  704. /* Pause RISC. */
  705. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  706. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  707. for (cnt = 0; cnt < 30000; cnt++) {
  708. if ((RD_REG_WORD(&reg->hccr) &
  709. HCCR_RISC_PAUSE) != 0)
  710. break;
  711. udelay(100);
  712. }
  713. } else {
  714. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  715. udelay(10);
  716. }
  717. /* Select FPM registers. */
  718. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  719. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  720. /* FPM Soft Reset. */
  721. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  722. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  723. /* Toggle Fpm Reset. */
  724. if (!IS_QLA2200(ha)) {
  725. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  726. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  727. }
  728. /* Select frame buffer registers. */
  729. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  730. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  731. /* Reset frame buffer FIFOs. */
  732. if (IS_QLA2200(ha)) {
  733. WRT_FB_CMD_REG(ha, reg, 0xa000);
  734. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  735. } else {
  736. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  737. /* Read back fb_cmd until zero or 3 seconds max */
  738. for (cnt = 0; cnt < 3000; cnt++) {
  739. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  740. break;
  741. udelay(100);
  742. }
  743. }
  744. /* Select RISC module registers. */
  745. WRT_REG_WORD(&reg->ctrl_status, 0);
  746. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  747. /* Reset RISC processor. */
  748. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  749. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  750. /* Release RISC processor. */
  751. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  752. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  753. }
  754. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  755. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  756. /* Reset ISP chip. */
  757. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  758. /* Wait for RISC to recover from reset. */
  759. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  760. /*
  761. * It is necessary to for a delay here since the card doesn't
  762. * respond to PCI reads during a reset. On some architectures
  763. * this will result in an MCA.
  764. */
  765. udelay(20);
  766. for (cnt = 30000; cnt; cnt--) {
  767. if ((RD_REG_WORD(&reg->ctrl_status) &
  768. CSR_ISP_SOFT_RESET) == 0)
  769. break;
  770. udelay(100);
  771. }
  772. } else
  773. udelay(10);
  774. /* Reset RISC processor. */
  775. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  776. WRT_REG_WORD(&reg->semaphore, 0);
  777. /* Release RISC processor. */
  778. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  779. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  780. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  781. for (cnt = 0; cnt < 30000; cnt++) {
  782. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  783. break;
  784. udelay(100);
  785. }
  786. } else
  787. udelay(100);
  788. /* Turn on master enable */
  789. cmd |= PCI_COMMAND_MASTER;
  790. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  791. /* Disable RISC pause on FPM parity error. */
  792. if (!IS_QLA2100(ha)) {
  793. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  794. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  795. }
  796. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  797. }
  798. /**
  799. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  800. * @ha: HA context
  801. *
  802. * Returns 0 on success.
  803. */
  804. static inline void
  805. qla24xx_reset_risc(scsi_qla_host_t *vha)
  806. {
  807. unsigned long flags = 0;
  808. struct qla_hw_data *ha = vha->hw;
  809. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  810. uint32_t cnt, d2;
  811. uint16_t wd;
  812. spin_lock_irqsave(&ha->hardware_lock, flags);
  813. /* Reset RISC. */
  814. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  815. for (cnt = 0; cnt < 30000; cnt++) {
  816. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  817. break;
  818. udelay(10);
  819. }
  820. WRT_REG_DWORD(&reg->ctrl_status,
  821. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  822. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  823. udelay(100);
  824. /* Wait for firmware to complete NVRAM accesses. */
  825. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  826. for (cnt = 10000 ; cnt && d2; cnt--) {
  827. udelay(5);
  828. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  829. barrier();
  830. }
  831. /* Wait for soft-reset to complete. */
  832. d2 = RD_REG_DWORD(&reg->ctrl_status);
  833. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  834. udelay(5);
  835. d2 = RD_REG_DWORD(&reg->ctrl_status);
  836. barrier();
  837. }
  838. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  839. RD_REG_DWORD(&reg->hccr);
  840. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  841. RD_REG_DWORD(&reg->hccr);
  842. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  843. RD_REG_DWORD(&reg->hccr);
  844. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  845. for (cnt = 6000000 ; cnt && d2; cnt--) {
  846. udelay(5);
  847. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  848. barrier();
  849. }
  850. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  851. if (IS_NOPOLLING_TYPE(ha))
  852. ha->isp_ops->enable_intrs(ha);
  853. }
  854. /**
  855. * qla24xx_reset_chip() - Reset ISP24xx chip.
  856. * @ha: HA context
  857. *
  858. * Returns 0 on success.
  859. */
  860. void
  861. qla24xx_reset_chip(scsi_qla_host_t *vha)
  862. {
  863. struct qla_hw_data *ha = vha->hw;
  864. if (pci_channel_offline(ha->pdev) &&
  865. ha->flags.pci_channel_io_perm_failure) {
  866. return;
  867. }
  868. ha->isp_ops->disable_intrs(ha);
  869. /* Perform RISC reset. */
  870. qla24xx_reset_risc(vha);
  871. }
  872. /**
  873. * qla2x00_chip_diag() - Test chip for proper operation.
  874. * @ha: HA context
  875. *
  876. * Returns 0 on success.
  877. */
  878. int
  879. qla2x00_chip_diag(scsi_qla_host_t *vha)
  880. {
  881. int rval;
  882. struct qla_hw_data *ha = vha->hw;
  883. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  884. unsigned long flags = 0;
  885. uint16_t data;
  886. uint32_t cnt;
  887. uint16_t mb[5];
  888. struct req_que *req = ha->req_q_map[0];
  889. /* Assume a failed state */
  890. rval = QLA_FUNCTION_FAILED;
  891. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  892. vha->host_no, (u_long)&reg->flash_address));
  893. spin_lock_irqsave(&ha->hardware_lock, flags);
  894. /* Reset ISP chip. */
  895. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  896. /*
  897. * We need to have a delay here since the card will not respond while
  898. * in reset causing an MCA on some architectures.
  899. */
  900. udelay(20);
  901. data = qla2x00_debounce_register(&reg->ctrl_status);
  902. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  903. udelay(5);
  904. data = RD_REG_WORD(&reg->ctrl_status);
  905. barrier();
  906. }
  907. if (!cnt)
  908. goto chip_diag_failed;
  909. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  910. vha->host_no));
  911. /* Reset RISC processor. */
  912. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  913. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  914. /* Workaround for QLA2312 PCI parity error */
  915. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  916. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  917. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  918. udelay(5);
  919. data = RD_MAILBOX_REG(ha, reg, 0);
  920. barrier();
  921. }
  922. } else
  923. udelay(10);
  924. if (!cnt)
  925. goto chip_diag_failed;
  926. /* Check product ID of chip */
  927. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", vha->host_no));
  928. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  929. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  930. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  931. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  932. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  933. mb[3] != PROD_ID_3) {
  934. qla_printk(KERN_WARNING, ha,
  935. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  936. goto chip_diag_failed;
  937. }
  938. ha->product_id[0] = mb[1];
  939. ha->product_id[1] = mb[2];
  940. ha->product_id[2] = mb[3];
  941. ha->product_id[3] = mb[4];
  942. /* Adjust fw RISC transfer size */
  943. if (req->length > 1024)
  944. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  945. else
  946. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  947. req->length;
  948. if (IS_QLA2200(ha) &&
  949. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  950. /* Limit firmware transfer size with a 2200A */
  951. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  952. vha->host_no));
  953. ha->device_type |= DT_ISP2200A;
  954. ha->fw_transfer_size = 128;
  955. }
  956. /* Wrap Incoming Mailboxes Test. */
  957. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  958. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no));
  959. rval = qla2x00_mbx_reg_test(vha);
  960. if (rval) {
  961. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  962. vha->host_no));
  963. qla_printk(KERN_WARNING, ha,
  964. "Failed mailbox send register test\n");
  965. }
  966. else {
  967. /* Flag a successful rval */
  968. rval = QLA_SUCCESS;
  969. }
  970. spin_lock_irqsave(&ha->hardware_lock, flags);
  971. chip_diag_failed:
  972. if (rval)
  973. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  974. "****\n", vha->host_no));
  975. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  976. return (rval);
  977. }
  978. /**
  979. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  980. * @ha: HA context
  981. *
  982. * Returns 0 on success.
  983. */
  984. int
  985. qla24xx_chip_diag(scsi_qla_host_t *vha)
  986. {
  987. int rval;
  988. struct qla_hw_data *ha = vha->hw;
  989. struct req_que *req = ha->req_q_map[0];
  990. if (IS_QLA82XX(ha))
  991. return QLA_SUCCESS;
  992. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
  993. rval = qla2x00_mbx_reg_test(vha);
  994. if (rval) {
  995. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  996. vha->host_no));
  997. qla_printk(KERN_WARNING, ha,
  998. "Failed mailbox send register test\n");
  999. } else {
  1000. /* Flag a successful rval */
  1001. rval = QLA_SUCCESS;
  1002. }
  1003. return rval;
  1004. }
  1005. void
  1006. qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
  1007. {
  1008. int rval;
  1009. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  1010. eft_size, fce_size, mq_size;
  1011. dma_addr_t tc_dma;
  1012. void *tc;
  1013. struct qla_hw_data *ha = vha->hw;
  1014. struct req_que *req = ha->req_q_map[0];
  1015. struct rsp_que *rsp = ha->rsp_q_map[0];
  1016. if (ha->fw_dump) {
  1017. qla_printk(KERN_WARNING, ha,
  1018. "Firmware dump previously allocated.\n");
  1019. return;
  1020. }
  1021. ha->fw_dumped = 0;
  1022. fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
  1023. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1024. fixed_size = sizeof(struct qla2100_fw_dump);
  1025. } else if (IS_QLA23XX(ha)) {
  1026. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  1027. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  1028. sizeof(uint16_t);
  1029. } else if (IS_FWI2_CAPABLE(ha)) {
  1030. if (IS_QLA81XX(ha))
  1031. fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
  1032. else if (IS_QLA25XX(ha))
  1033. fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
  1034. else
  1035. fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
  1036. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  1037. sizeof(uint32_t);
  1038. if (ha->mqenable)
  1039. mq_size = sizeof(struct qla2xxx_mq_chain);
  1040. /* Allocate memory for Fibre Channel Event Buffer. */
  1041. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
  1042. goto try_eft;
  1043. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  1044. GFP_KERNEL);
  1045. if (!tc) {
  1046. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  1047. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  1048. goto try_eft;
  1049. }
  1050. memset(tc, 0, FCE_SIZE);
  1051. rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
  1052. ha->fce_mb, &ha->fce_bufs);
  1053. if (rval) {
  1054. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  1055. "FCE (%d).\n", rval);
  1056. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  1057. tc_dma);
  1058. ha->flags.fce_enabled = 0;
  1059. goto try_eft;
  1060. }
  1061. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  1062. FCE_SIZE / 1024);
  1063. fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
  1064. ha->flags.fce_enabled = 1;
  1065. ha->fce_dma = tc_dma;
  1066. ha->fce = tc;
  1067. try_eft:
  1068. /* Allocate memory for Extended Trace Buffer. */
  1069. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  1070. GFP_KERNEL);
  1071. if (!tc) {
  1072. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  1073. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  1074. goto cont_alloc;
  1075. }
  1076. memset(tc, 0, EFT_SIZE);
  1077. rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
  1078. if (rval) {
  1079. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  1080. "EFT (%d).\n", rval);
  1081. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  1082. tc_dma);
  1083. goto cont_alloc;
  1084. }
  1085. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  1086. EFT_SIZE / 1024);
  1087. eft_size = EFT_SIZE;
  1088. ha->eft_dma = tc_dma;
  1089. ha->eft = tc;
  1090. }
  1091. cont_alloc:
  1092. req_q_size = req->length * sizeof(request_t);
  1093. rsp_q_size = rsp->length * sizeof(response_t);
  1094. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  1095. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
  1096. ha->chain_offset = dump_size;
  1097. dump_size += mq_size + fce_size;
  1098. ha->fw_dump = vmalloc(dump_size);
  1099. if (!ha->fw_dump) {
  1100. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  1101. "firmware dump!!!\n", dump_size / 1024);
  1102. if (ha->eft) {
  1103. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  1104. ha->eft_dma);
  1105. ha->eft = NULL;
  1106. ha->eft_dma = 0;
  1107. }
  1108. return;
  1109. }
  1110. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  1111. dump_size / 1024);
  1112. ha->fw_dump_len = dump_size;
  1113. ha->fw_dump->signature[0] = 'Q';
  1114. ha->fw_dump->signature[1] = 'L';
  1115. ha->fw_dump->signature[2] = 'G';
  1116. ha->fw_dump->signature[3] = 'C';
  1117. ha->fw_dump->version = __constant_htonl(1);
  1118. ha->fw_dump->fixed_size = htonl(fixed_size);
  1119. ha->fw_dump->mem_size = htonl(mem_size);
  1120. ha->fw_dump->req_q_size = htonl(req_q_size);
  1121. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  1122. ha->fw_dump->eft_size = htonl(eft_size);
  1123. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  1124. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  1125. ha->fw_dump->header_size =
  1126. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  1127. }
  1128. static int
  1129. qla81xx_mpi_sync(scsi_qla_host_t *vha)
  1130. {
  1131. #define MPS_MASK 0xe0
  1132. int rval;
  1133. uint16_t dc;
  1134. uint32_t dw;
  1135. struct qla_hw_data *ha = vha->hw;
  1136. if (!IS_QLA81XX(vha->hw))
  1137. return QLA_SUCCESS;
  1138. rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
  1139. if (rval != QLA_SUCCESS) {
  1140. DEBUG2(qla_printk(KERN_WARNING, ha,
  1141. "Sync-MPI: Unable to acquire semaphore.\n"));
  1142. goto done;
  1143. }
  1144. pci_read_config_word(vha->hw->pdev, 0x54, &dc);
  1145. rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
  1146. if (rval != QLA_SUCCESS) {
  1147. DEBUG2(qla_printk(KERN_WARNING, ha,
  1148. "Sync-MPI: Unable to read sync.\n"));
  1149. goto done_release;
  1150. }
  1151. dc &= MPS_MASK;
  1152. if (dc == (dw & MPS_MASK))
  1153. goto done_release;
  1154. dw &= ~MPS_MASK;
  1155. dw |= dc;
  1156. rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
  1157. if (rval != QLA_SUCCESS) {
  1158. DEBUG2(qla_printk(KERN_WARNING, ha,
  1159. "Sync-MPI: Unable to gain sync.\n"));
  1160. }
  1161. done_release:
  1162. rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
  1163. if (rval != QLA_SUCCESS) {
  1164. DEBUG2(qla_printk(KERN_WARNING, ha,
  1165. "Sync-MPI: Unable to release semaphore.\n"));
  1166. }
  1167. done:
  1168. return rval;
  1169. }
  1170. /**
  1171. * qla2x00_setup_chip() - Load and start RISC firmware.
  1172. * @ha: HA context
  1173. *
  1174. * Returns 0 on success.
  1175. */
  1176. static int
  1177. qla2x00_setup_chip(scsi_qla_host_t *vha)
  1178. {
  1179. int rval;
  1180. uint32_t srisc_address = 0;
  1181. struct qla_hw_data *ha = vha->hw;
  1182. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1183. unsigned long flags;
  1184. uint16_t fw_major_version;
  1185. if (IS_QLA82XX(ha)) {
  1186. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  1187. if (rval == QLA_SUCCESS) {
  1188. qla2x00_stop_firmware(vha);
  1189. goto enable_82xx_npiv;
  1190. } else
  1191. goto failed;
  1192. }
  1193. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  1194. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  1195. spin_lock_irqsave(&ha->hardware_lock, flags);
  1196. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  1197. RD_REG_WORD(&reg->hccr);
  1198. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1199. }
  1200. qla81xx_mpi_sync(vha);
  1201. /* Load firmware sequences */
  1202. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  1203. if (rval == QLA_SUCCESS) {
  1204. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  1205. "code.\n", vha->host_no));
  1206. rval = qla2x00_verify_checksum(vha, srisc_address);
  1207. if (rval == QLA_SUCCESS) {
  1208. /* Start firmware execution. */
  1209. DEBUG(printk("scsi(%ld): Checksum OK, start "
  1210. "firmware.\n", vha->host_no));
  1211. rval = qla2x00_execute_fw(vha, srisc_address);
  1212. /* Retrieve firmware information. */
  1213. if (rval == QLA_SUCCESS) {
  1214. enable_82xx_npiv:
  1215. fw_major_version = ha->fw_major_version;
  1216. rval = qla2x00_get_fw_version(vha,
  1217. &ha->fw_major_version,
  1218. &ha->fw_minor_version,
  1219. &ha->fw_subminor_version,
  1220. &ha->fw_attributes, &ha->fw_memory_size,
  1221. ha->mpi_version, &ha->mpi_capabilities,
  1222. ha->phy_version);
  1223. if (rval != QLA_SUCCESS)
  1224. goto failed;
  1225. ha->flags.npiv_supported = 0;
  1226. if (IS_QLA2XXX_MIDTYPE(ha) &&
  1227. (ha->fw_attributes & BIT_2)) {
  1228. ha->flags.npiv_supported = 1;
  1229. if ((!ha->max_npiv_vports) ||
  1230. ((ha->max_npiv_vports + 1) %
  1231. MIN_MULTI_ID_FABRIC))
  1232. ha->max_npiv_vports =
  1233. MIN_MULTI_ID_FABRIC - 1;
  1234. }
  1235. qla2x00_get_resource_cnts(vha, NULL,
  1236. &ha->fw_xcb_count, NULL, NULL,
  1237. &ha->max_npiv_vports, NULL);
  1238. if (!fw_major_version && ql2xallocfwdump) {
  1239. if (!IS_QLA82XX(ha))
  1240. qla2x00_alloc_fw_dump(vha);
  1241. }
  1242. }
  1243. } else {
  1244. DEBUG2(printk(KERN_INFO
  1245. "scsi(%ld): ISP Firmware failed checksum.\n",
  1246. vha->host_no));
  1247. }
  1248. }
  1249. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  1250. /* Enable proper parity. */
  1251. spin_lock_irqsave(&ha->hardware_lock, flags);
  1252. if (IS_QLA2300(ha))
  1253. /* SRAM parity */
  1254. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  1255. else
  1256. /* SRAM, Instruction RAM and GP RAM parity */
  1257. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  1258. RD_REG_WORD(&reg->hccr);
  1259. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1260. }
  1261. if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
  1262. uint32_t size;
  1263. rval = qla81xx_fac_get_sector_size(vha, &size);
  1264. if (rval == QLA_SUCCESS) {
  1265. ha->flags.fac_supported = 1;
  1266. ha->fdt_block_size = size << 2;
  1267. } else {
  1268. qla_printk(KERN_ERR, ha,
  1269. "Unsupported FAC firmware (%d.%02d.%02d).\n",
  1270. ha->fw_major_version, ha->fw_minor_version,
  1271. ha->fw_subminor_version);
  1272. }
  1273. }
  1274. failed:
  1275. if (rval) {
  1276. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  1277. vha->host_no));
  1278. }
  1279. return (rval);
  1280. }
  1281. /**
  1282. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  1283. * @ha: HA context
  1284. *
  1285. * Beginning of request ring has initialization control block already built
  1286. * by nvram config routine.
  1287. *
  1288. * Returns 0 on success.
  1289. */
  1290. void
  1291. qla2x00_init_response_q_entries(struct rsp_que *rsp)
  1292. {
  1293. uint16_t cnt;
  1294. response_t *pkt;
  1295. rsp->ring_ptr = rsp->ring;
  1296. rsp->ring_index = 0;
  1297. rsp->status_srb = NULL;
  1298. pkt = rsp->ring_ptr;
  1299. for (cnt = 0; cnt < rsp->length; cnt++) {
  1300. pkt->signature = RESPONSE_PROCESSED;
  1301. pkt++;
  1302. }
  1303. }
  1304. /**
  1305. * qla2x00_update_fw_options() - Read and process firmware options.
  1306. * @ha: HA context
  1307. *
  1308. * Returns 0 on success.
  1309. */
  1310. void
  1311. qla2x00_update_fw_options(scsi_qla_host_t *vha)
  1312. {
  1313. uint16_t swing, emphasis, tx_sens, rx_sens;
  1314. struct qla_hw_data *ha = vha->hw;
  1315. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  1316. qla2x00_get_fw_options(vha, ha->fw_options);
  1317. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1318. return;
  1319. /* Serial Link options. */
  1320. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  1321. vha->host_no));
  1322. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  1323. sizeof(ha->fw_seriallink_options)));
  1324. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  1325. if (ha->fw_seriallink_options[3] & BIT_2) {
  1326. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  1327. /* 1G settings */
  1328. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  1329. emphasis = (ha->fw_seriallink_options[2] &
  1330. (BIT_4 | BIT_3)) >> 3;
  1331. tx_sens = ha->fw_seriallink_options[0] &
  1332. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1333. rx_sens = (ha->fw_seriallink_options[0] &
  1334. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1335. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  1336. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1337. if (rx_sens == 0x0)
  1338. rx_sens = 0x3;
  1339. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  1340. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1341. ha->fw_options[10] |= BIT_5 |
  1342. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1343. (tx_sens & (BIT_1 | BIT_0));
  1344. /* 2G settings */
  1345. swing = (ha->fw_seriallink_options[2] &
  1346. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  1347. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  1348. tx_sens = ha->fw_seriallink_options[1] &
  1349. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1350. rx_sens = (ha->fw_seriallink_options[1] &
  1351. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1352. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  1353. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1354. if (rx_sens == 0x0)
  1355. rx_sens = 0x3;
  1356. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  1357. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1358. ha->fw_options[11] |= BIT_5 |
  1359. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1360. (tx_sens & (BIT_1 | BIT_0));
  1361. }
  1362. /* FCP2 options. */
  1363. /* Return command IOCBs without waiting for an ABTS to complete. */
  1364. ha->fw_options[3] |= BIT_13;
  1365. /* LED scheme. */
  1366. if (ha->flags.enable_led_scheme)
  1367. ha->fw_options[2] |= BIT_12;
  1368. /* Detect ISP6312. */
  1369. if (IS_QLA6312(ha))
  1370. ha->fw_options[2] |= BIT_13;
  1371. /* Update firmware options. */
  1372. qla2x00_set_fw_options(vha, ha->fw_options);
  1373. }
  1374. void
  1375. qla24xx_update_fw_options(scsi_qla_host_t *vha)
  1376. {
  1377. int rval;
  1378. struct qla_hw_data *ha = vha->hw;
  1379. if (IS_QLA82XX(ha))
  1380. return;
  1381. /* Update Serial Link options. */
  1382. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  1383. return;
  1384. rval = qla2x00_set_serdes_params(vha,
  1385. le16_to_cpu(ha->fw_seriallink_options24[1]),
  1386. le16_to_cpu(ha->fw_seriallink_options24[2]),
  1387. le16_to_cpu(ha->fw_seriallink_options24[3]));
  1388. if (rval != QLA_SUCCESS) {
  1389. qla_printk(KERN_WARNING, ha,
  1390. "Unable to update Serial Link options (%x).\n", rval);
  1391. }
  1392. }
  1393. void
  1394. qla2x00_config_rings(struct scsi_qla_host *vha)
  1395. {
  1396. struct qla_hw_data *ha = vha->hw;
  1397. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1398. struct req_que *req = ha->req_q_map[0];
  1399. struct rsp_que *rsp = ha->rsp_q_map[0];
  1400. /* Setup ring parameters in initialization control block. */
  1401. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  1402. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  1403. ha->init_cb->request_q_length = cpu_to_le16(req->length);
  1404. ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
  1405. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1406. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1407. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1408. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1409. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  1410. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  1411. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  1412. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  1413. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  1414. }
  1415. void
  1416. qla24xx_config_rings(struct scsi_qla_host *vha)
  1417. {
  1418. struct qla_hw_data *ha = vha->hw;
  1419. device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
  1420. struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
  1421. struct qla_msix_entry *msix;
  1422. struct init_cb_24xx *icb;
  1423. uint16_t rid = 0;
  1424. struct req_que *req = ha->req_q_map[0];
  1425. struct rsp_que *rsp = ha->rsp_q_map[0];
  1426. /* Setup ring parameters in initialization control block. */
  1427. icb = (struct init_cb_24xx *)ha->init_cb;
  1428. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  1429. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  1430. icb->request_q_length = cpu_to_le16(req->length);
  1431. icb->response_q_length = cpu_to_le16(rsp->length);
  1432. icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1433. icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1434. icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1435. icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1436. if (ha->mqenable) {
  1437. icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
  1438. icb->rid = __constant_cpu_to_le16(rid);
  1439. if (ha->flags.msix_enabled) {
  1440. msix = &ha->msix_entries[1];
  1441. DEBUG2_17(printk(KERN_INFO
  1442. "Registering vector 0x%x for base que\n", msix->entry));
  1443. icb->msix = cpu_to_le16(msix->entry);
  1444. }
  1445. /* Use alternate PCI bus number */
  1446. if (MSB(rid))
  1447. icb->firmware_options_2 |=
  1448. __constant_cpu_to_le32(BIT_19);
  1449. /* Use alternate PCI devfn */
  1450. if (LSB(rid))
  1451. icb->firmware_options_2 |=
  1452. __constant_cpu_to_le32(BIT_18);
  1453. /* Use Disable MSIX Handshake mode for capable adapters */
  1454. if (IS_MSIX_NACK_CAPABLE(ha)) {
  1455. icb->firmware_options_2 &=
  1456. __constant_cpu_to_le32(~BIT_22);
  1457. ha->flags.disable_msix_handshake = 1;
  1458. qla_printk(KERN_INFO, ha,
  1459. "MSIX Handshake Disable Mode turned on\n");
  1460. } else {
  1461. icb->firmware_options_2 |=
  1462. __constant_cpu_to_le32(BIT_22);
  1463. }
  1464. icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
  1465. WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
  1466. WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
  1467. WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
  1468. WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
  1469. } else {
  1470. WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
  1471. WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
  1472. WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
  1473. WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
  1474. }
  1475. /* PCI posting */
  1476. RD_REG_DWORD(&ioreg->hccr);
  1477. }
  1478. /**
  1479. * qla2x00_init_rings() - Initializes firmware.
  1480. * @ha: HA context
  1481. *
  1482. * Beginning of request ring has initialization control block already built
  1483. * by nvram config routine.
  1484. *
  1485. * Returns 0 on success.
  1486. */
  1487. static int
  1488. qla2x00_init_rings(scsi_qla_host_t *vha)
  1489. {
  1490. int rval;
  1491. unsigned long flags = 0;
  1492. int cnt, que;
  1493. struct qla_hw_data *ha = vha->hw;
  1494. struct req_que *req;
  1495. struct rsp_que *rsp;
  1496. struct scsi_qla_host *vp;
  1497. struct mid_init_cb_24xx *mid_init_cb =
  1498. (struct mid_init_cb_24xx *) ha->init_cb;
  1499. spin_lock_irqsave(&ha->hardware_lock, flags);
  1500. /* Clear outstanding commands array. */
  1501. for (que = 0; que < ha->max_req_queues; que++) {
  1502. req = ha->req_q_map[que];
  1503. if (!req)
  1504. continue;
  1505. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1506. req->outstanding_cmds[cnt] = NULL;
  1507. req->current_outstanding_cmd = 1;
  1508. /* Initialize firmware. */
  1509. req->ring_ptr = req->ring;
  1510. req->ring_index = 0;
  1511. req->cnt = req->length;
  1512. }
  1513. for (que = 0; que < ha->max_rsp_queues; que++) {
  1514. rsp = ha->rsp_q_map[que];
  1515. if (!rsp)
  1516. continue;
  1517. /* Initialize response queue entries */
  1518. qla2x00_init_response_q_entries(rsp);
  1519. }
  1520. spin_lock_irqsave(&ha->vport_slock, flags);
  1521. /* Clear RSCN queue. */
  1522. list_for_each_entry(vp, &ha->vp_list, list) {
  1523. vp->rscn_in_ptr = 0;
  1524. vp->rscn_out_ptr = 0;
  1525. }
  1526. spin_unlock_irqrestore(&ha->vport_slock, flags);
  1527. ha->isp_ops->config_rings(vha);
  1528. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1529. /* Update any ISP specific firmware options before initialization. */
  1530. ha->isp_ops->update_fw_options(vha);
  1531. DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no));
  1532. if (ha->flags.npiv_supported) {
  1533. if (ha->operating_mode == LOOP)
  1534. ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
  1535. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1536. }
  1537. if (IS_FWI2_CAPABLE(ha)) {
  1538. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1539. mid_init_cb->init_cb.execution_throttle =
  1540. cpu_to_le16(ha->fw_xcb_count);
  1541. }
  1542. rval = qla2x00_init_firmware(vha, ha->init_cb_size);
  1543. if (rval) {
  1544. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1545. vha->host_no));
  1546. } else {
  1547. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1548. vha->host_no));
  1549. }
  1550. return (rval);
  1551. }
  1552. /**
  1553. * qla2x00_fw_ready() - Waits for firmware ready.
  1554. * @ha: HA context
  1555. *
  1556. * Returns 0 on success.
  1557. */
  1558. static int
  1559. qla2x00_fw_ready(scsi_qla_host_t *vha)
  1560. {
  1561. int rval;
  1562. unsigned long wtime, mtime, cs84xx_time;
  1563. uint16_t min_wait; /* Minimum wait time if loop is down */
  1564. uint16_t wait_time; /* Wait time if loop is coming ready */
  1565. uint16_t state[5];
  1566. struct qla_hw_data *ha = vha->hw;
  1567. rval = QLA_SUCCESS;
  1568. /* 20 seconds for loop down. */
  1569. min_wait = 20;
  1570. /*
  1571. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1572. * our own processing.
  1573. */
  1574. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1575. wait_time = min_wait;
  1576. }
  1577. /* Min wait time if loop down */
  1578. mtime = jiffies + (min_wait * HZ);
  1579. /* wait time before firmware ready */
  1580. wtime = jiffies + (wait_time * HZ);
  1581. /* Wait for ISP to finish LIP */
  1582. if (!vha->flags.init_done)
  1583. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1584. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1585. vha->host_no));
  1586. do {
  1587. rval = qla2x00_get_firmware_state(vha, state);
  1588. if (rval == QLA_SUCCESS) {
  1589. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1590. vha->device_flags &= ~DFLG_NO_CABLE;
  1591. }
  1592. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1593. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1594. "84xx=%x.\n", vha->host_no, state[0],
  1595. state[2]));
  1596. if ((state[2] & FSTATE_LOGGED_IN) &&
  1597. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1598. DEBUG16(printk("scsi(%ld): Sending "
  1599. "verify iocb.\n", vha->host_no));
  1600. cs84xx_time = jiffies;
  1601. rval = qla84xx_init_chip(vha);
  1602. if (rval != QLA_SUCCESS)
  1603. break;
  1604. /* Add time taken to initialize. */
  1605. cs84xx_time = jiffies - cs84xx_time;
  1606. wtime += cs84xx_time;
  1607. mtime += cs84xx_time;
  1608. DEBUG16(printk("scsi(%ld): Increasing "
  1609. "wait time by %ld. New time %ld\n",
  1610. vha->host_no, cs84xx_time, wtime));
  1611. }
  1612. } else if (state[0] == FSTATE_READY) {
  1613. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1614. vha->host_no));
  1615. qla2x00_get_retry_cnt(vha, &ha->retry_count,
  1616. &ha->login_timeout, &ha->r_a_tov);
  1617. rval = QLA_SUCCESS;
  1618. break;
  1619. }
  1620. rval = QLA_FUNCTION_FAILED;
  1621. if (atomic_read(&vha->loop_down_timer) &&
  1622. state[0] != FSTATE_READY) {
  1623. /* Loop down. Timeout on min_wait for states
  1624. * other than Wait for Login.
  1625. */
  1626. if (time_after_eq(jiffies, mtime)) {
  1627. qla_printk(KERN_INFO, ha,
  1628. "Cable is unplugged...\n");
  1629. vha->device_flags |= DFLG_NO_CABLE;
  1630. break;
  1631. }
  1632. }
  1633. } else {
  1634. /* Mailbox cmd failed. Timeout on min_wait. */
  1635. if (time_after_eq(jiffies, mtime) ||
  1636. (IS_QLA82XX(ha) && ha->flags.fw_hung))
  1637. break;
  1638. }
  1639. if (time_after_eq(jiffies, wtime))
  1640. break;
  1641. /* Delay for a while */
  1642. msleep(500);
  1643. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1644. vha->host_no, state[0], jiffies));
  1645. } while (1);
  1646. DEBUG(printk("scsi(%ld): fw_state=%x (%x, %x, %x, %x) curr time=%lx.\n",
  1647. vha->host_no, state[0], state[1], state[2], state[3], state[4],
  1648. jiffies));
  1649. if (rval) {
  1650. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1651. vha->host_no));
  1652. }
  1653. return (rval);
  1654. }
  1655. /*
  1656. * qla2x00_configure_hba
  1657. * Setup adapter context.
  1658. *
  1659. * Input:
  1660. * ha = adapter state pointer.
  1661. *
  1662. * Returns:
  1663. * 0 = success
  1664. *
  1665. * Context:
  1666. * Kernel context.
  1667. */
  1668. static int
  1669. qla2x00_configure_hba(scsi_qla_host_t *vha)
  1670. {
  1671. int rval;
  1672. uint16_t loop_id;
  1673. uint16_t topo;
  1674. uint16_t sw_cap;
  1675. uint8_t al_pa;
  1676. uint8_t area;
  1677. uint8_t domain;
  1678. char connect_type[22];
  1679. struct qla_hw_data *ha = vha->hw;
  1680. /* Get host addresses. */
  1681. rval = qla2x00_get_adapter_id(vha,
  1682. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1683. if (rval != QLA_SUCCESS) {
  1684. if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
  1685. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1686. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1687. __func__, vha->host_no));
  1688. } else {
  1689. qla_printk(KERN_WARNING, ha,
  1690. "ERROR -- Unable to get host loop ID.\n");
  1691. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1692. }
  1693. return (rval);
  1694. }
  1695. if (topo == 4) {
  1696. qla_printk(KERN_INFO, ha,
  1697. "Cannot get topology - retrying.\n");
  1698. return (QLA_FUNCTION_FAILED);
  1699. }
  1700. vha->loop_id = loop_id;
  1701. /* initialize */
  1702. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1703. ha->operating_mode = LOOP;
  1704. ha->switch_cap = 0;
  1705. switch (topo) {
  1706. case 0:
  1707. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1708. vha->host_no));
  1709. ha->current_topology = ISP_CFG_NL;
  1710. strcpy(connect_type, "(Loop)");
  1711. break;
  1712. case 1:
  1713. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1714. vha->host_no));
  1715. ha->switch_cap = sw_cap;
  1716. ha->current_topology = ISP_CFG_FL;
  1717. strcpy(connect_type, "(FL_Port)");
  1718. break;
  1719. case 2:
  1720. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1721. vha->host_no));
  1722. ha->operating_mode = P2P;
  1723. ha->current_topology = ISP_CFG_N;
  1724. strcpy(connect_type, "(N_Port-to-N_Port)");
  1725. break;
  1726. case 3:
  1727. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1728. vha->host_no));
  1729. ha->switch_cap = sw_cap;
  1730. ha->operating_mode = P2P;
  1731. ha->current_topology = ISP_CFG_F;
  1732. strcpy(connect_type, "(F_Port)");
  1733. break;
  1734. default:
  1735. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1736. "Using NL.\n",
  1737. vha->host_no, topo));
  1738. ha->current_topology = ISP_CFG_NL;
  1739. strcpy(connect_type, "(Loop)");
  1740. break;
  1741. }
  1742. /* Save Host port and loop ID. */
  1743. /* byte order - Big Endian */
  1744. vha->d_id.b.domain = domain;
  1745. vha->d_id.b.area = area;
  1746. vha->d_id.b.al_pa = al_pa;
  1747. if (!vha->flags.init_done)
  1748. qla_printk(KERN_INFO, ha,
  1749. "Topology - %s, Host Loop address 0x%x\n",
  1750. connect_type, vha->loop_id);
  1751. if (rval) {
  1752. DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no));
  1753. } else {
  1754. DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no));
  1755. }
  1756. return(rval);
  1757. }
  1758. inline void
  1759. qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
  1760. char *def)
  1761. {
  1762. char *st, *en;
  1763. uint16_t index;
  1764. struct qla_hw_data *ha = vha->hw;
  1765. int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
  1766. !IS_QLA8XXX_TYPE(ha);
  1767. if (memcmp(model, BINZERO, len) != 0) {
  1768. strncpy(ha->model_number, model, len);
  1769. st = en = ha->model_number;
  1770. en += len - 1;
  1771. while (en > st) {
  1772. if (*en != 0x20 && *en != 0x00)
  1773. break;
  1774. *en-- = '\0';
  1775. }
  1776. index = (ha->pdev->subsystem_device & 0xff);
  1777. if (use_tbl &&
  1778. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1779. index < QLA_MODEL_NAMES)
  1780. strncpy(ha->model_desc,
  1781. qla2x00_model_name[index * 2 + 1],
  1782. sizeof(ha->model_desc) - 1);
  1783. } else {
  1784. index = (ha->pdev->subsystem_device & 0xff);
  1785. if (use_tbl &&
  1786. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1787. index < QLA_MODEL_NAMES) {
  1788. strcpy(ha->model_number,
  1789. qla2x00_model_name[index * 2]);
  1790. strncpy(ha->model_desc,
  1791. qla2x00_model_name[index * 2 + 1],
  1792. sizeof(ha->model_desc) - 1);
  1793. } else {
  1794. strcpy(ha->model_number, def);
  1795. }
  1796. }
  1797. if (IS_FWI2_CAPABLE(ha))
  1798. qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
  1799. sizeof(ha->model_desc));
  1800. }
  1801. /* On sparc systems, obtain port and node WWN from firmware
  1802. * properties.
  1803. */
  1804. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
  1805. {
  1806. #ifdef CONFIG_SPARC
  1807. struct qla_hw_data *ha = vha->hw;
  1808. struct pci_dev *pdev = ha->pdev;
  1809. struct device_node *dp = pci_device_to_OF_node(pdev);
  1810. const u8 *val;
  1811. int len;
  1812. val = of_get_property(dp, "port-wwn", &len);
  1813. if (val && len >= WWN_SIZE)
  1814. memcpy(nv->port_name, val, WWN_SIZE);
  1815. val = of_get_property(dp, "node-wwn", &len);
  1816. if (val && len >= WWN_SIZE)
  1817. memcpy(nv->node_name, val, WWN_SIZE);
  1818. #endif
  1819. }
  1820. /*
  1821. * NVRAM configuration for ISP 2xxx
  1822. *
  1823. * Input:
  1824. * ha = adapter block pointer.
  1825. *
  1826. * Output:
  1827. * initialization control block in response_ring
  1828. * host adapters parameters in host adapter block
  1829. *
  1830. * Returns:
  1831. * 0 = success.
  1832. */
  1833. int
  1834. qla2x00_nvram_config(scsi_qla_host_t *vha)
  1835. {
  1836. int rval;
  1837. uint8_t chksum = 0;
  1838. uint16_t cnt;
  1839. uint8_t *dptr1, *dptr2;
  1840. struct qla_hw_data *ha = vha->hw;
  1841. init_cb_t *icb = ha->init_cb;
  1842. nvram_t *nv = ha->nvram;
  1843. uint8_t *ptr = ha->nvram;
  1844. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1845. rval = QLA_SUCCESS;
  1846. /* Determine NVRAM starting address. */
  1847. ha->nvram_size = sizeof(nvram_t);
  1848. ha->nvram_base = 0;
  1849. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1850. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1851. ha->nvram_base = 0x80;
  1852. /* Get NVRAM data and calculate checksum. */
  1853. ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
  1854. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1855. chksum += *ptr++;
  1856. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  1857. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1858. /* Bad NVRAM data, set defaults parameters. */
  1859. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1860. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1861. /* Reset NVRAM data. */
  1862. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1863. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1864. nv->nvram_version);
  1865. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1866. "invalid -- WWPN) defaults.\n");
  1867. /*
  1868. * Set default initialization control block.
  1869. */
  1870. memset(nv, 0, ha->nvram_size);
  1871. nv->parameter_block_version = ICB_VERSION;
  1872. if (IS_QLA23XX(ha)) {
  1873. nv->firmware_options[0] = BIT_2 | BIT_1;
  1874. nv->firmware_options[1] = BIT_7 | BIT_5;
  1875. nv->add_firmware_options[0] = BIT_5;
  1876. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1877. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1878. nv->special_options[1] = BIT_7;
  1879. } else if (IS_QLA2200(ha)) {
  1880. nv->firmware_options[0] = BIT_2 | BIT_1;
  1881. nv->firmware_options[1] = BIT_7 | BIT_5;
  1882. nv->add_firmware_options[0] = BIT_5;
  1883. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1884. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1885. } else if (IS_QLA2100(ha)) {
  1886. nv->firmware_options[0] = BIT_3 | BIT_1;
  1887. nv->firmware_options[1] = BIT_5;
  1888. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1889. }
  1890. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1891. nv->execution_throttle = __constant_cpu_to_le16(16);
  1892. nv->retry_count = 8;
  1893. nv->retry_delay = 1;
  1894. nv->port_name[0] = 33;
  1895. nv->port_name[3] = 224;
  1896. nv->port_name[4] = 139;
  1897. qla2xxx_nvram_wwn_from_ofw(vha, nv);
  1898. nv->login_timeout = 4;
  1899. /*
  1900. * Set default host adapter parameters
  1901. */
  1902. nv->host_p[1] = BIT_2;
  1903. nv->reset_delay = 5;
  1904. nv->port_down_retry_count = 8;
  1905. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1906. nv->link_down_timeout = 60;
  1907. rval = 1;
  1908. }
  1909. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1910. /*
  1911. * The SN2 does not provide BIOS emulation which means you can't change
  1912. * potentially bogus BIOS settings. Force the use of default settings
  1913. * for link rate and frame size. Hope that the rest of the settings
  1914. * are valid.
  1915. */
  1916. if (ia64_platform_is("sn2")) {
  1917. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1918. if (IS_QLA23XX(ha))
  1919. nv->special_options[1] = BIT_7;
  1920. }
  1921. #endif
  1922. /* Reset Initialization control block */
  1923. memset(icb, 0, ha->init_cb_size);
  1924. /*
  1925. * Setup driver NVRAM options.
  1926. */
  1927. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1928. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1929. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1930. nv->firmware_options[1] &= ~BIT_4;
  1931. if (IS_QLA23XX(ha)) {
  1932. nv->firmware_options[0] |= BIT_2;
  1933. nv->firmware_options[0] &= ~BIT_3;
  1934. nv->firmware_options[0] &= ~BIT_6;
  1935. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1936. if (IS_QLA2300(ha)) {
  1937. if (ha->fb_rev == FPM_2310) {
  1938. strcpy(ha->model_number, "QLA2310");
  1939. } else {
  1940. strcpy(ha->model_number, "QLA2300");
  1941. }
  1942. } else {
  1943. qla2x00_set_model_info(vha, nv->model_number,
  1944. sizeof(nv->model_number), "QLA23xx");
  1945. }
  1946. } else if (IS_QLA2200(ha)) {
  1947. nv->firmware_options[0] |= BIT_2;
  1948. /*
  1949. * 'Point-to-point preferred, else loop' is not a safe
  1950. * connection mode setting.
  1951. */
  1952. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1953. (BIT_5 | BIT_4)) {
  1954. /* Force 'loop preferred, else point-to-point'. */
  1955. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1956. nv->add_firmware_options[0] |= BIT_5;
  1957. }
  1958. strcpy(ha->model_number, "QLA22xx");
  1959. } else /*if (IS_QLA2100(ha))*/ {
  1960. strcpy(ha->model_number, "QLA2100");
  1961. }
  1962. /*
  1963. * Copy over NVRAM RISC parameter block to initialization control block.
  1964. */
  1965. dptr1 = (uint8_t *)icb;
  1966. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1967. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1968. while (cnt--)
  1969. *dptr1++ = *dptr2++;
  1970. /* Copy 2nd half. */
  1971. dptr1 = (uint8_t *)icb->add_firmware_options;
  1972. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  1973. while (cnt--)
  1974. *dptr1++ = *dptr2++;
  1975. /* Use alternate WWN? */
  1976. if (nv->host_p[1] & BIT_7) {
  1977. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  1978. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  1979. }
  1980. /* Prepare nodename */
  1981. if ((icb->firmware_options[1] & BIT_6) == 0) {
  1982. /*
  1983. * Firmware will apply the following mask if the nodename was
  1984. * not provided.
  1985. */
  1986. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  1987. icb->node_name[0] &= 0xF0;
  1988. }
  1989. /*
  1990. * Set host adapter parameters.
  1991. */
  1992. if (nv->host_p[0] & BIT_7)
  1993. ql2xextended_error_logging = 1;
  1994. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  1995. /* Always load RISC code on non ISP2[12]00 chips. */
  1996. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  1997. ha->flags.disable_risc_code_load = 0;
  1998. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  1999. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  2000. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  2001. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  2002. ha->flags.disable_serdes = 0;
  2003. ha->operating_mode =
  2004. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  2005. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  2006. sizeof(ha->fw_seriallink_options));
  2007. /* save HBA serial number */
  2008. ha->serial0 = icb->port_name[5];
  2009. ha->serial1 = icb->port_name[6];
  2010. ha->serial2 = icb->port_name[7];
  2011. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  2012. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  2013. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  2014. ha->retry_count = nv->retry_count;
  2015. /* Set minimum login_timeout to 4 seconds. */
  2016. if (nv->login_timeout != ql2xlogintimeout)
  2017. nv->login_timeout = ql2xlogintimeout;
  2018. if (nv->login_timeout < 4)
  2019. nv->login_timeout = 4;
  2020. ha->login_timeout = nv->login_timeout;
  2021. icb->login_timeout = nv->login_timeout;
  2022. /* Set minimum RATOV to 100 tenths of a second. */
  2023. ha->r_a_tov = 100;
  2024. ha->loop_reset_delay = nv->reset_delay;
  2025. /* Link Down Timeout = 0:
  2026. *
  2027. * When Port Down timer expires we will start returning
  2028. * I/O's to OS with "DID_NO_CONNECT".
  2029. *
  2030. * Link Down Timeout != 0:
  2031. *
  2032. * The driver waits for the link to come up after link down
  2033. * before returning I/Os to OS with "DID_NO_CONNECT".
  2034. */
  2035. if (nv->link_down_timeout == 0) {
  2036. ha->loop_down_abort_time =
  2037. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  2038. } else {
  2039. ha->link_down_timeout = nv->link_down_timeout;
  2040. ha->loop_down_abort_time =
  2041. (LOOP_DOWN_TIME - ha->link_down_timeout);
  2042. }
  2043. /*
  2044. * Need enough time to try and get the port back.
  2045. */
  2046. ha->port_down_retry_count = nv->port_down_retry_count;
  2047. if (qlport_down_retry)
  2048. ha->port_down_retry_count = qlport_down_retry;
  2049. /* Set login_retry_count */
  2050. ha->login_retry_count = nv->retry_count;
  2051. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  2052. ha->port_down_retry_count > 3)
  2053. ha->login_retry_count = ha->port_down_retry_count;
  2054. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  2055. ha->login_retry_count = ha->port_down_retry_count;
  2056. if (ql2xloginretrycount)
  2057. ha->login_retry_count = ql2xloginretrycount;
  2058. icb->lun_enables = __constant_cpu_to_le16(0);
  2059. icb->command_resource_count = 0;
  2060. icb->immediate_notify_resource_count = 0;
  2061. icb->timeout = __constant_cpu_to_le16(0);
  2062. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  2063. /* Enable RIO */
  2064. icb->firmware_options[0] &= ~BIT_3;
  2065. icb->add_firmware_options[0] &=
  2066. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2067. icb->add_firmware_options[0] |= BIT_2;
  2068. icb->response_accumulation_timer = 3;
  2069. icb->interrupt_delay_timer = 5;
  2070. vha->flags.process_response_queue = 1;
  2071. } else {
  2072. /* Enable ZIO. */
  2073. if (!vha->flags.init_done) {
  2074. ha->zio_mode = icb->add_firmware_options[0] &
  2075. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2076. ha->zio_timer = icb->interrupt_delay_timer ?
  2077. icb->interrupt_delay_timer: 2;
  2078. }
  2079. icb->add_firmware_options[0] &=
  2080. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2081. vha->flags.process_response_queue = 0;
  2082. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  2083. ha->zio_mode = QLA_ZIO_MODE_6;
  2084. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  2085. "delay (%d us).\n", vha->host_no, ha->zio_mode,
  2086. ha->zio_timer * 100));
  2087. qla_printk(KERN_INFO, ha,
  2088. "ZIO mode %d enabled; timer delay (%d us).\n",
  2089. ha->zio_mode, ha->zio_timer * 100);
  2090. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  2091. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  2092. vha->flags.process_response_queue = 1;
  2093. }
  2094. }
  2095. if (rval) {
  2096. DEBUG2_3(printk(KERN_WARNING
  2097. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  2098. }
  2099. return (rval);
  2100. }
  2101. static void
  2102. qla2x00_rport_del(void *data)
  2103. {
  2104. fc_port_t *fcport = data;
  2105. struct fc_rport *rport;
  2106. spin_lock_irq(fcport->vha->host->host_lock);
  2107. rport = fcport->drport ? fcport->drport: fcport->rport;
  2108. fcport->drport = NULL;
  2109. spin_unlock_irq(fcport->vha->host->host_lock);
  2110. if (rport)
  2111. fc_remote_port_delete(rport);
  2112. }
  2113. /**
  2114. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  2115. * @ha: HA context
  2116. * @flags: allocation flags
  2117. *
  2118. * Returns a pointer to the allocated fcport, or NULL, if none available.
  2119. */
  2120. fc_port_t *
  2121. qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
  2122. {
  2123. fc_port_t *fcport;
  2124. fcport = kzalloc(sizeof(fc_port_t), flags);
  2125. if (!fcport)
  2126. return NULL;
  2127. /* Setup fcport template structure. */
  2128. fcport->vha = vha;
  2129. fcport->vp_idx = vha->vp_idx;
  2130. fcport->port_type = FCT_UNKNOWN;
  2131. fcport->loop_id = FC_NO_LOOP_ID;
  2132. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  2133. fcport->supported_classes = FC_COS_UNSPECIFIED;
  2134. return fcport;
  2135. }
  2136. /*
  2137. * qla2x00_configure_loop
  2138. * Updates Fibre Channel Device Database with what is actually on loop.
  2139. *
  2140. * Input:
  2141. * ha = adapter block pointer.
  2142. *
  2143. * Returns:
  2144. * 0 = success.
  2145. * 1 = error.
  2146. * 2 = database was full and device was not configured.
  2147. */
  2148. static int
  2149. qla2x00_configure_loop(scsi_qla_host_t *vha)
  2150. {
  2151. int rval;
  2152. unsigned long flags, save_flags;
  2153. struct qla_hw_data *ha = vha->hw;
  2154. rval = QLA_SUCCESS;
  2155. /* Get Initiator ID */
  2156. if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
  2157. rval = qla2x00_configure_hba(vha);
  2158. if (rval != QLA_SUCCESS) {
  2159. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  2160. vha->host_no));
  2161. return (rval);
  2162. }
  2163. }
  2164. save_flags = flags = vha->dpc_flags;
  2165. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  2166. vha->host_no, flags));
  2167. /*
  2168. * If we have both an RSCN and PORT UPDATE pending then handle them
  2169. * both at the same time.
  2170. */
  2171. clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2172. clear_bit(RSCN_UPDATE, &vha->dpc_flags);
  2173. qla2x00_get_data_rate(vha);
  2174. /* Determine what we need to do */
  2175. if (ha->current_topology == ISP_CFG_FL &&
  2176. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  2177. vha->flags.rscn_queue_overflow = 1;
  2178. set_bit(RSCN_UPDATE, &flags);
  2179. } else if (ha->current_topology == ISP_CFG_F &&
  2180. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  2181. vha->flags.rscn_queue_overflow = 1;
  2182. set_bit(RSCN_UPDATE, &flags);
  2183. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  2184. } else if (ha->current_topology == ISP_CFG_N) {
  2185. clear_bit(RSCN_UPDATE, &flags);
  2186. } else if (!vha->flags.online ||
  2187. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  2188. vha->flags.rscn_queue_overflow = 1;
  2189. set_bit(RSCN_UPDATE, &flags);
  2190. set_bit(LOCAL_LOOP_UPDATE, &flags);
  2191. }
  2192. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  2193. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2194. rval = QLA_FUNCTION_FAILED;
  2195. else
  2196. rval = qla2x00_configure_local_loop(vha);
  2197. }
  2198. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  2199. if (LOOP_TRANSITION(vha))
  2200. rval = QLA_FUNCTION_FAILED;
  2201. else
  2202. rval = qla2x00_configure_fabric(vha);
  2203. }
  2204. if (rval == QLA_SUCCESS) {
  2205. if (atomic_read(&vha->loop_down_timer) ||
  2206. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  2207. rval = QLA_FUNCTION_FAILED;
  2208. } else {
  2209. atomic_set(&vha->loop_state, LOOP_READY);
  2210. DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no));
  2211. }
  2212. }
  2213. if (rval) {
  2214. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  2215. __func__, vha->host_no));
  2216. } else {
  2217. DEBUG3(printk("%s: exiting normally\n", __func__));
  2218. }
  2219. /* Restore state if a resync event occurred during processing */
  2220. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  2221. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  2222. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2223. if (test_bit(RSCN_UPDATE, &save_flags)) {
  2224. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  2225. if (!IS_ALOGIO_CAPABLE(ha))
  2226. vha->flags.rscn_queue_overflow = 1;
  2227. }
  2228. }
  2229. return (rval);
  2230. }
  2231. /*
  2232. * qla2x00_configure_local_loop
  2233. * Updates Fibre Channel Device Database with local loop devices.
  2234. *
  2235. * Input:
  2236. * ha = adapter block pointer.
  2237. *
  2238. * Returns:
  2239. * 0 = success.
  2240. */
  2241. static int
  2242. qla2x00_configure_local_loop(scsi_qla_host_t *vha)
  2243. {
  2244. int rval, rval2;
  2245. int found_devs;
  2246. int found;
  2247. fc_port_t *fcport, *new_fcport;
  2248. uint16_t index;
  2249. uint16_t entries;
  2250. char *id_iter;
  2251. uint16_t loop_id;
  2252. uint8_t domain, area, al_pa;
  2253. struct qla_hw_data *ha = vha->hw;
  2254. found_devs = 0;
  2255. new_fcport = NULL;
  2256. entries = MAX_FIBRE_DEVICES;
  2257. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no));
  2258. DEBUG3(qla2x00_get_fcal_position_map(vha, NULL));
  2259. /* Get list of logged in devices. */
  2260. memset(ha->gid_list, 0, GID_LIST_SIZE);
  2261. rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
  2262. &entries);
  2263. if (rval != QLA_SUCCESS)
  2264. goto cleanup_allocation;
  2265. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  2266. vha->host_no, entries));
  2267. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  2268. entries * sizeof(struct gid_list_info)));
  2269. /* Allocate temporary fcport for any new fcports discovered. */
  2270. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2271. if (new_fcport == NULL) {
  2272. rval = QLA_MEMORY_ALLOC_FAILED;
  2273. goto cleanup_allocation;
  2274. }
  2275. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2276. /*
  2277. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  2278. */
  2279. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2280. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  2281. fcport->port_type != FCT_BROADCAST &&
  2282. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2283. DEBUG(printk("scsi(%ld): Marking port lost, "
  2284. "loop_id=0x%04x\n",
  2285. vha->host_no, fcport->loop_id));
  2286. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2287. }
  2288. }
  2289. /* Add devices to port list. */
  2290. id_iter = (char *)ha->gid_list;
  2291. for (index = 0; index < entries; index++) {
  2292. domain = ((struct gid_list_info *)id_iter)->domain;
  2293. area = ((struct gid_list_info *)id_iter)->area;
  2294. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  2295. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  2296. loop_id = (uint16_t)
  2297. ((struct gid_list_info *)id_iter)->loop_id_2100;
  2298. else
  2299. loop_id = le16_to_cpu(
  2300. ((struct gid_list_info *)id_iter)->loop_id);
  2301. id_iter += ha->gid_list_info_size;
  2302. /* Bypass reserved domain fields. */
  2303. if ((domain & 0xf0) == 0xf0)
  2304. continue;
  2305. /* Bypass if not same domain and area of adapter. */
  2306. if (area && domain &&
  2307. (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
  2308. continue;
  2309. /* Bypass invalid local loop ID. */
  2310. if (loop_id > LAST_LOCAL_LOOP_ID)
  2311. continue;
  2312. /* Fill in member data. */
  2313. new_fcport->d_id.b.domain = domain;
  2314. new_fcport->d_id.b.area = area;
  2315. new_fcport->d_id.b.al_pa = al_pa;
  2316. new_fcport->loop_id = loop_id;
  2317. new_fcport->vp_idx = vha->vp_idx;
  2318. rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
  2319. if (rval2 != QLA_SUCCESS) {
  2320. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  2321. "information -- get_port_database=%x, "
  2322. "loop_id=0x%04x\n",
  2323. vha->host_no, rval2, new_fcport->loop_id));
  2324. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  2325. vha->host_no));
  2326. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2327. continue;
  2328. }
  2329. /* Check for matching device in port list. */
  2330. found = 0;
  2331. fcport = NULL;
  2332. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2333. if (memcmp(new_fcport->port_name, fcport->port_name,
  2334. WWN_SIZE))
  2335. continue;
  2336. fcport->flags &= ~FCF_FABRIC_DEVICE;
  2337. fcport->loop_id = new_fcport->loop_id;
  2338. fcport->port_type = new_fcport->port_type;
  2339. fcport->d_id.b24 = new_fcport->d_id.b24;
  2340. memcpy(fcport->node_name, new_fcport->node_name,
  2341. WWN_SIZE);
  2342. found++;
  2343. break;
  2344. }
  2345. if (!found) {
  2346. /* New device, add to fcports list. */
  2347. if (vha->vp_idx) {
  2348. new_fcport->vha = vha;
  2349. new_fcport->vp_idx = vha->vp_idx;
  2350. }
  2351. list_add_tail(&new_fcport->list, &vha->vp_fcports);
  2352. /* Allocate a new replacement fcport. */
  2353. fcport = new_fcport;
  2354. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2355. if (new_fcport == NULL) {
  2356. rval = QLA_MEMORY_ALLOC_FAILED;
  2357. goto cleanup_allocation;
  2358. }
  2359. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2360. }
  2361. /* Base iIDMA settings on HBA port speed. */
  2362. fcport->fp_speed = ha->link_data_rate;
  2363. qla2x00_update_fcport(vha, fcport);
  2364. found_devs++;
  2365. }
  2366. cleanup_allocation:
  2367. kfree(new_fcport);
  2368. if (rval != QLA_SUCCESS) {
  2369. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  2370. "rval=%x\n", vha->host_no, rval));
  2371. }
  2372. return (rval);
  2373. }
  2374. static void
  2375. qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2376. {
  2377. #define LS_UNKNOWN 2
  2378. static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" };
  2379. char *link_speed;
  2380. int rval;
  2381. uint16_t mb[4];
  2382. struct qla_hw_data *ha = vha->hw;
  2383. if (!IS_IIDMA_CAPABLE(ha))
  2384. return;
  2385. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  2386. fcport->fp_speed > ha->link_data_rate)
  2387. return;
  2388. rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
  2389. mb);
  2390. if (rval != QLA_SUCCESS) {
  2391. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  2392. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  2393. vha->host_no, fcport->port_name[0], fcport->port_name[1],
  2394. fcport->port_name[2], fcport->port_name[3],
  2395. fcport->port_name[4], fcport->port_name[5],
  2396. fcport->port_name[6], fcport->port_name[7], rval,
  2397. fcport->fp_speed, mb[0], mb[1]));
  2398. } else {
  2399. link_speed = link_speeds[LS_UNKNOWN];
  2400. if (fcport->fp_speed < 5)
  2401. link_speed = link_speeds[fcport->fp_speed];
  2402. else if (fcport->fp_speed == 0x13)
  2403. link_speed = link_speeds[5];
  2404. DEBUG2(qla_printk(KERN_INFO, ha,
  2405. "iIDMA adjusted to %s GB/s on "
  2406. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  2407. link_speed, fcport->port_name[0],
  2408. fcport->port_name[1], fcport->port_name[2],
  2409. fcport->port_name[3], fcport->port_name[4],
  2410. fcport->port_name[5], fcport->port_name[6],
  2411. fcport->port_name[7]));
  2412. }
  2413. }
  2414. static void
  2415. qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
  2416. {
  2417. struct fc_rport_identifiers rport_ids;
  2418. struct fc_rport *rport;
  2419. struct qla_hw_data *ha = vha->hw;
  2420. qla2x00_rport_del(fcport);
  2421. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  2422. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  2423. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  2424. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  2425. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2426. fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
  2427. if (!rport) {
  2428. qla_printk(KERN_WARNING, ha,
  2429. "Unable to allocate fc remote port!\n");
  2430. return;
  2431. }
  2432. spin_lock_irq(fcport->vha->host->host_lock);
  2433. *((fc_port_t **)rport->dd_data) = fcport;
  2434. spin_unlock_irq(fcport->vha->host->host_lock);
  2435. rport->supported_classes = fcport->supported_classes;
  2436. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2437. if (fcport->port_type == FCT_INITIATOR)
  2438. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  2439. if (fcport->port_type == FCT_TARGET)
  2440. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  2441. fc_remote_port_rolechg(rport, rport_ids.roles);
  2442. }
  2443. /*
  2444. * qla2x00_update_fcport
  2445. * Updates device on list.
  2446. *
  2447. * Input:
  2448. * ha = adapter block pointer.
  2449. * fcport = port structure pointer.
  2450. *
  2451. * Return:
  2452. * 0 - Success
  2453. * BIT_0 - error
  2454. *
  2455. * Context:
  2456. * Kernel context.
  2457. */
  2458. void
  2459. qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2460. {
  2461. struct qla_hw_data *ha = vha->hw;
  2462. fcport->vha = vha;
  2463. fcport->login_retry = 0;
  2464. fcport->port_login_retry_count = ha->port_down_retry_count *
  2465. PORT_RETRY_TIME;
  2466. atomic_set(&fcport->port_down_timer, ha->port_down_retry_count *
  2467. PORT_RETRY_TIME);
  2468. fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
  2469. qla2x00_iidma_fcport(vha, fcport);
  2470. atomic_set(&fcport->state, FCS_ONLINE);
  2471. qla2x00_reg_remote_port(vha, fcport);
  2472. }
  2473. /*
  2474. * qla2x00_configure_fabric
  2475. * Setup SNS devices with loop ID's.
  2476. *
  2477. * Input:
  2478. * ha = adapter block pointer.
  2479. *
  2480. * Returns:
  2481. * 0 = success.
  2482. * BIT_0 = error
  2483. */
  2484. static int
  2485. qla2x00_configure_fabric(scsi_qla_host_t *vha)
  2486. {
  2487. int rval, rval2;
  2488. fc_port_t *fcport, *fcptemp;
  2489. uint16_t next_loopid;
  2490. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2491. uint16_t loop_id;
  2492. LIST_HEAD(new_fcports);
  2493. struct qla_hw_data *ha = vha->hw;
  2494. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2495. /* If FL port exists, then SNS is present */
  2496. if (IS_FWI2_CAPABLE(ha))
  2497. loop_id = NPH_F_PORT;
  2498. else
  2499. loop_id = SNS_FL_PORT;
  2500. rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
  2501. if (rval != QLA_SUCCESS) {
  2502. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  2503. "Port\n", vha->host_no));
  2504. vha->device_flags &= ~SWITCH_FOUND;
  2505. return (QLA_SUCCESS);
  2506. }
  2507. vha->device_flags |= SWITCH_FOUND;
  2508. /* Mark devices that need re-synchronization. */
  2509. rval2 = qla2x00_device_resync(vha);
  2510. if (rval2 == QLA_RSCNS_HANDLED) {
  2511. /* No point doing the scan, just continue. */
  2512. return (QLA_SUCCESS);
  2513. }
  2514. do {
  2515. /* FDMI support. */
  2516. if (ql2xfdmienable &&
  2517. test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
  2518. qla2x00_fdmi_register(vha);
  2519. /* Ensure we are logged into the SNS. */
  2520. if (IS_FWI2_CAPABLE(ha))
  2521. loop_id = NPH_SNS;
  2522. else
  2523. loop_id = SIMPLE_NAME_SERVER;
  2524. ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
  2525. 0xfc, mb, BIT_1 | BIT_0);
  2526. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2527. DEBUG2(qla_printk(KERN_INFO, ha,
  2528. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2529. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2530. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2531. return (QLA_SUCCESS);
  2532. }
  2533. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
  2534. if (qla2x00_rft_id(vha)) {
  2535. /* EMPTY */
  2536. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2537. "TYPE failed.\n", vha->host_no));
  2538. }
  2539. if (qla2x00_rff_id(vha)) {
  2540. /* EMPTY */
  2541. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2542. "Features failed.\n", vha->host_no));
  2543. }
  2544. if (qla2x00_rnn_id(vha)) {
  2545. /* EMPTY */
  2546. DEBUG2(printk("scsi(%ld): Register Node Name "
  2547. "failed.\n", vha->host_no));
  2548. } else if (qla2x00_rsnn_nn(vha)) {
  2549. /* EMPTY */
  2550. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2551. "Node Name failed.\n", vha->host_no));
  2552. }
  2553. }
  2554. rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
  2555. if (rval != QLA_SUCCESS)
  2556. break;
  2557. /*
  2558. * Logout all previous fabric devices marked lost, except
  2559. * FCP2 devices.
  2560. */
  2561. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2562. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2563. break;
  2564. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2565. continue;
  2566. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2567. qla2x00_mark_device_lost(vha, fcport,
  2568. ql2xplogiabsentdevice, 0);
  2569. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2570. (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
  2571. fcport->port_type != FCT_INITIATOR &&
  2572. fcport->port_type != FCT_BROADCAST) {
  2573. ha->isp_ops->fabric_logout(vha,
  2574. fcport->loop_id,
  2575. fcport->d_id.b.domain,
  2576. fcport->d_id.b.area,
  2577. fcport->d_id.b.al_pa);
  2578. fcport->loop_id = FC_NO_LOOP_ID;
  2579. }
  2580. }
  2581. }
  2582. /* Starting free loop ID. */
  2583. next_loopid = ha->min_external_loopid;
  2584. /*
  2585. * Scan through our port list and login entries that need to be
  2586. * logged in.
  2587. */
  2588. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2589. if (atomic_read(&vha->loop_down_timer) ||
  2590. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2591. break;
  2592. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2593. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2594. continue;
  2595. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2596. fcport->loop_id = next_loopid;
  2597. rval = qla2x00_find_new_loop_id(
  2598. base_vha, fcport);
  2599. if (rval != QLA_SUCCESS) {
  2600. /* Ran out of IDs to use */
  2601. break;
  2602. }
  2603. }
  2604. /* Login and update database */
  2605. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2606. }
  2607. /* Exit if out of loop IDs. */
  2608. if (rval != QLA_SUCCESS) {
  2609. break;
  2610. }
  2611. /*
  2612. * Login and add the new devices to our port list.
  2613. */
  2614. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2615. if (atomic_read(&vha->loop_down_timer) ||
  2616. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2617. break;
  2618. /* Find a new loop ID to use. */
  2619. fcport->loop_id = next_loopid;
  2620. rval = qla2x00_find_new_loop_id(base_vha, fcport);
  2621. if (rval != QLA_SUCCESS) {
  2622. /* Ran out of IDs to use */
  2623. break;
  2624. }
  2625. /* Login and update database */
  2626. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2627. if (vha->vp_idx) {
  2628. fcport->vha = vha;
  2629. fcport->vp_idx = vha->vp_idx;
  2630. }
  2631. list_move_tail(&fcport->list, &vha->vp_fcports);
  2632. }
  2633. } while (0);
  2634. /* Free all new device structures not processed. */
  2635. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2636. list_del(&fcport->list);
  2637. kfree(fcport);
  2638. }
  2639. if (rval) {
  2640. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2641. "rval=%d\n", vha->host_no, rval));
  2642. }
  2643. return (rval);
  2644. }
  2645. /*
  2646. * qla2x00_find_all_fabric_devs
  2647. *
  2648. * Input:
  2649. * ha = adapter block pointer.
  2650. * dev = database device entry pointer.
  2651. *
  2652. * Returns:
  2653. * 0 = success.
  2654. *
  2655. * Context:
  2656. * Kernel context.
  2657. */
  2658. static int
  2659. qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
  2660. struct list_head *new_fcports)
  2661. {
  2662. int rval;
  2663. uint16_t loop_id;
  2664. fc_port_t *fcport, *new_fcport, *fcptemp;
  2665. int found;
  2666. sw_info_t *swl;
  2667. int swl_idx;
  2668. int first_dev, last_dev;
  2669. port_id_t wrap = {}, nxt_d_id;
  2670. struct qla_hw_data *ha = vha->hw;
  2671. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  2672. struct scsi_qla_host *tvp;
  2673. rval = QLA_SUCCESS;
  2674. /* Try GID_PT to get device list, else GAN. */
  2675. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
  2676. if (!swl) {
  2677. /*EMPTY*/
  2678. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2679. "on GA_NXT\n", vha->host_no));
  2680. } else {
  2681. if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
  2682. kfree(swl);
  2683. swl = NULL;
  2684. } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
  2685. kfree(swl);
  2686. swl = NULL;
  2687. } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
  2688. kfree(swl);
  2689. swl = NULL;
  2690. } else if (ql2xiidmaenable &&
  2691. qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
  2692. qla2x00_gpsc(vha, swl);
  2693. }
  2694. /* If other queries succeeded probe for FC-4 type */
  2695. if (swl)
  2696. qla2x00_gff_id(vha, swl);
  2697. }
  2698. swl_idx = 0;
  2699. /* Allocate temporary fcport for any new fcports discovered. */
  2700. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2701. if (new_fcport == NULL) {
  2702. kfree(swl);
  2703. return (QLA_MEMORY_ALLOC_FAILED);
  2704. }
  2705. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2706. /* Set start port ID scan at adapter ID. */
  2707. first_dev = 1;
  2708. last_dev = 0;
  2709. /* Starting free loop ID. */
  2710. loop_id = ha->min_external_loopid;
  2711. for (; loop_id <= ha->max_loop_id; loop_id++) {
  2712. if (qla2x00_is_reserved_id(vha, loop_id))
  2713. continue;
  2714. if (ha->current_topology == ISP_CFG_FL &&
  2715. (atomic_read(&vha->loop_down_timer) ||
  2716. LOOP_TRANSITION(vha))) {
  2717. atomic_set(&vha->loop_down_timer, 0);
  2718. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2719. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2720. break;
  2721. }
  2722. if (swl != NULL) {
  2723. if (last_dev) {
  2724. wrap.b24 = new_fcport->d_id.b24;
  2725. } else {
  2726. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2727. memcpy(new_fcport->node_name,
  2728. swl[swl_idx].node_name, WWN_SIZE);
  2729. memcpy(new_fcport->port_name,
  2730. swl[swl_idx].port_name, WWN_SIZE);
  2731. memcpy(new_fcport->fabric_port_name,
  2732. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2733. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2734. new_fcport->fc4_type = swl[swl_idx].fc4_type;
  2735. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2736. last_dev = 1;
  2737. }
  2738. swl_idx++;
  2739. }
  2740. } else {
  2741. /* Send GA_NXT to the switch */
  2742. rval = qla2x00_ga_nxt(vha, new_fcport);
  2743. if (rval != QLA_SUCCESS) {
  2744. qla_printk(KERN_WARNING, ha,
  2745. "SNS scan failed -- assuming zero-entry "
  2746. "result...\n");
  2747. list_for_each_entry_safe(fcport, fcptemp,
  2748. new_fcports, list) {
  2749. list_del(&fcport->list);
  2750. kfree(fcport);
  2751. }
  2752. rval = QLA_SUCCESS;
  2753. break;
  2754. }
  2755. }
  2756. /* If wrap on switch device list, exit. */
  2757. if (first_dev) {
  2758. wrap.b24 = new_fcport->d_id.b24;
  2759. first_dev = 0;
  2760. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2761. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2762. vha->host_no, new_fcport->d_id.b.domain,
  2763. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2764. break;
  2765. }
  2766. /* Bypass if same physical adapter. */
  2767. if (new_fcport->d_id.b24 == base_vha->d_id.b24)
  2768. continue;
  2769. /* Bypass virtual ports of the same host. */
  2770. found = 0;
  2771. if (ha->num_vhosts) {
  2772. unsigned long flags;
  2773. spin_lock_irqsave(&ha->vport_slock, flags);
  2774. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2775. if (new_fcport->d_id.b24 == vp->d_id.b24) {
  2776. found = 1;
  2777. break;
  2778. }
  2779. }
  2780. spin_unlock_irqrestore(&ha->vport_slock, flags);
  2781. if (found)
  2782. continue;
  2783. }
  2784. /* Bypass if same domain and area of adapter. */
  2785. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2786. (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2787. ISP_CFG_FL)
  2788. continue;
  2789. /* Bypass reserved domain fields. */
  2790. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2791. continue;
  2792. /* Bypass ports whose FCP-4 type is not FCP_SCSI */
  2793. if (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
  2794. new_fcport->fc4_type != FC4_TYPE_UNKNOWN)
  2795. continue;
  2796. /* Locate matching device in database. */
  2797. found = 0;
  2798. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2799. if (memcmp(new_fcport->port_name, fcport->port_name,
  2800. WWN_SIZE))
  2801. continue;
  2802. found++;
  2803. /* Update port state. */
  2804. memcpy(fcport->fabric_port_name,
  2805. new_fcport->fabric_port_name, WWN_SIZE);
  2806. fcport->fp_speed = new_fcport->fp_speed;
  2807. /*
  2808. * If address the same and state FCS_ONLINE, nothing
  2809. * changed.
  2810. */
  2811. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2812. atomic_read(&fcport->state) == FCS_ONLINE) {
  2813. break;
  2814. }
  2815. /*
  2816. * If device was not a fabric device before.
  2817. */
  2818. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2819. fcport->d_id.b24 = new_fcport->d_id.b24;
  2820. fcport->loop_id = FC_NO_LOOP_ID;
  2821. fcport->flags |= (FCF_FABRIC_DEVICE |
  2822. FCF_LOGIN_NEEDED);
  2823. break;
  2824. }
  2825. /*
  2826. * Port ID changed or device was marked to be updated;
  2827. * Log it out if still logged in and mark it for
  2828. * relogin later.
  2829. */
  2830. fcport->d_id.b24 = new_fcport->d_id.b24;
  2831. fcport->flags |= FCF_LOGIN_NEEDED;
  2832. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2833. (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
  2834. fcport->port_type != FCT_INITIATOR &&
  2835. fcport->port_type != FCT_BROADCAST) {
  2836. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2837. fcport->d_id.b.domain, fcport->d_id.b.area,
  2838. fcport->d_id.b.al_pa);
  2839. fcport->loop_id = FC_NO_LOOP_ID;
  2840. }
  2841. break;
  2842. }
  2843. if (found)
  2844. continue;
  2845. /* If device was not in our fcports list, then add it. */
  2846. list_add_tail(&new_fcport->list, new_fcports);
  2847. /* Allocate a new replacement fcport. */
  2848. nxt_d_id.b24 = new_fcport->d_id.b24;
  2849. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2850. if (new_fcport == NULL) {
  2851. kfree(swl);
  2852. return (QLA_MEMORY_ALLOC_FAILED);
  2853. }
  2854. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2855. new_fcport->d_id.b24 = nxt_d_id.b24;
  2856. }
  2857. kfree(swl);
  2858. kfree(new_fcport);
  2859. return (rval);
  2860. }
  2861. /*
  2862. * qla2x00_find_new_loop_id
  2863. * Scan through our port list and find a new usable loop ID.
  2864. *
  2865. * Input:
  2866. * ha: adapter state pointer.
  2867. * dev: port structure pointer.
  2868. *
  2869. * Returns:
  2870. * qla2x00 local function return status code.
  2871. *
  2872. * Context:
  2873. * Kernel context.
  2874. */
  2875. static int
  2876. qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
  2877. {
  2878. int rval;
  2879. int found;
  2880. fc_port_t *fcport;
  2881. uint16_t first_loop_id;
  2882. struct qla_hw_data *ha = vha->hw;
  2883. struct scsi_qla_host *vp;
  2884. struct scsi_qla_host *tvp;
  2885. unsigned long flags = 0;
  2886. rval = QLA_SUCCESS;
  2887. /* Save starting loop ID. */
  2888. first_loop_id = dev->loop_id;
  2889. for (;;) {
  2890. /* Skip loop ID if already used by adapter. */
  2891. if (dev->loop_id == vha->loop_id)
  2892. dev->loop_id++;
  2893. /* Skip reserved loop IDs. */
  2894. while (qla2x00_is_reserved_id(vha, dev->loop_id))
  2895. dev->loop_id++;
  2896. /* Reset loop ID if passed the end. */
  2897. if (dev->loop_id > ha->max_loop_id) {
  2898. /* first loop ID. */
  2899. dev->loop_id = ha->min_external_loopid;
  2900. }
  2901. /* Check for loop ID being already in use. */
  2902. found = 0;
  2903. fcport = NULL;
  2904. spin_lock_irqsave(&ha->vport_slock, flags);
  2905. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2906. list_for_each_entry(fcport, &vp->vp_fcports, list) {
  2907. if (fcport->loop_id == dev->loop_id &&
  2908. fcport != dev) {
  2909. /* ID possibly in use */
  2910. found++;
  2911. break;
  2912. }
  2913. }
  2914. if (found)
  2915. break;
  2916. }
  2917. spin_unlock_irqrestore(&ha->vport_slock, flags);
  2918. /* If not in use then it is free to use. */
  2919. if (!found) {
  2920. break;
  2921. }
  2922. /* ID in use. Try next value. */
  2923. dev->loop_id++;
  2924. /* If wrap around. No free ID to use. */
  2925. if (dev->loop_id == first_loop_id) {
  2926. dev->loop_id = FC_NO_LOOP_ID;
  2927. rval = QLA_FUNCTION_FAILED;
  2928. break;
  2929. }
  2930. }
  2931. return (rval);
  2932. }
  2933. /*
  2934. * qla2x00_device_resync
  2935. * Marks devices in the database that needs resynchronization.
  2936. *
  2937. * Input:
  2938. * ha = adapter block pointer.
  2939. *
  2940. * Context:
  2941. * Kernel context.
  2942. */
  2943. static int
  2944. qla2x00_device_resync(scsi_qla_host_t *vha)
  2945. {
  2946. int rval;
  2947. uint32_t mask;
  2948. fc_port_t *fcport;
  2949. uint32_t rscn_entry;
  2950. uint8_t rscn_out_iter;
  2951. uint8_t format;
  2952. port_id_t d_id = {};
  2953. rval = QLA_RSCNS_HANDLED;
  2954. while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
  2955. vha->flags.rscn_queue_overflow) {
  2956. rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
  2957. format = MSB(MSW(rscn_entry));
  2958. d_id.b.domain = LSB(MSW(rscn_entry));
  2959. d_id.b.area = MSB(LSW(rscn_entry));
  2960. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2961. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2962. "[%02x/%02x%02x%02x].\n",
  2963. vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain,
  2964. d_id.b.area, d_id.b.al_pa));
  2965. vha->rscn_out_ptr++;
  2966. if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
  2967. vha->rscn_out_ptr = 0;
  2968. /* Skip duplicate entries. */
  2969. for (rscn_out_iter = vha->rscn_out_ptr;
  2970. !vha->flags.rscn_queue_overflow &&
  2971. rscn_out_iter != vha->rscn_in_ptr;
  2972. rscn_out_iter = (rscn_out_iter ==
  2973. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2974. if (rscn_entry != vha->rscn_queue[rscn_out_iter])
  2975. break;
  2976. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  2977. "entry found at [%d].\n", vha->host_no,
  2978. rscn_out_iter));
  2979. vha->rscn_out_ptr = rscn_out_iter;
  2980. }
  2981. /* Queue overflow, set switch default case. */
  2982. if (vha->flags.rscn_queue_overflow) {
  2983. DEBUG(printk("scsi(%ld): device_resync: rscn "
  2984. "overflow.\n", vha->host_no));
  2985. format = 3;
  2986. vha->flags.rscn_queue_overflow = 0;
  2987. }
  2988. switch (format) {
  2989. case 0:
  2990. mask = 0xffffff;
  2991. break;
  2992. case 1:
  2993. mask = 0xffff00;
  2994. break;
  2995. case 2:
  2996. mask = 0xff0000;
  2997. break;
  2998. default:
  2999. mask = 0x0;
  3000. d_id.b24 = 0;
  3001. vha->rscn_out_ptr = vha->rscn_in_ptr;
  3002. break;
  3003. }
  3004. rval = QLA_SUCCESS;
  3005. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  3006. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  3007. (fcport->d_id.b24 & mask) != d_id.b24 ||
  3008. fcport->port_type == FCT_BROADCAST)
  3009. continue;
  3010. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  3011. if (format != 3 ||
  3012. fcport->port_type != FCT_INITIATOR) {
  3013. qla2x00_mark_device_lost(vha, fcport,
  3014. 0, 0);
  3015. }
  3016. }
  3017. }
  3018. }
  3019. return (rval);
  3020. }
  3021. /*
  3022. * qla2x00_fabric_dev_login
  3023. * Login fabric target device and update FC port database.
  3024. *
  3025. * Input:
  3026. * ha: adapter state pointer.
  3027. * fcport: port structure list pointer.
  3028. * next_loopid: contains value of a new loop ID that can be used
  3029. * by the next login attempt.
  3030. *
  3031. * Returns:
  3032. * qla2x00 local function return status code.
  3033. *
  3034. * Context:
  3035. * Kernel context.
  3036. */
  3037. static int
  3038. qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  3039. uint16_t *next_loopid)
  3040. {
  3041. int rval;
  3042. int retry;
  3043. uint8_t opts;
  3044. struct qla_hw_data *ha = vha->hw;
  3045. rval = QLA_SUCCESS;
  3046. retry = 0;
  3047. if (IS_ALOGIO_CAPABLE(ha)) {
  3048. if (fcport->flags & FCF_ASYNC_SENT)
  3049. return rval;
  3050. fcport->flags |= FCF_ASYNC_SENT;
  3051. rval = qla2x00_post_async_login_work(vha, fcport, NULL);
  3052. if (!rval)
  3053. return rval;
  3054. }
  3055. fcport->flags &= ~FCF_ASYNC_SENT;
  3056. rval = qla2x00_fabric_login(vha, fcport, next_loopid);
  3057. if (rval == QLA_SUCCESS) {
  3058. /* Send an ADISC to FCP2 devices.*/
  3059. opts = 0;
  3060. if (fcport->flags & FCF_FCP2_DEVICE)
  3061. opts |= BIT_1;
  3062. rval = qla2x00_get_port_database(vha, fcport, opts);
  3063. if (rval != QLA_SUCCESS) {
  3064. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3065. fcport->d_id.b.domain, fcport->d_id.b.area,
  3066. fcport->d_id.b.al_pa);
  3067. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  3068. } else {
  3069. qla2x00_update_fcport(vha, fcport);
  3070. }
  3071. }
  3072. return (rval);
  3073. }
  3074. /*
  3075. * qla2x00_fabric_login
  3076. * Issue fabric login command.
  3077. *
  3078. * Input:
  3079. * ha = adapter block pointer.
  3080. * device = pointer to FC device type structure.
  3081. *
  3082. * Returns:
  3083. * 0 - Login successfully
  3084. * 1 - Login failed
  3085. * 2 - Initiator device
  3086. * 3 - Fatal error
  3087. */
  3088. int
  3089. qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  3090. uint16_t *next_loopid)
  3091. {
  3092. int rval;
  3093. int retry;
  3094. uint16_t tmp_loopid;
  3095. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3096. struct qla_hw_data *ha = vha->hw;
  3097. retry = 0;
  3098. tmp_loopid = 0;
  3099. for (;;) {
  3100. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  3101. "for port %02x%02x%02x.\n",
  3102. vha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  3103. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  3104. /* Login fcport on switch. */
  3105. ha->isp_ops->fabric_login(vha, fcport->loop_id,
  3106. fcport->d_id.b.domain, fcport->d_id.b.area,
  3107. fcport->d_id.b.al_pa, mb, BIT_0);
  3108. if (mb[0] == MBS_PORT_ID_USED) {
  3109. /*
  3110. * Device has another loop ID. The firmware team
  3111. * recommends the driver perform an implicit login with
  3112. * the specified ID again. The ID we just used is save
  3113. * here so we return with an ID that can be tried by
  3114. * the next login.
  3115. */
  3116. retry++;
  3117. tmp_loopid = fcport->loop_id;
  3118. fcport->loop_id = mb[1];
  3119. DEBUG(printk("Fabric Login: port in use - next "
  3120. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  3121. fcport->loop_id, fcport->d_id.b.domain,
  3122. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  3123. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  3124. /*
  3125. * Login succeeded.
  3126. */
  3127. if (retry) {
  3128. /* A retry occurred before. */
  3129. *next_loopid = tmp_loopid;
  3130. } else {
  3131. /*
  3132. * No retry occurred before. Just increment the
  3133. * ID value for next login.
  3134. */
  3135. *next_loopid = (fcport->loop_id + 1);
  3136. }
  3137. if (mb[1] & BIT_0) {
  3138. fcport->port_type = FCT_INITIATOR;
  3139. } else {
  3140. fcport->port_type = FCT_TARGET;
  3141. if (mb[1] & BIT_1) {
  3142. fcport->flags |= FCF_FCP2_DEVICE;
  3143. }
  3144. }
  3145. if (mb[10] & BIT_0)
  3146. fcport->supported_classes |= FC_COS_CLASS2;
  3147. if (mb[10] & BIT_1)
  3148. fcport->supported_classes |= FC_COS_CLASS3;
  3149. rval = QLA_SUCCESS;
  3150. break;
  3151. } else if (mb[0] == MBS_LOOP_ID_USED) {
  3152. /*
  3153. * Loop ID already used, try next loop ID.
  3154. */
  3155. fcport->loop_id++;
  3156. rval = qla2x00_find_new_loop_id(vha, fcport);
  3157. if (rval != QLA_SUCCESS) {
  3158. /* Ran out of loop IDs to use */
  3159. break;
  3160. }
  3161. } else if (mb[0] == MBS_COMMAND_ERROR) {
  3162. /*
  3163. * Firmware possibly timed out during login. If NO
  3164. * retries are left to do then the device is declared
  3165. * dead.
  3166. */
  3167. *next_loopid = fcport->loop_id;
  3168. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3169. fcport->d_id.b.domain, fcport->d_id.b.area,
  3170. fcport->d_id.b.al_pa);
  3171. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  3172. rval = 1;
  3173. break;
  3174. } else {
  3175. /*
  3176. * unrecoverable / not handled error
  3177. */
  3178. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  3179. "loop_id=%x jiffies=%lx.\n",
  3180. __func__, vha->host_no, mb[0],
  3181. fcport->d_id.b.domain, fcport->d_id.b.area,
  3182. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  3183. *next_loopid = fcport->loop_id;
  3184. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3185. fcport->d_id.b.domain, fcport->d_id.b.area,
  3186. fcport->d_id.b.al_pa);
  3187. fcport->loop_id = FC_NO_LOOP_ID;
  3188. fcport->login_retry = 0;
  3189. rval = 3;
  3190. break;
  3191. }
  3192. }
  3193. return (rval);
  3194. }
  3195. /*
  3196. * qla2x00_local_device_login
  3197. * Issue local device login command.
  3198. *
  3199. * Input:
  3200. * ha = adapter block pointer.
  3201. * loop_id = loop id of device to login to.
  3202. *
  3203. * Returns (Where's the #define!!!!):
  3204. * 0 - Login successfully
  3205. * 1 - Login failed
  3206. * 3 - Fatal error
  3207. */
  3208. int
  3209. qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
  3210. {
  3211. int rval;
  3212. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3213. memset(mb, 0, sizeof(mb));
  3214. rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
  3215. if (rval == QLA_SUCCESS) {
  3216. /* Interrogate mailbox registers for any errors */
  3217. if (mb[0] == MBS_COMMAND_ERROR)
  3218. rval = 1;
  3219. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  3220. /* device not in PCB table */
  3221. rval = 3;
  3222. }
  3223. return (rval);
  3224. }
  3225. /*
  3226. * qla2x00_loop_resync
  3227. * Resync with fibre channel devices.
  3228. *
  3229. * Input:
  3230. * ha = adapter block pointer.
  3231. *
  3232. * Returns:
  3233. * 0 = success
  3234. */
  3235. int
  3236. qla2x00_loop_resync(scsi_qla_host_t *vha)
  3237. {
  3238. int rval = QLA_SUCCESS;
  3239. uint32_t wait_time;
  3240. struct req_que *req;
  3241. struct rsp_que *rsp;
  3242. if (vha->hw->flags.cpu_affinity_enabled)
  3243. req = vha->hw->req_q_map[0];
  3244. else
  3245. req = vha->req;
  3246. rsp = req->rsp;
  3247. atomic_set(&vha->loop_state, LOOP_UPDATE);
  3248. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3249. if (vha->flags.online) {
  3250. if (!(rval = qla2x00_fw_ready(vha))) {
  3251. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3252. wait_time = 256;
  3253. do {
  3254. atomic_set(&vha->loop_state, LOOP_UPDATE);
  3255. /* Issue a marker after FW becomes ready. */
  3256. qla2x00_marker(vha, req, rsp, 0, 0,
  3257. MK_SYNC_ALL);
  3258. vha->marker_needed = 0;
  3259. /* Remap devices on Loop. */
  3260. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3261. qla2x00_configure_loop(vha);
  3262. wait_time--;
  3263. } while (!atomic_read(&vha->loop_down_timer) &&
  3264. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3265. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3266. &vha->dpc_flags)));
  3267. }
  3268. }
  3269. if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3270. return (QLA_FUNCTION_FAILED);
  3271. if (rval)
  3272. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  3273. return (rval);
  3274. }
  3275. void
  3276. qla2x00_update_fcports(scsi_qla_host_t *base_vha)
  3277. {
  3278. fc_port_t *fcport;
  3279. struct scsi_qla_host *vha;
  3280. struct qla_hw_data *ha = base_vha->hw;
  3281. unsigned long flags;
  3282. spin_lock_irqsave(&ha->vport_slock, flags);
  3283. /* Go with deferred removal of rport references. */
  3284. list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
  3285. atomic_inc(&vha->vref_count);
  3286. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  3287. if (fcport && fcport->drport &&
  3288. atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
  3289. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3290. qla2x00_rport_del(fcport);
  3291. spin_lock_irqsave(&ha->vport_slock, flags);
  3292. }
  3293. }
  3294. atomic_dec(&vha->vref_count);
  3295. }
  3296. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3297. }
  3298. void
  3299. qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
  3300. {
  3301. struct qla_hw_data *ha = vha->hw;
  3302. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  3303. unsigned long flags;
  3304. vha->flags.online = 0;
  3305. ha->flags.chip_reset_done = 0;
  3306. clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  3307. ha->qla_stats.total_isp_aborts++;
  3308. qla_printk(KERN_INFO, ha,
  3309. "Performing ISP error recovery - ha= %p.\n", ha);
  3310. /* Chip reset does not apply to 82XX */
  3311. if (!IS_QLA82XX(ha))
  3312. ha->isp_ops->reset_chip(vha);
  3313. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  3314. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  3315. atomic_set(&vha->loop_state, LOOP_DOWN);
  3316. qla2x00_mark_all_devices_lost(vha, 0);
  3317. spin_lock_irqsave(&ha->vport_slock, flags);
  3318. list_for_each_entry(vp, &base_vha->hw->vp_list, list) {
  3319. atomic_inc(&vp->vref_count);
  3320. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3321. qla2x00_mark_all_devices_lost(vp, 0);
  3322. spin_lock_irqsave(&ha->vport_slock, flags);
  3323. atomic_dec(&vp->vref_count);
  3324. }
  3325. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3326. } else {
  3327. if (!atomic_read(&vha->loop_down_timer))
  3328. atomic_set(&vha->loop_down_timer,
  3329. LOOP_DOWN_TIME);
  3330. }
  3331. /* Make sure for ISP 82XX IO DMA is complete */
  3332. if (IS_QLA82XX(ha)) {
  3333. if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0,
  3334. WAIT_HOST) == QLA_SUCCESS) {
  3335. DEBUG2(qla_printk(KERN_INFO, ha,
  3336. "Done wait for pending commands\n"));
  3337. }
  3338. }
  3339. /* Requeue all commands in outstanding command list. */
  3340. qla2x00_abort_all_cmds(vha, DID_RESET << 16);
  3341. }
  3342. /*
  3343. * qla2x00_abort_isp
  3344. * Resets ISP and aborts all outstanding commands.
  3345. *
  3346. * Input:
  3347. * ha = adapter block pointer.
  3348. *
  3349. * Returns:
  3350. * 0 = success
  3351. */
  3352. int
  3353. qla2x00_abort_isp(scsi_qla_host_t *vha)
  3354. {
  3355. int rval;
  3356. uint8_t status = 0;
  3357. struct qla_hw_data *ha = vha->hw;
  3358. struct scsi_qla_host *vp;
  3359. struct req_que *req = ha->req_q_map[0];
  3360. unsigned long flags;
  3361. if (vha->flags.online) {
  3362. qla2x00_abort_isp_cleanup(vha);
  3363. if (unlikely(pci_channel_offline(ha->pdev) &&
  3364. ha->flags.pci_channel_io_perm_failure)) {
  3365. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3366. status = 0;
  3367. return status;
  3368. }
  3369. ha->isp_ops->get_flash_version(vha, req->ring);
  3370. ha->isp_ops->nvram_config(vha);
  3371. if (!qla2x00_restart_isp(vha)) {
  3372. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3373. if (!atomic_read(&vha->loop_down_timer)) {
  3374. /*
  3375. * Issue marker command only when we are going
  3376. * to start the I/O .
  3377. */
  3378. vha->marker_needed = 1;
  3379. }
  3380. vha->flags.online = 1;
  3381. ha->isp_ops->enable_intrs(ha);
  3382. ha->isp_abort_cnt = 0;
  3383. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3384. if (IS_QLA81XX(ha))
  3385. qla2x00_get_fw_version(vha,
  3386. &ha->fw_major_version,
  3387. &ha->fw_minor_version,
  3388. &ha->fw_subminor_version,
  3389. &ha->fw_attributes, &ha->fw_memory_size,
  3390. ha->mpi_version, &ha->mpi_capabilities,
  3391. ha->phy_version);
  3392. if (ha->fce) {
  3393. ha->flags.fce_enabled = 1;
  3394. memset(ha->fce, 0,
  3395. fce_calc_size(ha->fce_bufs));
  3396. rval = qla2x00_enable_fce_trace(vha,
  3397. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  3398. &ha->fce_bufs);
  3399. if (rval) {
  3400. qla_printk(KERN_WARNING, ha,
  3401. "Unable to reinitialize FCE "
  3402. "(%d).\n", rval);
  3403. ha->flags.fce_enabled = 0;
  3404. }
  3405. }
  3406. if (ha->eft) {
  3407. memset(ha->eft, 0, EFT_SIZE);
  3408. rval = qla2x00_enable_eft_trace(vha,
  3409. ha->eft_dma, EFT_NUM_BUFFERS);
  3410. if (rval) {
  3411. qla_printk(KERN_WARNING, ha,
  3412. "Unable to reinitialize EFT "
  3413. "(%d).\n", rval);
  3414. }
  3415. }
  3416. } else { /* failed the ISP abort */
  3417. vha->flags.online = 1;
  3418. if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  3419. if (ha->isp_abort_cnt == 0) {
  3420. qla_printk(KERN_WARNING, ha,
  3421. "ISP error recovery failed - "
  3422. "board disabled\n");
  3423. /*
  3424. * The next call disables the board
  3425. * completely.
  3426. */
  3427. ha->isp_ops->reset_adapter(vha);
  3428. vha->flags.online = 0;
  3429. clear_bit(ISP_ABORT_RETRY,
  3430. &vha->dpc_flags);
  3431. status = 0;
  3432. } else { /* schedule another ISP abort */
  3433. ha->isp_abort_cnt--;
  3434. DEBUG(printk("qla%ld: ISP abort - "
  3435. "retry remaining %d\n",
  3436. vha->host_no, ha->isp_abort_cnt));
  3437. status = 1;
  3438. }
  3439. } else {
  3440. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  3441. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  3442. "- retrying (%d) more times\n",
  3443. vha->host_no, ha->isp_abort_cnt));
  3444. set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3445. status = 1;
  3446. }
  3447. }
  3448. }
  3449. if (!status) {
  3450. DEBUG(printk(KERN_INFO
  3451. "qla2x00_abort_isp(%ld): succeeded.\n",
  3452. vha->host_no));
  3453. spin_lock_irqsave(&ha->vport_slock, flags);
  3454. list_for_each_entry(vp, &ha->vp_list, list) {
  3455. if (vp->vp_idx) {
  3456. atomic_inc(&vp->vref_count);
  3457. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3458. qla2x00_vp_abort_isp(vp);
  3459. spin_lock_irqsave(&ha->vport_slock, flags);
  3460. atomic_dec(&vp->vref_count);
  3461. }
  3462. }
  3463. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3464. } else {
  3465. qla_printk(KERN_INFO, ha,
  3466. "qla2x00_abort_isp: **** FAILED ****\n");
  3467. }
  3468. return(status);
  3469. }
  3470. /*
  3471. * qla2x00_restart_isp
  3472. * restarts the ISP after a reset
  3473. *
  3474. * Input:
  3475. * ha = adapter block pointer.
  3476. *
  3477. * Returns:
  3478. * 0 = success
  3479. */
  3480. static int
  3481. qla2x00_restart_isp(scsi_qla_host_t *vha)
  3482. {
  3483. int status = 0;
  3484. uint32_t wait_time;
  3485. struct qla_hw_data *ha = vha->hw;
  3486. struct req_que *req = ha->req_q_map[0];
  3487. struct rsp_que *rsp = ha->rsp_q_map[0];
  3488. /* If firmware needs to be loaded */
  3489. if (qla2x00_isp_firmware(vha)) {
  3490. vha->flags.online = 0;
  3491. status = ha->isp_ops->chip_diag(vha);
  3492. if (!status)
  3493. status = qla2x00_setup_chip(vha);
  3494. }
  3495. if (!status && !(status = qla2x00_init_rings(vha))) {
  3496. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3497. ha->flags.chip_reset_done = 1;
  3498. /* Initialize the queues in use */
  3499. qla25xx_init_queues(ha);
  3500. status = qla2x00_fw_ready(vha);
  3501. if (!status) {
  3502. DEBUG(printk("%s(): Start configure loop, "
  3503. "status = %d\n", __func__, status));
  3504. /* Issue a marker after FW becomes ready. */
  3505. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3506. vha->flags.online = 1;
  3507. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3508. wait_time = 256;
  3509. do {
  3510. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3511. qla2x00_configure_loop(vha);
  3512. wait_time--;
  3513. } while (!atomic_read(&vha->loop_down_timer) &&
  3514. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3515. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3516. &vha->dpc_flags)));
  3517. }
  3518. /* if no cable then assume it's good */
  3519. if ((vha->device_flags & DFLG_NO_CABLE))
  3520. status = 0;
  3521. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  3522. __func__,
  3523. status));
  3524. }
  3525. return (status);
  3526. }
  3527. static int
  3528. qla25xx_init_queues(struct qla_hw_data *ha)
  3529. {
  3530. struct rsp_que *rsp = NULL;
  3531. struct req_que *req = NULL;
  3532. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3533. int ret = -1;
  3534. int i;
  3535. for (i = 1; i < ha->max_rsp_queues; i++) {
  3536. rsp = ha->rsp_q_map[i];
  3537. if (rsp) {
  3538. rsp->options &= ~BIT_0;
  3539. ret = qla25xx_init_rsp_que(base_vha, rsp);
  3540. if (ret != QLA_SUCCESS)
  3541. DEBUG2_17(printk(KERN_WARNING
  3542. "%s Rsp que:%d init failed\n", __func__,
  3543. rsp->id));
  3544. else
  3545. DEBUG2_17(printk(KERN_INFO
  3546. "%s Rsp que:%d inited\n", __func__,
  3547. rsp->id));
  3548. }
  3549. }
  3550. for (i = 1; i < ha->max_req_queues; i++) {
  3551. req = ha->req_q_map[i];
  3552. if (req) {
  3553. /* Clear outstanding commands array. */
  3554. req->options &= ~BIT_0;
  3555. ret = qla25xx_init_req_que(base_vha, req);
  3556. if (ret != QLA_SUCCESS)
  3557. DEBUG2_17(printk(KERN_WARNING
  3558. "%s Req que:%d init failed\n", __func__,
  3559. req->id));
  3560. else
  3561. DEBUG2_17(printk(KERN_WARNING
  3562. "%s Req que:%d inited\n", __func__,
  3563. req->id));
  3564. }
  3565. }
  3566. return ret;
  3567. }
  3568. /*
  3569. * qla2x00_reset_adapter
  3570. * Reset adapter.
  3571. *
  3572. * Input:
  3573. * ha = adapter block pointer.
  3574. */
  3575. void
  3576. qla2x00_reset_adapter(scsi_qla_host_t *vha)
  3577. {
  3578. unsigned long flags = 0;
  3579. struct qla_hw_data *ha = vha->hw;
  3580. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3581. vha->flags.online = 0;
  3582. ha->isp_ops->disable_intrs(ha);
  3583. spin_lock_irqsave(&ha->hardware_lock, flags);
  3584. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  3585. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3586. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  3587. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3588. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3589. }
  3590. void
  3591. qla24xx_reset_adapter(scsi_qla_host_t *vha)
  3592. {
  3593. unsigned long flags = 0;
  3594. struct qla_hw_data *ha = vha->hw;
  3595. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  3596. if (IS_QLA82XX(ha))
  3597. return;
  3598. vha->flags.online = 0;
  3599. ha->isp_ops->disable_intrs(ha);
  3600. spin_lock_irqsave(&ha->hardware_lock, flags);
  3601. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  3602. RD_REG_DWORD(&reg->hccr);
  3603. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  3604. RD_REG_DWORD(&reg->hccr);
  3605. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3606. if (IS_NOPOLLING_TYPE(ha))
  3607. ha->isp_ops->enable_intrs(ha);
  3608. }
  3609. /* On sparc systems, obtain port and node WWN from firmware
  3610. * properties.
  3611. */
  3612. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
  3613. struct nvram_24xx *nv)
  3614. {
  3615. #ifdef CONFIG_SPARC
  3616. struct qla_hw_data *ha = vha->hw;
  3617. struct pci_dev *pdev = ha->pdev;
  3618. struct device_node *dp = pci_device_to_OF_node(pdev);
  3619. const u8 *val;
  3620. int len;
  3621. val = of_get_property(dp, "port-wwn", &len);
  3622. if (val && len >= WWN_SIZE)
  3623. memcpy(nv->port_name, val, WWN_SIZE);
  3624. val = of_get_property(dp, "node-wwn", &len);
  3625. if (val && len >= WWN_SIZE)
  3626. memcpy(nv->node_name, val, WWN_SIZE);
  3627. #endif
  3628. }
  3629. int
  3630. qla24xx_nvram_config(scsi_qla_host_t *vha)
  3631. {
  3632. int rval;
  3633. struct init_cb_24xx *icb;
  3634. struct nvram_24xx *nv;
  3635. uint32_t *dptr;
  3636. uint8_t *dptr1, *dptr2;
  3637. uint32_t chksum;
  3638. uint16_t cnt;
  3639. struct qla_hw_data *ha = vha->hw;
  3640. rval = QLA_SUCCESS;
  3641. icb = (struct init_cb_24xx *)ha->init_cb;
  3642. nv = ha->nvram;
  3643. /* Determine NVRAM starting address. */
  3644. if (ha->flags.port0) {
  3645. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3646. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3647. } else {
  3648. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3649. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3650. }
  3651. ha->nvram_size = sizeof(struct nvram_24xx);
  3652. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3653. if (IS_QLA82XX(ha))
  3654. ha->vpd_size = FA_VPD_SIZE_82XX;
  3655. /* Get VPD data into cache */
  3656. ha->vpd = ha->nvram + VPD_OFFSET;
  3657. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3658. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3659. /* Get NVRAM data into cache and calculate checksum. */
  3660. dptr = (uint32_t *)nv;
  3661. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3662. ha->nvram_size);
  3663. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3664. chksum += le32_to_cpu(*dptr++);
  3665. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  3666. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3667. /* Bad NVRAM data, set defaults parameters. */
  3668. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3669. || nv->id[3] != ' ' ||
  3670. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3671. /* Reset NVRAM data. */
  3672. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3673. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3674. le16_to_cpu(nv->nvram_version));
  3675. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3676. "invalid -- WWPN) defaults.\n");
  3677. /*
  3678. * Set default initialization control block.
  3679. */
  3680. memset(nv, 0, ha->nvram_size);
  3681. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3682. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3683. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3684. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3685. nv->exchange_count = __constant_cpu_to_le16(0);
  3686. nv->hard_address = __constant_cpu_to_le16(124);
  3687. nv->port_name[0] = 0x21;
  3688. nv->port_name[1] = 0x00 + ha->port_no;
  3689. nv->port_name[2] = 0x00;
  3690. nv->port_name[3] = 0xe0;
  3691. nv->port_name[4] = 0x8b;
  3692. nv->port_name[5] = 0x1c;
  3693. nv->port_name[6] = 0x55;
  3694. nv->port_name[7] = 0x86;
  3695. nv->node_name[0] = 0x20;
  3696. nv->node_name[1] = 0x00;
  3697. nv->node_name[2] = 0x00;
  3698. nv->node_name[3] = 0xe0;
  3699. nv->node_name[4] = 0x8b;
  3700. nv->node_name[5] = 0x1c;
  3701. nv->node_name[6] = 0x55;
  3702. nv->node_name[7] = 0x86;
  3703. qla24xx_nvram_wwn_from_ofw(vha, nv);
  3704. nv->login_retry_count = __constant_cpu_to_le16(8);
  3705. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3706. nv->login_timeout = __constant_cpu_to_le16(0);
  3707. nv->firmware_options_1 =
  3708. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3709. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3710. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3711. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3712. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3713. nv->efi_parameters = __constant_cpu_to_le32(0);
  3714. nv->reset_delay = 5;
  3715. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3716. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3717. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3718. rval = 1;
  3719. }
  3720. /* Reset Initialization control block */
  3721. memset(icb, 0, ha->init_cb_size);
  3722. /* Copy 1st segment. */
  3723. dptr1 = (uint8_t *)icb;
  3724. dptr2 = (uint8_t *)&nv->version;
  3725. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3726. while (cnt--)
  3727. *dptr1++ = *dptr2++;
  3728. icb->login_retry_count = nv->login_retry_count;
  3729. icb->link_down_on_nos = nv->link_down_on_nos;
  3730. /* Copy 2nd segment. */
  3731. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3732. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3733. cnt = (uint8_t *)&icb->reserved_3 -
  3734. (uint8_t *)&icb->interrupt_delay_timer;
  3735. while (cnt--)
  3736. *dptr1++ = *dptr2++;
  3737. /*
  3738. * Setup driver NVRAM options.
  3739. */
  3740. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3741. "QLA2462");
  3742. /* Use alternate WWN? */
  3743. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3744. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3745. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3746. }
  3747. /* Prepare nodename */
  3748. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3749. /*
  3750. * Firmware will apply the following mask if the nodename was
  3751. * not provided.
  3752. */
  3753. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3754. icb->node_name[0] &= 0xF0;
  3755. }
  3756. /* Set host adapter parameters. */
  3757. ha->flags.disable_risc_code_load = 0;
  3758. ha->flags.enable_lip_reset = 0;
  3759. ha->flags.enable_lip_full_login =
  3760. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3761. ha->flags.enable_target_reset =
  3762. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3763. ha->flags.enable_led_scheme = 0;
  3764. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3765. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3766. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3767. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3768. sizeof(ha->fw_seriallink_options24));
  3769. /* save HBA serial number */
  3770. ha->serial0 = icb->port_name[5];
  3771. ha->serial1 = icb->port_name[6];
  3772. ha->serial2 = icb->port_name[7];
  3773. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3774. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3775. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3776. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3777. /* Set minimum login_timeout to 4 seconds. */
  3778. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3779. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3780. if (le16_to_cpu(nv->login_timeout) < 4)
  3781. nv->login_timeout = __constant_cpu_to_le16(4);
  3782. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3783. icb->login_timeout = nv->login_timeout;
  3784. /* Set minimum RATOV to 100 tenths of a second. */
  3785. ha->r_a_tov = 100;
  3786. ha->loop_reset_delay = nv->reset_delay;
  3787. /* Link Down Timeout = 0:
  3788. *
  3789. * When Port Down timer expires we will start returning
  3790. * I/O's to OS with "DID_NO_CONNECT".
  3791. *
  3792. * Link Down Timeout != 0:
  3793. *
  3794. * The driver waits for the link to come up after link down
  3795. * before returning I/Os to OS with "DID_NO_CONNECT".
  3796. */
  3797. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3798. ha->loop_down_abort_time =
  3799. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3800. } else {
  3801. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3802. ha->loop_down_abort_time =
  3803. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3804. }
  3805. /* Need enough time to try and get the port back. */
  3806. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3807. if (qlport_down_retry)
  3808. ha->port_down_retry_count = qlport_down_retry;
  3809. /* Set login_retry_count */
  3810. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3811. if (ha->port_down_retry_count ==
  3812. le16_to_cpu(nv->port_down_retry_count) &&
  3813. ha->port_down_retry_count > 3)
  3814. ha->login_retry_count = ha->port_down_retry_count;
  3815. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3816. ha->login_retry_count = ha->port_down_retry_count;
  3817. if (ql2xloginretrycount)
  3818. ha->login_retry_count = ql2xloginretrycount;
  3819. /* Enable ZIO. */
  3820. if (!vha->flags.init_done) {
  3821. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3822. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3823. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3824. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3825. }
  3826. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3827. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3828. vha->flags.process_response_queue = 0;
  3829. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3830. ha->zio_mode = QLA_ZIO_MODE_6;
  3831. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3832. "(%d us).\n", vha->host_no, ha->zio_mode,
  3833. ha->zio_timer * 100));
  3834. qla_printk(KERN_INFO, ha,
  3835. "ZIO mode %d enabled; timer delay (%d us).\n",
  3836. ha->zio_mode, ha->zio_timer * 100);
  3837. icb->firmware_options_2 |= cpu_to_le32(
  3838. (uint32_t)ha->zio_mode);
  3839. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3840. vha->flags.process_response_queue = 1;
  3841. }
  3842. if (rval) {
  3843. DEBUG2_3(printk(KERN_WARNING
  3844. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3845. }
  3846. return (rval);
  3847. }
  3848. static int
  3849. qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
  3850. uint32_t faddr)
  3851. {
  3852. int rval = QLA_SUCCESS;
  3853. int segments, fragment;
  3854. uint32_t *dcode, dlen;
  3855. uint32_t risc_addr;
  3856. uint32_t risc_size;
  3857. uint32_t i;
  3858. struct qla_hw_data *ha = vha->hw;
  3859. struct req_que *req = ha->req_q_map[0];
  3860. qla_printk(KERN_INFO, ha,
  3861. "FW: Loading from flash (%x)...\n", faddr);
  3862. rval = QLA_SUCCESS;
  3863. segments = FA_RISC_CODE_SEGMENTS;
  3864. dcode = (uint32_t *)req->ring;
  3865. *srisc_addr = 0;
  3866. /* Validate firmware image by checking version. */
  3867. qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
  3868. for (i = 0; i < 4; i++)
  3869. dcode[i] = be32_to_cpu(dcode[i]);
  3870. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3871. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3872. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3873. dcode[3] == 0)) {
  3874. qla_printk(KERN_WARNING, ha,
  3875. "Unable to verify integrity of flash firmware image!\n");
  3876. qla_printk(KERN_WARNING, ha,
  3877. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3878. dcode[1], dcode[2], dcode[3]);
  3879. return QLA_FUNCTION_FAILED;
  3880. }
  3881. while (segments && rval == QLA_SUCCESS) {
  3882. /* Read segment's load information. */
  3883. qla24xx_read_flash_data(vha, dcode, faddr, 4);
  3884. risc_addr = be32_to_cpu(dcode[2]);
  3885. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3886. risc_size = be32_to_cpu(dcode[3]);
  3887. fragment = 0;
  3888. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3889. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3890. if (dlen > risc_size)
  3891. dlen = risc_size;
  3892. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3893. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3894. vha->host_no, risc_addr, dlen, faddr));
  3895. qla24xx_read_flash_data(vha, dcode, faddr, dlen);
  3896. for (i = 0; i < dlen; i++)
  3897. dcode[i] = swab32(dcode[i]);
  3898. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3899. dlen);
  3900. if (rval) {
  3901. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3902. "segment %d of firmware\n", vha->host_no,
  3903. fragment));
  3904. qla_printk(KERN_WARNING, ha,
  3905. "[ERROR] Failed to load segment %d of "
  3906. "firmware\n", fragment);
  3907. break;
  3908. }
  3909. faddr += dlen;
  3910. risc_addr += dlen;
  3911. risc_size -= dlen;
  3912. fragment++;
  3913. }
  3914. /* Next segment. */
  3915. segments--;
  3916. }
  3917. return rval;
  3918. }
  3919. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3920. int
  3921. qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3922. {
  3923. int rval;
  3924. int i, fragment;
  3925. uint16_t *wcode, *fwcode;
  3926. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3927. struct fw_blob *blob;
  3928. struct qla_hw_data *ha = vha->hw;
  3929. struct req_que *req = ha->req_q_map[0];
  3930. /* Load firmware blob. */
  3931. blob = qla2x00_request_firmware(vha);
  3932. if (!blob) {
  3933. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3934. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3935. "from: " QLA_FW_URL ".\n");
  3936. return QLA_FUNCTION_FAILED;
  3937. }
  3938. rval = QLA_SUCCESS;
  3939. wcode = (uint16_t *)req->ring;
  3940. *srisc_addr = 0;
  3941. fwcode = (uint16_t *)blob->fw->data;
  3942. fwclen = 0;
  3943. /* Validate firmware image by checking version. */
  3944. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3945. qla_printk(KERN_WARNING, ha,
  3946. "Unable to verify integrity of firmware image (%Zd)!\n",
  3947. blob->fw->size);
  3948. goto fail_fw_integrity;
  3949. }
  3950. for (i = 0; i < 4; i++)
  3951. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3952. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3953. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3954. wcode[2] == 0 && wcode[3] == 0)) {
  3955. qla_printk(KERN_WARNING, ha,
  3956. "Unable to verify integrity of firmware image!\n");
  3957. qla_printk(KERN_WARNING, ha,
  3958. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3959. wcode[1], wcode[2], wcode[3]);
  3960. goto fail_fw_integrity;
  3961. }
  3962. seg = blob->segs;
  3963. while (*seg && rval == QLA_SUCCESS) {
  3964. risc_addr = *seg;
  3965. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3966. risc_size = be16_to_cpu(fwcode[3]);
  3967. /* Validate firmware image size. */
  3968. fwclen += risc_size * sizeof(uint16_t);
  3969. if (blob->fw->size < fwclen) {
  3970. qla_printk(KERN_WARNING, ha,
  3971. "Unable to verify integrity of firmware image "
  3972. "(%Zd)!\n", blob->fw->size);
  3973. goto fail_fw_integrity;
  3974. }
  3975. fragment = 0;
  3976. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3977. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3978. if (wlen > risc_size)
  3979. wlen = risc_size;
  3980. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3981. "addr %x, number of words 0x%x.\n", vha->host_no,
  3982. risc_addr, wlen));
  3983. for (i = 0; i < wlen; i++)
  3984. wcode[i] = swab16(fwcode[i]);
  3985. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3986. wlen);
  3987. if (rval) {
  3988. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3989. "segment %d of firmware\n", vha->host_no,
  3990. fragment));
  3991. qla_printk(KERN_WARNING, ha,
  3992. "[ERROR] Failed to load segment %d of "
  3993. "firmware\n", fragment);
  3994. break;
  3995. }
  3996. fwcode += wlen;
  3997. risc_addr += wlen;
  3998. risc_size -= wlen;
  3999. fragment++;
  4000. }
  4001. /* Next segment. */
  4002. seg++;
  4003. }
  4004. return rval;
  4005. fail_fw_integrity:
  4006. return QLA_FUNCTION_FAILED;
  4007. }
  4008. static int
  4009. qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4010. {
  4011. int rval;
  4012. int segments, fragment;
  4013. uint32_t *dcode, dlen;
  4014. uint32_t risc_addr;
  4015. uint32_t risc_size;
  4016. uint32_t i;
  4017. struct fw_blob *blob;
  4018. uint32_t *fwcode, fwclen;
  4019. struct qla_hw_data *ha = vha->hw;
  4020. struct req_que *req = ha->req_q_map[0];
  4021. /* Load firmware blob. */
  4022. blob = qla2x00_request_firmware(vha);
  4023. if (!blob) {
  4024. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  4025. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  4026. "from: " QLA_FW_URL ".\n");
  4027. return QLA_FUNCTION_FAILED;
  4028. }
  4029. qla_printk(KERN_INFO, ha,
  4030. "FW: Loading via request-firmware...\n");
  4031. rval = QLA_SUCCESS;
  4032. segments = FA_RISC_CODE_SEGMENTS;
  4033. dcode = (uint32_t *)req->ring;
  4034. *srisc_addr = 0;
  4035. fwcode = (uint32_t *)blob->fw->data;
  4036. fwclen = 0;
  4037. /* Validate firmware image by checking version. */
  4038. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  4039. qla_printk(KERN_WARNING, ha,
  4040. "Unable to verify integrity of firmware image (%Zd)!\n",
  4041. blob->fw->size);
  4042. goto fail_fw_integrity;
  4043. }
  4044. for (i = 0; i < 4; i++)
  4045. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  4046. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  4047. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  4048. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  4049. dcode[3] == 0)) {
  4050. qla_printk(KERN_WARNING, ha,
  4051. "Unable to verify integrity of firmware image!\n");
  4052. qla_printk(KERN_WARNING, ha,
  4053. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  4054. dcode[1], dcode[2], dcode[3]);
  4055. goto fail_fw_integrity;
  4056. }
  4057. while (segments && rval == QLA_SUCCESS) {
  4058. risc_addr = be32_to_cpu(fwcode[2]);
  4059. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  4060. risc_size = be32_to_cpu(fwcode[3]);
  4061. /* Validate firmware image size. */
  4062. fwclen += risc_size * sizeof(uint32_t);
  4063. if (blob->fw->size < fwclen) {
  4064. qla_printk(KERN_WARNING, ha,
  4065. "Unable to verify integrity of firmware image "
  4066. "(%Zd)!\n", blob->fw->size);
  4067. goto fail_fw_integrity;
  4068. }
  4069. fragment = 0;
  4070. while (risc_size > 0 && rval == QLA_SUCCESS) {
  4071. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  4072. if (dlen > risc_size)
  4073. dlen = risc_size;
  4074. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  4075. "addr %x, number of dwords 0x%x.\n", vha->host_no,
  4076. risc_addr, dlen));
  4077. for (i = 0; i < dlen; i++)
  4078. dcode[i] = swab32(fwcode[i]);
  4079. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  4080. dlen);
  4081. if (rval) {
  4082. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  4083. "segment %d of firmware\n", vha->host_no,
  4084. fragment));
  4085. qla_printk(KERN_WARNING, ha,
  4086. "[ERROR] Failed to load segment %d of "
  4087. "firmware\n", fragment);
  4088. break;
  4089. }
  4090. fwcode += dlen;
  4091. risc_addr += dlen;
  4092. risc_size -= dlen;
  4093. fragment++;
  4094. }
  4095. /* Next segment. */
  4096. segments--;
  4097. }
  4098. return rval;
  4099. fail_fw_integrity:
  4100. return QLA_FUNCTION_FAILED;
  4101. }
  4102. int
  4103. qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4104. {
  4105. int rval;
  4106. if (ql2xfwloadbin == 1)
  4107. return qla81xx_load_risc(vha, srisc_addr);
  4108. /*
  4109. * FW Load priority:
  4110. * 1) Firmware via request-firmware interface (.bin file).
  4111. * 2) Firmware residing in flash.
  4112. */
  4113. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  4114. if (rval == QLA_SUCCESS)
  4115. return rval;
  4116. return qla24xx_load_risc_flash(vha, srisc_addr,
  4117. vha->hw->flt_region_fw);
  4118. }
  4119. int
  4120. qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4121. {
  4122. int rval;
  4123. struct qla_hw_data *ha = vha->hw;
  4124. if (ql2xfwloadbin == 2)
  4125. goto try_blob_fw;
  4126. /*
  4127. * FW Load priority:
  4128. * 1) Firmware residing in flash.
  4129. * 2) Firmware via request-firmware interface (.bin file).
  4130. * 3) Golden-Firmware residing in flash -- limited operation.
  4131. */
  4132. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
  4133. if (rval == QLA_SUCCESS)
  4134. return rval;
  4135. try_blob_fw:
  4136. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  4137. if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
  4138. return rval;
  4139. qla_printk(KERN_ERR, ha,
  4140. "FW: Attempting to fallback to golden firmware...\n");
  4141. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
  4142. if (rval != QLA_SUCCESS)
  4143. return rval;
  4144. qla_printk(KERN_ERR, ha,
  4145. "FW: Please update operational firmware...\n");
  4146. ha->flags.running_gold_fw = 1;
  4147. return rval;
  4148. }
  4149. void
  4150. qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
  4151. {
  4152. int ret, retries;
  4153. struct qla_hw_data *ha = vha->hw;
  4154. if (ha->flags.pci_channel_io_perm_failure)
  4155. return;
  4156. if (!IS_FWI2_CAPABLE(ha))
  4157. return;
  4158. if (!ha->fw_major_version)
  4159. return;
  4160. ret = qla2x00_stop_firmware(vha);
  4161. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  4162. ret != QLA_INVALID_COMMAND && retries ; retries--) {
  4163. ha->isp_ops->reset_chip(vha);
  4164. if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
  4165. continue;
  4166. if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
  4167. continue;
  4168. qla_printk(KERN_INFO, ha,
  4169. "Attempting retry of stop-firmware command...\n");
  4170. ret = qla2x00_stop_firmware(vha);
  4171. }
  4172. }
  4173. int
  4174. qla24xx_configure_vhba(scsi_qla_host_t *vha)
  4175. {
  4176. int rval = QLA_SUCCESS;
  4177. uint16_t mb[MAILBOX_REGISTER_COUNT];
  4178. struct qla_hw_data *ha = vha->hw;
  4179. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  4180. struct req_que *req;
  4181. struct rsp_que *rsp;
  4182. if (!vha->vp_idx)
  4183. return -EINVAL;
  4184. rval = qla2x00_fw_ready(base_vha);
  4185. if (ha->flags.cpu_affinity_enabled)
  4186. req = ha->req_q_map[0];
  4187. else
  4188. req = vha->req;
  4189. rsp = req->rsp;
  4190. if (rval == QLA_SUCCESS) {
  4191. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4192. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  4193. }
  4194. vha->flags.management_server_logged_in = 0;
  4195. /* Login to SNS first */
  4196. ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
  4197. if (mb[0] != MBS_COMMAND_COMPLETE) {
  4198. DEBUG15(qla_printk(KERN_INFO, ha,
  4199. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  4200. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  4201. mb[0], mb[1], mb[2], mb[6], mb[7]));
  4202. return (QLA_FUNCTION_FAILED);
  4203. }
  4204. atomic_set(&vha->loop_down_timer, 0);
  4205. atomic_set(&vha->loop_state, LOOP_UP);
  4206. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  4207. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  4208. rval = qla2x00_loop_resync(base_vha);
  4209. return rval;
  4210. }
  4211. /* 84XX Support **************************************************************/
  4212. static LIST_HEAD(qla_cs84xx_list);
  4213. static DEFINE_MUTEX(qla_cs84xx_mutex);
  4214. static struct qla_chip_state_84xx *
  4215. qla84xx_get_chip(struct scsi_qla_host *vha)
  4216. {
  4217. struct qla_chip_state_84xx *cs84xx;
  4218. struct qla_hw_data *ha = vha->hw;
  4219. mutex_lock(&qla_cs84xx_mutex);
  4220. /* Find any shared 84xx chip. */
  4221. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  4222. if (cs84xx->bus == ha->pdev->bus) {
  4223. kref_get(&cs84xx->kref);
  4224. goto done;
  4225. }
  4226. }
  4227. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  4228. if (!cs84xx)
  4229. goto done;
  4230. kref_init(&cs84xx->kref);
  4231. spin_lock_init(&cs84xx->access_lock);
  4232. mutex_init(&cs84xx->fw_update_mutex);
  4233. cs84xx->bus = ha->pdev->bus;
  4234. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  4235. done:
  4236. mutex_unlock(&qla_cs84xx_mutex);
  4237. return cs84xx;
  4238. }
  4239. static void
  4240. __qla84xx_chip_release(struct kref *kref)
  4241. {
  4242. struct qla_chip_state_84xx *cs84xx =
  4243. container_of(kref, struct qla_chip_state_84xx, kref);
  4244. mutex_lock(&qla_cs84xx_mutex);
  4245. list_del(&cs84xx->list);
  4246. mutex_unlock(&qla_cs84xx_mutex);
  4247. kfree(cs84xx);
  4248. }
  4249. void
  4250. qla84xx_put_chip(struct scsi_qla_host *vha)
  4251. {
  4252. struct qla_hw_data *ha = vha->hw;
  4253. if (ha->cs84xx)
  4254. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  4255. }
  4256. static int
  4257. qla84xx_init_chip(scsi_qla_host_t *vha)
  4258. {
  4259. int rval;
  4260. uint16_t status[2];
  4261. struct qla_hw_data *ha = vha->hw;
  4262. mutex_lock(&ha->cs84xx->fw_update_mutex);
  4263. rval = qla84xx_verify_chip(vha, status);
  4264. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  4265. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  4266. QLA_SUCCESS;
  4267. }
  4268. /* 81XX Support **************************************************************/
  4269. int
  4270. qla81xx_nvram_config(scsi_qla_host_t *vha)
  4271. {
  4272. int rval;
  4273. struct init_cb_81xx *icb;
  4274. struct nvram_81xx *nv;
  4275. uint32_t *dptr;
  4276. uint8_t *dptr1, *dptr2;
  4277. uint32_t chksum;
  4278. uint16_t cnt;
  4279. struct qla_hw_data *ha = vha->hw;
  4280. rval = QLA_SUCCESS;
  4281. icb = (struct init_cb_81xx *)ha->init_cb;
  4282. nv = ha->nvram;
  4283. /* Determine NVRAM starting address. */
  4284. ha->nvram_size = sizeof(struct nvram_81xx);
  4285. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  4286. /* Get VPD data into cache */
  4287. ha->vpd = ha->nvram + VPD_OFFSET;
  4288. ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
  4289. ha->vpd_size);
  4290. /* Get NVRAM data into cache and calculate checksum. */
  4291. ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
  4292. ha->nvram_size);
  4293. dptr = (uint32_t *)nv;
  4294. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  4295. chksum += le32_to_cpu(*dptr++);
  4296. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  4297. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  4298. /* Bad NVRAM data, set defaults parameters. */
  4299. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  4300. || nv->id[3] != ' ' ||
  4301. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  4302. /* Reset NVRAM data. */
  4303. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  4304. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  4305. le16_to_cpu(nv->nvram_version));
  4306. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  4307. "invalid -- WWPN) defaults.\n");
  4308. /*
  4309. * Set default initialization control block.
  4310. */
  4311. memset(nv, 0, ha->nvram_size);
  4312. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  4313. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  4314. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  4315. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4316. nv->exchange_count = __constant_cpu_to_le16(0);
  4317. nv->port_name[0] = 0x21;
  4318. nv->port_name[1] = 0x00 + ha->port_no;
  4319. nv->port_name[2] = 0x00;
  4320. nv->port_name[3] = 0xe0;
  4321. nv->port_name[4] = 0x8b;
  4322. nv->port_name[5] = 0x1c;
  4323. nv->port_name[6] = 0x55;
  4324. nv->port_name[7] = 0x86;
  4325. nv->node_name[0] = 0x20;
  4326. nv->node_name[1] = 0x00;
  4327. nv->node_name[2] = 0x00;
  4328. nv->node_name[3] = 0xe0;
  4329. nv->node_name[4] = 0x8b;
  4330. nv->node_name[5] = 0x1c;
  4331. nv->node_name[6] = 0x55;
  4332. nv->node_name[7] = 0x86;
  4333. nv->login_retry_count = __constant_cpu_to_le16(8);
  4334. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  4335. nv->login_timeout = __constant_cpu_to_le16(0);
  4336. nv->firmware_options_1 =
  4337. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  4338. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  4339. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  4340. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  4341. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  4342. nv->efi_parameters = __constant_cpu_to_le32(0);
  4343. nv->reset_delay = 5;
  4344. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  4345. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  4346. nv->link_down_timeout = __constant_cpu_to_le16(30);
  4347. nv->enode_mac[0] = 0x00;
  4348. nv->enode_mac[1] = 0x02;
  4349. nv->enode_mac[2] = 0x03;
  4350. nv->enode_mac[3] = 0x04;
  4351. nv->enode_mac[4] = 0x05;
  4352. nv->enode_mac[5] = 0x06 + ha->port_no;
  4353. rval = 1;
  4354. }
  4355. /* Reset Initialization control block */
  4356. memset(icb, 0, sizeof(struct init_cb_81xx));
  4357. /* Copy 1st segment. */
  4358. dptr1 = (uint8_t *)icb;
  4359. dptr2 = (uint8_t *)&nv->version;
  4360. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  4361. while (cnt--)
  4362. *dptr1++ = *dptr2++;
  4363. icb->login_retry_count = nv->login_retry_count;
  4364. /* Copy 2nd segment. */
  4365. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  4366. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  4367. cnt = (uint8_t *)&icb->reserved_5 -
  4368. (uint8_t *)&icb->interrupt_delay_timer;
  4369. while (cnt--)
  4370. *dptr1++ = *dptr2++;
  4371. memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
  4372. /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
  4373. if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
  4374. icb->enode_mac[0] = 0x01;
  4375. icb->enode_mac[1] = 0x02;
  4376. icb->enode_mac[2] = 0x03;
  4377. icb->enode_mac[3] = 0x04;
  4378. icb->enode_mac[4] = 0x05;
  4379. icb->enode_mac[5] = 0x06 + ha->port_no;
  4380. }
  4381. /* Use extended-initialization control block. */
  4382. memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
  4383. /*
  4384. * Setup driver NVRAM options.
  4385. */
  4386. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  4387. "QLE8XXX");
  4388. /* Use alternate WWN? */
  4389. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  4390. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  4391. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  4392. }
  4393. /* Prepare nodename */
  4394. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  4395. /*
  4396. * Firmware will apply the following mask if the nodename was
  4397. * not provided.
  4398. */
  4399. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  4400. icb->node_name[0] &= 0xF0;
  4401. }
  4402. /* Set host adapter parameters. */
  4403. ha->flags.disable_risc_code_load = 0;
  4404. ha->flags.enable_lip_reset = 0;
  4405. ha->flags.enable_lip_full_login =
  4406. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  4407. ha->flags.enable_target_reset =
  4408. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  4409. ha->flags.enable_led_scheme = 0;
  4410. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  4411. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  4412. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  4413. /* save HBA serial number */
  4414. ha->serial0 = icb->port_name[5];
  4415. ha->serial1 = icb->port_name[6];
  4416. ha->serial2 = icb->port_name[7];
  4417. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  4418. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  4419. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4420. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  4421. /* Set minimum login_timeout to 4 seconds. */
  4422. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  4423. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  4424. if (le16_to_cpu(nv->login_timeout) < 4)
  4425. nv->login_timeout = __constant_cpu_to_le16(4);
  4426. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  4427. icb->login_timeout = nv->login_timeout;
  4428. /* Set minimum RATOV to 100 tenths of a second. */
  4429. ha->r_a_tov = 100;
  4430. ha->loop_reset_delay = nv->reset_delay;
  4431. /* Link Down Timeout = 0:
  4432. *
  4433. * When Port Down timer expires we will start returning
  4434. * I/O's to OS with "DID_NO_CONNECT".
  4435. *
  4436. * Link Down Timeout != 0:
  4437. *
  4438. * The driver waits for the link to come up after link down
  4439. * before returning I/Os to OS with "DID_NO_CONNECT".
  4440. */
  4441. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  4442. ha->loop_down_abort_time =
  4443. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  4444. } else {
  4445. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  4446. ha->loop_down_abort_time =
  4447. (LOOP_DOWN_TIME - ha->link_down_timeout);
  4448. }
  4449. /* Need enough time to try and get the port back. */
  4450. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  4451. if (qlport_down_retry)
  4452. ha->port_down_retry_count = qlport_down_retry;
  4453. /* Set login_retry_count */
  4454. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  4455. if (ha->port_down_retry_count ==
  4456. le16_to_cpu(nv->port_down_retry_count) &&
  4457. ha->port_down_retry_count > 3)
  4458. ha->login_retry_count = ha->port_down_retry_count;
  4459. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  4460. ha->login_retry_count = ha->port_down_retry_count;
  4461. if (ql2xloginretrycount)
  4462. ha->login_retry_count = ql2xloginretrycount;
  4463. /* Enable ZIO. */
  4464. if (!vha->flags.init_done) {
  4465. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  4466. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  4467. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  4468. le16_to_cpu(icb->interrupt_delay_timer): 2;
  4469. }
  4470. icb->firmware_options_2 &= __constant_cpu_to_le32(
  4471. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  4472. vha->flags.process_response_queue = 0;
  4473. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  4474. ha->zio_mode = QLA_ZIO_MODE_6;
  4475. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  4476. "(%d us).\n", vha->host_no, ha->zio_mode,
  4477. ha->zio_timer * 100));
  4478. qla_printk(KERN_INFO, ha,
  4479. "ZIO mode %d enabled; timer delay (%d us).\n",
  4480. ha->zio_mode, ha->zio_timer * 100);
  4481. icb->firmware_options_2 |= cpu_to_le32(
  4482. (uint32_t)ha->zio_mode);
  4483. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  4484. vha->flags.process_response_queue = 1;
  4485. }
  4486. if (rval) {
  4487. DEBUG2_3(printk(KERN_WARNING
  4488. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  4489. }
  4490. return (rval);
  4491. }
  4492. int
  4493. qla82xx_restart_isp(scsi_qla_host_t *vha)
  4494. {
  4495. int status, rval;
  4496. uint32_t wait_time;
  4497. struct qla_hw_data *ha = vha->hw;
  4498. struct req_que *req = ha->req_q_map[0];
  4499. struct rsp_que *rsp = ha->rsp_q_map[0];
  4500. struct scsi_qla_host *vp;
  4501. unsigned long flags;
  4502. status = qla2x00_init_rings(vha);
  4503. if (!status) {
  4504. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4505. ha->flags.chip_reset_done = 1;
  4506. status = qla2x00_fw_ready(vha);
  4507. if (!status) {
  4508. qla_printk(KERN_INFO, ha,
  4509. "%s(): Start configure loop, "
  4510. "status = %d\n", __func__, status);
  4511. /* Issue a marker after FW becomes ready. */
  4512. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  4513. vha->flags.online = 1;
  4514. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  4515. wait_time = 256;
  4516. do {
  4517. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  4518. qla2x00_configure_loop(vha);
  4519. wait_time--;
  4520. } while (!atomic_read(&vha->loop_down_timer) &&
  4521. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) &&
  4522. wait_time &&
  4523. (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)));
  4524. }
  4525. /* if no cable then assume it's good */
  4526. if ((vha->device_flags & DFLG_NO_CABLE))
  4527. status = 0;
  4528. qla_printk(KERN_INFO, ha,
  4529. "%s(): Configure loop done, status = 0x%x\n",
  4530. __func__, status);
  4531. }
  4532. if (!status) {
  4533. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4534. if (!atomic_read(&vha->loop_down_timer)) {
  4535. /*
  4536. * Issue marker command only when we are going
  4537. * to start the I/O .
  4538. */
  4539. vha->marker_needed = 1;
  4540. }
  4541. vha->flags.online = 1;
  4542. ha->isp_ops->enable_intrs(ha);
  4543. ha->isp_abort_cnt = 0;
  4544. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  4545. if (ha->fce) {
  4546. ha->flags.fce_enabled = 1;
  4547. memset(ha->fce, 0,
  4548. fce_calc_size(ha->fce_bufs));
  4549. rval = qla2x00_enable_fce_trace(vha,
  4550. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  4551. &ha->fce_bufs);
  4552. if (rval) {
  4553. qla_printk(KERN_WARNING, ha,
  4554. "Unable to reinitialize FCE "
  4555. "(%d).\n", rval);
  4556. ha->flags.fce_enabled = 0;
  4557. }
  4558. }
  4559. if (ha->eft) {
  4560. memset(ha->eft, 0, EFT_SIZE);
  4561. rval = qla2x00_enable_eft_trace(vha,
  4562. ha->eft_dma, EFT_NUM_BUFFERS);
  4563. if (rval) {
  4564. qla_printk(KERN_WARNING, ha,
  4565. "Unable to reinitialize EFT "
  4566. "(%d).\n", rval);
  4567. }
  4568. }
  4569. }
  4570. if (!status) {
  4571. DEBUG(printk(KERN_INFO
  4572. "qla82xx_restart_isp(%ld): succeeded.\n",
  4573. vha->host_no));
  4574. spin_lock_irqsave(&ha->vport_slock, flags);
  4575. list_for_each_entry(vp, &ha->vp_list, list) {
  4576. if (vp->vp_idx) {
  4577. atomic_inc(&vp->vref_count);
  4578. spin_unlock_irqrestore(&ha->vport_slock, flags);
  4579. qla2x00_vp_abort_isp(vp);
  4580. spin_lock_irqsave(&ha->vport_slock, flags);
  4581. atomic_dec(&vp->vref_count);
  4582. }
  4583. }
  4584. spin_unlock_irqrestore(&ha->vport_slock, flags);
  4585. } else {
  4586. qla_printk(KERN_INFO, ha,
  4587. "qla82xx_restart_isp: **** FAILED ****\n");
  4588. }
  4589. return status;
  4590. }
  4591. void
  4592. qla81xx_update_fw_options(scsi_qla_host_t *vha)
  4593. {
  4594. struct qla_hw_data *ha = vha->hw;
  4595. if (!ql2xetsenable)
  4596. return;
  4597. /* Enable ETS Burst. */
  4598. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  4599. ha->fw_options[2] |= BIT_9;
  4600. qla2x00_set_fw_options(vha, ha->fw_options);
  4601. }
  4602. /*
  4603. * qla24xx_get_fcp_prio
  4604. * Gets the fcp cmd priority value for the logged in port.
  4605. * Looks for a match of the port descriptors within
  4606. * each of the fcp prio config entries. If a match is found,
  4607. * the tag (priority) value is returned.
  4608. *
  4609. * Input:
  4610. * ha = adapter block po
  4611. * fcport = port structure pointer.
  4612. *
  4613. * Return:
  4614. * non-zero (if found)
  4615. * 0 (if not found)
  4616. *
  4617. * Context:
  4618. * Kernel context
  4619. */
  4620. uint8_t
  4621. qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
  4622. {
  4623. int i, entries;
  4624. uint8_t pid_match, wwn_match;
  4625. uint8_t priority;
  4626. uint32_t pid1, pid2;
  4627. uint64_t wwn1, wwn2;
  4628. struct qla_fcp_prio_entry *pri_entry;
  4629. struct qla_hw_data *ha = vha->hw;
  4630. if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
  4631. return 0;
  4632. priority = 0;
  4633. entries = ha->fcp_prio_cfg->num_entries;
  4634. pri_entry = &ha->fcp_prio_cfg->entry[0];
  4635. for (i = 0; i < entries; i++) {
  4636. pid_match = wwn_match = 0;
  4637. if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
  4638. pri_entry++;
  4639. continue;
  4640. }
  4641. /* check source pid for a match */
  4642. if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
  4643. pid1 = pri_entry->src_pid & INVALID_PORT_ID;
  4644. pid2 = vha->d_id.b24 & INVALID_PORT_ID;
  4645. if (pid1 == INVALID_PORT_ID)
  4646. pid_match++;
  4647. else if (pid1 == pid2)
  4648. pid_match++;
  4649. }
  4650. /* check destination pid for a match */
  4651. if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
  4652. pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
  4653. pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
  4654. if (pid1 == INVALID_PORT_ID)
  4655. pid_match++;
  4656. else if (pid1 == pid2)
  4657. pid_match++;
  4658. }
  4659. /* check source WWN for a match */
  4660. if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
  4661. wwn1 = wwn_to_u64(vha->port_name);
  4662. wwn2 = wwn_to_u64(pri_entry->src_wwpn);
  4663. if (wwn2 == (uint64_t)-1)
  4664. wwn_match++;
  4665. else if (wwn1 == wwn2)
  4666. wwn_match++;
  4667. }
  4668. /* check destination WWN for a match */
  4669. if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
  4670. wwn1 = wwn_to_u64(fcport->port_name);
  4671. wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
  4672. if (wwn2 == (uint64_t)-1)
  4673. wwn_match++;
  4674. else if (wwn1 == wwn2)
  4675. wwn_match++;
  4676. }
  4677. if (pid_match == 2 || wwn_match == 2) {
  4678. /* Found a matching entry */
  4679. if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
  4680. priority = pri_entry->tag;
  4681. break;
  4682. }
  4683. pri_entry++;
  4684. }
  4685. return priority;
  4686. }
  4687. /*
  4688. * qla24xx_update_fcport_fcp_prio
  4689. * Activates fcp priority for the logged in fc port
  4690. *
  4691. * Input:
  4692. * ha = adapter block pointer.
  4693. * fcp = port structure pointer.
  4694. *
  4695. * Return:
  4696. * QLA_SUCCESS or QLA_FUNCTION_FAILED
  4697. *
  4698. * Context:
  4699. * Kernel context.
  4700. */
  4701. int
  4702. qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *ha, fc_port_t *fcport)
  4703. {
  4704. int ret;
  4705. uint8_t priority;
  4706. uint16_t mb[5];
  4707. if (atomic_read(&fcport->state) == FCS_UNCONFIGURED ||
  4708. fcport->port_type != FCT_TARGET ||
  4709. fcport->loop_id == FC_NO_LOOP_ID)
  4710. return QLA_FUNCTION_FAILED;
  4711. priority = qla24xx_get_fcp_prio(ha, fcport);
  4712. ret = qla24xx_set_fcp_prio(ha, fcport->loop_id, priority, mb);
  4713. if (ret == QLA_SUCCESS)
  4714. fcport->fcp_prio = priority;
  4715. else
  4716. DEBUG2(printk(KERN_WARNING
  4717. "scsi(%ld): Unable to activate fcp priority, "
  4718. " ret=0x%x\n", ha->host_no, ret));
  4719. return ret;
  4720. }
  4721. /*
  4722. * qla24xx_update_all_fcp_prio
  4723. * Activates fcp priority for all the logged in ports
  4724. *
  4725. * Input:
  4726. * ha = adapter block pointer.
  4727. *
  4728. * Return:
  4729. * QLA_SUCCESS or QLA_FUNCTION_FAILED
  4730. *
  4731. * Context:
  4732. * Kernel context.
  4733. */
  4734. int
  4735. qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
  4736. {
  4737. int ret;
  4738. fc_port_t *fcport;
  4739. ret = QLA_FUNCTION_FAILED;
  4740. /* We need to set priority for all logged in ports */
  4741. list_for_each_entry(fcport, &vha->vp_fcports, list)
  4742. ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
  4743. return ret;
  4744. }