arcmsr_hba.c 100 KB

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  1. /*
  2. *******************************************************************************
  3. ** O.S : Linux
  4. ** FILE NAME : arcmsr_hba.c
  5. ** BY : Erich Chen
  6. ** Description: SCSI RAID Device Driver for
  7. ** ARECA RAID Host adapter
  8. *******************************************************************************
  9. ** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved
  10. **
  11. ** Web site: www.areca.com.tw
  12. ** E-mail: support@areca.com.tw
  13. **
  14. ** This program is free software; you can redistribute it and/or modify
  15. ** it under the terms of the GNU General Public License version 2 as
  16. ** published by the Free Software Foundation.
  17. ** This program is distributed in the hope that it will be useful,
  18. ** but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. ** GNU General Public License for more details.
  21. *******************************************************************************
  22. ** Redistribution and use in source and binary forms, with or without
  23. ** modification, are permitted provided that the following conditions
  24. ** are met:
  25. ** 1. Redistributions of source code must retain the above copyright
  26. ** notice, this list of conditions and the following disclaimer.
  27. ** 2. Redistributions in binary form must reproduce the above copyright
  28. ** notice, this list of conditions and the following disclaimer in the
  29. ** documentation and/or other materials provided with the distribution.
  30. ** 3. The name of the author may not be used to endorse or promote products
  31. ** derived from this software without specific prior written permission.
  32. **
  33. ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  34. ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  35. ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  36. ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  37. ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT
  38. ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  39. ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY
  40. ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  41. ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
  42. ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  43. *******************************************************************************
  44. ** For history of changes, see Documentation/scsi/ChangeLog.arcmsr
  45. ** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt
  46. *******************************************************************************
  47. */
  48. #include <linux/module.h>
  49. #include <linux/reboot.h>
  50. #include <linux/spinlock.h>
  51. #include <linux/pci_ids.h>
  52. #include <linux/interrupt.h>
  53. #include <linux/moduleparam.h>
  54. #include <linux/errno.h>
  55. #include <linux/types.h>
  56. #include <linux/delay.h>
  57. #include <linux/dma-mapping.h>
  58. #include <linux/timer.h>
  59. #include <linux/slab.h>
  60. #include <linux/pci.h>
  61. #include <linux/aer.h>
  62. #include <asm/dma.h>
  63. #include <asm/io.h>
  64. #include <asm/system.h>
  65. #include <asm/uaccess.h>
  66. #include <scsi/scsi_host.h>
  67. #include <scsi/scsi.h>
  68. #include <scsi/scsi_cmnd.h>
  69. #include <scsi/scsi_tcq.h>
  70. #include <scsi/scsi_device.h>
  71. #include <scsi/scsi_transport.h>
  72. #include <scsi/scsicam.h>
  73. #include "arcmsr.h"
  74. MODULE_AUTHOR("Nick Cheng <support@areca.com.tw>");
  75. MODULE_DESCRIPTION("ARECA (ARC11xx/12xx/16xx/1880) SATA/SAS RAID Host Bus Adapter");
  76. MODULE_LICENSE("Dual BSD/GPL");
  77. MODULE_VERSION(ARCMSR_DRIVER_VERSION);
  78. static int sleeptime = 10;
  79. static int retrycount = 30;
  80. wait_queue_head_t wait_q;
  81. static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
  82. struct scsi_cmnd *cmd);
  83. static int arcmsr_iop_confirm(struct AdapterControlBlock *acb);
  84. static int arcmsr_abort(struct scsi_cmnd *);
  85. static int arcmsr_bus_reset(struct scsi_cmnd *);
  86. static int arcmsr_bios_param(struct scsi_device *sdev,
  87. struct block_device *bdev, sector_t capacity, int *info);
  88. static int arcmsr_queue_command(struct scsi_cmnd *cmd,
  89. void (*done) (struct scsi_cmnd *));
  90. static int arcmsr_probe(struct pci_dev *pdev,
  91. const struct pci_device_id *id);
  92. static void arcmsr_remove(struct pci_dev *pdev);
  93. static void arcmsr_shutdown(struct pci_dev *pdev);
  94. static void arcmsr_iop_init(struct AdapterControlBlock *acb);
  95. static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb);
  96. static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb);
  97. static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb);
  98. static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb);
  99. static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb);
  100. static void arcmsr_request_device_map(unsigned long pacb);
  101. static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb);
  102. static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb);
  103. static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb);
  104. static void arcmsr_message_isr_bh_fn(struct work_struct *work);
  105. static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb);
  106. static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb);
  107. static void arcmsr_hbc_message_isr(struct AdapterControlBlock *pACB);
  108. static void arcmsr_hardware_reset(struct AdapterControlBlock *acb);
  109. static const char *arcmsr_info(struct Scsi_Host *);
  110. static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb);
  111. static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev,
  112. int queue_depth, int reason)
  113. {
  114. if (reason != SCSI_QDEPTH_DEFAULT)
  115. return -EOPNOTSUPP;
  116. if (queue_depth > ARCMSR_MAX_CMD_PERLUN)
  117. queue_depth = ARCMSR_MAX_CMD_PERLUN;
  118. scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, queue_depth);
  119. return queue_depth;
  120. }
  121. static struct scsi_host_template arcmsr_scsi_host_template = {
  122. .module = THIS_MODULE,
  123. .name = "ARCMSR ARECA SATA/SAS RAID Controller"
  124. ARCMSR_DRIVER_VERSION,
  125. .info = arcmsr_info,
  126. .queuecommand = arcmsr_queue_command,
  127. .eh_abort_handler = arcmsr_abort,
  128. .eh_bus_reset_handler = arcmsr_bus_reset,
  129. .bios_param = arcmsr_bios_param,
  130. .change_queue_depth = arcmsr_adjust_disk_queue_depth,
  131. .can_queue = ARCMSR_MAX_FREECCB_NUM,
  132. .this_id = ARCMSR_SCSI_INITIATOR_ID,
  133. .sg_tablesize = ARCMSR_DEFAULT_SG_ENTRIES,
  134. .max_sectors = ARCMSR_MAX_XFER_SECTORS_C,
  135. .cmd_per_lun = ARCMSR_MAX_CMD_PERLUN,
  136. .use_clustering = ENABLE_CLUSTERING,
  137. .shost_attrs = arcmsr_host_attrs,
  138. };
  139. static struct pci_device_id arcmsr_device_id_table[] = {
  140. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110)},
  141. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120)},
  142. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130)},
  143. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160)},
  144. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170)},
  145. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200)},
  146. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201)},
  147. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202)},
  148. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210)},
  149. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220)},
  150. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230)},
  151. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260)},
  152. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270)},
  153. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280)},
  154. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380)},
  155. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381)},
  156. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680)},
  157. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681)},
  158. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880)},
  159. {0, 0}, /* Terminating entry */
  160. };
  161. MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);
  162. static struct pci_driver arcmsr_pci_driver = {
  163. .name = "arcmsr",
  164. .id_table = arcmsr_device_id_table,
  165. .probe = arcmsr_probe,
  166. .remove = arcmsr_remove,
  167. .shutdown = arcmsr_shutdown,
  168. };
  169. /*
  170. ****************************************************************************
  171. ****************************************************************************
  172. */
  173. int arcmsr_sleep_for_bus_reset(struct scsi_cmnd *cmd)
  174. {
  175. struct Scsi_Host *shost = NULL;
  176. int i, isleep;
  177. shost = cmd->device->host;
  178. isleep = sleeptime / 10;
  179. if (isleep > 0) {
  180. for (i = 0; i < isleep; i++) {
  181. msleep(10000);
  182. }
  183. }
  184. isleep = sleeptime % 10;
  185. if (isleep > 0) {
  186. msleep(isleep*1000);
  187. }
  188. printk(KERN_NOTICE "wake-up\n");
  189. return 0;
  190. }
  191. static void arcmsr_free_hbb_mu(struct AdapterControlBlock *acb)
  192. {
  193. switch (acb->adapter_type) {
  194. case ACB_ADAPTER_TYPE_A:
  195. case ACB_ADAPTER_TYPE_C:
  196. break;
  197. case ACB_ADAPTER_TYPE_B:{
  198. dma_free_coherent(&acb->pdev->dev,
  199. sizeof(struct MessageUnit_B),
  200. acb->pmuB, acb->dma_coherent_handle_hbb_mu);
  201. }
  202. }
  203. }
  204. static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb)
  205. {
  206. struct pci_dev *pdev = acb->pdev;
  207. switch (acb->adapter_type){
  208. case ACB_ADAPTER_TYPE_A:{
  209. acb->pmuA = ioremap(pci_resource_start(pdev,0), pci_resource_len(pdev,0));
  210. if (!acb->pmuA) {
  211. printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
  212. return false;
  213. }
  214. break;
  215. }
  216. case ACB_ADAPTER_TYPE_B:{
  217. void __iomem *mem_base0, *mem_base1;
  218. mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
  219. if (!mem_base0) {
  220. printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
  221. return false;
  222. }
  223. mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
  224. if (!mem_base1) {
  225. iounmap(mem_base0);
  226. printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
  227. return false;
  228. }
  229. acb->mem_base0 = mem_base0;
  230. acb->mem_base1 = mem_base1;
  231. break;
  232. }
  233. case ACB_ADAPTER_TYPE_C:{
  234. acb->pmuC = ioremap_nocache(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1));
  235. if (!acb->pmuC) {
  236. printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
  237. return false;
  238. }
  239. if (readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
  240. writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &acb->pmuC->outbound_doorbell_clear);/*clear interrupt*/
  241. return true;
  242. }
  243. break;
  244. }
  245. }
  246. return true;
  247. }
  248. static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb)
  249. {
  250. switch (acb->adapter_type) {
  251. case ACB_ADAPTER_TYPE_A:{
  252. iounmap(acb->pmuA);
  253. }
  254. break;
  255. case ACB_ADAPTER_TYPE_B:{
  256. iounmap(acb->mem_base0);
  257. iounmap(acb->mem_base1);
  258. }
  259. break;
  260. case ACB_ADAPTER_TYPE_C:{
  261. iounmap(acb->pmuC);
  262. }
  263. }
  264. }
  265. static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id)
  266. {
  267. irqreturn_t handle_state;
  268. struct AdapterControlBlock *acb = dev_id;
  269. handle_state = arcmsr_interrupt(acb);
  270. return handle_state;
  271. }
  272. static int arcmsr_bios_param(struct scsi_device *sdev,
  273. struct block_device *bdev, sector_t capacity, int *geom)
  274. {
  275. int ret, heads, sectors, cylinders, total_capacity;
  276. unsigned char *buffer;/* return copy of block device's partition table */
  277. buffer = scsi_bios_ptable(bdev);
  278. if (buffer) {
  279. ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]);
  280. kfree(buffer);
  281. if (ret != -1)
  282. return ret;
  283. }
  284. total_capacity = capacity;
  285. heads = 64;
  286. sectors = 32;
  287. cylinders = total_capacity / (heads * sectors);
  288. if (cylinders > 1024) {
  289. heads = 255;
  290. sectors = 63;
  291. cylinders = total_capacity / (heads * sectors);
  292. }
  293. geom[0] = heads;
  294. geom[1] = sectors;
  295. geom[2] = cylinders;
  296. return 0;
  297. }
  298. static void arcmsr_define_adapter_type(struct AdapterControlBlock *acb)
  299. {
  300. struct pci_dev *pdev = acb->pdev;
  301. u16 dev_id;
  302. pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id);
  303. acb->dev_id = dev_id;
  304. switch (dev_id) {
  305. case 0x1880: {
  306. acb->adapter_type = ACB_ADAPTER_TYPE_C;
  307. }
  308. break;
  309. case 0x1201: {
  310. acb->adapter_type = ACB_ADAPTER_TYPE_B;
  311. }
  312. break;
  313. default: acb->adapter_type = ACB_ADAPTER_TYPE_A;
  314. }
  315. }
  316. static uint8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb)
  317. {
  318. struct MessageUnit_A __iomem *reg = acb->pmuA;
  319. uint32_t Index;
  320. uint8_t Retries = 0x00;
  321. do {
  322. for (Index = 0; Index < 100; Index++) {
  323. if (readl(&reg->outbound_intstatus) &
  324. ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
  325. writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT,
  326. &reg->outbound_intstatus);
  327. return true;
  328. }
  329. msleep(10);
  330. }/*max 1 seconds*/
  331. } while (Retries++ < 20);/*max 20 sec*/
  332. return false;
  333. }
  334. static uint8_t arcmsr_hbb_wait_msgint_ready(struct AdapterControlBlock *acb)
  335. {
  336. struct MessageUnit_B *reg = acb->pmuB;
  337. uint32_t Index;
  338. uint8_t Retries = 0x00;
  339. do {
  340. for (Index = 0; Index < 100; Index++) {
  341. if (readl(reg->iop2drv_doorbell)
  342. & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
  343. writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN
  344. , reg->iop2drv_doorbell);
  345. writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
  346. return true;
  347. }
  348. msleep(10);
  349. }/*max 1 seconds*/
  350. } while (Retries++ < 20);/*max 20 sec*/
  351. return false;
  352. }
  353. static uint8_t arcmsr_hbc_wait_msgint_ready(struct AdapterControlBlock *pACB)
  354. {
  355. struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC;
  356. unsigned char Retries = 0x00;
  357. uint32_t Index;
  358. do {
  359. for (Index = 0; Index < 100; Index++) {
  360. if (readl(&phbcmu->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
  361. writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &phbcmu->outbound_doorbell_clear);/*clear interrupt*/
  362. return true;
  363. }
  364. /* one us delay */
  365. msleep(10);
  366. } /*max 1 seconds*/
  367. } while (Retries++ < 20); /*max 20 sec*/
  368. return false;
  369. }
  370. static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb)
  371. {
  372. struct MessageUnit_A __iomem *reg = acb->pmuA;
  373. int retry_count = 30;
  374. writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
  375. do {
  376. if (arcmsr_hba_wait_msgint_ready(acb))
  377. break;
  378. else {
  379. retry_count--;
  380. printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
  381. timeout, retry count down = %d \n", acb->host->host_no, retry_count);
  382. }
  383. } while (retry_count != 0);
  384. }
  385. static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb)
  386. {
  387. struct MessageUnit_B *reg = acb->pmuB;
  388. int retry_count = 30;
  389. writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell);
  390. do {
  391. if (arcmsr_hbb_wait_msgint_ready(acb))
  392. break;
  393. else {
  394. retry_count--;
  395. printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
  396. timeout,retry count down = %d \n", acb->host->host_no, retry_count);
  397. }
  398. } while (retry_count != 0);
  399. }
  400. static void arcmsr_flush_hbc_cache(struct AdapterControlBlock *pACB)
  401. {
  402. struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
  403. int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */
  404. writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
  405. writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
  406. do {
  407. if (arcmsr_hbc_wait_msgint_ready(pACB)) {
  408. break;
  409. } else {
  410. retry_count--;
  411. printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
  412. timeout,retry count down = %d \n", pACB->host->host_no, retry_count);
  413. }
  414. } while (retry_count != 0);
  415. return;
  416. }
  417. static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
  418. {
  419. switch (acb->adapter_type) {
  420. case ACB_ADAPTER_TYPE_A: {
  421. arcmsr_flush_hba_cache(acb);
  422. }
  423. break;
  424. case ACB_ADAPTER_TYPE_B: {
  425. arcmsr_flush_hbb_cache(acb);
  426. }
  427. break;
  428. case ACB_ADAPTER_TYPE_C: {
  429. arcmsr_flush_hbc_cache(acb);
  430. }
  431. }
  432. }
  433. static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
  434. {
  435. struct pci_dev *pdev = acb->pdev;
  436. void *dma_coherent;
  437. dma_addr_t dma_coherent_handle;
  438. struct CommandControlBlock *ccb_tmp;
  439. int i = 0, j = 0;
  440. dma_addr_t cdb_phyaddr;
  441. unsigned long roundup_ccbsize = 0, offset;
  442. unsigned long max_xfer_len;
  443. unsigned long max_sg_entrys;
  444. uint32_t firm_config_version;
  445. for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
  446. for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
  447. acb->devstate[i][j] = ARECA_RAID_GONE;
  448. max_xfer_len = ARCMSR_MAX_XFER_LEN;
  449. max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES;
  450. firm_config_version = acb->firm_cfg_version;
  451. if((firm_config_version & 0xFF) >= 3){
  452. max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 4M byte */
  453. max_sg_entrys = (max_xfer_len/4096);
  454. }
  455. acb->host->max_sectors = max_xfer_len/512;
  456. acb->host->sg_tablesize = max_sg_entrys;
  457. roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32);
  458. acb->uncache_size = roundup_ccbsize * ARCMSR_MAX_FREECCB_NUM + 32;
  459. dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL);
  460. if(!dma_coherent){
  461. printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error \n", acb->host->host_no);
  462. return -ENOMEM;
  463. }
  464. acb->dma_coherent = dma_coherent;
  465. acb->dma_coherent_handle = dma_coherent_handle;
  466. memset(dma_coherent, 0, acb->uncache_size);
  467. offset = roundup((unsigned long)dma_coherent, 32) - (unsigned long)dma_coherent;
  468. dma_coherent_handle = dma_coherent_handle + offset;
  469. dma_coherent = (struct CommandControlBlock *)dma_coherent + offset;
  470. ccb_tmp = dma_coherent;
  471. acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle;
  472. for(i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++){
  473. cdb_phyaddr = dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb);
  474. ccb_tmp->cdb_phyaddr_pattern = ((acb->adapter_type == ACB_ADAPTER_TYPE_C) ? cdb_phyaddr : (cdb_phyaddr >> 5));
  475. acb->pccb_pool[i] = ccb_tmp;
  476. ccb_tmp->acb = acb;
  477. INIT_LIST_HEAD(&ccb_tmp->list);
  478. list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
  479. ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize);
  480. dma_coherent_handle = dma_coherent_handle + roundup_ccbsize;
  481. }
  482. return 0;
  483. }
  484. static void arcmsr_message_isr_bh_fn(struct work_struct *work)
  485. {
  486. struct AdapterControlBlock *acb = container_of(work,struct AdapterControlBlock, arcmsr_do_message_isr_bh);
  487. switch (acb->adapter_type) {
  488. case ACB_ADAPTER_TYPE_A: {
  489. struct MessageUnit_A __iomem *reg = acb->pmuA;
  490. char *acb_dev_map = (char *)acb->device_map;
  491. uint32_t __iomem *signature = (uint32_t __iomem*) (&reg->message_rwbuffer[0]);
  492. char __iomem *devicemap = (char __iomem*) (&reg->message_rwbuffer[21]);
  493. int target, lun;
  494. struct scsi_device *psdev;
  495. char diff;
  496. atomic_inc(&acb->rq_map_token);
  497. if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) {
  498. for(target = 0; target < ARCMSR_MAX_TARGETID -1; target++) {
  499. diff = (*acb_dev_map)^readb(devicemap);
  500. if (diff != 0) {
  501. char temp;
  502. *acb_dev_map = readb(devicemap);
  503. temp =*acb_dev_map;
  504. for(lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
  505. if((temp & 0x01)==1 && (diff & 0x01) == 1) {
  506. scsi_add_device(acb->host, 0, target, lun);
  507. }else if((temp & 0x01) == 0 && (diff & 0x01) == 1) {
  508. psdev = scsi_device_lookup(acb->host, 0, target, lun);
  509. if (psdev != NULL ) {
  510. scsi_remove_device(psdev);
  511. scsi_device_put(psdev);
  512. }
  513. }
  514. temp >>= 1;
  515. diff >>= 1;
  516. }
  517. }
  518. devicemap++;
  519. acb_dev_map++;
  520. }
  521. }
  522. break;
  523. }
  524. case ACB_ADAPTER_TYPE_B: {
  525. struct MessageUnit_B *reg = acb->pmuB;
  526. char *acb_dev_map = (char *)acb->device_map;
  527. uint32_t __iomem *signature = (uint32_t __iomem*)(&reg->message_rwbuffer[0]);
  528. char __iomem *devicemap = (char __iomem*)(&reg->message_rwbuffer[21]);
  529. int target, lun;
  530. struct scsi_device *psdev;
  531. char diff;
  532. atomic_inc(&acb->rq_map_token);
  533. if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) {
  534. for(target = 0; target < ARCMSR_MAX_TARGETID -1; target++) {
  535. diff = (*acb_dev_map)^readb(devicemap);
  536. if (diff != 0) {
  537. char temp;
  538. *acb_dev_map = readb(devicemap);
  539. temp =*acb_dev_map;
  540. for(lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
  541. if((temp & 0x01)==1 && (diff & 0x01) == 1) {
  542. scsi_add_device(acb->host, 0, target, lun);
  543. }else if((temp & 0x01) == 0 && (diff & 0x01) == 1) {
  544. psdev = scsi_device_lookup(acb->host, 0, target, lun);
  545. if (psdev != NULL ) {
  546. scsi_remove_device(psdev);
  547. scsi_device_put(psdev);
  548. }
  549. }
  550. temp >>= 1;
  551. diff >>= 1;
  552. }
  553. }
  554. devicemap++;
  555. acb_dev_map++;
  556. }
  557. }
  558. }
  559. break;
  560. case ACB_ADAPTER_TYPE_C: {
  561. struct MessageUnit_C *reg = acb->pmuC;
  562. char *acb_dev_map = (char *)acb->device_map;
  563. uint32_t __iomem *signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
  564. char __iomem *devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
  565. int target, lun;
  566. struct scsi_device *psdev;
  567. char diff;
  568. atomic_inc(&acb->rq_map_token);
  569. if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) {
  570. for (target = 0; target < ARCMSR_MAX_TARGETID - 1; target++) {
  571. diff = (*acb_dev_map)^readb(devicemap);
  572. if (diff != 0) {
  573. char temp;
  574. *acb_dev_map = readb(devicemap);
  575. temp = *acb_dev_map;
  576. for (lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
  577. if ((temp & 0x01) == 1 && (diff & 0x01) == 1) {
  578. scsi_add_device(acb->host, 0, target, lun);
  579. } else if ((temp & 0x01) == 0 && (diff & 0x01) == 1) {
  580. psdev = scsi_device_lookup(acb->host, 0, target, lun);
  581. if (psdev != NULL) {
  582. scsi_remove_device(psdev);
  583. scsi_device_put(psdev);
  584. }
  585. }
  586. temp >>= 1;
  587. diff >>= 1;
  588. }
  589. }
  590. devicemap++;
  591. acb_dev_map++;
  592. }
  593. }
  594. }
  595. }
  596. }
  597. static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  598. {
  599. struct Scsi_Host *host;
  600. struct AdapterControlBlock *acb;
  601. uint8_t bus,dev_fun;
  602. int error;
  603. error = pci_enable_device(pdev);
  604. if(error){
  605. return -ENODEV;
  606. }
  607. host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock));
  608. if(!host){
  609. goto pci_disable_dev;
  610. }
  611. error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  612. if(error){
  613. error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  614. if(error){
  615. printk(KERN_WARNING
  616. "scsi%d: No suitable DMA mask available\n",
  617. host->host_no);
  618. goto scsi_host_release;
  619. }
  620. }
  621. init_waitqueue_head(&wait_q);
  622. bus = pdev->bus->number;
  623. dev_fun = pdev->devfn;
  624. acb = (struct AdapterControlBlock *) host->hostdata;
  625. memset(acb,0,sizeof(struct AdapterControlBlock));
  626. acb->pdev = pdev;
  627. acb->host = host;
  628. host->max_lun = ARCMSR_MAX_TARGETLUN;
  629. host->max_id = ARCMSR_MAX_TARGETID; /*16:8*/
  630. host->max_cmd_len = 16; /*this is issue of 64bit LBA ,over 2T byte*/
  631. host->can_queue = ARCMSR_MAX_FREECCB_NUM; /* max simultaneous cmds */
  632. host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN;
  633. host->this_id = ARCMSR_SCSI_INITIATOR_ID;
  634. host->unique_id = (bus << 8) | dev_fun;
  635. pci_set_drvdata(pdev, host);
  636. pci_set_master(pdev);
  637. error = pci_request_regions(pdev, "arcmsr");
  638. if(error){
  639. goto scsi_host_release;
  640. }
  641. spin_lock_init(&acb->eh_lock);
  642. spin_lock_init(&acb->ccblist_lock);
  643. acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
  644. ACB_F_MESSAGE_RQBUFFER_CLEARED |
  645. ACB_F_MESSAGE_WQBUFFER_READED);
  646. acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
  647. INIT_LIST_HEAD(&acb->ccb_free_list);
  648. arcmsr_define_adapter_type(acb);
  649. error = arcmsr_remap_pciregion(acb);
  650. if(!error){
  651. goto pci_release_regs;
  652. }
  653. error = arcmsr_get_firmware_spec(acb);
  654. if(!error){
  655. goto unmap_pci_region;
  656. }
  657. error = arcmsr_alloc_ccb_pool(acb);
  658. if(error){
  659. goto free_hbb_mu;
  660. }
  661. arcmsr_iop_init(acb);
  662. error = scsi_add_host(host, &pdev->dev);
  663. if(error){
  664. goto RAID_controller_stop;
  665. }
  666. error = request_irq(pdev->irq, arcmsr_do_interrupt, IRQF_SHARED, "arcmsr", acb);
  667. if(error){
  668. goto scsi_host_remove;
  669. }
  670. host->irq = pdev->irq;
  671. scsi_scan_host(host);
  672. INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn);
  673. atomic_set(&acb->rq_map_token, 16);
  674. atomic_set(&acb->ante_token_value, 16);
  675. acb->fw_flag = FW_NORMAL;
  676. init_timer(&acb->eternal_timer);
  677. acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ);
  678. acb->eternal_timer.data = (unsigned long) acb;
  679. acb->eternal_timer.function = &arcmsr_request_device_map;
  680. add_timer(&acb->eternal_timer);
  681. if(arcmsr_alloc_sysfs_attr(acb))
  682. goto out_free_sysfs;
  683. return 0;
  684. out_free_sysfs:
  685. scsi_host_remove:
  686. scsi_remove_host(host);
  687. RAID_controller_stop:
  688. arcmsr_stop_adapter_bgrb(acb);
  689. arcmsr_flush_adapter_cache(acb);
  690. arcmsr_free_ccb_pool(acb);
  691. free_hbb_mu:
  692. arcmsr_free_hbb_mu(acb);
  693. unmap_pci_region:
  694. arcmsr_unmap_pciregion(acb);
  695. pci_release_regs:
  696. pci_release_regions(pdev);
  697. scsi_host_release:
  698. scsi_host_put(host);
  699. pci_disable_dev:
  700. pci_disable_device(pdev);
  701. return -ENODEV;
  702. }
  703. static uint8_t arcmsr_abort_hba_allcmd(struct AdapterControlBlock *acb)
  704. {
  705. struct MessageUnit_A __iomem *reg = acb->pmuA;
  706. writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
  707. if (!arcmsr_hba_wait_msgint_ready(acb)) {
  708. printk(KERN_NOTICE
  709. "arcmsr%d: wait 'abort all outstanding command' timeout \n"
  710. , acb->host->host_no);
  711. return false;
  712. }
  713. return true;
  714. }
  715. static uint8_t arcmsr_abort_hbb_allcmd(struct AdapterControlBlock *acb)
  716. {
  717. struct MessageUnit_B *reg = acb->pmuB;
  718. writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell);
  719. if (!arcmsr_hbb_wait_msgint_ready(acb)) {
  720. printk(KERN_NOTICE
  721. "arcmsr%d: wait 'abort all outstanding command' timeout \n"
  722. , acb->host->host_no);
  723. return false;
  724. }
  725. return true;
  726. }
  727. static uint8_t arcmsr_abort_hbc_allcmd(struct AdapterControlBlock *pACB)
  728. {
  729. struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
  730. writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
  731. writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
  732. if (!arcmsr_hbc_wait_msgint_ready(pACB)) {
  733. printk(KERN_NOTICE
  734. "arcmsr%d: wait 'abort all outstanding command' timeout \n"
  735. , pACB->host->host_no);
  736. return false;
  737. }
  738. return true;
  739. }
  740. static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
  741. {
  742. uint8_t rtnval = 0;
  743. switch (acb->adapter_type) {
  744. case ACB_ADAPTER_TYPE_A: {
  745. rtnval = arcmsr_abort_hba_allcmd(acb);
  746. }
  747. break;
  748. case ACB_ADAPTER_TYPE_B: {
  749. rtnval = arcmsr_abort_hbb_allcmd(acb);
  750. }
  751. break;
  752. case ACB_ADAPTER_TYPE_C: {
  753. rtnval = arcmsr_abort_hbc_allcmd(acb);
  754. }
  755. }
  756. return rtnval;
  757. }
  758. static bool arcmsr_hbb_enable_driver_mode(struct AdapterControlBlock *pacb)
  759. {
  760. struct MessageUnit_B *reg = pacb->pmuB;
  761. writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
  762. if (!arcmsr_hbb_wait_msgint_ready(pacb)) {
  763. printk(KERN_ERR "arcmsr%d: can't set driver mode. \n", pacb->host->host_no);
  764. return false;
  765. }
  766. return true;
  767. }
  768. static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb)
  769. {
  770. struct scsi_cmnd *pcmd = ccb->pcmd;
  771. scsi_dma_unmap(pcmd);
  772. }
  773. static void arcmsr_ccb_complete(struct CommandControlBlock *ccb)
  774. {
  775. struct AdapterControlBlock *acb = ccb->acb;
  776. struct scsi_cmnd *pcmd = ccb->pcmd;
  777. unsigned long flags;
  778. atomic_dec(&acb->ccboutstandingcount);
  779. arcmsr_pci_unmap_dma(ccb);
  780. ccb->startdone = ARCMSR_CCB_DONE;
  781. spin_lock_irqsave(&acb->ccblist_lock, flags);
  782. list_add_tail(&ccb->list, &acb->ccb_free_list);
  783. spin_unlock_irqrestore(&acb->ccblist_lock, flags);
  784. pcmd->scsi_done(pcmd);
  785. }
  786. static void arcmsr_report_sense_info(struct CommandControlBlock *ccb)
  787. {
  788. struct scsi_cmnd *pcmd = ccb->pcmd;
  789. struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer;
  790. pcmd->result = DID_OK << 16;
  791. if (sensebuffer) {
  792. int sense_data_length =
  793. sizeof(struct SENSE_DATA) < SCSI_SENSE_BUFFERSIZE
  794. ? sizeof(struct SENSE_DATA) : SCSI_SENSE_BUFFERSIZE;
  795. memset(sensebuffer, 0, SCSI_SENSE_BUFFERSIZE);
  796. memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length);
  797. sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
  798. sensebuffer->Valid = 1;
  799. }
  800. }
  801. static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb)
  802. {
  803. u32 orig_mask = 0;
  804. switch (acb->adapter_type) {
  805. case ACB_ADAPTER_TYPE_A : {
  806. struct MessageUnit_A __iomem *reg = acb->pmuA;
  807. orig_mask = readl(&reg->outbound_intmask);
  808. writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \
  809. &reg->outbound_intmask);
  810. }
  811. break;
  812. case ACB_ADAPTER_TYPE_B : {
  813. struct MessageUnit_B *reg = acb->pmuB;
  814. orig_mask = readl(reg->iop2drv_doorbell_mask);
  815. writel(0, reg->iop2drv_doorbell_mask);
  816. }
  817. break;
  818. case ACB_ADAPTER_TYPE_C:{
  819. struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
  820. /* disable all outbound interrupt */
  821. orig_mask = readl(&reg->host_int_mask); /* disable outbound message0 int */
  822. writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
  823. }
  824. break;
  825. }
  826. return orig_mask;
  827. }
  828. static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb,
  829. struct CommandControlBlock *ccb, bool error)
  830. {
  831. uint8_t id, lun;
  832. id = ccb->pcmd->device->id;
  833. lun = ccb->pcmd->device->lun;
  834. if (!error) {
  835. if (acb->devstate[id][lun] == ARECA_RAID_GONE)
  836. acb->devstate[id][lun] = ARECA_RAID_GOOD;
  837. ccb->pcmd->result = DID_OK << 16;
  838. arcmsr_ccb_complete(ccb);
  839. }else{
  840. switch (ccb->arcmsr_cdb.DeviceStatus) {
  841. case ARCMSR_DEV_SELECT_TIMEOUT: {
  842. acb->devstate[id][lun] = ARECA_RAID_GONE;
  843. ccb->pcmd->result = DID_NO_CONNECT << 16;
  844. arcmsr_ccb_complete(ccb);
  845. }
  846. break;
  847. case ARCMSR_DEV_ABORTED:
  848. case ARCMSR_DEV_INIT_FAIL: {
  849. acb->devstate[id][lun] = ARECA_RAID_GONE;
  850. ccb->pcmd->result = DID_BAD_TARGET << 16;
  851. arcmsr_ccb_complete(ccb);
  852. }
  853. break;
  854. case ARCMSR_DEV_CHECK_CONDITION: {
  855. acb->devstate[id][lun] = ARECA_RAID_GOOD;
  856. arcmsr_report_sense_info(ccb);
  857. arcmsr_ccb_complete(ccb);
  858. }
  859. break;
  860. default:
  861. printk(KERN_NOTICE
  862. "arcmsr%d: scsi id = %d lun = %d isr get command error done, \
  863. but got unknown DeviceStatus = 0x%x \n"
  864. , acb->host->host_no
  865. , id
  866. , lun
  867. , ccb->arcmsr_cdb.DeviceStatus);
  868. acb->devstate[id][lun] = ARECA_RAID_GONE;
  869. ccb->pcmd->result = DID_NO_CONNECT << 16;
  870. arcmsr_ccb_complete(ccb);
  871. break;
  872. }
  873. }
  874. }
  875. static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error)
  876. {
  877. int id, lun;
  878. if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
  879. if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
  880. struct scsi_cmnd *abortcmd = pCCB->pcmd;
  881. if (abortcmd) {
  882. id = abortcmd->device->id;
  883. lun = abortcmd->device->lun;
  884. abortcmd->result |= DID_ABORT << 16;
  885. arcmsr_ccb_complete(pCCB);
  886. printk(KERN_NOTICE "arcmsr%d: pCCB ='0x%p' isr got aborted command \n",
  887. acb->host->host_no, pCCB);
  888. }
  889. return;
  890. }
  891. printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \
  892. done acb = '0x%p'"
  893. "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x"
  894. " ccboutstandingcount = %d \n"
  895. , acb->host->host_no
  896. , acb
  897. , pCCB
  898. , pCCB->acb
  899. , pCCB->startdone
  900. , atomic_read(&acb->ccboutstandingcount));
  901. return;
  902. }
  903. arcmsr_report_ccb_state(acb, pCCB, error);
  904. }
  905. static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
  906. {
  907. int i = 0;
  908. uint32_t flag_ccb;
  909. struct ARCMSR_CDB *pARCMSR_CDB;
  910. bool error;
  911. struct CommandControlBlock *pCCB;
  912. switch (acb->adapter_type) {
  913. case ACB_ADAPTER_TYPE_A: {
  914. struct MessageUnit_A __iomem *reg = acb->pmuA;
  915. uint32_t outbound_intstatus;
  916. outbound_intstatus = readl(&reg->outbound_intstatus) &
  917. acb->outbound_int_enable;
  918. /*clear and abort all outbound posted Q*/
  919. writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
  920. while(((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF)
  921. && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {
  922. pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/
  923. pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
  924. error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
  925. arcmsr_drain_donequeue(acb, pCCB, error);
  926. }
  927. }
  928. break;
  929. case ACB_ADAPTER_TYPE_B: {
  930. struct MessageUnit_B *reg = acb->pmuB;
  931. /*clear all outbound posted Q*/
  932. writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, &reg->iop2drv_doorbell); /* clear doorbell interrupt */
  933. for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
  934. if ((flag_ccb = readl(&reg->done_qbuffer[i])) != 0) {
  935. writel(0, &reg->done_qbuffer[i]);
  936. pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/
  937. pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
  938. error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
  939. arcmsr_drain_donequeue(acb, pCCB, error);
  940. }
  941. reg->post_qbuffer[i] = 0;
  942. }
  943. reg->doneq_index = 0;
  944. reg->postq_index = 0;
  945. }
  946. break;
  947. case ACB_ADAPTER_TYPE_C: {
  948. struct MessageUnit_C *reg = acb->pmuC;
  949. struct ARCMSR_CDB *pARCMSR_CDB;
  950. uint32_t flag_ccb, ccb_cdb_phy;
  951. bool error;
  952. struct CommandControlBlock *pCCB;
  953. while ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {
  954. /*need to do*/
  955. flag_ccb = readl(&reg->outbound_queueport_low);
  956. ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
  957. pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+ccb_cdb_phy);/*frame must be 32 bytes aligned*/
  958. pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
  959. error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
  960. arcmsr_drain_donequeue(acb, pCCB, error);
  961. }
  962. }
  963. }
  964. }
  965. static void arcmsr_remove(struct pci_dev *pdev)
  966. {
  967. struct Scsi_Host *host = pci_get_drvdata(pdev);
  968. struct AdapterControlBlock *acb =
  969. (struct AdapterControlBlock *) host->hostdata;
  970. int poll_count = 0;
  971. arcmsr_free_sysfs_attr(acb);
  972. scsi_remove_host(host);
  973. flush_scheduled_work();
  974. del_timer_sync(&acb->eternal_timer);
  975. arcmsr_disable_outbound_ints(acb);
  976. arcmsr_stop_adapter_bgrb(acb);
  977. arcmsr_flush_adapter_cache(acb);
  978. acb->acb_flags |= ACB_F_SCSISTOPADAPTER;
  979. acb->acb_flags &= ~ACB_F_IOP_INITED;
  980. for (poll_count = 0; poll_count < ARCMSR_MAX_OUTSTANDING_CMD; poll_count++){
  981. if (!atomic_read(&acb->ccboutstandingcount))
  982. break;
  983. arcmsr_interrupt(acb);/* FIXME: need spinlock */
  984. msleep(25);
  985. }
  986. if (atomic_read(&acb->ccboutstandingcount)) {
  987. int i;
  988. arcmsr_abort_allcmd(acb);
  989. arcmsr_done4abort_postqueue(acb);
  990. for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
  991. struct CommandControlBlock *ccb = acb->pccb_pool[i];
  992. if (ccb->startdone == ARCMSR_CCB_START) {
  993. ccb->startdone = ARCMSR_CCB_ABORTED;
  994. ccb->pcmd->result = DID_ABORT << 16;
  995. arcmsr_ccb_complete(ccb);
  996. }
  997. }
  998. }
  999. free_irq(pdev->irq, acb);
  1000. arcmsr_free_ccb_pool(acb);
  1001. arcmsr_free_hbb_mu(acb);
  1002. arcmsr_unmap_pciregion(acb);
  1003. pci_release_regions(pdev);
  1004. scsi_host_put(host);
  1005. pci_disable_device(pdev);
  1006. pci_set_drvdata(pdev, NULL);
  1007. }
  1008. static void arcmsr_shutdown(struct pci_dev *pdev)
  1009. {
  1010. struct Scsi_Host *host = pci_get_drvdata(pdev);
  1011. struct AdapterControlBlock *acb =
  1012. (struct AdapterControlBlock *)host->hostdata;
  1013. del_timer_sync(&acb->eternal_timer);
  1014. arcmsr_disable_outbound_ints(acb);
  1015. flush_scheduled_work();
  1016. arcmsr_stop_adapter_bgrb(acb);
  1017. arcmsr_flush_adapter_cache(acb);
  1018. }
  1019. static int arcmsr_module_init(void)
  1020. {
  1021. int error = 0;
  1022. error = pci_register_driver(&arcmsr_pci_driver);
  1023. return error;
  1024. }
  1025. static void arcmsr_module_exit(void)
  1026. {
  1027. pci_unregister_driver(&arcmsr_pci_driver);
  1028. }
  1029. module_init(arcmsr_module_init);
  1030. module_exit(arcmsr_module_exit);
  1031. static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
  1032. u32 intmask_org)
  1033. {
  1034. u32 mask;
  1035. switch (acb->adapter_type) {
  1036. case ACB_ADAPTER_TYPE_A: {
  1037. struct MessageUnit_A __iomem *reg = acb->pmuA;
  1038. mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE |
  1039. ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|
  1040. ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE);
  1041. writel(mask, &reg->outbound_intmask);
  1042. acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
  1043. }
  1044. break;
  1045. case ACB_ADAPTER_TYPE_B: {
  1046. struct MessageUnit_B *reg = acb->pmuB;
  1047. mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK |
  1048. ARCMSR_IOP2DRV_DATA_READ_OK |
  1049. ARCMSR_IOP2DRV_CDB_DONE |
  1050. ARCMSR_IOP2DRV_MESSAGE_CMD_DONE);
  1051. writel(mask, reg->iop2drv_doorbell_mask);
  1052. acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f;
  1053. }
  1054. break;
  1055. case ACB_ADAPTER_TYPE_C: {
  1056. struct MessageUnit_C *reg = acb->pmuC;
  1057. mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK);
  1058. writel(intmask_org & mask, &reg->host_int_mask);
  1059. acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f;
  1060. }
  1061. }
  1062. }
  1063. static int arcmsr_build_ccb(struct AdapterControlBlock *acb,
  1064. struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd)
  1065. {
  1066. struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
  1067. int8_t *psge = (int8_t *)&arcmsr_cdb->u;
  1068. __le32 address_lo, address_hi;
  1069. int arccdbsize = 0x30;
  1070. __le32 length = 0;
  1071. int i;
  1072. struct scatterlist *sg;
  1073. int nseg;
  1074. ccb->pcmd = pcmd;
  1075. memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB));
  1076. arcmsr_cdb->TargetID = pcmd->device->id;
  1077. arcmsr_cdb->LUN = pcmd->device->lun;
  1078. arcmsr_cdb->Function = 1;
  1079. arcmsr_cdb->Context = 0;
  1080. memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len);
  1081. nseg = scsi_dma_map(pcmd);
  1082. if (unlikely(nseg > acb->host->sg_tablesize || nseg < 0))
  1083. return FAILED;
  1084. scsi_for_each_sg(pcmd, sg, nseg, i) {
  1085. /* Get the physical address of the current data pointer */
  1086. length = cpu_to_le32(sg_dma_len(sg));
  1087. address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg)));
  1088. address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg)));
  1089. if (address_hi == 0) {
  1090. struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge;
  1091. pdma_sg->address = address_lo;
  1092. pdma_sg->length = length;
  1093. psge += sizeof (struct SG32ENTRY);
  1094. arccdbsize += sizeof (struct SG32ENTRY);
  1095. } else {
  1096. struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge;
  1097. pdma_sg->addresshigh = address_hi;
  1098. pdma_sg->address = address_lo;
  1099. pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR);
  1100. psge += sizeof (struct SG64ENTRY);
  1101. arccdbsize += sizeof (struct SG64ENTRY);
  1102. }
  1103. }
  1104. arcmsr_cdb->sgcount = (uint8_t)nseg;
  1105. arcmsr_cdb->DataLength = scsi_bufflen(pcmd);
  1106. arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0);
  1107. if ( arccdbsize > 256)
  1108. arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE;
  1109. if (pcmd->cmnd[0]|WRITE_6 || pcmd->cmnd[0]|WRITE_10 || pcmd->cmnd[0]|WRITE_12 ){
  1110. arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE;
  1111. }
  1112. ccb->arc_cdb_size = arccdbsize;
  1113. return SUCCESS;
  1114. }
  1115. static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb)
  1116. {
  1117. uint32_t cdb_phyaddr_pattern = ccb->cdb_phyaddr_pattern;
  1118. struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
  1119. atomic_inc(&acb->ccboutstandingcount);
  1120. ccb->startdone = ARCMSR_CCB_START;
  1121. switch (acb->adapter_type) {
  1122. case ACB_ADAPTER_TYPE_A: {
  1123. struct MessageUnit_A __iomem *reg = acb->pmuA;
  1124. if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE)
  1125. writel(cdb_phyaddr_pattern | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
  1126. &reg->inbound_queueport);
  1127. else {
  1128. writel(cdb_phyaddr_pattern, &reg->inbound_queueport);
  1129. }
  1130. }
  1131. break;
  1132. case ACB_ADAPTER_TYPE_B: {
  1133. struct MessageUnit_B *reg = acb->pmuB;
  1134. uint32_t ending_index, index = reg->postq_index;
  1135. ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE);
  1136. writel(0, &reg->post_qbuffer[ending_index]);
  1137. if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) {
  1138. writel(cdb_phyaddr_pattern | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,\
  1139. &reg->post_qbuffer[index]);
  1140. } else {
  1141. writel(cdb_phyaddr_pattern, &reg->post_qbuffer[index]);
  1142. }
  1143. index++;
  1144. index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */
  1145. reg->postq_index = index;
  1146. writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell);
  1147. }
  1148. break;
  1149. case ACB_ADAPTER_TYPE_C: {
  1150. struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)acb->pmuC;
  1151. uint32_t ccb_post_stamp, arc_cdb_size;
  1152. arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
  1153. ccb_post_stamp = (cdb_phyaddr_pattern | ((arc_cdb_size - 1) >> 6) | 1);
  1154. if (acb->cdb_phyaddr_hi32) {
  1155. writel(acb->cdb_phyaddr_hi32, &phbcmu->inbound_queueport_high);
  1156. writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
  1157. } else {
  1158. writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
  1159. }
  1160. }
  1161. }
  1162. }
  1163. static void arcmsr_stop_hba_bgrb(struct AdapterControlBlock *acb)
  1164. {
  1165. struct MessageUnit_A __iomem *reg = acb->pmuA;
  1166. acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
  1167. writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
  1168. if (!arcmsr_hba_wait_msgint_ready(acb)) {
  1169. printk(KERN_NOTICE
  1170. "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
  1171. , acb->host->host_no);
  1172. }
  1173. }
  1174. static void arcmsr_stop_hbb_bgrb(struct AdapterControlBlock *acb)
  1175. {
  1176. struct MessageUnit_B *reg = acb->pmuB;
  1177. acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
  1178. writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell);
  1179. if (!arcmsr_hbb_wait_msgint_ready(acb)) {
  1180. printk(KERN_NOTICE
  1181. "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
  1182. , acb->host->host_no);
  1183. }
  1184. }
  1185. static void arcmsr_stop_hbc_bgrb(struct AdapterControlBlock *pACB)
  1186. {
  1187. struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
  1188. pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
  1189. writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
  1190. writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
  1191. if (!arcmsr_hbc_wait_msgint_ready(pACB)) {
  1192. printk(KERN_NOTICE
  1193. "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
  1194. , pACB->host->host_no);
  1195. }
  1196. return;
  1197. }
  1198. static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
  1199. {
  1200. switch (acb->adapter_type) {
  1201. case ACB_ADAPTER_TYPE_A: {
  1202. arcmsr_stop_hba_bgrb(acb);
  1203. }
  1204. break;
  1205. case ACB_ADAPTER_TYPE_B: {
  1206. arcmsr_stop_hbb_bgrb(acb);
  1207. }
  1208. break;
  1209. case ACB_ADAPTER_TYPE_C: {
  1210. arcmsr_stop_hbc_bgrb(acb);
  1211. }
  1212. }
  1213. }
  1214. static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
  1215. {
  1216. dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle);
  1217. }
  1218. void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
  1219. {
  1220. switch (acb->adapter_type) {
  1221. case ACB_ADAPTER_TYPE_A: {
  1222. struct MessageUnit_A __iomem *reg = acb->pmuA;
  1223. writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
  1224. }
  1225. break;
  1226. case ACB_ADAPTER_TYPE_B: {
  1227. struct MessageUnit_B *reg = acb->pmuB;
  1228. writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
  1229. }
  1230. break;
  1231. case ACB_ADAPTER_TYPE_C: {
  1232. struct MessageUnit_C __iomem *reg = acb->pmuC;
  1233. writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
  1234. }
  1235. }
  1236. }
  1237. static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb)
  1238. {
  1239. switch (acb->adapter_type) {
  1240. case ACB_ADAPTER_TYPE_A: {
  1241. struct MessageUnit_A __iomem *reg = acb->pmuA;
  1242. /*
  1243. ** push inbound doorbell tell iop, driver data write ok
  1244. ** and wait reply on next hwinterrupt for next Qbuffer post
  1245. */
  1246. writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, &reg->inbound_doorbell);
  1247. }
  1248. break;
  1249. case ACB_ADAPTER_TYPE_B: {
  1250. struct MessageUnit_B *reg = acb->pmuB;
  1251. /*
  1252. ** push inbound doorbell tell iop, driver data write ok
  1253. ** and wait reply on next hwinterrupt for next Qbuffer post
  1254. */
  1255. writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell);
  1256. }
  1257. break;
  1258. case ACB_ADAPTER_TYPE_C: {
  1259. struct MessageUnit_C __iomem *reg = acb->pmuC;
  1260. /*
  1261. ** push inbound doorbell tell iop, driver data write ok
  1262. ** and wait reply on next hwinterrupt for next Qbuffer post
  1263. */
  1264. writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, &reg->inbound_doorbell);
  1265. }
  1266. break;
  1267. }
  1268. }
  1269. struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb)
  1270. {
  1271. struct QBUFFER __iomem *qbuffer = NULL;
  1272. switch (acb->adapter_type) {
  1273. case ACB_ADAPTER_TYPE_A: {
  1274. struct MessageUnit_A __iomem *reg = acb->pmuA;
  1275. qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;
  1276. }
  1277. break;
  1278. case ACB_ADAPTER_TYPE_B: {
  1279. struct MessageUnit_B *reg = acb->pmuB;
  1280. qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
  1281. }
  1282. break;
  1283. case ACB_ADAPTER_TYPE_C: {
  1284. struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)acb->pmuC;
  1285. qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer;
  1286. }
  1287. }
  1288. return qbuffer;
  1289. }
  1290. static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb)
  1291. {
  1292. struct QBUFFER __iomem *pqbuffer = NULL;
  1293. switch (acb->adapter_type) {
  1294. case ACB_ADAPTER_TYPE_A: {
  1295. struct MessageUnit_A __iomem *reg = acb->pmuA;
  1296. pqbuffer = (struct QBUFFER __iomem *) &reg->message_wbuffer;
  1297. }
  1298. break;
  1299. case ACB_ADAPTER_TYPE_B: {
  1300. struct MessageUnit_B *reg = acb->pmuB;
  1301. pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
  1302. }
  1303. break;
  1304. case ACB_ADAPTER_TYPE_C: {
  1305. struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
  1306. pqbuffer = (struct QBUFFER __iomem *)&reg->message_wbuffer;
  1307. }
  1308. }
  1309. return pqbuffer;
  1310. }
  1311. static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb)
  1312. {
  1313. struct QBUFFER __iomem *prbuffer;
  1314. struct QBUFFER *pQbuffer;
  1315. uint8_t __iomem *iop_data;
  1316. int32_t my_empty_len, iop_len, rqbuf_firstindex, rqbuf_lastindex;
  1317. rqbuf_lastindex = acb->rqbuf_lastindex;
  1318. rqbuf_firstindex = acb->rqbuf_firstindex;
  1319. prbuffer = arcmsr_get_iop_rqbuffer(acb);
  1320. iop_data = (uint8_t __iomem *)prbuffer->data;
  1321. iop_len = prbuffer->data_len;
  1322. my_empty_len = (rqbuf_firstindex - rqbuf_lastindex - 1) & (ARCMSR_MAX_QBUFFER - 1);
  1323. if (my_empty_len >= iop_len)
  1324. {
  1325. while (iop_len > 0) {
  1326. pQbuffer = (struct QBUFFER *)&acb->rqbuffer[rqbuf_lastindex];
  1327. memcpy(pQbuffer, iop_data, 1);
  1328. rqbuf_lastindex++;
  1329. rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
  1330. iop_data++;
  1331. iop_len--;
  1332. }
  1333. acb->rqbuf_lastindex = rqbuf_lastindex;
  1334. arcmsr_iop_message_read(acb);
  1335. }
  1336. else {
  1337. acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
  1338. }
  1339. }
  1340. static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb)
  1341. {
  1342. acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED;
  1343. if (acb->wqbuf_firstindex != acb->wqbuf_lastindex) {
  1344. uint8_t *pQbuffer;
  1345. struct QBUFFER __iomem *pwbuffer;
  1346. uint8_t __iomem *iop_data;
  1347. int32_t allxfer_len = 0;
  1348. acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
  1349. pwbuffer = arcmsr_get_iop_wqbuffer(acb);
  1350. iop_data = (uint8_t __iomem *)pwbuffer->data;
  1351. while ((acb->wqbuf_firstindex != acb->wqbuf_lastindex) && \
  1352. (allxfer_len < 124)) {
  1353. pQbuffer = &acb->wqbuffer[acb->wqbuf_firstindex];
  1354. memcpy(iop_data, pQbuffer, 1);
  1355. acb->wqbuf_firstindex++;
  1356. acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
  1357. iop_data++;
  1358. allxfer_len++;
  1359. }
  1360. pwbuffer->data_len = allxfer_len;
  1361. arcmsr_iop_message_wrote(acb);
  1362. }
  1363. if (acb->wqbuf_firstindex == acb->wqbuf_lastindex) {
  1364. acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
  1365. }
  1366. }
  1367. static void arcmsr_hba_doorbell_isr(struct AdapterControlBlock *acb)
  1368. {
  1369. uint32_t outbound_doorbell;
  1370. struct MessageUnit_A __iomem *reg = acb->pmuA;
  1371. outbound_doorbell = readl(&reg->outbound_doorbell);
  1372. writel(outbound_doorbell, &reg->outbound_doorbell);
  1373. if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) {
  1374. arcmsr_iop2drv_data_wrote_handle(acb);
  1375. }
  1376. if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) {
  1377. arcmsr_iop2drv_data_read_handle(acb);
  1378. }
  1379. }
  1380. static void arcmsr_hbc_doorbell_isr(struct AdapterControlBlock *pACB)
  1381. {
  1382. uint32_t outbound_doorbell;
  1383. struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
  1384. /*
  1385. *******************************************************************
  1386. ** Maybe here we need to check wrqbuffer_lock is lock or not
  1387. ** DOORBELL: din! don!
  1388. ** check if there are any mail need to pack from firmware
  1389. *******************************************************************
  1390. */
  1391. outbound_doorbell = readl(&reg->outbound_doorbell);
  1392. writel(outbound_doorbell, &reg->outbound_doorbell_clear);/*clear interrupt*/
  1393. if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) {
  1394. arcmsr_iop2drv_data_wrote_handle(pACB);
  1395. }
  1396. if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK) {
  1397. arcmsr_iop2drv_data_read_handle(pACB);
  1398. }
  1399. if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
  1400. arcmsr_hbc_message_isr(pACB); /* messenger of "driver to iop commands" */
  1401. }
  1402. return;
  1403. }
  1404. static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb)
  1405. {
  1406. uint32_t flag_ccb;
  1407. struct MessageUnit_A __iomem *reg = acb->pmuA;
  1408. struct ARCMSR_CDB *pARCMSR_CDB;
  1409. struct CommandControlBlock *pCCB;
  1410. bool error;
  1411. while ((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF) {
  1412. pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/
  1413. pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
  1414. error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
  1415. arcmsr_drain_donequeue(acb, pCCB, error);
  1416. }
  1417. }
  1418. static void arcmsr_hbb_postqueue_isr(struct AdapterControlBlock *acb)
  1419. {
  1420. uint32_t index;
  1421. uint32_t flag_ccb;
  1422. struct MessageUnit_B *reg = acb->pmuB;
  1423. struct ARCMSR_CDB *pARCMSR_CDB;
  1424. struct CommandControlBlock *pCCB;
  1425. bool error;
  1426. index = reg->doneq_index;
  1427. while ((flag_ccb = readl(&reg->done_qbuffer[index])) != 0) {
  1428. writel(0, &reg->done_qbuffer[index]);
  1429. pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/
  1430. pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
  1431. error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
  1432. arcmsr_drain_donequeue(acb, pCCB, error);
  1433. index++;
  1434. index %= ARCMSR_MAX_HBB_POSTQUEUE;
  1435. reg->doneq_index = index;
  1436. }
  1437. }
  1438. static void arcmsr_hbc_postqueue_isr(struct AdapterControlBlock *acb)
  1439. {
  1440. struct MessageUnit_C *phbcmu;
  1441. struct ARCMSR_CDB *arcmsr_cdb;
  1442. struct CommandControlBlock *ccb;
  1443. uint32_t flag_ccb, ccb_cdb_phy, throttling = 0;
  1444. int error;
  1445. phbcmu = (struct MessageUnit_C *)acb->pmuC;
  1446. /* areca cdb command done */
  1447. /* Use correct offset and size for syncing */
  1448. while (readl(&phbcmu->host_int_status) &
  1449. ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR){
  1450. /* check if command done with no error*/
  1451. flag_ccb = readl(&phbcmu->outbound_queueport_low);
  1452. ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);/*frame must be 32 bytes aligned*/
  1453. arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
  1454. ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
  1455. error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
  1456. /* check if command done with no error */
  1457. arcmsr_drain_donequeue(acb, ccb, error);
  1458. if (throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) {
  1459. writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING, &phbcmu->inbound_doorbell);
  1460. break;
  1461. }
  1462. throttling++;
  1463. }
  1464. }
  1465. /*
  1466. **********************************************************************************
  1467. ** Handle a message interrupt
  1468. **
  1469. ** The only message interrupt we expect is in response to a query for the current adapter config.
  1470. ** We want this in order to compare the drivemap so that we can detect newly-attached drives.
  1471. **********************************************************************************
  1472. */
  1473. static void arcmsr_hba_message_isr(struct AdapterControlBlock *acb)
  1474. {
  1475. struct MessageUnit_A *reg = acb->pmuA;
  1476. /*clear interrupt and message state*/
  1477. writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, &reg->outbound_intstatus);
  1478. schedule_work(&acb->arcmsr_do_message_isr_bh);
  1479. }
  1480. static void arcmsr_hbb_message_isr(struct AdapterControlBlock *acb)
  1481. {
  1482. struct MessageUnit_B *reg = acb->pmuB;
  1483. /*clear interrupt and message state*/
  1484. writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
  1485. schedule_work(&acb->arcmsr_do_message_isr_bh);
  1486. }
  1487. /*
  1488. **********************************************************************************
  1489. ** Handle a message interrupt
  1490. **
  1491. ** The only message interrupt we expect is in response to a query for the
  1492. ** current adapter config.
  1493. ** We want this in order to compare the drivemap so that we can detect newly-attached drives.
  1494. **********************************************************************************
  1495. */
  1496. static void arcmsr_hbc_message_isr(struct AdapterControlBlock *acb)
  1497. {
  1498. struct MessageUnit_C *reg = acb->pmuC;
  1499. /*clear interrupt and message state*/
  1500. writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &reg->outbound_doorbell_clear);
  1501. schedule_work(&acb->arcmsr_do_message_isr_bh);
  1502. }
  1503. static int arcmsr_handle_hba_isr(struct AdapterControlBlock *acb)
  1504. {
  1505. uint32_t outbound_intstatus;
  1506. struct MessageUnit_A __iomem *reg = acb->pmuA;
  1507. outbound_intstatus = readl(&reg->outbound_intstatus) &
  1508. acb->outbound_int_enable;
  1509. if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT)) {
  1510. return 1;
  1511. }
  1512. writel(outbound_intstatus, &reg->outbound_intstatus);
  1513. if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) {
  1514. arcmsr_hba_doorbell_isr(acb);
  1515. }
  1516. if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) {
  1517. arcmsr_hba_postqueue_isr(acb);
  1518. }
  1519. if(outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
  1520. /* messenger of "driver to iop commands" */
  1521. arcmsr_hba_message_isr(acb);
  1522. }
  1523. return 0;
  1524. }
  1525. static int arcmsr_handle_hbb_isr(struct AdapterControlBlock *acb)
  1526. {
  1527. uint32_t outbound_doorbell;
  1528. struct MessageUnit_B *reg = acb->pmuB;
  1529. outbound_doorbell = readl(reg->iop2drv_doorbell) &
  1530. acb->outbound_int_enable;
  1531. if (!outbound_doorbell)
  1532. return 1;
  1533. writel(~outbound_doorbell, reg->iop2drv_doorbell);
  1534. /*in case the last action of doorbell interrupt clearance is cached,
  1535. this action can push HW to write down the clear bit*/
  1536. readl(reg->iop2drv_doorbell);
  1537. writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
  1538. if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) {
  1539. arcmsr_iop2drv_data_wrote_handle(acb);
  1540. }
  1541. if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK) {
  1542. arcmsr_iop2drv_data_read_handle(acb);
  1543. }
  1544. if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE) {
  1545. arcmsr_hbb_postqueue_isr(acb);
  1546. }
  1547. if(outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
  1548. /* messenger of "driver to iop commands" */
  1549. arcmsr_hbb_message_isr(acb);
  1550. }
  1551. return 0;
  1552. }
  1553. static int arcmsr_handle_hbc_isr(struct AdapterControlBlock *pACB)
  1554. {
  1555. uint32_t host_interrupt_status;
  1556. struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC;
  1557. /*
  1558. *********************************************
  1559. ** check outbound intstatus
  1560. *********************************************
  1561. */
  1562. host_interrupt_status = readl(&phbcmu->host_int_status);
  1563. if (!host_interrupt_status) {
  1564. /*it must be share irq*/
  1565. return 1;
  1566. }
  1567. /* MU ioctl transfer doorbell interrupts*/
  1568. if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR) {
  1569. arcmsr_hbc_doorbell_isr(pACB); /* messenger of "ioctl message read write" */
  1570. }
  1571. /* MU post queue interrupts*/
  1572. if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) {
  1573. arcmsr_hbc_postqueue_isr(pACB); /* messenger of "scsi commands" */
  1574. }
  1575. return 0;
  1576. }
  1577. static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb)
  1578. {
  1579. switch (acb->adapter_type) {
  1580. case ACB_ADAPTER_TYPE_A: {
  1581. if (arcmsr_handle_hba_isr(acb)) {
  1582. return IRQ_NONE;
  1583. }
  1584. }
  1585. break;
  1586. case ACB_ADAPTER_TYPE_B: {
  1587. if (arcmsr_handle_hbb_isr(acb)) {
  1588. return IRQ_NONE;
  1589. }
  1590. }
  1591. break;
  1592. case ACB_ADAPTER_TYPE_C: {
  1593. if (arcmsr_handle_hbc_isr(acb)) {
  1594. return IRQ_NONE;
  1595. }
  1596. }
  1597. }
  1598. return IRQ_HANDLED;
  1599. }
  1600. static void arcmsr_iop_parking(struct AdapterControlBlock *acb)
  1601. {
  1602. if (acb) {
  1603. /* stop adapter background rebuild */
  1604. if (acb->acb_flags & ACB_F_MSG_START_BGRB) {
  1605. uint32_t intmask_org;
  1606. acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
  1607. intmask_org = arcmsr_disable_outbound_ints(acb);
  1608. arcmsr_stop_adapter_bgrb(acb);
  1609. arcmsr_flush_adapter_cache(acb);
  1610. arcmsr_enable_outbound_ints(acb, intmask_org);
  1611. }
  1612. }
  1613. }
  1614. void arcmsr_post_ioctldata2iop(struct AdapterControlBlock *acb)
  1615. {
  1616. int32_t wqbuf_firstindex, wqbuf_lastindex;
  1617. uint8_t *pQbuffer;
  1618. struct QBUFFER __iomem *pwbuffer;
  1619. uint8_t __iomem *iop_data;
  1620. int32_t allxfer_len = 0;
  1621. pwbuffer = arcmsr_get_iop_wqbuffer(acb);
  1622. iop_data = (uint8_t __iomem *)pwbuffer->data;
  1623. if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
  1624. acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
  1625. wqbuf_firstindex = acb->wqbuf_firstindex;
  1626. wqbuf_lastindex = acb->wqbuf_lastindex;
  1627. while ((wqbuf_firstindex != wqbuf_lastindex) && (allxfer_len < 124)) {
  1628. pQbuffer = &acb->wqbuffer[wqbuf_firstindex];
  1629. memcpy(iop_data, pQbuffer, 1);
  1630. wqbuf_firstindex++;
  1631. wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
  1632. iop_data++;
  1633. allxfer_len++;
  1634. }
  1635. acb->wqbuf_firstindex = wqbuf_firstindex;
  1636. pwbuffer->data_len = allxfer_len;
  1637. arcmsr_iop_message_wrote(acb);
  1638. }
  1639. }
  1640. static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
  1641. struct scsi_cmnd *cmd)
  1642. {
  1643. struct CMD_MESSAGE_FIELD *pcmdmessagefld;
  1644. int retvalue = 0, transfer_len = 0;
  1645. char *buffer;
  1646. struct scatterlist *sg;
  1647. uint32_t controlcode = (uint32_t ) cmd->cmnd[5] << 24 |
  1648. (uint32_t ) cmd->cmnd[6] << 16 |
  1649. (uint32_t ) cmd->cmnd[7] << 8 |
  1650. (uint32_t ) cmd->cmnd[8];
  1651. /* 4 bytes: Areca io control code */
  1652. sg = scsi_sglist(cmd);
  1653. buffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset;
  1654. if (scsi_sg_count(cmd) > 1) {
  1655. retvalue = ARCMSR_MESSAGE_FAIL;
  1656. goto message_out;
  1657. }
  1658. transfer_len += sg->length;
  1659. if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) {
  1660. retvalue = ARCMSR_MESSAGE_FAIL;
  1661. goto message_out;
  1662. }
  1663. pcmdmessagefld = (struct CMD_MESSAGE_FIELD *) buffer;
  1664. switch(controlcode) {
  1665. case ARCMSR_MESSAGE_READ_RQBUFFER: {
  1666. unsigned char *ver_addr;
  1667. uint8_t *pQbuffer, *ptmpQbuffer;
  1668. int32_t allxfer_len = 0;
  1669. ver_addr = kmalloc(1032, GFP_ATOMIC);
  1670. if (!ver_addr) {
  1671. retvalue = ARCMSR_MESSAGE_FAIL;
  1672. goto message_out;
  1673. }
  1674. ptmpQbuffer = ver_addr;
  1675. while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex)
  1676. && (allxfer_len < 1031)) {
  1677. pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex];
  1678. memcpy(ptmpQbuffer, pQbuffer, 1);
  1679. acb->rqbuf_firstindex++;
  1680. acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
  1681. ptmpQbuffer++;
  1682. allxfer_len++;
  1683. }
  1684. if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
  1685. struct QBUFFER __iomem *prbuffer;
  1686. uint8_t __iomem *iop_data;
  1687. int32_t iop_len;
  1688. acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
  1689. prbuffer = arcmsr_get_iop_rqbuffer(acb);
  1690. iop_data = prbuffer->data;
  1691. iop_len = readl(&prbuffer->data_len);
  1692. while (iop_len > 0) {
  1693. acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data);
  1694. acb->rqbuf_lastindex++;
  1695. acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
  1696. iop_data++;
  1697. iop_len--;
  1698. }
  1699. arcmsr_iop_message_read(acb);
  1700. }
  1701. memcpy(pcmdmessagefld->messagedatabuffer, ver_addr, allxfer_len);
  1702. pcmdmessagefld->cmdmessage.Length = allxfer_len;
  1703. if(acb->fw_flag == FW_DEADLOCK) {
  1704. pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
  1705. }else{
  1706. pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
  1707. }
  1708. kfree(ver_addr);
  1709. }
  1710. break;
  1711. case ARCMSR_MESSAGE_WRITE_WQBUFFER: {
  1712. unsigned char *ver_addr;
  1713. int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex;
  1714. uint8_t *pQbuffer, *ptmpuserbuffer;
  1715. ver_addr = kmalloc(1032, GFP_ATOMIC);
  1716. if (!ver_addr) {
  1717. retvalue = ARCMSR_MESSAGE_FAIL;
  1718. goto message_out;
  1719. }
  1720. if(acb->fw_flag == FW_DEADLOCK) {
  1721. pcmdmessagefld->cmdmessage.ReturnCode =
  1722. ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
  1723. }else{
  1724. pcmdmessagefld->cmdmessage.ReturnCode =
  1725. ARCMSR_MESSAGE_RETURNCODE_OK;
  1726. }
  1727. ptmpuserbuffer = ver_addr;
  1728. user_len = pcmdmessagefld->cmdmessage.Length;
  1729. memcpy(ptmpuserbuffer, pcmdmessagefld->messagedatabuffer, user_len);
  1730. wqbuf_lastindex = acb->wqbuf_lastindex;
  1731. wqbuf_firstindex = acb->wqbuf_firstindex;
  1732. if (wqbuf_lastindex != wqbuf_firstindex) {
  1733. struct SENSE_DATA *sensebuffer =
  1734. (struct SENSE_DATA *)cmd->sense_buffer;
  1735. arcmsr_post_ioctldata2iop(acb);
  1736. /* has error report sensedata */
  1737. sensebuffer->ErrorCode = 0x70;
  1738. sensebuffer->SenseKey = ILLEGAL_REQUEST;
  1739. sensebuffer->AdditionalSenseLength = 0x0A;
  1740. sensebuffer->AdditionalSenseCode = 0x20;
  1741. sensebuffer->Valid = 1;
  1742. retvalue = ARCMSR_MESSAGE_FAIL;
  1743. } else {
  1744. my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1)
  1745. &(ARCMSR_MAX_QBUFFER - 1);
  1746. if (my_empty_len >= user_len) {
  1747. while (user_len > 0) {
  1748. pQbuffer =
  1749. &acb->wqbuffer[acb->wqbuf_lastindex];
  1750. memcpy(pQbuffer, ptmpuserbuffer, 1);
  1751. acb->wqbuf_lastindex++;
  1752. acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
  1753. ptmpuserbuffer++;
  1754. user_len--;
  1755. }
  1756. if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
  1757. acb->acb_flags &=
  1758. ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
  1759. arcmsr_post_ioctldata2iop(acb);
  1760. }
  1761. } else {
  1762. /* has error report sensedata */
  1763. struct SENSE_DATA *sensebuffer =
  1764. (struct SENSE_DATA *)cmd->sense_buffer;
  1765. sensebuffer->ErrorCode = 0x70;
  1766. sensebuffer->SenseKey = ILLEGAL_REQUEST;
  1767. sensebuffer->AdditionalSenseLength = 0x0A;
  1768. sensebuffer->AdditionalSenseCode = 0x20;
  1769. sensebuffer->Valid = 1;
  1770. retvalue = ARCMSR_MESSAGE_FAIL;
  1771. }
  1772. }
  1773. kfree(ver_addr);
  1774. }
  1775. break;
  1776. case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
  1777. uint8_t *pQbuffer = acb->rqbuffer;
  1778. if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
  1779. acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
  1780. arcmsr_iop_message_read(acb);
  1781. }
  1782. acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
  1783. acb->rqbuf_firstindex = 0;
  1784. acb->rqbuf_lastindex = 0;
  1785. memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
  1786. if(acb->fw_flag == FW_DEADLOCK) {
  1787. pcmdmessagefld->cmdmessage.ReturnCode =
  1788. ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
  1789. }else{
  1790. pcmdmessagefld->cmdmessage.ReturnCode =
  1791. ARCMSR_MESSAGE_RETURNCODE_OK;
  1792. }
  1793. }
  1794. break;
  1795. case ARCMSR_MESSAGE_CLEAR_WQBUFFER: {
  1796. uint8_t *pQbuffer = acb->wqbuffer;
  1797. if(acb->fw_flag == FW_DEADLOCK) {
  1798. pcmdmessagefld->cmdmessage.ReturnCode =
  1799. ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
  1800. }else{
  1801. pcmdmessagefld->cmdmessage.ReturnCode =
  1802. ARCMSR_MESSAGE_RETURNCODE_OK;
  1803. }
  1804. if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
  1805. acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
  1806. arcmsr_iop_message_read(acb);
  1807. }
  1808. acb->acb_flags |=
  1809. (ACB_F_MESSAGE_WQBUFFER_CLEARED |
  1810. ACB_F_MESSAGE_WQBUFFER_READED);
  1811. acb->wqbuf_firstindex = 0;
  1812. acb->wqbuf_lastindex = 0;
  1813. memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
  1814. }
  1815. break;
  1816. case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
  1817. uint8_t *pQbuffer;
  1818. if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
  1819. acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
  1820. arcmsr_iop_message_read(acb);
  1821. }
  1822. acb->acb_flags |=
  1823. (ACB_F_MESSAGE_WQBUFFER_CLEARED
  1824. | ACB_F_MESSAGE_RQBUFFER_CLEARED
  1825. | ACB_F_MESSAGE_WQBUFFER_READED);
  1826. acb->rqbuf_firstindex = 0;
  1827. acb->rqbuf_lastindex = 0;
  1828. acb->wqbuf_firstindex = 0;
  1829. acb->wqbuf_lastindex = 0;
  1830. pQbuffer = acb->rqbuffer;
  1831. memset(pQbuffer, 0, sizeof(struct QBUFFER));
  1832. pQbuffer = acb->wqbuffer;
  1833. memset(pQbuffer, 0, sizeof(struct QBUFFER));
  1834. if(acb->fw_flag == FW_DEADLOCK) {
  1835. pcmdmessagefld->cmdmessage.ReturnCode =
  1836. ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
  1837. }else{
  1838. pcmdmessagefld->cmdmessage.ReturnCode =
  1839. ARCMSR_MESSAGE_RETURNCODE_OK;
  1840. }
  1841. }
  1842. break;
  1843. case ARCMSR_MESSAGE_RETURN_CODE_3F: {
  1844. if(acb->fw_flag == FW_DEADLOCK) {
  1845. pcmdmessagefld->cmdmessage.ReturnCode =
  1846. ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
  1847. }else{
  1848. pcmdmessagefld->cmdmessage.ReturnCode =
  1849. ARCMSR_MESSAGE_RETURNCODE_3F;
  1850. }
  1851. break;
  1852. }
  1853. case ARCMSR_MESSAGE_SAY_HELLO: {
  1854. int8_t *hello_string = "Hello! I am ARCMSR";
  1855. if(acb->fw_flag == FW_DEADLOCK) {
  1856. pcmdmessagefld->cmdmessage.ReturnCode =
  1857. ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
  1858. }else{
  1859. pcmdmessagefld->cmdmessage.ReturnCode =
  1860. ARCMSR_MESSAGE_RETURNCODE_OK;
  1861. }
  1862. memcpy(pcmdmessagefld->messagedatabuffer, hello_string
  1863. , (int16_t)strlen(hello_string));
  1864. }
  1865. break;
  1866. case ARCMSR_MESSAGE_SAY_GOODBYE:
  1867. if(acb->fw_flag == FW_DEADLOCK) {
  1868. pcmdmessagefld->cmdmessage.ReturnCode =
  1869. ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
  1870. }
  1871. arcmsr_iop_parking(acb);
  1872. break;
  1873. case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE:
  1874. if(acb->fw_flag == FW_DEADLOCK) {
  1875. pcmdmessagefld->cmdmessage.ReturnCode =
  1876. ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
  1877. }
  1878. arcmsr_flush_adapter_cache(acb);
  1879. break;
  1880. default:
  1881. retvalue = ARCMSR_MESSAGE_FAIL;
  1882. }
  1883. message_out:
  1884. sg = scsi_sglist(cmd);
  1885. kunmap_atomic(buffer - sg->offset, KM_IRQ0);
  1886. return retvalue;
  1887. }
  1888. static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb)
  1889. {
  1890. struct list_head *head = &acb->ccb_free_list;
  1891. struct CommandControlBlock *ccb = NULL;
  1892. unsigned long flags;
  1893. spin_lock_irqsave(&acb->ccblist_lock, flags);
  1894. if (!list_empty(head)) {
  1895. ccb = list_entry(head->next, struct CommandControlBlock, list);
  1896. list_del_init(&ccb->list);
  1897. }else{
  1898. spin_unlock_irqrestore(&acb->ccblist_lock, flags);
  1899. return 0;
  1900. }
  1901. spin_unlock_irqrestore(&acb->ccblist_lock, flags);
  1902. return ccb;
  1903. }
  1904. static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
  1905. struct scsi_cmnd *cmd)
  1906. {
  1907. switch (cmd->cmnd[0]) {
  1908. case INQUIRY: {
  1909. unsigned char inqdata[36];
  1910. char *buffer;
  1911. struct scatterlist *sg;
  1912. if (cmd->device->lun) {
  1913. cmd->result = (DID_TIME_OUT << 16);
  1914. cmd->scsi_done(cmd);
  1915. return;
  1916. }
  1917. inqdata[0] = TYPE_PROCESSOR;
  1918. /* Periph Qualifier & Periph Dev Type */
  1919. inqdata[1] = 0;
  1920. /* rem media bit & Dev Type Modifier */
  1921. inqdata[2] = 0;
  1922. /* ISO, ECMA, & ANSI versions */
  1923. inqdata[4] = 31;
  1924. /* length of additional data */
  1925. strncpy(&inqdata[8], "Areca ", 8);
  1926. /* Vendor Identification */
  1927. strncpy(&inqdata[16], "RAID controller ", 16);
  1928. /* Product Identification */
  1929. strncpy(&inqdata[32], "R001", 4); /* Product Revision */
  1930. sg = scsi_sglist(cmd);
  1931. buffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset;
  1932. memcpy(buffer, inqdata, sizeof(inqdata));
  1933. sg = scsi_sglist(cmd);
  1934. kunmap_atomic(buffer - sg->offset, KM_IRQ0);
  1935. cmd->scsi_done(cmd);
  1936. }
  1937. break;
  1938. case WRITE_BUFFER:
  1939. case READ_BUFFER: {
  1940. if (arcmsr_iop_message_xfer(acb, cmd))
  1941. cmd->result = (DID_ERROR << 16);
  1942. cmd->scsi_done(cmd);
  1943. }
  1944. break;
  1945. default:
  1946. cmd->scsi_done(cmd);
  1947. }
  1948. }
  1949. static int arcmsr_queue_command(struct scsi_cmnd *cmd,
  1950. void (* done)(struct scsi_cmnd *))
  1951. {
  1952. struct Scsi_Host *host = cmd->device->host;
  1953. struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata;
  1954. struct CommandControlBlock *ccb;
  1955. int target = cmd->device->id;
  1956. int lun = cmd->device->lun;
  1957. uint8_t scsicmd = cmd->cmnd[0];
  1958. cmd->scsi_done = done;
  1959. cmd->host_scribble = NULL;
  1960. cmd->result = 0;
  1961. if ((scsicmd == SYNCHRONIZE_CACHE) ||(scsicmd == SEND_DIAGNOSTIC)){
  1962. if(acb->devstate[target][lun] == ARECA_RAID_GONE) {
  1963. cmd->result = (DID_NO_CONNECT << 16);
  1964. }
  1965. cmd->scsi_done(cmd);
  1966. return 0;
  1967. }
  1968. if (target == 16) {
  1969. /* virtual device for iop message transfer */
  1970. arcmsr_handle_virtual_command(acb, cmd);
  1971. return 0;
  1972. }
  1973. if (atomic_read(&acb->ccboutstandingcount) >=
  1974. ARCMSR_MAX_OUTSTANDING_CMD)
  1975. return SCSI_MLQUEUE_HOST_BUSY;
  1976. if ((scsicmd == SCSI_CMD_ARECA_SPECIFIC)) {
  1977. printk(KERN_NOTICE "Receiveing SCSI_CMD_ARECA_SPECIFIC command..\n");
  1978. return 0;
  1979. }
  1980. ccb = arcmsr_get_freeccb(acb);
  1981. if (!ccb)
  1982. return SCSI_MLQUEUE_HOST_BUSY;
  1983. if (arcmsr_build_ccb( acb, ccb, cmd ) == FAILED) {
  1984. cmd->result = (DID_ERROR << 16) | (RESERVATION_CONFLICT << 1);
  1985. cmd->scsi_done(cmd);
  1986. return 0;
  1987. }
  1988. arcmsr_post_ccb(acb, ccb);
  1989. return 0;
  1990. }
  1991. static bool arcmsr_get_hba_config(struct AdapterControlBlock *acb)
  1992. {
  1993. struct MessageUnit_A __iomem *reg = acb->pmuA;
  1994. char *acb_firm_model = acb->firm_model;
  1995. char *acb_firm_version = acb->firm_version;
  1996. char *acb_device_map = acb->device_map;
  1997. char __iomem *iop_firm_model = (char __iomem *)(&reg->message_rwbuffer[15]);
  1998. char __iomem *iop_firm_version = (char __iomem *)(&reg->message_rwbuffer[17]);
  1999. char __iomem *iop_device_map = (char __iomem *)(&reg->message_rwbuffer[21]);
  2000. int count;
  2001. writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
  2002. if (!arcmsr_hba_wait_msgint_ready(acb)) {
  2003. printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
  2004. miscellaneous data' timeout \n", acb->host->host_no);
  2005. return false;
  2006. }
  2007. count = 8;
  2008. while (count){
  2009. *acb_firm_model = readb(iop_firm_model);
  2010. acb_firm_model++;
  2011. iop_firm_model++;
  2012. count--;
  2013. }
  2014. count = 16;
  2015. while (count){
  2016. *acb_firm_version = readb(iop_firm_version);
  2017. acb_firm_version++;
  2018. iop_firm_version++;
  2019. count--;
  2020. }
  2021. count=16;
  2022. while(count){
  2023. *acb_device_map = readb(iop_device_map);
  2024. acb_device_map++;
  2025. iop_device_map++;
  2026. count--;
  2027. }
  2028. printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n",
  2029. acb->host->host_no,
  2030. acb->firm_version,
  2031. acb->firm_model);
  2032. acb->signature = readl(&reg->message_rwbuffer[0]);
  2033. acb->firm_request_len = readl(&reg->message_rwbuffer[1]);
  2034. acb->firm_numbers_queue = readl(&reg->message_rwbuffer[2]);
  2035. acb->firm_sdram_size = readl(&reg->message_rwbuffer[3]);
  2036. acb->firm_hd_channels = readl(&reg->message_rwbuffer[4]);
  2037. acb->firm_cfg_version = readl(&reg->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/
  2038. return true;
  2039. }
  2040. static bool arcmsr_get_hbb_config(struct AdapterControlBlock *acb)
  2041. {
  2042. struct MessageUnit_B *reg = acb->pmuB;
  2043. struct pci_dev *pdev = acb->pdev;
  2044. void *dma_coherent;
  2045. dma_addr_t dma_coherent_handle;
  2046. char *acb_firm_model = acb->firm_model;
  2047. char *acb_firm_version = acb->firm_version;
  2048. char *acb_device_map = acb->device_map;
  2049. char __iomem *iop_firm_model;
  2050. /*firm_model,15,60-67*/
  2051. char __iomem *iop_firm_version;
  2052. /*firm_version,17,68-83*/
  2053. char __iomem *iop_device_map;
  2054. /*firm_version,21,84-99*/
  2055. int count;
  2056. dma_coherent = dma_alloc_coherent(&pdev->dev, sizeof(struct MessageUnit_B), &dma_coherent_handle, GFP_KERNEL);
  2057. if (!dma_coherent){
  2058. printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error for hbb mu\n", acb->host->host_no);
  2059. return false;
  2060. }
  2061. acb->dma_coherent_handle_hbb_mu = dma_coherent_handle;
  2062. reg = (struct MessageUnit_B *)dma_coherent;
  2063. acb->pmuB = reg;
  2064. reg->drv2iop_doorbell= (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL);
  2065. reg->drv2iop_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL_MASK);
  2066. reg->iop2drv_doorbell = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL);
  2067. reg->iop2drv_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL_MASK);
  2068. reg->message_wbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_WBUFFER);
  2069. reg->message_rbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RBUFFER);
  2070. reg->message_rwbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RWBUFFER);
  2071. iop_firm_model = (char __iomem *)(&reg->message_rwbuffer[15]); /*firm_model,15,60-67*/
  2072. iop_firm_version = (char __iomem *)(&reg->message_rwbuffer[17]); /*firm_version,17,68-83*/
  2073. iop_device_map = (char __iomem *)(&reg->message_rwbuffer[21]); /*firm_version,21,84-99*/
  2074. writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
  2075. if (!arcmsr_hbb_wait_msgint_ready(acb)) {
  2076. printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
  2077. miscellaneous data' timeout \n", acb->host->host_no);
  2078. return false;
  2079. }
  2080. count = 8;
  2081. while (count){
  2082. *acb_firm_model = readb(iop_firm_model);
  2083. acb_firm_model++;
  2084. iop_firm_model++;
  2085. count--;
  2086. }
  2087. count = 16;
  2088. while (count){
  2089. *acb_firm_version = readb(iop_firm_version);
  2090. acb_firm_version++;
  2091. iop_firm_version++;
  2092. count--;
  2093. }
  2094. count = 16;
  2095. while(count){
  2096. *acb_device_map = readb(iop_device_map);
  2097. acb_device_map++;
  2098. iop_device_map++;
  2099. count--;
  2100. }
  2101. printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n",
  2102. acb->host->host_no,
  2103. acb->firm_version,
  2104. acb->firm_model);
  2105. acb->signature = readl(&reg->message_rwbuffer[1]);
  2106. /*firm_signature,1,00-03*/
  2107. acb->firm_request_len = readl(&reg->message_rwbuffer[2]);
  2108. /*firm_request_len,1,04-07*/
  2109. acb->firm_numbers_queue = readl(&reg->message_rwbuffer[3]);
  2110. /*firm_numbers_queue,2,08-11*/
  2111. acb->firm_sdram_size = readl(&reg->message_rwbuffer[4]);
  2112. /*firm_sdram_size,3,12-15*/
  2113. acb->firm_hd_channels = readl(&reg->message_rwbuffer[5]);
  2114. /*firm_ide_channels,4,16-19*/
  2115. acb->firm_cfg_version = readl(&reg->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/
  2116. /*firm_ide_channels,4,16-19*/
  2117. return true;
  2118. }
  2119. static bool arcmsr_get_hbc_config(struct AdapterControlBlock *pACB)
  2120. {
  2121. uint32_t intmask_org, Index, firmware_state = 0;
  2122. struct MessageUnit_C *reg = pACB->pmuC;
  2123. char *acb_firm_model = pACB->firm_model;
  2124. char *acb_firm_version = pACB->firm_version;
  2125. char *iop_firm_model = (char *)(&reg->msgcode_rwbuffer[15]); /*firm_model,15,60-67*/
  2126. char *iop_firm_version = (char *)(&reg->msgcode_rwbuffer[17]); /*firm_version,17,68-83*/
  2127. int count;
  2128. /* disable all outbound interrupt */
  2129. intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
  2130. writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
  2131. /* wait firmware ready */
  2132. do {
  2133. firmware_state = readl(&reg->outbound_msgaddr1);
  2134. } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
  2135. /* post "get config" instruction */
  2136. writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
  2137. writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
  2138. /* wait message ready */
  2139. for (Index = 0; Index < 2000; Index++) {
  2140. if (readl(&reg->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
  2141. writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &reg->outbound_doorbell_clear);/*clear interrupt*/
  2142. break;
  2143. }
  2144. udelay(10);
  2145. } /*max 1 seconds*/
  2146. if (Index >= 2000) {
  2147. printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
  2148. miscellaneous data' timeout \n", pACB->host->host_no);
  2149. return false;
  2150. }
  2151. count = 8;
  2152. while (count) {
  2153. *acb_firm_model = readb(iop_firm_model);
  2154. acb_firm_model++;
  2155. iop_firm_model++;
  2156. count--;
  2157. }
  2158. count = 16;
  2159. while (count) {
  2160. *acb_firm_version = readb(iop_firm_version);
  2161. acb_firm_version++;
  2162. iop_firm_version++;
  2163. count--;
  2164. }
  2165. printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n",
  2166. pACB->host->host_no,
  2167. pACB->firm_version,
  2168. pACB->firm_model);
  2169. pACB->firm_request_len = readl(&reg->msgcode_rwbuffer[1]); /*firm_request_len,1,04-07*/
  2170. pACB->firm_numbers_queue = readl(&reg->msgcode_rwbuffer[2]); /*firm_numbers_queue,2,08-11*/
  2171. pACB->firm_sdram_size = readl(&reg->msgcode_rwbuffer[3]); /*firm_sdram_size,3,12-15*/
  2172. pACB->firm_hd_channels = readl(&reg->msgcode_rwbuffer[4]); /*firm_ide_channels,4,16-19*/
  2173. pACB->firm_cfg_version = readl(&reg->msgcode_rwbuffer[25]); /*firm_cfg_version,25,100-103*/
  2174. /*all interrupt service will be enable at arcmsr_iop_init*/
  2175. return true;
  2176. }
  2177. static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
  2178. {
  2179. if (acb->adapter_type == ACB_ADAPTER_TYPE_A)
  2180. return arcmsr_get_hba_config(acb);
  2181. else if (acb->adapter_type == ACB_ADAPTER_TYPE_B)
  2182. return arcmsr_get_hbb_config(acb);
  2183. else
  2184. return arcmsr_get_hbc_config(acb);
  2185. }
  2186. static int arcmsr_polling_hba_ccbdone(struct AdapterControlBlock *acb,
  2187. struct CommandControlBlock *poll_ccb)
  2188. {
  2189. struct MessageUnit_A __iomem *reg = acb->pmuA;
  2190. struct CommandControlBlock *ccb;
  2191. struct ARCMSR_CDB *arcmsr_cdb;
  2192. uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0;
  2193. int rtn;
  2194. bool error;
  2195. polling_hba_ccb_retry:
  2196. poll_count++;
  2197. outbound_intstatus = readl(&reg->outbound_intstatus) & acb->outbound_int_enable;
  2198. writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
  2199. while (1) {
  2200. if ((flag_ccb = readl(&reg->outbound_queueport)) == 0xFFFFFFFF) {
  2201. if (poll_ccb_done){
  2202. rtn = SUCCESS;
  2203. break;
  2204. }else {
  2205. msleep(25);
  2206. if (poll_count > 100){
  2207. rtn = FAILED;
  2208. break;
  2209. }
  2210. goto polling_hba_ccb_retry;
  2211. }
  2212. }
  2213. arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
  2214. ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
  2215. poll_ccb_done = (ccb == poll_ccb) ? 1:0;
  2216. if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
  2217. if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
  2218. printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
  2219. " poll command abort successfully \n"
  2220. , acb->host->host_no
  2221. , ccb->pcmd->device->id
  2222. , ccb->pcmd->device->lun
  2223. , ccb);
  2224. ccb->pcmd->result = DID_ABORT << 16;
  2225. arcmsr_ccb_complete(ccb);
  2226. continue;
  2227. }
  2228. printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
  2229. " command done ccb = '0x%p'"
  2230. "ccboutstandingcount = %d \n"
  2231. , acb->host->host_no
  2232. , ccb
  2233. , atomic_read(&acb->ccboutstandingcount));
  2234. continue;
  2235. }
  2236. error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
  2237. arcmsr_report_ccb_state(acb, ccb, error);
  2238. }
  2239. return rtn;
  2240. }
  2241. static int arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb,
  2242. struct CommandControlBlock *poll_ccb)
  2243. {
  2244. struct MessageUnit_B *reg = acb->pmuB;
  2245. struct ARCMSR_CDB *arcmsr_cdb;
  2246. struct CommandControlBlock *ccb;
  2247. uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0;
  2248. int index, rtn;
  2249. bool error;
  2250. polling_hbb_ccb_retry:
  2251. poll_count++;
  2252. /* clear doorbell interrupt */
  2253. writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
  2254. while(1){
  2255. index = reg->doneq_index;
  2256. if ((flag_ccb = readl(&reg->done_qbuffer[index])) == 0) {
  2257. if (poll_ccb_done){
  2258. rtn = SUCCESS;
  2259. break;
  2260. }else {
  2261. msleep(25);
  2262. if (poll_count > 100){
  2263. rtn = FAILED;
  2264. break;
  2265. }
  2266. goto polling_hbb_ccb_retry;
  2267. }
  2268. }
  2269. writel(0, &reg->done_qbuffer[index]);
  2270. index++;
  2271. /*if last index number set it to 0 */
  2272. index %= ARCMSR_MAX_HBB_POSTQUEUE;
  2273. reg->doneq_index = index;
  2274. /* check if command done with no error*/
  2275. arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
  2276. ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
  2277. poll_ccb_done = (ccb == poll_ccb) ? 1:0;
  2278. if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
  2279. if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
  2280. printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
  2281. " poll command abort successfully \n"
  2282. ,acb->host->host_no
  2283. ,ccb->pcmd->device->id
  2284. ,ccb->pcmd->device->lun
  2285. ,ccb);
  2286. ccb->pcmd->result = DID_ABORT << 16;
  2287. arcmsr_ccb_complete(ccb);
  2288. continue;
  2289. }
  2290. printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
  2291. " command done ccb = '0x%p'"
  2292. "ccboutstandingcount = %d \n"
  2293. , acb->host->host_no
  2294. , ccb
  2295. , atomic_read(&acb->ccboutstandingcount));
  2296. continue;
  2297. }
  2298. error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
  2299. arcmsr_report_ccb_state(acb, ccb, error);
  2300. }
  2301. return rtn;
  2302. }
  2303. static int arcmsr_polling_hbc_ccbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_ccb)
  2304. {
  2305. struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
  2306. uint32_t flag_ccb, ccb_cdb_phy;
  2307. struct ARCMSR_CDB *arcmsr_cdb;
  2308. bool error;
  2309. struct CommandControlBlock *pCCB;
  2310. uint32_t poll_ccb_done = 0, poll_count = 0;
  2311. int rtn;
  2312. polling_hbc_ccb_retry:
  2313. poll_count++;
  2314. while (1) {
  2315. if ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) {
  2316. if (poll_ccb_done) {
  2317. rtn = SUCCESS;
  2318. break;
  2319. } else {
  2320. msleep(25);
  2321. if (poll_count > 100) {
  2322. rtn = FAILED;
  2323. break;
  2324. }
  2325. goto polling_hbc_ccb_retry;
  2326. }
  2327. }
  2328. flag_ccb = readl(&reg->outbound_queueport_low);
  2329. ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
  2330. arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);/*frame must be 32 bytes aligned*/
  2331. pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
  2332. poll_ccb_done = (pCCB == poll_ccb) ? 1 : 0;
  2333. /* check ifcommand done with no error*/
  2334. if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
  2335. if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
  2336. printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
  2337. " poll command abort successfully \n"
  2338. , acb->host->host_no
  2339. , pCCB->pcmd->device->id
  2340. , pCCB->pcmd->device->lun
  2341. , pCCB);
  2342. pCCB->pcmd->result = DID_ABORT << 16;
  2343. arcmsr_ccb_complete(pCCB);
  2344. continue;
  2345. }
  2346. printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
  2347. " command done ccb = '0x%p'"
  2348. "ccboutstandingcount = %d \n"
  2349. , acb->host->host_no
  2350. , pCCB
  2351. , atomic_read(&acb->ccboutstandingcount));
  2352. continue;
  2353. }
  2354. error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
  2355. arcmsr_report_ccb_state(acb, pCCB, error);
  2356. }
  2357. return rtn;
  2358. }
  2359. static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb,
  2360. struct CommandControlBlock *poll_ccb)
  2361. {
  2362. int rtn = 0;
  2363. switch (acb->adapter_type) {
  2364. case ACB_ADAPTER_TYPE_A: {
  2365. rtn = arcmsr_polling_hba_ccbdone(acb, poll_ccb);
  2366. }
  2367. break;
  2368. case ACB_ADAPTER_TYPE_B: {
  2369. rtn = arcmsr_polling_hbb_ccbdone(acb, poll_ccb);
  2370. }
  2371. break;
  2372. case ACB_ADAPTER_TYPE_C: {
  2373. rtn = arcmsr_polling_hbc_ccbdone(acb, poll_ccb);
  2374. }
  2375. }
  2376. return rtn;
  2377. }
  2378. static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
  2379. {
  2380. uint32_t cdb_phyaddr, cdb_phyaddr_hi32;
  2381. dma_addr_t dma_coherent_handle;
  2382. /*
  2383. ********************************************************************
  2384. ** here we need to tell iop 331 our freeccb.HighPart
  2385. ** if freeccb.HighPart is not zero
  2386. ********************************************************************
  2387. */
  2388. dma_coherent_handle = acb->dma_coherent_handle;
  2389. cdb_phyaddr = (uint32_t)(dma_coherent_handle);
  2390. cdb_phyaddr_hi32 = (uint32_t)((cdb_phyaddr >> 16) >> 16);
  2391. acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32;
  2392. /*
  2393. ***********************************************************************
  2394. ** if adapter type B, set window of "post command Q"
  2395. ***********************************************************************
  2396. */
  2397. switch (acb->adapter_type) {
  2398. case ACB_ADAPTER_TYPE_A: {
  2399. if (cdb_phyaddr_hi32 != 0) {
  2400. struct MessageUnit_A __iomem *reg = acb->pmuA;
  2401. uint32_t intmask_org;
  2402. intmask_org = arcmsr_disable_outbound_ints(acb);
  2403. writel(ARCMSR_SIGNATURE_SET_CONFIG, \
  2404. &reg->message_rwbuffer[0]);
  2405. writel(cdb_phyaddr_hi32, &reg->message_rwbuffer[1]);
  2406. writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \
  2407. &reg->inbound_msgaddr0);
  2408. if (!arcmsr_hba_wait_msgint_ready(acb)) {
  2409. printk(KERN_NOTICE "arcmsr%d: ""set ccb high \
  2410. part physical address timeout\n",
  2411. acb->host->host_no);
  2412. return 1;
  2413. }
  2414. arcmsr_enable_outbound_ints(acb, intmask_org);
  2415. }
  2416. }
  2417. break;
  2418. case ACB_ADAPTER_TYPE_B: {
  2419. unsigned long post_queue_phyaddr;
  2420. uint32_t __iomem *rwbuffer;
  2421. struct MessageUnit_B *reg = acb->pmuB;
  2422. uint32_t intmask_org;
  2423. intmask_org = arcmsr_disable_outbound_ints(acb);
  2424. reg->postq_index = 0;
  2425. reg->doneq_index = 0;
  2426. writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell);
  2427. if (!arcmsr_hbb_wait_msgint_ready(acb)) {
  2428. printk(KERN_NOTICE "arcmsr%d:can not set diver mode\n", \
  2429. acb->host->host_no);
  2430. return 1;
  2431. }
  2432. post_queue_phyaddr = acb->dma_coherent_handle_hbb_mu;
  2433. rwbuffer = reg->message_rwbuffer;
  2434. /* driver "set config" signature */
  2435. writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
  2436. /* normal should be zero */
  2437. writel(cdb_phyaddr_hi32, rwbuffer++);
  2438. /* postQ size (256 + 8)*4 */
  2439. writel(post_queue_phyaddr, rwbuffer++);
  2440. /* doneQ size (256 + 8)*4 */
  2441. writel(post_queue_phyaddr + 1056, rwbuffer++);
  2442. /* ccb maxQ size must be --> [(256 + 8)*4]*/
  2443. writel(1056, rwbuffer);
  2444. writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell);
  2445. if (!arcmsr_hbb_wait_msgint_ready(acb)) {
  2446. printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
  2447. timeout \n",acb->host->host_no);
  2448. return 1;
  2449. }
  2450. arcmsr_hbb_enable_driver_mode(acb);
  2451. arcmsr_enable_outbound_ints(acb, intmask_org);
  2452. }
  2453. break;
  2454. case ACB_ADAPTER_TYPE_C: {
  2455. if (cdb_phyaddr_hi32 != 0) {
  2456. struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
  2457. if (cdb_phyaddr_hi32 != 0) {
  2458. unsigned char Retries = 0x00;
  2459. do {
  2460. printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x \n", acb->adapter_index, cdb_phyaddr_hi32);
  2461. } while (Retries++ < 100);
  2462. }
  2463. writel(ARCMSR_SIGNATURE_SET_CONFIG, &reg->msgcode_rwbuffer[0]);
  2464. writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[1]);
  2465. writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
  2466. writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
  2467. if (!arcmsr_hbc_wait_msgint_ready(acb)) {
  2468. printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
  2469. timeout \n", acb->host->host_no);
  2470. return 1;
  2471. }
  2472. }
  2473. }
  2474. }
  2475. return 0;
  2476. }
  2477. static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb)
  2478. {
  2479. uint32_t firmware_state = 0;
  2480. switch (acb->adapter_type) {
  2481. case ACB_ADAPTER_TYPE_A: {
  2482. struct MessageUnit_A __iomem *reg = acb->pmuA;
  2483. do {
  2484. firmware_state = readl(&reg->outbound_msgaddr1);
  2485. } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0);
  2486. }
  2487. break;
  2488. case ACB_ADAPTER_TYPE_B: {
  2489. struct MessageUnit_B *reg = acb->pmuB;
  2490. do {
  2491. firmware_state = readl(reg->iop2drv_doorbell);
  2492. } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0);
  2493. writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
  2494. }
  2495. break;
  2496. case ACB_ADAPTER_TYPE_C: {
  2497. struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
  2498. do {
  2499. firmware_state = readl(&reg->outbound_msgaddr1);
  2500. } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
  2501. }
  2502. }
  2503. }
  2504. static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb)
  2505. {
  2506. struct MessageUnit_A __iomem *reg = acb->pmuA;
  2507. if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){
  2508. return;
  2509. } else {
  2510. acb->fw_flag = FW_NORMAL;
  2511. if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)){
  2512. atomic_set(&acb->rq_map_token, 16);
  2513. }
  2514. atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
  2515. if (atomic_dec_and_test(&acb->rq_map_token))
  2516. return;
  2517. writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
  2518. mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
  2519. }
  2520. return;
  2521. }
  2522. static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb)
  2523. {
  2524. struct MessageUnit_B __iomem *reg = acb->pmuB;
  2525. if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){
  2526. return;
  2527. } else {
  2528. acb->fw_flag = FW_NORMAL;
  2529. if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) {
  2530. atomic_set(&acb->rq_map_token,16);
  2531. }
  2532. atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
  2533. if(atomic_dec_and_test(&acb->rq_map_token))
  2534. return;
  2535. writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
  2536. mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
  2537. }
  2538. return;
  2539. }
  2540. static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb)
  2541. {
  2542. struct MessageUnit_C __iomem *reg = acb->pmuC;
  2543. if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0) || ((acb->acb_flags & ACB_F_ABORT) != 0)) {
  2544. return;
  2545. } else {
  2546. acb->fw_flag = FW_NORMAL;
  2547. if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) {
  2548. atomic_set(&acb->rq_map_token, 16);
  2549. }
  2550. atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
  2551. if (atomic_dec_and_test(&acb->rq_map_token))
  2552. return;
  2553. writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
  2554. writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
  2555. mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
  2556. }
  2557. return;
  2558. }
  2559. static void arcmsr_request_device_map(unsigned long pacb)
  2560. {
  2561. struct AdapterControlBlock *acb = (struct AdapterControlBlock *)pacb;
  2562. switch (acb->adapter_type) {
  2563. case ACB_ADAPTER_TYPE_A: {
  2564. arcmsr_request_hba_device_map(acb);
  2565. }
  2566. break;
  2567. case ACB_ADAPTER_TYPE_B: {
  2568. arcmsr_request_hbb_device_map(acb);
  2569. }
  2570. break;
  2571. case ACB_ADAPTER_TYPE_C: {
  2572. arcmsr_request_hbc_device_map(acb);
  2573. }
  2574. }
  2575. }
  2576. static void arcmsr_start_hba_bgrb(struct AdapterControlBlock *acb)
  2577. {
  2578. struct MessageUnit_A __iomem *reg = acb->pmuA;
  2579. acb->acb_flags |= ACB_F_MSG_START_BGRB;
  2580. writel(ARCMSR_INBOUND_MESG0_START_BGRB, &reg->inbound_msgaddr0);
  2581. if (!arcmsr_hba_wait_msgint_ready(acb)) {
  2582. printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
  2583. rebulid' timeout \n", acb->host->host_no);
  2584. }
  2585. }
  2586. static void arcmsr_start_hbb_bgrb(struct AdapterControlBlock *acb)
  2587. {
  2588. struct MessageUnit_B *reg = acb->pmuB;
  2589. acb->acb_flags |= ACB_F_MSG_START_BGRB;
  2590. writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell);
  2591. if (!arcmsr_hbb_wait_msgint_ready(acb)) {
  2592. printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
  2593. rebulid' timeout \n",acb->host->host_no);
  2594. }
  2595. }
  2596. static void arcmsr_start_hbc_bgrb(struct AdapterControlBlock *pACB)
  2597. {
  2598. struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC;
  2599. pACB->acb_flags |= ACB_F_MSG_START_BGRB;
  2600. writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0);
  2601. writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell);
  2602. if (!arcmsr_hbc_wait_msgint_ready(pACB)) {
  2603. printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
  2604. rebulid' timeout \n", pACB->host->host_no);
  2605. }
  2606. return;
  2607. }
  2608. static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb)
  2609. {
  2610. switch (acb->adapter_type) {
  2611. case ACB_ADAPTER_TYPE_A:
  2612. arcmsr_start_hba_bgrb(acb);
  2613. break;
  2614. case ACB_ADAPTER_TYPE_B:
  2615. arcmsr_start_hbb_bgrb(acb);
  2616. break;
  2617. case ACB_ADAPTER_TYPE_C:
  2618. arcmsr_start_hbc_bgrb(acb);
  2619. }
  2620. }
  2621. static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb)
  2622. {
  2623. switch (acb->adapter_type) {
  2624. case ACB_ADAPTER_TYPE_A: {
  2625. struct MessageUnit_A __iomem *reg = acb->pmuA;
  2626. uint32_t outbound_doorbell;
  2627. /* empty doorbell Qbuffer if door bell ringed */
  2628. outbound_doorbell = readl(&reg->outbound_doorbell);
  2629. /*clear doorbell interrupt */
  2630. writel(outbound_doorbell, &reg->outbound_doorbell);
  2631. writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
  2632. }
  2633. break;
  2634. case ACB_ADAPTER_TYPE_B: {
  2635. struct MessageUnit_B *reg = acb->pmuB;
  2636. /*clear interrupt and message state*/
  2637. writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
  2638. writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
  2639. /* let IOP know data has been read */
  2640. }
  2641. break;
  2642. case ACB_ADAPTER_TYPE_C: {
  2643. struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
  2644. uint32_t outbound_doorbell;
  2645. /* empty doorbell Qbuffer if door bell ringed */
  2646. outbound_doorbell = readl(&reg->outbound_doorbell);
  2647. writel(outbound_doorbell, &reg->outbound_doorbell_clear);
  2648. writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
  2649. }
  2650. }
  2651. }
  2652. static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb)
  2653. {
  2654. switch (acb->adapter_type) {
  2655. case ACB_ADAPTER_TYPE_A:
  2656. return;
  2657. case ACB_ADAPTER_TYPE_B:
  2658. {
  2659. struct MessageUnit_B *reg = acb->pmuB;
  2660. writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell);
  2661. if (!arcmsr_hbb_wait_msgint_ready(acb)) {
  2662. printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT");
  2663. return;
  2664. }
  2665. }
  2666. break;
  2667. case ACB_ADAPTER_TYPE_C:
  2668. return;
  2669. }
  2670. return;
  2671. }
  2672. static void arcmsr_hardware_reset(struct AdapterControlBlock *acb)
  2673. {
  2674. uint8_t value[64];
  2675. int i, count = 0;
  2676. struct MessageUnit_A __iomem *pmuA = acb->pmuA;
  2677. struct MessageUnit_C __iomem *pmuC = acb->pmuC;
  2678. u32 temp = 0;
  2679. /* backup pci config data */
  2680. printk(KERN_NOTICE "arcmsr%d: executing hw bus reset .....\n", acb->host->host_no);
  2681. for (i = 0; i < 64; i++) {
  2682. pci_read_config_byte(acb->pdev, i, &value[i]);
  2683. }
  2684. /* hardware reset signal */
  2685. if ((acb->dev_id == 0x1680)) {
  2686. writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]);
  2687. } else if ((acb->dev_id == 0x1880)) {
  2688. do {
  2689. count++;
  2690. writel(0xF, &pmuC->write_sequence);
  2691. writel(0x4, &pmuC->write_sequence);
  2692. writel(0xB, &pmuC->write_sequence);
  2693. writel(0x2, &pmuC->write_sequence);
  2694. writel(0x7, &pmuC->write_sequence);
  2695. writel(0xD, &pmuC->write_sequence);
  2696. } while ((((temp = readl(&pmuC->host_diagnostic)) | ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5));
  2697. writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic);
  2698. } else {
  2699. pci_write_config_byte(acb->pdev, 0x84, 0x20);
  2700. }
  2701. msleep(2000);
  2702. /* write back pci config data */
  2703. for (i = 0; i < 64; i++) {
  2704. pci_write_config_byte(acb->pdev, i, value[i]);
  2705. }
  2706. msleep(1000);
  2707. return;
  2708. }
  2709. static void arcmsr_iop_init(struct AdapterControlBlock *acb)
  2710. {
  2711. uint32_t intmask_org;
  2712. /* disable all outbound interrupt */
  2713. intmask_org = arcmsr_disable_outbound_ints(acb);
  2714. arcmsr_wait_firmware_ready(acb);
  2715. arcmsr_iop_confirm(acb);
  2716. /*start background rebuild*/
  2717. arcmsr_start_adapter_bgrb(acb);
  2718. /* empty doorbell Qbuffer if door bell ringed */
  2719. arcmsr_clear_doorbell_queue_buffer(acb);
  2720. arcmsr_enable_eoi_mode(acb);
  2721. /* enable outbound Post Queue,outbound doorbell Interrupt */
  2722. arcmsr_enable_outbound_ints(acb, intmask_org);
  2723. acb->acb_flags |= ACB_F_IOP_INITED;
  2724. }
  2725. static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb)
  2726. {
  2727. struct CommandControlBlock *ccb;
  2728. uint32_t intmask_org;
  2729. uint8_t rtnval = 0x00;
  2730. int i = 0;
  2731. if (atomic_read(&acb->ccboutstandingcount) != 0) {
  2732. /* disable all outbound interrupt */
  2733. intmask_org = arcmsr_disable_outbound_ints(acb);
  2734. /* talk to iop 331 outstanding command aborted */
  2735. rtnval = arcmsr_abort_allcmd(acb);
  2736. /* clear all outbound posted Q */
  2737. arcmsr_done4abort_postqueue(acb);
  2738. for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
  2739. ccb = acb->pccb_pool[i];
  2740. if (ccb->startdone == ARCMSR_CCB_START) {
  2741. arcmsr_ccb_complete(ccb);
  2742. }
  2743. }
  2744. atomic_set(&acb->ccboutstandingcount, 0);
  2745. /* enable all outbound interrupt */
  2746. arcmsr_enable_outbound_ints(acb, intmask_org);
  2747. return rtnval;
  2748. }
  2749. return rtnval;
  2750. }
  2751. static int arcmsr_bus_reset(struct scsi_cmnd *cmd)
  2752. {
  2753. struct AdapterControlBlock *acb =
  2754. (struct AdapterControlBlock *)cmd->device->host->hostdata;
  2755. uint32_t intmask_org, outbound_doorbell;
  2756. int retry_count = 0;
  2757. int rtn = FAILED;
  2758. acb = (struct AdapterControlBlock *) cmd->device->host->hostdata;
  2759. printk(KERN_ERR "arcmsr: executing bus reset eh.....num_resets = %d, num_aborts = %d \n", acb->num_resets, acb->num_aborts);
  2760. acb->num_resets++;
  2761. switch(acb->adapter_type){
  2762. case ACB_ADAPTER_TYPE_A:{
  2763. if (acb->acb_flags & ACB_F_BUS_RESET){
  2764. long timeout;
  2765. printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n");
  2766. timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ);
  2767. if (timeout) {
  2768. return SUCCESS;
  2769. }
  2770. }
  2771. acb->acb_flags |= ACB_F_BUS_RESET;
  2772. if (!arcmsr_iop_reset(acb)) {
  2773. struct MessageUnit_A __iomem *reg;
  2774. reg = acb->pmuA;
  2775. arcmsr_hardware_reset(acb);
  2776. acb->acb_flags &= ~ACB_F_IOP_INITED;
  2777. sleep_again:
  2778. arcmsr_sleep_for_bus_reset(cmd);
  2779. if ((readl(&reg->outbound_msgaddr1) & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) {
  2780. printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d \n", acb->host->host_no, retry_count);
  2781. if (retry_count > retrycount) {
  2782. acb->fw_flag = FW_DEADLOCK;
  2783. printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!! \n", acb->host->host_no);
  2784. return FAILED;
  2785. }
  2786. retry_count++;
  2787. goto sleep_again;
  2788. }
  2789. acb->acb_flags |= ACB_F_IOP_INITED;
  2790. /* disable all outbound interrupt */
  2791. intmask_org = arcmsr_disable_outbound_ints(acb);
  2792. arcmsr_get_firmware_spec(acb);
  2793. arcmsr_start_adapter_bgrb(acb);
  2794. /* clear Qbuffer if door bell ringed */
  2795. outbound_doorbell = readl(&reg->outbound_doorbell);
  2796. writel(outbound_doorbell, &reg->outbound_doorbell); /*clear interrupt */
  2797. writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
  2798. /* enable outbound Post Queue,outbound doorbell Interrupt */
  2799. arcmsr_enable_outbound_ints(acb, intmask_org);
  2800. atomic_set(&acb->rq_map_token, 16);
  2801. atomic_set(&acb->ante_token_value, 16);
  2802. acb->fw_flag = FW_NORMAL;
  2803. init_timer(&acb->eternal_timer);
  2804. acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6*HZ);
  2805. acb->eternal_timer.data = (unsigned long) acb;
  2806. acb->eternal_timer.function = &arcmsr_request_device_map;
  2807. add_timer(&acb->eternal_timer);
  2808. acb->acb_flags &= ~ACB_F_BUS_RESET;
  2809. rtn = SUCCESS;
  2810. printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n");
  2811. } else {
  2812. acb->acb_flags &= ~ACB_F_BUS_RESET;
  2813. if (atomic_read(&acb->rq_map_token) == 0) {
  2814. atomic_set(&acb->rq_map_token, 16);
  2815. atomic_set(&acb->ante_token_value, 16);
  2816. acb->fw_flag = FW_NORMAL;
  2817. init_timer(&acb->eternal_timer);
  2818. acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6*HZ);
  2819. acb->eternal_timer.data = (unsigned long) acb;
  2820. acb->eternal_timer.function = &arcmsr_request_device_map;
  2821. add_timer(&acb->eternal_timer);
  2822. } else {
  2823. atomic_set(&acb->rq_map_token, 16);
  2824. atomic_set(&acb->ante_token_value, 16);
  2825. acb->fw_flag = FW_NORMAL;
  2826. mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ));
  2827. }
  2828. rtn = SUCCESS;
  2829. }
  2830. break;
  2831. }
  2832. case ACB_ADAPTER_TYPE_B:{
  2833. acb->acb_flags |= ACB_F_BUS_RESET;
  2834. if (!arcmsr_iop_reset(acb)) {
  2835. acb->acb_flags &= ~ACB_F_BUS_RESET;
  2836. rtn = FAILED;
  2837. } else {
  2838. acb->acb_flags &= ~ACB_F_BUS_RESET;
  2839. if (atomic_read(&acb->rq_map_token) == 0) {
  2840. atomic_set(&acb->rq_map_token, 16);
  2841. atomic_set(&acb->ante_token_value, 16);
  2842. acb->fw_flag = FW_NORMAL;
  2843. init_timer(&acb->eternal_timer);
  2844. acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6*HZ);
  2845. acb->eternal_timer.data = (unsigned long) acb;
  2846. acb->eternal_timer.function = &arcmsr_request_device_map;
  2847. add_timer(&acb->eternal_timer);
  2848. } else {
  2849. atomic_set(&acb->rq_map_token, 16);
  2850. atomic_set(&acb->ante_token_value, 16);
  2851. acb->fw_flag = FW_NORMAL;
  2852. mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ));
  2853. }
  2854. rtn = SUCCESS;
  2855. }
  2856. break;
  2857. }
  2858. case ACB_ADAPTER_TYPE_C:{
  2859. if (acb->acb_flags & ACB_F_BUS_RESET) {
  2860. long timeout;
  2861. printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n");
  2862. timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ);
  2863. if (timeout) {
  2864. return SUCCESS;
  2865. }
  2866. }
  2867. acb->acb_flags |= ACB_F_BUS_RESET;
  2868. if (!arcmsr_iop_reset(acb)) {
  2869. struct MessageUnit_C __iomem *reg;
  2870. reg = acb->pmuC;
  2871. arcmsr_hardware_reset(acb);
  2872. acb->acb_flags &= ~ACB_F_IOP_INITED;
  2873. sleep:
  2874. arcmsr_sleep_for_bus_reset(cmd);
  2875. if ((readl(&reg->host_diagnostic) & 0x04) != 0) {
  2876. printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d \n", acb->host->host_no, retry_count);
  2877. if (retry_count > retrycount) {
  2878. acb->fw_flag = FW_DEADLOCK;
  2879. printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!! \n", acb->host->host_no);
  2880. return FAILED;
  2881. }
  2882. retry_count++;
  2883. goto sleep;
  2884. }
  2885. acb->acb_flags |= ACB_F_IOP_INITED;
  2886. /* disable all outbound interrupt */
  2887. intmask_org = arcmsr_disable_outbound_ints(acb);
  2888. arcmsr_get_firmware_spec(acb);
  2889. arcmsr_start_adapter_bgrb(acb);
  2890. /* clear Qbuffer if door bell ringed */
  2891. outbound_doorbell = readl(&reg->outbound_doorbell);
  2892. writel(outbound_doorbell, &reg->outbound_doorbell_clear); /*clear interrupt */
  2893. writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
  2894. /* enable outbound Post Queue,outbound doorbell Interrupt */
  2895. arcmsr_enable_outbound_ints(acb, intmask_org);
  2896. atomic_set(&acb->rq_map_token, 16);
  2897. atomic_set(&acb->ante_token_value, 16);
  2898. acb->fw_flag = FW_NORMAL;
  2899. init_timer(&acb->eternal_timer);
  2900. acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ);
  2901. acb->eternal_timer.data = (unsigned long) acb;
  2902. acb->eternal_timer.function = &arcmsr_request_device_map;
  2903. add_timer(&acb->eternal_timer);
  2904. acb->acb_flags &= ~ACB_F_BUS_RESET;
  2905. rtn = SUCCESS;
  2906. printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n");
  2907. } else {
  2908. acb->acb_flags &= ~ACB_F_BUS_RESET;
  2909. if (atomic_read(&acb->rq_map_token) == 0) {
  2910. atomic_set(&acb->rq_map_token, 16);
  2911. atomic_set(&acb->ante_token_value, 16);
  2912. acb->fw_flag = FW_NORMAL;
  2913. init_timer(&acb->eternal_timer);
  2914. acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6*HZ);
  2915. acb->eternal_timer.data = (unsigned long) acb;
  2916. acb->eternal_timer.function = &arcmsr_request_device_map;
  2917. add_timer(&acb->eternal_timer);
  2918. } else {
  2919. atomic_set(&acb->rq_map_token, 16);
  2920. atomic_set(&acb->ante_token_value, 16);
  2921. acb->fw_flag = FW_NORMAL;
  2922. mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ));
  2923. }
  2924. rtn = SUCCESS;
  2925. }
  2926. break;
  2927. }
  2928. }
  2929. return rtn;
  2930. }
  2931. static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb,
  2932. struct CommandControlBlock *ccb)
  2933. {
  2934. int rtn;
  2935. rtn = arcmsr_polling_ccbdone(acb, ccb);
  2936. return rtn;
  2937. }
  2938. static int arcmsr_abort(struct scsi_cmnd *cmd)
  2939. {
  2940. struct AdapterControlBlock *acb =
  2941. (struct AdapterControlBlock *)cmd->device->host->hostdata;
  2942. int i = 0;
  2943. int rtn = FAILED;
  2944. printk(KERN_NOTICE
  2945. "arcmsr%d: abort device command of scsi id = %d lun = %d \n",
  2946. acb->host->host_no, cmd->device->id, cmd->device->lun);
  2947. acb->acb_flags |= ACB_F_ABORT;
  2948. acb->num_aborts++;
  2949. /*
  2950. ************************************************
  2951. ** the all interrupt service routine is locked
  2952. ** we need to handle it as soon as possible and exit
  2953. ************************************************
  2954. */
  2955. if (!atomic_read(&acb->ccboutstandingcount))
  2956. return rtn;
  2957. for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
  2958. struct CommandControlBlock *ccb = acb->pccb_pool[i];
  2959. if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) {
  2960. ccb->startdone = ARCMSR_CCB_ABORTED;
  2961. rtn = arcmsr_abort_one_cmd(acb, ccb);
  2962. break;
  2963. }
  2964. }
  2965. acb->acb_flags &= ~ACB_F_ABORT;
  2966. return rtn;
  2967. }
  2968. static const char *arcmsr_info(struct Scsi_Host *host)
  2969. {
  2970. struct AdapterControlBlock *acb =
  2971. (struct AdapterControlBlock *) host->hostdata;
  2972. static char buf[256];
  2973. char *type;
  2974. int raid6 = 1;
  2975. switch (acb->pdev->device) {
  2976. case PCI_DEVICE_ID_ARECA_1110:
  2977. case PCI_DEVICE_ID_ARECA_1200:
  2978. case PCI_DEVICE_ID_ARECA_1202:
  2979. case PCI_DEVICE_ID_ARECA_1210:
  2980. raid6 = 0;
  2981. /*FALLTHRU*/
  2982. case PCI_DEVICE_ID_ARECA_1120:
  2983. case PCI_DEVICE_ID_ARECA_1130:
  2984. case PCI_DEVICE_ID_ARECA_1160:
  2985. case PCI_DEVICE_ID_ARECA_1170:
  2986. case PCI_DEVICE_ID_ARECA_1201:
  2987. case PCI_DEVICE_ID_ARECA_1220:
  2988. case PCI_DEVICE_ID_ARECA_1230:
  2989. case PCI_DEVICE_ID_ARECA_1260:
  2990. case PCI_DEVICE_ID_ARECA_1270:
  2991. case PCI_DEVICE_ID_ARECA_1280:
  2992. type = "SATA";
  2993. break;
  2994. case PCI_DEVICE_ID_ARECA_1380:
  2995. case PCI_DEVICE_ID_ARECA_1381:
  2996. case PCI_DEVICE_ID_ARECA_1680:
  2997. case PCI_DEVICE_ID_ARECA_1681:
  2998. case PCI_DEVICE_ID_ARECA_1880:
  2999. type = "SAS";
  3000. break;
  3001. default:
  3002. type = "X-TYPE";
  3003. break;
  3004. }
  3005. sprintf(buf, "Areca %s Host Adapter RAID Controller%s\n %s",
  3006. type, raid6 ? "( RAID6 capable)" : "",
  3007. ARCMSR_DRIVER_VERSION);
  3008. return buf;
  3009. }