qdio_main.c 37 KB

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  1. /*
  2. * linux/drivers/s390/cio/qdio_main.c
  3. *
  4. * Linux for s390 qdio support, buffer handling, qdio API and module support.
  5. *
  6. * Copyright 2000,2008 IBM Corp.
  7. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
  8. * Jan Glauber <jang@linux.vnet.ibm.com>
  9. * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
  10. */
  11. #include <linux/module.h>
  12. #include <linux/init.h>
  13. #include <linux/kernel.h>
  14. #include <linux/timer.h>
  15. #include <linux/delay.h>
  16. #include <linux/gfp.h>
  17. #include <asm/atomic.h>
  18. #include <asm/debug.h>
  19. #include <asm/qdio.h>
  20. #include "cio.h"
  21. #include "css.h"
  22. #include "device.h"
  23. #include "qdio.h"
  24. #include "qdio_debug.h"
  25. MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\
  26. "Jan Glauber <jang@linux.vnet.ibm.com>");
  27. MODULE_DESCRIPTION("QDIO base support");
  28. MODULE_LICENSE("GPL");
  29. static inline int do_siga_sync(struct subchannel_id schid,
  30. unsigned int out_mask, unsigned int in_mask)
  31. {
  32. register unsigned long __fc asm ("0") = 2;
  33. register struct subchannel_id __schid asm ("1") = schid;
  34. register unsigned long out asm ("2") = out_mask;
  35. register unsigned long in asm ("3") = in_mask;
  36. int cc;
  37. asm volatile(
  38. " siga 0\n"
  39. " ipm %0\n"
  40. " srl %0,28\n"
  41. : "=d" (cc)
  42. : "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc");
  43. return cc;
  44. }
  45. static inline int do_siga_input(struct subchannel_id schid, unsigned int mask)
  46. {
  47. register unsigned long __fc asm ("0") = 1;
  48. register struct subchannel_id __schid asm ("1") = schid;
  49. register unsigned long __mask asm ("2") = mask;
  50. int cc;
  51. asm volatile(
  52. " siga 0\n"
  53. " ipm %0\n"
  54. " srl %0,28\n"
  55. : "=d" (cc)
  56. : "d" (__fc), "d" (__schid), "d" (__mask) : "cc", "memory");
  57. return cc;
  58. }
  59. /**
  60. * do_siga_output - perform SIGA-w/wt function
  61. * @schid: subchannel id or in case of QEBSM the subchannel token
  62. * @mask: which output queues to process
  63. * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer
  64. * @fc: function code to perform
  65. *
  66. * Returns cc or QDIO_ERROR_SIGA_ACCESS_EXCEPTION.
  67. * Note: For IQDC unicast queues only the highest priority queue is processed.
  68. */
  69. static inline int do_siga_output(unsigned long schid, unsigned long mask,
  70. unsigned int *bb, unsigned int fc)
  71. {
  72. register unsigned long __fc asm("0") = fc;
  73. register unsigned long __schid asm("1") = schid;
  74. register unsigned long __mask asm("2") = mask;
  75. int cc = QDIO_ERROR_SIGA_ACCESS_EXCEPTION;
  76. asm volatile(
  77. " siga 0\n"
  78. "0: ipm %0\n"
  79. " srl %0,28\n"
  80. "1:\n"
  81. EX_TABLE(0b, 1b)
  82. : "+d" (cc), "+d" (__fc), "+d" (__schid), "+d" (__mask)
  83. : : "cc", "memory");
  84. *bb = ((unsigned int) __fc) >> 31;
  85. return cc;
  86. }
  87. static inline int qdio_check_ccq(struct qdio_q *q, unsigned int ccq)
  88. {
  89. /* all done or next buffer state different */
  90. if (ccq == 0 || ccq == 32)
  91. return 0;
  92. /* not all buffers processed */
  93. if (ccq == 96 || ccq == 97)
  94. return 1;
  95. /* notify devices immediately */
  96. DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
  97. return -EIO;
  98. }
  99. /**
  100. * qdio_do_eqbs - extract buffer states for QEBSM
  101. * @q: queue to manipulate
  102. * @state: state of the extracted buffers
  103. * @start: buffer number to start at
  104. * @count: count of buffers to examine
  105. * @auto_ack: automatically acknowledge buffers
  106. *
  107. * Returns the number of successfully extracted equal buffer states.
  108. * Stops processing if a state is different from the last buffers state.
  109. */
  110. static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
  111. int start, int count, int auto_ack)
  112. {
  113. unsigned int ccq = 0;
  114. int tmp_count = count, tmp_start = start;
  115. int nr = q->nr;
  116. int rc;
  117. BUG_ON(!q->irq_ptr->sch_token);
  118. qperf_inc(q, eqbs);
  119. if (!q->is_input_q)
  120. nr += q->irq_ptr->nr_input_qs;
  121. again:
  122. ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count,
  123. auto_ack);
  124. rc = qdio_check_ccq(q, ccq);
  125. /* At least one buffer was processed, return and extract the remaining
  126. * buffers later.
  127. */
  128. if ((ccq == 96) && (count != tmp_count)) {
  129. qperf_inc(q, eqbs_partial);
  130. return (count - tmp_count);
  131. }
  132. if (rc == 1) {
  133. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq);
  134. goto again;
  135. }
  136. if (rc < 0) {
  137. DBF_ERROR("%4x EQBS ERROR", SCH_NO(q));
  138. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  139. q->handler(q->irq_ptr->cdev,
  140. QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
  141. 0, -1, -1, q->irq_ptr->int_parm);
  142. return 0;
  143. }
  144. return count - tmp_count;
  145. }
  146. /**
  147. * qdio_do_sqbs - set buffer states for QEBSM
  148. * @q: queue to manipulate
  149. * @state: new state of the buffers
  150. * @start: first buffer number to change
  151. * @count: how many buffers to change
  152. *
  153. * Returns the number of successfully changed buffers.
  154. * Does retrying until the specified count of buffer states is set or an
  155. * error occurs.
  156. */
  157. static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start,
  158. int count)
  159. {
  160. unsigned int ccq = 0;
  161. int tmp_count = count, tmp_start = start;
  162. int nr = q->nr;
  163. int rc;
  164. if (!count)
  165. return 0;
  166. BUG_ON(!q->irq_ptr->sch_token);
  167. qperf_inc(q, sqbs);
  168. if (!q->is_input_q)
  169. nr += q->irq_ptr->nr_input_qs;
  170. again:
  171. ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count);
  172. rc = qdio_check_ccq(q, ccq);
  173. if (rc == 1) {
  174. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq);
  175. qperf_inc(q, sqbs_partial);
  176. goto again;
  177. }
  178. if (rc < 0) {
  179. DBF_ERROR("%4x SQBS ERROR", SCH_NO(q));
  180. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  181. q->handler(q->irq_ptr->cdev,
  182. QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
  183. 0, -1, -1, q->irq_ptr->int_parm);
  184. return 0;
  185. }
  186. WARN_ON(tmp_count);
  187. return count - tmp_count;
  188. }
  189. /* returns number of examined buffers and their common state in *state */
  190. static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr,
  191. unsigned char *state, unsigned int count,
  192. int auto_ack)
  193. {
  194. unsigned char __state = 0;
  195. int i;
  196. BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK);
  197. BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q);
  198. if (is_qebsm(q))
  199. return qdio_do_eqbs(q, state, bufnr, count, auto_ack);
  200. for (i = 0; i < count; i++) {
  201. if (!__state)
  202. __state = q->slsb.val[bufnr];
  203. else if (q->slsb.val[bufnr] != __state)
  204. break;
  205. bufnr = next_buf(bufnr);
  206. }
  207. *state = __state;
  208. return i;
  209. }
  210. static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr,
  211. unsigned char *state, int auto_ack)
  212. {
  213. return get_buf_states(q, bufnr, state, 1, auto_ack);
  214. }
  215. /* wrap-around safe setting of slsb states, returns number of changed buffers */
  216. static inline int set_buf_states(struct qdio_q *q, int bufnr,
  217. unsigned char state, int count)
  218. {
  219. int i;
  220. BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK);
  221. BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q);
  222. if (is_qebsm(q))
  223. return qdio_do_sqbs(q, state, bufnr, count);
  224. for (i = 0; i < count; i++) {
  225. xchg(&q->slsb.val[bufnr], state);
  226. bufnr = next_buf(bufnr);
  227. }
  228. return count;
  229. }
  230. static inline int set_buf_state(struct qdio_q *q, int bufnr,
  231. unsigned char state)
  232. {
  233. return set_buf_states(q, bufnr, state, 1);
  234. }
  235. /* set slsb states to initial state */
  236. void qdio_init_buf_states(struct qdio_irq *irq_ptr)
  237. {
  238. struct qdio_q *q;
  239. int i;
  240. for_each_input_queue(irq_ptr, q, i)
  241. set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT,
  242. QDIO_MAX_BUFFERS_PER_Q);
  243. for_each_output_queue(irq_ptr, q, i)
  244. set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT,
  245. QDIO_MAX_BUFFERS_PER_Q);
  246. }
  247. static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output,
  248. unsigned int input)
  249. {
  250. int cc;
  251. if (!need_siga_sync(q))
  252. return 0;
  253. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr);
  254. qperf_inc(q, siga_sync);
  255. cc = do_siga_sync(q->irq_ptr->schid, output, input);
  256. if (cc)
  257. DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc);
  258. return cc;
  259. }
  260. static inline int qdio_siga_sync_q(struct qdio_q *q)
  261. {
  262. if (q->is_input_q)
  263. return qdio_siga_sync(q, 0, q->mask);
  264. else
  265. return qdio_siga_sync(q, q->mask, 0);
  266. }
  267. static inline int qdio_siga_sync_out(struct qdio_q *q)
  268. {
  269. return qdio_siga_sync(q, ~0U, 0);
  270. }
  271. static inline int qdio_siga_sync_all(struct qdio_q *q)
  272. {
  273. return qdio_siga_sync(q, ~0U, ~0U);
  274. }
  275. static int qdio_siga_output(struct qdio_q *q, unsigned int *busy_bit)
  276. {
  277. unsigned long schid;
  278. unsigned int fc = 0;
  279. u64 start_time = 0;
  280. int cc;
  281. if (q->u.out.use_enh_siga)
  282. fc = 3;
  283. if (is_qebsm(q)) {
  284. schid = q->irq_ptr->sch_token;
  285. fc |= 0x80;
  286. }
  287. else
  288. schid = *((u32 *)&q->irq_ptr->schid);
  289. again:
  290. cc = do_siga_output(schid, q->mask, busy_bit, fc);
  291. /* hipersocket busy condition */
  292. if (*busy_bit) {
  293. WARN_ON(queue_type(q) != QDIO_IQDIO_QFMT || cc != 2);
  294. if (!start_time) {
  295. start_time = get_clock();
  296. goto again;
  297. }
  298. if ((get_clock() - start_time) < QDIO_BUSY_BIT_PATIENCE)
  299. goto again;
  300. }
  301. return cc;
  302. }
  303. static inline int qdio_siga_input(struct qdio_q *q)
  304. {
  305. int cc;
  306. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr);
  307. qperf_inc(q, siga_read);
  308. cc = do_siga_input(q->irq_ptr->schid, q->mask);
  309. if (cc)
  310. DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc);
  311. return cc;
  312. }
  313. static inline void qdio_sync_after_thinint(struct qdio_q *q)
  314. {
  315. if (pci_out_supported(q)) {
  316. if (need_siga_sync_thinint(q))
  317. qdio_siga_sync_all(q);
  318. else if (need_siga_sync_out_thinint(q))
  319. qdio_siga_sync_out(q);
  320. } else
  321. qdio_siga_sync_q(q);
  322. }
  323. int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
  324. unsigned char *state)
  325. {
  326. qdio_siga_sync_q(q);
  327. return get_buf_states(q, bufnr, state, 1, 0);
  328. }
  329. static inline void qdio_stop_polling(struct qdio_q *q)
  330. {
  331. if (!q->u.in.polling)
  332. return;
  333. q->u.in.polling = 0;
  334. qperf_inc(q, stop_polling);
  335. /* show the card that we are not polling anymore */
  336. if (is_qebsm(q)) {
  337. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  338. q->u.in.ack_count);
  339. q->u.in.ack_count = 0;
  340. } else
  341. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  342. }
  343. static inline void account_sbals(struct qdio_q *q, int count)
  344. {
  345. int pos = 0;
  346. q->q_stats.nr_sbal_total += count;
  347. if (count == QDIO_MAX_BUFFERS_MASK) {
  348. q->q_stats.nr_sbals[7]++;
  349. return;
  350. }
  351. while (count >>= 1)
  352. pos++;
  353. q->q_stats.nr_sbals[pos]++;
  354. }
  355. static void announce_buffer_error(struct qdio_q *q, int count)
  356. {
  357. q->qdio_error |= QDIO_ERROR_SLSB_STATE;
  358. /* special handling for no target buffer empty */
  359. if ((!q->is_input_q &&
  360. (q->sbal[q->first_to_check]->element[15].flags & 0xff) == 0x10)) {
  361. qperf_inc(q, target_full);
  362. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x",
  363. q->first_to_check);
  364. return;
  365. }
  366. DBF_ERROR("%4x BUF ERROR", SCH_NO(q));
  367. DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr);
  368. DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count);
  369. DBF_ERROR("F14:%2x F15:%2x",
  370. q->sbal[q->first_to_check]->element[14].flags & 0xff,
  371. q->sbal[q->first_to_check]->element[15].flags & 0xff);
  372. }
  373. static inline void inbound_primed(struct qdio_q *q, int count)
  374. {
  375. int new;
  376. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim: %02x", count);
  377. /* for QEBSM the ACK was already set by EQBS */
  378. if (is_qebsm(q)) {
  379. if (!q->u.in.polling) {
  380. q->u.in.polling = 1;
  381. q->u.in.ack_count = count;
  382. q->u.in.ack_start = q->first_to_check;
  383. return;
  384. }
  385. /* delete the previous ACK's */
  386. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  387. q->u.in.ack_count);
  388. q->u.in.ack_count = count;
  389. q->u.in.ack_start = q->first_to_check;
  390. return;
  391. }
  392. /*
  393. * ACK the newest buffer. The ACK will be removed in qdio_stop_polling
  394. * or by the next inbound run.
  395. */
  396. new = add_buf(q->first_to_check, count - 1);
  397. if (q->u.in.polling) {
  398. /* reset the previous ACK but first set the new one */
  399. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  400. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  401. } else {
  402. q->u.in.polling = 1;
  403. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  404. }
  405. q->u.in.ack_start = new;
  406. count--;
  407. if (!count)
  408. return;
  409. /* need to change ALL buffers to get more interrupts */
  410. set_buf_states(q, q->first_to_check, SLSB_P_INPUT_NOT_INIT, count);
  411. }
  412. static int get_inbound_buffer_frontier(struct qdio_q *q)
  413. {
  414. int count, stop;
  415. unsigned char state;
  416. /*
  417. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  418. * would return 0.
  419. */
  420. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  421. stop = add_buf(q->first_to_check, count);
  422. if (q->first_to_check == stop)
  423. goto out;
  424. /*
  425. * No siga sync here, as a PCI or we after a thin interrupt
  426. * already sync'ed the queues.
  427. */
  428. count = get_buf_states(q, q->first_to_check, &state, count, 1);
  429. if (!count)
  430. goto out;
  431. switch (state) {
  432. case SLSB_P_INPUT_PRIMED:
  433. inbound_primed(q, count);
  434. q->first_to_check = add_buf(q->first_to_check, count);
  435. if (atomic_sub(count, &q->nr_buf_used) == 0)
  436. qperf_inc(q, inbound_queue_full);
  437. if (q->irq_ptr->perf_stat_enabled)
  438. account_sbals(q, count);
  439. break;
  440. case SLSB_P_INPUT_ERROR:
  441. announce_buffer_error(q, count);
  442. /* process the buffer, the upper layer will take care of it */
  443. q->first_to_check = add_buf(q->first_to_check, count);
  444. atomic_sub(count, &q->nr_buf_used);
  445. if (q->irq_ptr->perf_stat_enabled)
  446. account_sbals_error(q, count);
  447. break;
  448. case SLSB_CU_INPUT_EMPTY:
  449. case SLSB_P_INPUT_NOT_INIT:
  450. case SLSB_P_INPUT_ACK:
  451. if (q->irq_ptr->perf_stat_enabled)
  452. q->q_stats.nr_sbal_nop++;
  453. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop");
  454. break;
  455. default:
  456. BUG();
  457. }
  458. out:
  459. return q->first_to_check;
  460. }
  461. static int qdio_inbound_q_moved(struct qdio_q *q)
  462. {
  463. int bufnr;
  464. bufnr = get_inbound_buffer_frontier(q);
  465. if ((bufnr != q->last_move) || q->qdio_error) {
  466. q->last_move = bufnr;
  467. if (!is_thinint_irq(q->irq_ptr) && MACHINE_IS_LPAR)
  468. q->u.in.timestamp = get_clock();
  469. return 1;
  470. } else
  471. return 0;
  472. }
  473. static inline int qdio_inbound_q_done(struct qdio_q *q)
  474. {
  475. unsigned char state = 0;
  476. if (!atomic_read(&q->nr_buf_used))
  477. return 1;
  478. qdio_siga_sync_q(q);
  479. get_buf_state(q, q->first_to_check, &state, 0);
  480. if (state == SLSB_P_INPUT_PRIMED || state == SLSB_P_INPUT_ERROR)
  481. /* more work coming */
  482. return 0;
  483. if (is_thinint_irq(q->irq_ptr))
  484. return 1;
  485. /* don't poll under z/VM */
  486. if (MACHINE_IS_VM)
  487. return 1;
  488. /*
  489. * At this point we know, that inbound first_to_check
  490. * has (probably) not moved (see qdio_inbound_processing).
  491. */
  492. if (get_clock() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) {
  493. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%02x",
  494. q->first_to_check);
  495. return 1;
  496. } else
  497. return 0;
  498. }
  499. static void qdio_kick_handler(struct qdio_q *q)
  500. {
  501. int start = q->first_to_kick;
  502. int end = q->first_to_check;
  503. int count;
  504. if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  505. return;
  506. count = sub_buf(end, start);
  507. if (q->is_input_q) {
  508. qperf_inc(q, inbound_handler);
  509. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count);
  510. } else {
  511. qperf_inc(q, outbound_handler);
  512. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x",
  513. start, count);
  514. }
  515. q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count,
  516. q->irq_ptr->int_parm);
  517. /* for the next time */
  518. q->first_to_kick = end;
  519. q->qdio_error = 0;
  520. }
  521. static void __qdio_inbound_processing(struct qdio_q *q)
  522. {
  523. qperf_inc(q, tasklet_inbound);
  524. if (!qdio_inbound_q_moved(q))
  525. return;
  526. qdio_kick_handler(q);
  527. if (!qdio_inbound_q_done(q)) {
  528. /* means poll time is not yet over */
  529. qperf_inc(q, tasklet_inbound_resched);
  530. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
  531. tasklet_schedule(&q->tasklet);
  532. return;
  533. }
  534. }
  535. qdio_stop_polling(q);
  536. /*
  537. * We need to check again to not lose initiative after
  538. * resetting the ACK state.
  539. */
  540. if (!qdio_inbound_q_done(q)) {
  541. qperf_inc(q, tasklet_inbound_resched2);
  542. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
  543. tasklet_schedule(&q->tasklet);
  544. }
  545. }
  546. void qdio_inbound_processing(unsigned long data)
  547. {
  548. struct qdio_q *q = (struct qdio_q *)data;
  549. __qdio_inbound_processing(q);
  550. }
  551. static int get_outbound_buffer_frontier(struct qdio_q *q)
  552. {
  553. int count, stop;
  554. unsigned char state;
  555. if (((queue_type(q) != QDIO_IQDIO_QFMT) && !pci_out_supported(q)) ||
  556. (queue_type(q) == QDIO_IQDIO_QFMT && multicast_outbound(q)))
  557. qdio_siga_sync_q(q);
  558. /*
  559. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  560. * would return 0.
  561. */
  562. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  563. stop = add_buf(q->first_to_check, count);
  564. if (q->first_to_check == stop)
  565. return q->first_to_check;
  566. count = get_buf_states(q, q->first_to_check, &state, count, 0);
  567. if (!count)
  568. return q->first_to_check;
  569. switch (state) {
  570. case SLSB_P_OUTPUT_EMPTY:
  571. /* the adapter got it */
  572. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out empty:%1d %02x", q->nr, count);
  573. atomic_sub(count, &q->nr_buf_used);
  574. q->first_to_check = add_buf(q->first_to_check, count);
  575. if (q->irq_ptr->perf_stat_enabled)
  576. account_sbals(q, count);
  577. break;
  578. case SLSB_P_OUTPUT_ERROR:
  579. announce_buffer_error(q, count);
  580. /* process the buffer, the upper layer will take care of it */
  581. q->first_to_check = add_buf(q->first_to_check, count);
  582. atomic_sub(count, &q->nr_buf_used);
  583. if (q->irq_ptr->perf_stat_enabled)
  584. account_sbals_error(q, count);
  585. break;
  586. case SLSB_CU_OUTPUT_PRIMED:
  587. /* the adapter has not fetched the output yet */
  588. if (q->irq_ptr->perf_stat_enabled)
  589. q->q_stats.nr_sbal_nop++;
  590. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d", q->nr);
  591. break;
  592. case SLSB_P_OUTPUT_NOT_INIT:
  593. case SLSB_P_OUTPUT_HALTED:
  594. break;
  595. default:
  596. BUG();
  597. }
  598. return q->first_to_check;
  599. }
  600. /* all buffers processed? */
  601. static inline int qdio_outbound_q_done(struct qdio_q *q)
  602. {
  603. return atomic_read(&q->nr_buf_used) == 0;
  604. }
  605. static inline int qdio_outbound_q_moved(struct qdio_q *q)
  606. {
  607. int bufnr;
  608. bufnr = get_outbound_buffer_frontier(q);
  609. if ((bufnr != q->last_move) || q->qdio_error) {
  610. q->last_move = bufnr;
  611. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr);
  612. return 1;
  613. } else
  614. return 0;
  615. }
  616. static int qdio_kick_outbound_q(struct qdio_q *q)
  617. {
  618. unsigned int busy_bit;
  619. int cc;
  620. if (!need_siga_out(q))
  621. return 0;
  622. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr);
  623. qperf_inc(q, siga_write);
  624. cc = qdio_siga_output(q, &busy_bit);
  625. switch (cc) {
  626. case 0:
  627. break;
  628. case 2:
  629. if (busy_bit) {
  630. DBF_ERROR("%4x cc2 REP:%1d", SCH_NO(q), q->nr);
  631. cc |= QDIO_ERROR_SIGA_BUSY;
  632. } else
  633. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr);
  634. break;
  635. case 1:
  636. case 3:
  637. DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc);
  638. break;
  639. }
  640. return cc;
  641. }
  642. static void __qdio_outbound_processing(struct qdio_q *q)
  643. {
  644. qperf_inc(q, tasklet_outbound);
  645. BUG_ON(atomic_read(&q->nr_buf_used) < 0);
  646. if (qdio_outbound_q_moved(q))
  647. qdio_kick_handler(q);
  648. if (queue_type(q) == QDIO_ZFCP_QFMT)
  649. if (!pci_out_supported(q) && !qdio_outbound_q_done(q))
  650. goto sched;
  651. /* bail out for HiperSockets unicast queues */
  652. if (queue_type(q) == QDIO_IQDIO_QFMT && !multicast_outbound(q))
  653. return;
  654. if ((queue_type(q) == QDIO_IQDIO_QFMT) &&
  655. (atomic_read(&q->nr_buf_used)) > QDIO_IQDIO_POLL_LVL)
  656. goto sched;
  657. if (q->u.out.pci_out_enabled)
  658. return;
  659. /*
  660. * Now we know that queue type is either qeth without pci enabled
  661. * or HiperSockets multicast. Make sure buffer switch from PRIMED to
  662. * EMPTY is noticed and outbound_handler is called after some time.
  663. */
  664. if (qdio_outbound_q_done(q))
  665. del_timer(&q->u.out.timer);
  666. else
  667. if (!timer_pending(&q->u.out.timer))
  668. mod_timer(&q->u.out.timer, jiffies + 10 * HZ);
  669. return;
  670. sched:
  671. if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  672. return;
  673. tasklet_schedule(&q->tasklet);
  674. }
  675. /* outbound tasklet */
  676. void qdio_outbound_processing(unsigned long data)
  677. {
  678. struct qdio_q *q = (struct qdio_q *)data;
  679. __qdio_outbound_processing(q);
  680. }
  681. void qdio_outbound_timer(unsigned long data)
  682. {
  683. struct qdio_q *q = (struct qdio_q *)data;
  684. if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  685. return;
  686. tasklet_schedule(&q->tasklet);
  687. }
  688. static inline void qdio_check_outbound_after_thinint(struct qdio_q *q)
  689. {
  690. struct qdio_q *out;
  691. int i;
  692. if (!pci_out_supported(q))
  693. return;
  694. for_each_output_queue(q->irq_ptr, out, i)
  695. if (!qdio_outbound_q_done(out))
  696. tasklet_schedule(&out->tasklet);
  697. }
  698. static void __tiqdio_inbound_processing(struct qdio_q *q)
  699. {
  700. qperf_inc(q, tasklet_inbound);
  701. qdio_sync_after_thinint(q);
  702. /*
  703. * The interrupt could be caused by a PCI request. Check the
  704. * PCI capable outbound queues.
  705. */
  706. qdio_check_outbound_after_thinint(q);
  707. if (!qdio_inbound_q_moved(q))
  708. return;
  709. qdio_kick_handler(q);
  710. if (!qdio_inbound_q_done(q)) {
  711. qperf_inc(q, tasklet_inbound_resched);
  712. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
  713. tasklet_schedule(&q->tasklet);
  714. return;
  715. }
  716. }
  717. qdio_stop_polling(q);
  718. /*
  719. * We need to check again to not lose initiative after
  720. * resetting the ACK state.
  721. */
  722. if (!qdio_inbound_q_done(q)) {
  723. qperf_inc(q, tasklet_inbound_resched2);
  724. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
  725. tasklet_schedule(&q->tasklet);
  726. }
  727. }
  728. void tiqdio_inbound_processing(unsigned long data)
  729. {
  730. struct qdio_q *q = (struct qdio_q *)data;
  731. __tiqdio_inbound_processing(q);
  732. }
  733. static inline void qdio_set_state(struct qdio_irq *irq_ptr,
  734. enum qdio_irq_states state)
  735. {
  736. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state);
  737. irq_ptr->state = state;
  738. mb();
  739. }
  740. static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb)
  741. {
  742. if (irb->esw.esw0.erw.cons) {
  743. DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no);
  744. DBF_ERROR_HEX(irb, 64);
  745. DBF_ERROR_HEX(irb->ecw, 64);
  746. }
  747. }
  748. /* PCI interrupt handler */
  749. static void qdio_int_handler_pci(struct qdio_irq *irq_ptr)
  750. {
  751. int i;
  752. struct qdio_q *q;
  753. if (unlikely(irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  754. return;
  755. for_each_input_queue(irq_ptr, q, i)
  756. tasklet_schedule(&q->tasklet);
  757. if (!(irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED))
  758. return;
  759. for_each_output_queue(irq_ptr, q, i) {
  760. if (qdio_outbound_q_done(q))
  761. continue;
  762. if (!siga_syncs_out_pci(q))
  763. qdio_siga_sync_q(q);
  764. tasklet_schedule(&q->tasklet);
  765. }
  766. }
  767. static void qdio_handle_activate_check(struct ccw_device *cdev,
  768. unsigned long intparm, int cstat, int dstat)
  769. {
  770. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  771. struct qdio_q *q;
  772. DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no);
  773. DBF_ERROR("intp :%lx", intparm);
  774. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  775. if (irq_ptr->nr_input_qs) {
  776. q = irq_ptr->input_qs[0];
  777. } else if (irq_ptr->nr_output_qs) {
  778. q = irq_ptr->output_qs[0];
  779. } else {
  780. dump_stack();
  781. goto no_handler;
  782. }
  783. q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
  784. 0, -1, -1, irq_ptr->int_parm);
  785. no_handler:
  786. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  787. }
  788. static void qdio_establish_handle_irq(struct ccw_device *cdev, int cstat,
  789. int dstat)
  790. {
  791. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  792. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq");
  793. if (cstat)
  794. goto error;
  795. if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END))
  796. goto error;
  797. if (!(dstat & DEV_STAT_DEV_END))
  798. goto error;
  799. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED);
  800. return;
  801. error:
  802. DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no);
  803. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  804. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  805. }
  806. /* qdio interrupt handler */
  807. void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
  808. struct irb *irb)
  809. {
  810. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  811. int cstat, dstat;
  812. if (!intparm || !irq_ptr) {
  813. DBF_ERROR("qint:%4x", cdev->private->schid.sch_no);
  814. return;
  815. }
  816. if (irq_ptr->perf_stat_enabled)
  817. irq_ptr->perf_stat.qdio_int++;
  818. if (IS_ERR(irb)) {
  819. switch (PTR_ERR(irb)) {
  820. case -EIO:
  821. DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no);
  822. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  823. wake_up(&cdev->private->wait_q);
  824. return;
  825. default:
  826. WARN_ON(1);
  827. return;
  828. }
  829. }
  830. qdio_irq_check_sense(irq_ptr, irb);
  831. cstat = irb->scsw.cmd.cstat;
  832. dstat = irb->scsw.cmd.dstat;
  833. switch (irq_ptr->state) {
  834. case QDIO_IRQ_STATE_INACTIVE:
  835. qdio_establish_handle_irq(cdev, cstat, dstat);
  836. break;
  837. case QDIO_IRQ_STATE_CLEANUP:
  838. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  839. break;
  840. case QDIO_IRQ_STATE_ESTABLISHED:
  841. case QDIO_IRQ_STATE_ACTIVE:
  842. if (cstat & SCHN_STAT_PCI) {
  843. qdio_int_handler_pci(irq_ptr);
  844. return;
  845. }
  846. if (cstat || dstat)
  847. qdio_handle_activate_check(cdev, intparm, cstat,
  848. dstat);
  849. break;
  850. case QDIO_IRQ_STATE_STOPPED:
  851. break;
  852. default:
  853. WARN_ON(1);
  854. }
  855. wake_up(&cdev->private->wait_q);
  856. }
  857. /**
  858. * qdio_get_ssqd_desc - get qdio subchannel description
  859. * @cdev: ccw device to get description for
  860. * @data: where to store the ssqd
  861. *
  862. * Returns 0 or an error code. The results of the chsc are stored in the
  863. * specified structure.
  864. */
  865. int qdio_get_ssqd_desc(struct ccw_device *cdev,
  866. struct qdio_ssqd_desc *data)
  867. {
  868. if (!cdev || !cdev->private)
  869. return -EINVAL;
  870. DBF_EVENT("get ssqd:%4x", cdev->private->schid.sch_no);
  871. return qdio_setup_get_ssqd(NULL, &cdev->private->schid, data);
  872. }
  873. EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc);
  874. static void qdio_shutdown_queues(struct ccw_device *cdev)
  875. {
  876. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  877. struct qdio_q *q;
  878. int i;
  879. for_each_input_queue(irq_ptr, q, i)
  880. tasklet_kill(&q->tasklet);
  881. for_each_output_queue(irq_ptr, q, i) {
  882. del_timer(&q->u.out.timer);
  883. tasklet_kill(&q->tasklet);
  884. }
  885. }
  886. /**
  887. * qdio_shutdown - shut down a qdio subchannel
  888. * @cdev: associated ccw device
  889. * @how: use halt or clear to shutdown
  890. */
  891. int qdio_shutdown(struct ccw_device *cdev, int how)
  892. {
  893. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  894. int rc;
  895. unsigned long flags;
  896. if (!irq_ptr)
  897. return -ENODEV;
  898. BUG_ON(irqs_disabled());
  899. DBF_EVENT("qshutdown:%4x", cdev->private->schid.sch_no);
  900. mutex_lock(&irq_ptr->setup_mutex);
  901. /*
  902. * Subchannel was already shot down. We cannot prevent being called
  903. * twice since cio may trigger a shutdown asynchronously.
  904. */
  905. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  906. mutex_unlock(&irq_ptr->setup_mutex);
  907. return 0;
  908. }
  909. /*
  910. * Indicate that the device is going down. Scheduling the queue
  911. * tasklets is forbidden from here on.
  912. */
  913. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  914. tiqdio_remove_input_queues(irq_ptr);
  915. qdio_shutdown_queues(cdev);
  916. qdio_shutdown_debug_entries(irq_ptr, cdev);
  917. /* cleanup subchannel */
  918. spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
  919. if (how & QDIO_FLAG_CLEANUP_USING_CLEAR)
  920. rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
  921. else
  922. /* default behaviour is halt */
  923. rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
  924. if (rc) {
  925. DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no);
  926. DBF_ERROR("rc:%4d", rc);
  927. goto no_cleanup;
  928. }
  929. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
  930. spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
  931. wait_event_interruptible_timeout(cdev->private->wait_q,
  932. irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
  933. irq_ptr->state == QDIO_IRQ_STATE_ERR,
  934. 10 * HZ);
  935. spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
  936. no_cleanup:
  937. qdio_shutdown_thinint(irq_ptr);
  938. /* restore interrupt handler */
  939. if ((void *)cdev->handler == (void *)qdio_int_handler)
  940. cdev->handler = irq_ptr->orig_handler;
  941. spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
  942. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  943. mutex_unlock(&irq_ptr->setup_mutex);
  944. if (rc)
  945. return rc;
  946. return 0;
  947. }
  948. EXPORT_SYMBOL_GPL(qdio_shutdown);
  949. /**
  950. * qdio_free - free data structures for a qdio subchannel
  951. * @cdev: associated ccw device
  952. */
  953. int qdio_free(struct ccw_device *cdev)
  954. {
  955. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  956. if (!irq_ptr)
  957. return -ENODEV;
  958. DBF_EVENT("qfree:%4x", cdev->private->schid.sch_no);
  959. mutex_lock(&irq_ptr->setup_mutex);
  960. if (irq_ptr->debug_area != NULL) {
  961. debug_unregister(irq_ptr->debug_area);
  962. irq_ptr->debug_area = NULL;
  963. }
  964. cdev->private->qdio_data = NULL;
  965. mutex_unlock(&irq_ptr->setup_mutex);
  966. qdio_release_memory(irq_ptr);
  967. return 0;
  968. }
  969. EXPORT_SYMBOL_GPL(qdio_free);
  970. /**
  971. * qdio_allocate - allocate qdio queues and associated data
  972. * @init_data: initialization data
  973. */
  974. int qdio_allocate(struct qdio_initialize *init_data)
  975. {
  976. struct qdio_irq *irq_ptr;
  977. DBF_EVENT("qallocate:%4x", init_data->cdev->private->schid.sch_no);
  978. if ((init_data->no_input_qs && !init_data->input_handler) ||
  979. (init_data->no_output_qs && !init_data->output_handler))
  980. return -EINVAL;
  981. if ((init_data->no_input_qs > QDIO_MAX_QUEUES_PER_IRQ) ||
  982. (init_data->no_output_qs > QDIO_MAX_QUEUES_PER_IRQ))
  983. return -EINVAL;
  984. if ((!init_data->input_sbal_addr_array) ||
  985. (!init_data->output_sbal_addr_array))
  986. return -EINVAL;
  987. /* irq_ptr must be in GFP_DMA since it contains ccw1.cda */
  988. irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  989. if (!irq_ptr)
  990. goto out_err;
  991. mutex_init(&irq_ptr->setup_mutex);
  992. qdio_allocate_dbf(init_data, irq_ptr);
  993. /*
  994. * Allocate a page for the chsc calls in qdio_establish.
  995. * Must be pre-allocated since a zfcp recovery will call
  996. * qdio_establish. In case of low memory and swap on a zfcp disk
  997. * we may not be able to allocate memory otherwise.
  998. */
  999. irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL);
  1000. if (!irq_ptr->chsc_page)
  1001. goto out_rel;
  1002. /* qdr is used in ccw1.cda which is u32 */
  1003. irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  1004. if (!irq_ptr->qdr)
  1005. goto out_rel;
  1006. WARN_ON((unsigned long)irq_ptr->qdr & 0xfff);
  1007. if (qdio_allocate_qs(irq_ptr, init_data->no_input_qs,
  1008. init_data->no_output_qs))
  1009. goto out_rel;
  1010. init_data->cdev->private->qdio_data = irq_ptr;
  1011. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  1012. return 0;
  1013. out_rel:
  1014. qdio_release_memory(irq_ptr);
  1015. out_err:
  1016. return -ENOMEM;
  1017. }
  1018. EXPORT_SYMBOL_GPL(qdio_allocate);
  1019. /**
  1020. * qdio_establish - establish queues on a qdio subchannel
  1021. * @init_data: initialization data
  1022. */
  1023. int qdio_establish(struct qdio_initialize *init_data)
  1024. {
  1025. struct qdio_irq *irq_ptr;
  1026. struct ccw_device *cdev = init_data->cdev;
  1027. unsigned long saveflags;
  1028. int rc;
  1029. DBF_EVENT("qestablish:%4x", cdev->private->schid.sch_no);
  1030. irq_ptr = cdev->private->qdio_data;
  1031. if (!irq_ptr)
  1032. return -ENODEV;
  1033. if (cdev->private->state != DEV_STATE_ONLINE)
  1034. return -EINVAL;
  1035. mutex_lock(&irq_ptr->setup_mutex);
  1036. qdio_setup_irq(init_data);
  1037. rc = qdio_establish_thinint(irq_ptr);
  1038. if (rc) {
  1039. mutex_unlock(&irq_ptr->setup_mutex);
  1040. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1041. return rc;
  1042. }
  1043. /* establish q */
  1044. irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd;
  1045. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1046. irq_ptr->ccw.count = irq_ptr->equeue.count;
  1047. irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr);
  1048. spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
  1049. ccw_device_set_options_mask(cdev, 0);
  1050. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0);
  1051. if (rc) {
  1052. DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no);
  1053. DBF_ERROR("rc:%4x", rc);
  1054. }
  1055. spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
  1056. if (rc) {
  1057. mutex_unlock(&irq_ptr->setup_mutex);
  1058. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1059. return rc;
  1060. }
  1061. wait_event_interruptible_timeout(cdev->private->wait_q,
  1062. irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
  1063. irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ);
  1064. if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) {
  1065. mutex_unlock(&irq_ptr->setup_mutex);
  1066. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1067. return -EIO;
  1068. }
  1069. qdio_setup_ssqd_info(irq_ptr);
  1070. DBF_EVENT("qDmmwc:%2x", irq_ptr->ssqd_desc.mmwc);
  1071. DBF_EVENT("qib ac:%4x", irq_ptr->qib.ac);
  1072. /* qebsm is now setup if available, initialize buffer states */
  1073. qdio_init_buf_states(irq_ptr);
  1074. mutex_unlock(&irq_ptr->setup_mutex);
  1075. qdio_print_subchannel_info(irq_ptr, cdev);
  1076. qdio_setup_debug_entries(irq_ptr, cdev);
  1077. return 0;
  1078. }
  1079. EXPORT_SYMBOL_GPL(qdio_establish);
  1080. /**
  1081. * qdio_activate - activate queues on a qdio subchannel
  1082. * @cdev: associated cdev
  1083. */
  1084. int qdio_activate(struct ccw_device *cdev)
  1085. {
  1086. struct qdio_irq *irq_ptr;
  1087. int rc;
  1088. unsigned long saveflags;
  1089. DBF_EVENT("qactivate:%4x", cdev->private->schid.sch_no);
  1090. irq_ptr = cdev->private->qdio_data;
  1091. if (!irq_ptr)
  1092. return -ENODEV;
  1093. if (cdev->private->state != DEV_STATE_ONLINE)
  1094. return -EINVAL;
  1095. mutex_lock(&irq_ptr->setup_mutex);
  1096. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  1097. rc = -EBUSY;
  1098. goto out;
  1099. }
  1100. irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd;
  1101. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1102. irq_ptr->ccw.count = irq_ptr->aqueue.count;
  1103. irq_ptr->ccw.cda = 0;
  1104. spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
  1105. ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
  1106. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE,
  1107. 0, DOIO_DENY_PREFETCH);
  1108. if (rc) {
  1109. DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no);
  1110. DBF_ERROR("rc:%4x", rc);
  1111. }
  1112. spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
  1113. if (rc)
  1114. goto out;
  1115. if (is_thinint_irq(irq_ptr))
  1116. tiqdio_add_input_queues(irq_ptr);
  1117. /* wait for subchannel to become active */
  1118. msleep(5);
  1119. switch (irq_ptr->state) {
  1120. case QDIO_IRQ_STATE_STOPPED:
  1121. case QDIO_IRQ_STATE_ERR:
  1122. rc = -EIO;
  1123. break;
  1124. default:
  1125. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
  1126. rc = 0;
  1127. }
  1128. out:
  1129. mutex_unlock(&irq_ptr->setup_mutex);
  1130. return rc;
  1131. }
  1132. EXPORT_SYMBOL_GPL(qdio_activate);
  1133. static inline int buf_in_between(int bufnr, int start, int count)
  1134. {
  1135. int end = add_buf(start, count);
  1136. if (end > start) {
  1137. if (bufnr >= start && bufnr < end)
  1138. return 1;
  1139. else
  1140. return 0;
  1141. }
  1142. /* wrap-around case */
  1143. if ((bufnr >= start && bufnr <= QDIO_MAX_BUFFERS_PER_Q) ||
  1144. (bufnr < end))
  1145. return 1;
  1146. else
  1147. return 0;
  1148. }
  1149. /**
  1150. * handle_inbound - reset processed input buffers
  1151. * @q: queue containing the buffers
  1152. * @callflags: flags
  1153. * @bufnr: first buffer to process
  1154. * @count: how many buffers are emptied
  1155. */
  1156. static int handle_inbound(struct qdio_q *q, unsigned int callflags,
  1157. int bufnr, int count)
  1158. {
  1159. int used, diff;
  1160. qperf_inc(q, inbound_call);
  1161. if (!q->u.in.polling)
  1162. goto set;
  1163. /* protect against stop polling setting an ACK for an emptied slsb */
  1164. if (count == QDIO_MAX_BUFFERS_PER_Q) {
  1165. /* overwriting everything, just delete polling status */
  1166. q->u.in.polling = 0;
  1167. q->u.in.ack_count = 0;
  1168. goto set;
  1169. } else if (buf_in_between(q->u.in.ack_start, bufnr, count)) {
  1170. if (is_qebsm(q)) {
  1171. /* partial overwrite, just update ack_start */
  1172. diff = add_buf(bufnr, count);
  1173. diff = sub_buf(diff, q->u.in.ack_start);
  1174. q->u.in.ack_count -= diff;
  1175. if (q->u.in.ack_count <= 0) {
  1176. q->u.in.polling = 0;
  1177. q->u.in.ack_count = 0;
  1178. goto set;
  1179. }
  1180. q->u.in.ack_start = add_buf(q->u.in.ack_start, diff);
  1181. }
  1182. else
  1183. /* the only ACK will be deleted, so stop polling */
  1184. q->u.in.polling = 0;
  1185. }
  1186. set:
  1187. count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count);
  1188. used = atomic_add_return(count, &q->nr_buf_used) - count;
  1189. BUG_ON(used + count > QDIO_MAX_BUFFERS_PER_Q);
  1190. /* no need to signal as long as the adapter had free buffers */
  1191. if (used)
  1192. return 0;
  1193. if (need_siga_in(q))
  1194. return qdio_siga_input(q);
  1195. return 0;
  1196. }
  1197. /**
  1198. * handle_outbound - process filled outbound buffers
  1199. * @q: queue containing the buffers
  1200. * @callflags: flags
  1201. * @bufnr: first buffer to process
  1202. * @count: how many buffers are filled
  1203. */
  1204. static int handle_outbound(struct qdio_q *q, unsigned int callflags,
  1205. int bufnr, int count)
  1206. {
  1207. unsigned char state;
  1208. int used, rc = 0;
  1209. qperf_inc(q, outbound_call);
  1210. count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count);
  1211. used = atomic_add_return(count, &q->nr_buf_used);
  1212. BUG_ON(used > QDIO_MAX_BUFFERS_PER_Q);
  1213. if (callflags & QDIO_FLAG_PCI_OUT) {
  1214. q->u.out.pci_out_enabled = 1;
  1215. qperf_inc(q, pci_request_int);
  1216. }
  1217. else
  1218. q->u.out.pci_out_enabled = 0;
  1219. if (queue_type(q) == QDIO_IQDIO_QFMT) {
  1220. if (multicast_outbound(q))
  1221. rc = qdio_kick_outbound_q(q);
  1222. else
  1223. if ((q->irq_ptr->ssqd_desc.mmwc > 1) &&
  1224. (count > 1) &&
  1225. (count <= q->irq_ptr->ssqd_desc.mmwc)) {
  1226. /* exploit enhanced SIGA */
  1227. q->u.out.use_enh_siga = 1;
  1228. rc = qdio_kick_outbound_q(q);
  1229. } else {
  1230. /*
  1231. * One siga-w per buffer required for unicast
  1232. * HiperSockets.
  1233. */
  1234. q->u.out.use_enh_siga = 0;
  1235. while (count--) {
  1236. rc = qdio_kick_outbound_q(q);
  1237. if (rc)
  1238. goto out;
  1239. }
  1240. }
  1241. goto out;
  1242. }
  1243. if (need_siga_sync(q)) {
  1244. qdio_siga_sync_q(q);
  1245. goto out;
  1246. }
  1247. /* try to fast requeue buffers */
  1248. get_buf_state(q, prev_buf(bufnr), &state, 0);
  1249. if (state != SLSB_CU_OUTPUT_PRIMED)
  1250. rc = qdio_kick_outbound_q(q);
  1251. else
  1252. qperf_inc(q, fast_requeue);
  1253. out:
  1254. tasklet_schedule(&q->tasklet);
  1255. return rc;
  1256. }
  1257. /**
  1258. * do_QDIO - process input or output buffers
  1259. * @cdev: associated ccw_device for the qdio subchannel
  1260. * @callflags: input or output and special flags from the program
  1261. * @q_nr: queue number
  1262. * @bufnr: buffer number
  1263. * @count: how many buffers to process
  1264. */
  1265. int do_QDIO(struct ccw_device *cdev, unsigned int callflags,
  1266. int q_nr, unsigned int bufnr, unsigned int count)
  1267. {
  1268. struct qdio_irq *irq_ptr;
  1269. if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q)
  1270. return -EINVAL;
  1271. irq_ptr = cdev->private->qdio_data;
  1272. if (!irq_ptr)
  1273. return -ENODEV;
  1274. DBF_DEV_EVENT(DBF_INFO, irq_ptr,
  1275. "do%02x b:%02x c:%02x", callflags, bufnr, count);
  1276. if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)
  1277. return -EBUSY;
  1278. if (callflags & QDIO_FLAG_SYNC_INPUT)
  1279. return handle_inbound(irq_ptr->input_qs[q_nr],
  1280. callflags, bufnr, count);
  1281. else if (callflags & QDIO_FLAG_SYNC_OUTPUT)
  1282. return handle_outbound(irq_ptr->output_qs[q_nr],
  1283. callflags, bufnr, count);
  1284. return -EINVAL;
  1285. }
  1286. EXPORT_SYMBOL_GPL(do_QDIO);
  1287. static int __init init_QDIO(void)
  1288. {
  1289. int rc;
  1290. rc = qdio_setup_init();
  1291. if (rc)
  1292. return rc;
  1293. rc = tiqdio_allocate_memory();
  1294. if (rc)
  1295. goto out_cache;
  1296. rc = qdio_debug_init();
  1297. if (rc)
  1298. goto out_ti;
  1299. rc = tiqdio_register_thinints();
  1300. if (rc)
  1301. goto out_debug;
  1302. return 0;
  1303. out_debug:
  1304. qdio_debug_exit();
  1305. out_ti:
  1306. tiqdio_free_memory();
  1307. out_cache:
  1308. qdio_setup_exit();
  1309. return rc;
  1310. }
  1311. static void __exit exit_QDIO(void)
  1312. {
  1313. tiqdio_unregister_thinints();
  1314. tiqdio_free_memory();
  1315. qdio_debug_exit();
  1316. qdio_setup_exit();
  1317. }
  1318. module_init(init_QDIO);
  1319. module_exit(exit_QDIO);