onenand_base.c 106 KB

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  1. /*
  2. * linux/drivers/mtd/onenand/onenand_base.c
  3. *
  4. * Copyright © 2005-2009 Samsung Electronics
  5. * Copyright © 2007 Nokia Corporation
  6. *
  7. * Kyungmin Park <kyungmin.park@samsung.com>
  8. *
  9. * Credits:
  10. * Adrian Hunter <ext-adrian.hunter@nokia.com>:
  11. * auto-placement support, read-while load support, various fixes
  12. *
  13. * Vishak G <vishak.g at samsung.com>, Rohit Hagargundgi <h.rohit at samsung.com>
  14. * Flex-OneNAND support
  15. * Amul Kumar Saha <amul.saha at samsung.com>
  16. * OTP support
  17. *
  18. * This program is free software; you can redistribute it and/or modify
  19. * it under the terms of the GNU General Public License version 2 as
  20. * published by the Free Software Foundation.
  21. */
  22. #include <linux/kernel.h>
  23. #include <linux/module.h>
  24. #include <linux/moduleparam.h>
  25. #include <linux/slab.h>
  26. #include <linux/init.h>
  27. #include <linux/sched.h>
  28. #include <linux/delay.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/jiffies.h>
  31. #include <linux/mtd/mtd.h>
  32. #include <linux/mtd/onenand.h>
  33. #include <linux/mtd/partitions.h>
  34. #include <asm/io.h>
  35. /*
  36. * Multiblock erase if number of blocks to erase is 2 or more.
  37. * Maximum number of blocks for simultaneous erase is 64.
  38. */
  39. #define MB_ERASE_MIN_BLK_COUNT 2
  40. #define MB_ERASE_MAX_BLK_COUNT 64
  41. /* Default Flex-OneNAND boundary and lock respectively */
  42. static int flex_bdry[MAX_DIES * 2] = { -1, 0, -1, 0 };
  43. module_param_array(flex_bdry, int, NULL, 0400);
  44. MODULE_PARM_DESC(flex_bdry, "SLC Boundary information for Flex-OneNAND"
  45. "Syntax:flex_bdry=DIE_BDRY,LOCK,..."
  46. "DIE_BDRY: SLC boundary of the die"
  47. "LOCK: Locking information for SLC boundary"
  48. " : 0->Set boundary in unlocked status"
  49. " : 1->Set boundary in locked status");
  50. /* Default OneNAND/Flex-OneNAND OTP options*/
  51. static int otp;
  52. module_param(otp, int, 0400);
  53. MODULE_PARM_DESC(otp, "Corresponding behaviour of OneNAND in OTP"
  54. "Syntax : otp=LOCK_TYPE"
  55. "LOCK_TYPE : Keys issued, for specific OTP Lock type"
  56. " : 0 -> Default (No Blocks Locked)"
  57. " : 1 -> OTP Block lock"
  58. " : 2 -> 1st Block lock"
  59. " : 3 -> BOTH OTP Block and 1st Block lock");
  60. /**
  61. * onenand_oob_128 - oob info for Flex-Onenand with 4KB page
  62. * For now, we expose only 64 out of 80 ecc bytes
  63. */
  64. static struct nand_ecclayout onenand_oob_128 = {
  65. .eccbytes = 64,
  66. .eccpos = {
  67. 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
  68. 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
  69. 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
  70. 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
  71. 70, 71, 72, 73, 74, 75, 76, 77, 78, 79,
  72. 86, 87, 88, 89, 90, 91, 92, 93, 94, 95,
  73. 102, 103, 104, 105
  74. },
  75. .oobfree = {
  76. {2, 4}, {18, 4}, {34, 4}, {50, 4},
  77. {66, 4}, {82, 4}, {98, 4}, {114, 4}
  78. }
  79. };
  80. /**
  81. * onenand_oob_64 - oob info for large (2KB) page
  82. */
  83. static struct nand_ecclayout onenand_oob_64 = {
  84. .eccbytes = 20,
  85. .eccpos = {
  86. 8, 9, 10, 11, 12,
  87. 24, 25, 26, 27, 28,
  88. 40, 41, 42, 43, 44,
  89. 56, 57, 58, 59, 60,
  90. },
  91. .oobfree = {
  92. {2, 3}, {14, 2}, {18, 3}, {30, 2},
  93. {34, 3}, {46, 2}, {50, 3}, {62, 2}
  94. }
  95. };
  96. /**
  97. * onenand_oob_32 - oob info for middle (1KB) page
  98. */
  99. static struct nand_ecclayout onenand_oob_32 = {
  100. .eccbytes = 10,
  101. .eccpos = {
  102. 8, 9, 10, 11, 12,
  103. 24, 25, 26, 27, 28,
  104. },
  105. .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
  106. };
  107. static const unsigned char ffchars[] = {
  108. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  109. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
  110. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  111. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
  112. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  113. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
  114. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  115. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
  116. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  117. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 80 */
  118. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  119. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 96 */
  120. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  121. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 112 */
  122. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  123. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 128 */
  124. };
  125. /**
  126. * onenand_readw - [OneNAND Interface] Read OneNAND register
  127. * @param addr address to read
  128. *
  129. * Read OneNAND register
  130. */
  131. static unsigned short onenand_readw(void __iomem *addr)
  132. {
  133. return readw(addr);
  134. }
  135. /**
  136. * onenand_writew - [OneNAND Interface] Write OneNAND register with value
  137. * @param value value to write
  138. * @param addr address to write
  139. *
  140. * Write OneNAND register with value
  141. */
  142. static void onenand_writew(unsigned short value, void __iomem *addr)
  143. {
  144. writew(value, addr);
  145. }
  146. /**
  147. * onenand_block_address - [DEFAULT] Get block address
  148. * @param this onenand chip data structure
  149. * @param block the block
  150. * @return translated block address if DDP, otherwise same
  151. *
  152. * Setup Start Address 1 Register (F100h)
  153. */
  154. static int onenand_block_address(struct onenand_chip *this, int block)
  155. {
  156. /* Device Flash Core select, NAND Flash Block Address */
  157. if (block & this->density_mask)
  158. return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
  159. return block;
  160. }
  161. /**
  162. * onenand_bufferram_address - [DEFAULT] Get bufferram address
  163. * @param this onenand chip data structure
  164. * @param block the block
  165. * @return set DBS value if DDP, otherwise 0
  166. *
  167. * Setup Start Address 2 Register (F101h) for DDP
  168. */
  169. static int onenand_bufferram_address(struct onenand_chip *this, int block)
  170. {
  171. /* Device BufferRAM Select */
  172. if (block & this->density_mask)
  173. return ONENAND_DDP_CHIP1;
  174. return ONENAND_DDP_CHIP0;
  175. }
  176. /**
  177. * onenand_page_address - [DEFAULT] Get page address
  178. * @param page the page address
  179. * @param sector the sector address
  180. * @return combined page and sector address
  181. *
  182. * Setup Start Address 8 Register (F107h)
  183. */
  184. static int onenand_page_address(int page, int sector)
  185. {
  186. /* Flash Page Address, Flash Sector Address */
  187. int fpa, fsa;
  188. fpa = page & ONENAND_FPA_MASK;
  189. fsa = sector & ONENAND_FSA_MASK;
  190. return ((fpa << ONENAND_FPA_SHIFT) | fsa);
  191. }
  192. /**
  193. * onenand_buffer_address - [DEFAULT] Get buffer address
  194. * @param dataram1 DataRAM index
  195. * @param sectors the sector address
  196. * @param count the number of sectors
  197. * @return the start buffer value
  198. *
  199. * Setup Start Buffer Register (F200h)
  200. */
  201. static int onenand_buffer_address(int dataram1, int sectors, int count)
  202. {
  203. int bsa, bsc;
  204. /* BufferRAM Sector Address */
  205. bsa = sectors & ONENAND_BSA_MASK;
  206. if (dataram1)
  207. bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
  208. else
  209. bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
  210. /* BufferRAM Sector Count */
  211. bsc = count & ONENAND_BSC_MASK;
  212. return ((bsa << ONENAND_BSA_SHIFT) | bsc);
  213. }
  214. /**
  215. * flexonenand_block- For given address return block number
  216. * @param this - OneNAND device structure
  217. * @param addr - Address for which block number is needed
  218. */
  219. static unsigned flexonenand_block(struct onenand_chip *this, loff_t addr)
  220. {
  221. unsigned boundary, blk, die = 0;
  222. if (ONENAND_IS_DDP(this) && addr >= this->diesize[0]) {
  223. die = 1;
  224. addr -= this->diesize[0];
  225. }
  226. boundary = this->boundary[die];
  227. blk = addr >> (this->erase_shift - 1);
  228. if (blk > boundary)
  229. blk = (blk + boundary + 1) >> 1;
  230. blk += die ? this->density_mask : 0;
  231. return blk;
  232. }
  233. inline unsigned onenand_block(struct onenand_chip *this, loff_t addr)
  234. {
  235. if (!FLEXONENAND(this))
  236. return addr >> this->erase_shift;
  237. return flexonenand_block(this, addr);
  238. }
  239. /**
  240. * flexonenand_addr - Return address of the block
  241. * @this: OneNAND device structure
  242. * @block: Block number on Flex-OneNAND
  243. *
  244. * Return address of the block
  245. */
  246. static loff_t flexonenand_addr(struct onenand_chip *this, int block)
  247. {
  248. loff_t ofs = 0;
  249. int die = 0, boundary;
  250. if (ONENAND_IS_DDP(this) && block >= this->density_mask) {
  251. block -= this->density_mask;
  252. die = 1;
  253. ofs = this->diesize[0];
  254. }
  255. boundary = this->boundary[die];
  256. ofs += (loff_t)block << (this->erase_shift - 1);
  257. if (block > (boundary + 1))
  258. ofs += (loff_t)(block - boundary - 1) << (this->erase_shift - 1);
  259. return ofs;
  260. }
  261. loff_t onenand_addr(struct onenand_chip *this, int block)
  262. {
  263. if (!FLEXONENAND(this))
  264. return (loff_t)block << this->erase_shift;
  265. return flexonenand_addr(this, block);
  266. }
  267. EXPORT_SYMBOL(onenand_addr);
  268. /**
  269. * onenand_get_density - [DEFAULT] Get OneNAND density
  270. * @param dev_id OneNAND device ID
  271. *
  272. * Get OneNAND density from device ID
  273. */
  274. static inline int onenand_get_density(int dev_id)
  275. {
  276. int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
  277. return (density & ONENAND_DEVICE_DENSITY_MASK);
  278. }
  279. /**
  280. * flexonenand_region - [Flex-OneNAND] Return erase region of addr
  281. * @param mtd MTD device structure
  282. * @param addr address whose erase region needs to be identified
  283. */
  284. int flexonenand_region(struct mtd_info *mtd, loff_t addr)
  285. {
  286. int i;
  287. for (i = 0; i < mtd->numeraseregions; i++)
  288. if (addr < mtd->eraseregions[i].offset)
  289. break;
  290. return i - 1;
  291. }
  292. EXPORT_SYMBOL(flexonenand_region);
  293. /**
  294. * onenand_command - [DEFAULT] Send command to OneNAND device
  295. * @param mtd MTD device structure
  296. * @param cmd the command to be sent
  297. * @param addr offset to read from or write to
  298. * @param len number of bytes to read or write
  299. *
  300. * Send command to OneNAND device. This function is used for middle/large page
  301. * devices (1KB/2KB Bytes per page)
  302. */
  303. static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
  304. {
  305. struct onenand_chip *this = mtd->priv;
  306. int value, block, page;
  307. /* Address translation */
  308. switch (cmd) {
  309. case ONENAND_CMD_UNLOCK:
  310. case ONENAND_CMD_LOCK:
  311. case ONENAND_CMD_LOCK_TIGHT:
  312. case ONENAND_CMD_UNLOCK_ALL:
  313. block = -1;
  314. page = -1;
  315. break;
  316. case FLEXONENAND_CMD_PI_ACCESS:
  317. /* addr contains die index */
  318. block = addr * this->density_mask;
  319. page = -1;
  320. break;
  321. case ONENAND_CMD_ERASE:
  322. case ONENAND_CMD_MULTIBLOCK_ERASE:
  323. case ONENAND_CMD_ERASE_VERIFY:
  324. case ONENAND_CMD_BUFFERRAM:
  325. case ONENAND_CMD_OTP_ACCESS:
  326. block = onenand_block(this, addr);
  327. page = -1;
  328. break;
  329. case FLEXONENAND_CMD_READ_PI:
  330. cmd = ONENAND_CMD_READ;
  331. block = addr * this->density_mask;
  332. page = 0;
  333. break;
  334. default:
  335. block = onenand_block(this, addr);
  336. if (FLEXONENAND(this))
  337. page = (int) (addr - onenand_addr(this, block))>>\
  338. this->page_shift;
  339. else
  340. page = (int) (addr >> this->page_shift);
  341. if (ONENAND_IS_2PLANE(this)) {
  342. /* Make the even block number */
  343. block &= ~1;
  344. /* Is it the odd plane? */
  345. if (addr & this->writesize)
  346. block++;
  347. page >>= 1;
  348. }
  349. page &= this->page_mask;
  350. break;
  351. }
  352. /* NOTE: The setting order of the registers is very important! */
  353. if (cmd == ONENAND_CMD_BUFFERRAM) {
  354. /* Select DataRAM for DDP */
  355. value = onenand_bufferram_address(this, block);
  356. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  357. if (ONENAND_IS_MLC(this) || ONENAND_IS_2PLANE(this) ||
  358. ONENAND_IS_4KB_PAGE(this))
  359. /* It is always BufferRAM0 */
  360. ONENAND_SET_BUFFERRAM0(this);
  361. else
  362. /* Switch to the next data buffer */
  363. ONENAND_SET_NEXT_BUFFERRAM(this);
  364. return 0;
  365. }
  366. if (block != -1) {
  367. /* Write 'DFS, FBA' of Flash */
  368. value = onenand_block_address(this, block);
  369. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
  370. /* Select DataRAM for DDP */
  371. value = onenand_bufferram_address(this, block);
  372. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  373. }
  374. if (page != -1) {
  375. /* Now we use page size operation */
  376. int sectors = 0, count = 0;
  377. int dataram;
  378. switch (cmd) {
  379. case FLEXONENAND_CMD_RECOVER_LSB:
  380. case ONENAND_CMD_READ:
  381. case ONENAND_CMD_READOOB:
  382. if (ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this))
  383. /* It is always BufferRAM0 */
  384. dataram = ONENAND_SET_BUFFERRAM0(this);
  385. else
  386. dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
  387. break;
  388. default:
  389. if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
  390. cmd = ONENAND_CMD_2X_PROG;
  391. dataram = ONENAND_CURRENT_BUFFERRAM(this);
  392. break;
  393. }
  394. /* Write 'FPA, FSA' of Flash */
  395. value = onenand_page_address(page, sectors);
  396. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
  397. /* Write 'BSA, BSC' of DataRAM */
  398. value = onenand_buffer_address(dataram, sectors, count);
  399. this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
  400. }
  401. /* Interrupt clear */
  402. this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
  403. /* Write command */
  404. this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
  405. return 0;
  406. }
  407. /**
  408. * onenand_read_ecc - return ecc status
  409. * @param this onenand chip structure
  410. */
  411. static inline int onenand_read_ecc(struct onenand_chip *this)
  412. {
  413. int ecc, i, result = 0;
  414. if (!FLEXONENAND(this) && !ONENAND_IS_4KB_PAGE(this))
  415. return this->read_word(this->base + ONENAND_REG_ECC_STATUS);
  416. for (i = 0; i < 4; i++) {
  417. ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS + i*2);
  418. if (likely(!ecc))
  419. continue;
  420. if (ecc & FLEXONENAND_UNCORRECTABLE_ERROR)
  421. return ONENAND_ECC_2BIT_ALL;
  422. else
  423. result = ONENAND_ECC_1BIT_ALL;
  424. }
  425. return result;
  426. }
  427. /**
  428. * onenand_wait - [DEFAULT] wait until the command is done
  429. * @param mtd MTD device structure
  430. * @param state state to select the max. timeout value
  431. *
  432. * Wait for command done. This applies to all OneNAND command
  433. * Read can take up to 30us, erase up to 2ms and program up to 350us
  434. * according to general OneNAND specs
  435. */
  436. static int onenand_wait(struct mtd_info *mtd, int state)
  437. {
  438. struct onenand_chip * this = mtd->priv;
  439. unsigned long timeout;
  440. unsigned int flags = ONENAND_INT_MASTER;
  441. unsigned int interrupt = 0;
  442. unsigned int ctrl;
  443. /* The 20 msec is enough */
  444. timeout = jiffies + msecs_to_jiffies(20);
  445. while (time_before(jiffies, timeout)) {
  446. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  447. if (interrupt & flags)
  448. break;
  449. if (state != FL_READING && state != FL_PREPARING_ERASE)
  450. cond_resched();
  451. }
  452. /* To get correct interrupt status in timeout case */
  453. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  454. ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
  455. /*
  456. * In the Spec. it checks the controller status first
  457. * However if you get the correct information in case of
  458. * power off recovery (POR) test, it should read ECC status first
  459. */
  460. if (interrupt & ONENAND_INT_READ) {
  461. int ecc = onenand_read_ecc(this);
  462. if (ecc) {
  463. if (ecc & ONENAND_ECC_2BIT_ALL) {
  464. printk(KERN_ERR "%s: ECC error = 0x%04x\n",
  465. __func__, ecc);
  466. mtd->ecc_stats.failed++;
  467. return -EBADMSG;
  468. } else if (ecc & ONENAND_ECC_1BIT_ALL) {
  469. printk(KERN_DEBUG "%s: correctable ECC error = 0x%04x\n",
  470. __func__, ecc);
  471. mtd->ecc_stats.corrected++;
  472. }
  473. }
  474. } else if (state == FL_READING) {
  475. printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n",
  476. __func__, ctrl, interrupt);
  477. return -EIO;
  478. }
  479. if (state == FL_PREPARING_ERASE && !(interrupt & ONENAND_INT_ERASE)) {
  480. printk(KERN_ERR "%s: mb erase timeout! ctrl=0x%04x intr=0x%04x\n",
  481. __func__, ctrl, interrupt);
  482. return -EIO;
  483. }
  484. if (!(interrupt & ONENAND_INT_MASTER)) {
  485. printk(KERN_ERR "%s: timeout! ctrl=0x%04x intr=0x%04x\n",
  486. __func__, ctrl, interrupt);
  487. return -EIO;
  488. }
  489. /* If there's controller error, it's a real error */
  490. if (ctrl & ONENAND_CTRL_ERROR) {
  491. printk(KERN_ERR "%s: controller error = 0x%04x\n",
  492. __func__, ctrl);
  493. if (ctrl & ONENAND_CTRL_LOCK)
  494. printk(KERN_ERR "%s: it's locked error.\n", __func__);
  495. return -EIO;
  496. }
  497. return 0;
  498. }
  499. /*
  500. * onenand_interrupt - [DEFAULT] onenand interrupt handler
  501. * @param irq onenand interrupt number
  502. * @param dev_id interrupt data
  503. *
  504. * complete the work
  505. */
  506. static irqreturn_t onenand_interrupt(int irq, void *data)
  507. {
  508. struct onenand_chip *this = data;
  509. /* To handle shared interrupt */
  510. if (!this->complete.done)
  511. complete(&this->complete);
  512. return IRQ_HANDLED;
  513. }
  514. /*
  515. * onenand_interrupt_wait - [DEFAULT] wait until the command is done
  516. * @param mtd MTD device structure
  517. * @param state state to select the max. timeout value
  518. *
  519. * Wait for command done.
  520. */
  521. static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
  522. {
  523. struct onenand_chip *this = mtd->priv;
  524. wait_for_completion(&this->complete);
  525. return onenand_wait(mtd, state);
  526. }
  527. /*
  528. * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
  529. * @param mtd MTD device structure
  530. * @param state state to select the max. timeout value
  531. *
  532. * Try interrupt based wait (It is used one-time)
  533. */
  534. static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
  535. {
  536. struct onenand_chip *this = mtd->priv;
  537. unsigned long remain, timeout;
  538. /* We use interrupt wait first */
  539. this->wait = onenand_interrupt_wait;
  540. timeout = msecs_to_jiffies(100);
  541. remain = wait_for_completion_timeout(&this->complete, timeout);
  542. if (!remain) {
  543. printk(KERN_INFO "OneNAND: There's no interrupt. "
  544. "We use the normal wait\n");
  545. /* Release the irq */
  546. free_irq(this->irq, this);
  547. this->wait = onenand_wait;
  548. }
  549. return onenand_wait(mtd, state);
  550. }
  551. /*
  552. * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
  553. * @param mtd MTD device structure
  554. *
  555. * There's two method to wait onenand work
  556. * 1. polling - read interrupt status register
  557. * 2. interrupt - use the kernel interrupt method
  558. */
  559. static void onenand_setup_wait(struct mtd_info *mtd)
  560. {
  561. struct onenand_chip *this = mtd->priv;
  562. int syscfg;
  563. init_completion(&this->complete);
  564. if (this->irq <= 0) {
  565. this->wait = onenand_wait;
  566. return;
  567. }
  568. if (request_irq(this->irq, &onenand_interrupt,
  569. IRQF_SHARED, "onenand", this)) {
  570. /* If we can't get irq, use the normal wait */
  571. this->wait = onenand_wait;
  572. return;
  573. }
  574. /* Enable interrupt */
  575. syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
  576. syscfg |= ONENAND_SYS_CFG1_IOBE;
  577. this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
  578. this->wait = onenand_try_interrupt_wait;
  579. }
  580. /**
  581. * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
  582. * @param mtd MTD data structure
  583. * @param area BufferRAM area
  584. * @return offset given area
  585. *
  586. * Return BufferRAM offset given area
  587. */
  588. static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
  589. {
  590. struct onenand_chip *this = mtd->priv;
  591. if (ONENAND_CURRENT_BUFFERRAM(this)) {
  592. /* Note: the 'this->writesize' is a real page size */
  593. if (area == ONENAND_DATARAM)
  594. return this->writesize;
  595. if (area == ONENAND_SPARERAM)
  596. return mtd->oobsize;
  597. }
  598. return 0;
  599. }
  600. /**
  601. * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
  602. * @param mtd MTD data structure
  603. * @param area BufferRAM area
  604. * @param buffer the databuffer to put/get data
  605. * @param offset offset to read from or write to
  606. * @param count number of bytes to read/write
  607. *
  608. * Read the BufferRAM area
  609. */
  610. static int onenand_read_bufferram(struct mtd_info *mtd, int area,
  611. unsigned char *buffer, int offset, size_t count)
  612. {
  613. struct onenand_chip *this = mtd->priv;
  614. void __iomem *bufferram;
  615. bufferram = this->base + area;
  616. bufferram += onenand_bufferram_offset(mtd, area);
  617. if (ONENAND_CHECK_BYTE_ACCESS(count)) {
  618. unsigned short word;
  619. /* Align with word(16-bit) size */
  620. count--;
  621. /* Read word and save byte */
  622. word = this->read_word(bufferram + offset + count);
  623. buffer[count] = (word & 0xff);
  624. }
  625. memcpy(buffer, bufferram + offset, count);
  626. return 0;
  627. }
  628. /**
  629. * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
  630. * @param mtd MTD data structure
  631. * @param area BufferRAM area
  632. * @param buffer the databuffer to put/get data
  633. * @param offset offset to read from or write to
  634. * @param count number of bytes to read/write
  635. *
  636. * Read the BufferRAM area with Sync. Burst Mode
  637. */
  638. static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
  639. unsigned char *buffer, int offset, size_t count)
  640. {
  641. struct onenand_chip *this = mtd->priv;
  642. void __iomem *bufferram;
  643. bufferram = this->base + area;
  644. bufferram += onenand_bufferram_offset(mtd, area);
  645. this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
  646. if (ONENAND_CHECK_BYTE_ACCESS(count)) {
  647. unsigned short word;
  648. /* Align with word(16-bit) size */
  649. count--;
  650. /* Read word and save byte */
  651. word = this->read_word(bufferram + offset + count);
  652. buffer[count] = (word & 0xff);
  653. }
  654. memcpy(buffer, bufferram + offset, count);
  655. this->mmcontrol(mtd, 0);
  656. return 0;
  657. }
  658. /**
  659. * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
  660. * @param mtd MTD data structure
  661. * @param area BufferRAM area
  662. * @param buffer the databuffer to put/get data
  663. * @param offset offset to read from or write to
  664. * @param count number of bytes to read/write
  665. *
  666. * Write the BufferRAM area
  667. */
  668. static int onenand_write_bufferram(struct mtd_info *mtd, int area,
  669. const unsigned char *buffer, int offset, size_t count)
  670. {
  671. struct onenand_chip *this = mtd->priv;
  672. void __iomem *bufferram;
  673. bufferram = this->base + area;
  674. bufferram += onenand_bufferram_offset(mtd, area);
  675. if (ONENAND_CHECK_BYTE_ACCESS(count)) {
  676. unsigned short word;
  677. int byte_offset;
  678. /* Align with word(16-bit) size */
  679. count--;
  680. /* Calculate byte access offset */
  681. byte_offset = offset + count;
  682. /* Read word and save byte */
  683. word = this->read_word(bufferram + byte_offset);
  684. word = (word & ~0xff) | buffer[count];
  685. this->write_word(word, bufferram + byte_offset);
  686. }
  687. memcpy(bufferram + offset, buffer, count);
  688. return 0;
  689. }
  690. /**
  691. * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode
  692. * @param mtd MTD data structure
  693. * @param addr address to check
  694. * @return blockpage address
  695. *
  696. * Get blockpage address at 2x program mode
  697. */
  698. static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr)
  699. {
  700. struct onenand_chip *this = mtd->priv;
  701. int blockpage, block, page;
  702. /* Calculate the even block number */
  703. block = (int) (addr >> this->erase_shift) & ~1;
  704. /* Is it the odd plane? */
  705. if (addr & this->writesize)
  706. block++;
  707. page = (int) (addr >> (this->page_shift + 1)) & this->page_mask;
  708. blockpage = (block << 7) | page;
  709. return blockpage;
  710. }
  711. /**
  712. * onenand_check_bufferram - [GENERIC] Check BufferRAM information
  713. * @param mtd MTD data structure
  714. * @param addr address to check
  715. * @return 1 if there are valid data, otherwise 0
  716. *
  717. * Check bufferram if there is data we required
  718. */
  719. static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
  720. {
  721. struct onenand_chip *this = mtd->priv;
  722. int blockpage, found = 0;
  723. unsigned int i;
  724. if (ONENAND_IS_2PLANE(this))
  725. blockpage = onenand_get_2x_blockpage(mtd, addr);
  726. else
  727. blockpage = (int) (addr >> this->page_shift);
  728. /* Is there valid data? */
  729. i = ONENAND_CURRENT_BUFFERRAM(this);
  730. if (this->bufferram[i].blockpage == blockpage)
  731. found = 1;
  732. else {
  733. /* Check another BufferRAM */
  734. i = ONENAND_NEXT_BUFFERRAM(this);
  735. if (this->bufferram[i].blockpage == blockpage) {
  736. ONENAND_SET_NEXT_BUFFERRAM(this);
  737. found = 1;
  738. }
  739. }
  740. if (found && ONENAND_IS_DDP(this)) {
  741. /* Select DataRAM for DDP */
  742. int block = onenand_block(this, addr);
  743. int value = onenand_bufferram_address(this, block);
  744. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  745. }
  746. return found;
  747. }
  748. /**
  749. * onenand_update_bufferram - [GENERIC] Update BufferRAM information
  750. * @param mtd MTD data structure
  751. * @param addr address to update
  752. * @param valid valid flag
  753. *
  754. * Update BufferRAM information
  755. */
  756. static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
  757. int valid)
  758. {
  759. struct onenand_chip *this = mtd->priv;
  760. int blockpage;
  761. unsigned int i;
  762. if (ONENAND_IS_2PLANE(this))
  763. blockpage = onenand_get_2x_blockpage(mtd, addr);
  764. else
  765. blockpage = (int) (addr >> this->page_shift);
  766. /* Invalidate another BufferRAM */
  767. i = ONENAND_NEXT_BUFFERRAM(this);
  768. if (this->bufferram[i].blockpage == blockpage)
  769. this->bufferram[i].blockpage = -1;
  770. /* Update BufferRAM */
  771. i = ONENAND_CURRENT_BUFFERRAM(this);
  772. if (valid)
  773. this->bufferram[i].blockpage = blockpage;
  774. else
  775. this->bufferram[i].blockpage = -1;
  776. }
  777. /**
  778. * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
  779. * @param mtd MTD data structure
  780. * @param addr start address to invalidate
  781. * @param len length to invalidate
  782. *
  783. * Invalidate BufferRAM information
  784. */
  785. static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
  786. unsigned int len)
  787. {
  788. struct onenand_chip *this = mtd->priv;
  789. int i;
  790. loff_t end_addr = addr + len;
  791. /* Invalidate BufferRAM */
  792. for (i = 0; i < MAX_BUFFERRAM; i++) {
  793. loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
  794. if (buf_addr >= addr && buf_addr < end_addr)
  795. this->bufferram[i].blockpage = -1;
  796. }
  797. }
  798. /**
  799. * onenand_get_device - [GENERIC] Get chip for selected access
  800. * @param mtd MTD device structure
  801. * @param new_state the state which is requested
  802. *
  803. * Get the device and lock it for exclusive access
  804. */
  805. static int onenand_get_device(struct mtd_info *mtd, int new_state)
  806. {
  807. struct onenand_chip *this = mtd->priv;
  808. DECLARE_WAITQUEUE(wait, current);
  809. /*
  810. * Grab the lock and see if the device is available
  811. */
  812. while (1) {
  813. spin_lock(&this->chip_lock);
  814. if (this->state == FL_READY) {
  815. this->state = new_state;
  816. spin_unlock(&this->chip_lock);
  817. break;
  818. }
  819. if (new_state == FL_PM_SUSPENDED) {
  820. spin_unlock(&this->chip_lock);
  821. return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
  822. }
  823. set_current_state(TASK_UNINTERRUPTIBLE);
  824. add_wait_queue(&this->wq, &wait);
  825. spin_unlock(&this->chip_lock);
  826. schedule();
  827. remove_wait_queue(&this->wq, &wait);
  828. }
  829. return 0;
  830. }
  831. /**
  832. * onenand_release_device - [GENERIC] release chip
  833. * @param mtd MTD device structure
  834. *
  835. * Deselect, release chip lock and wake up anyone waiting on the device
  836. */
  837. static void onenand_release_device(struct mtd_info *mtd)
  838. {
  839. struct onenand_chip *this = mtd->priv;
  840. /* Release the chip */
  841. spin_lock(&this->chip_lock);
  842. this->state = FL_READY;
  843. wake_up(&this->wq);
  844. spin_unlock(&this->chip_lock);
  845. }
  846. /**
  847. * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
  848. * @param mtd MTD device structure
  849. * @param buf destination address
  850. * @param column oob offset to read from
  851. * @param thislen oob length to read
  852. */
  853. static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
  854. int thislen)
  855. {
  856. struct onenand_chip *this = mtd->priv;
  857. struct nand_oobfree *free;
  858. int readcol = column;
  859. int readend = column + thislen;
  860. int lastgap = 0;
  861. unsigned int i;
  862. uint8_t *oob_buf = this->oob_buf;
  863. free = this->ecclayout->oobfree;
  864. for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
  865. if (readcol >= lastgap)
  866. readcol += free->offset - lastgap;
  867. if (readend >= lastgap)
  868. readend += free->offset - lastgap;
  869. lastgap = free->offset + free->length;
  870. }
  871. this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
  872. free = this->ecclayout->oobfree;
  873. for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
  874. int free_end = free->offset + free->length;
  875. if (free->offset < readend && free_end > readcol) {
  876. int st = max_t(int,free->offset,readcol);
  877. int ed = min_t(int,free_end,readend);
  878. int n = ed - st;
  879. memcpy(buf, oob_buf + st, n);
  880. buf += n;
  881. } else if (column == 0)
  882. break;
  883. }
  884. return 0;
  885. }
  886. /**
  887. * onenand_recover_lsb - [Flex-OneNAND] Recover LSB page data
  888. * @param mtd MTD device structure
  889. * @param addr address to recover
  890. * @param status return value from onenand_wait / onenand_bbt_wait
  891. *
  892. * MLC NAND Flash cell has paired pages - LSB page and MSB page. LSB page has
  893. * lower page address and MSB page has higher page address in paired pages.
  894. * If power off occurs during MSB page program, the paired LSB page data can
  895. * become corrupt. LSB page recovery read is a way to read LSB page though page
  896. * data are corrupted. When uncorrectable error occurs as a result of LSB page
  897. * read after power up, issue LSB page recovery read.
  898. */
  899. static int onenand_recover_lsb(struct mtd_info *mtd, loff_t addr, int status)
  900. {
  901. struct onenand_chip *this = mtd->priv;
  902. int i;
  903. /* Recovery is only for Flex-OneNAND */
  904. if (!FLEXONENAND(this))
  905. return status;
  906. /* check if we failed due to uncorrectable error */
  907. if (status != -EBADMSG && status != ONENAND_BBT_READ_ECC_ERROR)
  908. return status;
  909. /* check if address lies in MLC region */
  910. i = flexonenand_region(mtd, addr);
  911. if (mtd->eraseregions[i].erasesize < (1 << this->erase_shift))
  912. return status;
  913. /* We are attempting to reread, so decrement stats.failed
  914. * which was incremented by onenand_wait due to read failure
  915. */
  916. printk(KERN_INFO "%s: Attempting to recover from uncorrectable read\n",
  917. __func__);
  918. mtd->ecc_stats.failed--;
  919. /* Issue the LSB page recovery command */
  920. this->command(mtd, FLEXONENAND_CMD_RECOVER_LSB, addr, this->writesize);
  921. return this->wait(mtd, FL_READING);
  922. }
  923. /**
  924. * onenand_mlc_read_ops_nolock - MLC OneNAND read main and/or out-of-band
  925. * @param mtd MTD device structure
  926. * @param from offset to read from
  927. * @param ops: oob operation description structure
  928. *
  929. * MLC OneNAND / Flex-OneNAND has 4KB page size and 4KB dataram.
  930. * So, read-while-load is not present.
  931. */
  932. static int onenand_mlc_read_ops_nolock(struct mtd_info *mtd, loff_t from,
  933. struct mtd_oob_ops *ops)
  934. {
  935. struct onenand_chip *this = mtd->priv;
  936. struct mtd_ecc_stats stats;
  937. size_t len = ops->len;
  938. size_t ooblen = ops->ooblen;
  939. u_char *buf = ops->datbuf;
  940. u_char *oobbuf = ops->oobbuf;
  941. int read = 0, column, thislen;
  942. int oobread = 0, oobcolumn, thisooblen, oobsize;
  943. int ret = 0;
  944. int writesize = this->writesize;
  945. DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n",
  946. __func__, (unsigned int) from, (int) len);
  947. if (ops->mode == MTD_OOB_AUTO)
  948. oobsize = this->ecclayout->oobavail;
  949. else
  950. oobsize = mtd->oobsize;
  951. oobcolumn = from & (mtd->oobsize - 1);
  952. /* Do not allow reads past end of device */
  953. if (from + len > mtd->size) {
  954. printk(KERN_ERR "%s: Attempt read beyond end of device\n",
  955. __func__);
  956. ops->retlen = 0;
  957. ops->oobretlen = 0;
  958. return -EINVAL;
  959. }
  960. stats = mtd->ecc_stats;
  961. while (read < len) {
  962. cond_resched();
  963. thislen = min_t(int, writesize, len - read);
  964. column = from & (writesize - 1);
  965. if (column + thislen > writesize)
  966. thislen = writesize - column;
  967. if (!onenand_check_bufferram(mtd, from)) {
  968. this->command(mtd, ONENAND_CMD_READ, from, writesize);
  969. ret = this->wait(mtd, FL_READING);
  970. if (unlikely(ret))
  971. ret = onenand_recover_lsb(mtd, from, ret);
  972. onenand_update_bufferram(mtd, from, !ret);
  973. if (ret == -EBADMSG)
  974. ret = 0;
  975. }
  976. this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
  977. if (oobbuf) {
  978. thisooblen = oobsize - oobcolumn;
  979. thisooblen = min_t(int, thisooblen, ooblen - oobread);
  980. if (ops->mode == MTD_OOB_AUTO)
  981. onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
  982. else
  983. this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
  984. oobread += thisooblen;
  985. oobbuf += thisooblen;
  986. oobcolumn = 0;
  987. }
  988. read += thislen;
  989. if (read == len)
  990. break;
  991. from += thislen;
  992. buf += thislen;
  993. }
  994. /*
  995. * Return success, if no ECC failures, else -EBADMSG
  996. * fs driver will take care of that, because
  997. * retlen == desired len and result == -EBADMSG
  998. */
  999. ops->retlen = read;
  1000. ops->oobretlen = oobread;
  1001. if (ret)
  1002. return ret;
  1003. if (mtd->ecc_stats.failed - stats.failed)
  1004. return -EBADMSG;
  1005. return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
  1006. }
  1007. /**
  1008. * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band
  1009. * @param mtd MTD device structure
  1010. * @param from offset to read from
  1011. * @param ops: oob operation description structure
  1012. *
  1013. * OneNAND read main and/or out-of-band data
  1014. */
  1015. static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
  1016. struct mtd_oob_ops *ops)
  1017. {
  1018. struct onenand_chip *this = mtd->priv;
  1019. struct mtd_ecc_stats stats;
  1020. size_t len = ops->len;
  1021. size_t ooblen = ops->ooblen;
  1022. u_char *buf = ops->datbuf;
  1023. u_char *oobbuf = ops->oobbuf;
  1024. int read = 0, column, thislen;
  1025. int oobread = 0, oobcolumn, thisooblen, oobsize;
  1026. int ret = 0, boundary = 0;
  1027. int writesize = this->writesize;
  1028. DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n",
  1029. __func__, (unsigned int) from, (int) len);
  1030. if (ops->mode == MTD_OOB_AUTO)
  1031. oobsize = this->ecclayout->oobavail;
  1032. else
  1033. oobsize = mtd->oobsize;
  1034. oobcolumn = from & (mtd->oobsize - 1);
  1035. /* Do not allow reads past end of device */
  1036. if ((from + len) > mtd->size) {
  1037. printk(KERN_ERR "%s: Attempt read beyond end of device\n",
  1038. __func__);
  1039. ops->retlen = 0;
  1040. ops->oobretlen = 0;
  1041. return -EINVAL;
  1042. }
  1043. stats = mtd->ecc_stats;
  1044. /* Read-while-load method */
  1045. /* Do first load to bufferRAM */
  1046. if (read < len) {
  1047. if (!onenand_check_bufferram(mtd, from)) {
  1048. this->command(mtd, ONENAND_CMD_READ, from, writesize);
  1049. ret = this->wait(mtd, FL_READING);
  1050. onenand_update_bufferram(mtd, from, !ret);
  1051. if (ret == -EBADMSG)
  1052. ret = 0;
  1053. }
  1054. }
  1055. thislen = min_t(int, writesize, len - read);
  1056. column = from & (writesize - 1);
  1057. if (column + thislen > writesize)
  1058. thislen = writesize - column;
  1059. while (!ret) {
  1060. /* If there is more to load then start next load */
  1061. from += thislen;
  1062. if (read + thislen < len) {
  1063. this->command(mtd, ONENAND_CMD_READ, from, writesize);
  1064. /*
  1065. * Chip boundary handling in DDP
  1066. * Now we issued chip 1 read and pointed chip 1
  1067. * bufferram so we have to point chip 0 bufferram.
  1068. */
  1069. if (ONENAND_IS_DDP(this) &&
  1070. unlikely(from == (this->chipsize >> 1))) {
  1071. this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
  1072. boundary = 1;
  1073. } else
  1074. boundary = 0;
  1075. ONENAND_SET_PREV_BUFFERRAM(this);
  1076. }
  1077. /* While load is going, read from last bufferRAM */
  1078. this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
  1079. /* Read oob area if needed */
  1080. if (oobbuf) {
  1081. thisooblen = oobsize - oobcolumn;
  1082. thisooblen = min_t(int, thisooblen, ooblen - oobread);
  1083. if (ops->mode == MTD_OOB_AUTO)
  1084. onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
  1085. else
  1086. this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
  1087. oobread += thisooblen;
  1088. oobbuf += thisooblen;
  1089. oobcolumn = 0;
  1090. }
  1091. /* See if we are done */
  1092. read += thislen;
  1093. if (read == len)
  1094. break;
  1095. /* Set up for next read from bufferRAM */
  1096. if (unlikely(boundary))
  1097. this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
  1098. ONENAND_SET_NEXT_BUFFERRAM(this);
  1099. buf += thislen;
  1100. thislen = min_t(int, writesize, len - read);
  1101. column = 0;
  1102. cond_resched();
  1103. /* Now wait for load */
  1104. ret = this->wait(mtd, FL_READING);
  1105. onenand_update_bufferram(mtd, from, !ret);
  1106. if (ret == -EBADMSG)
  1107. ret = 0;
  1108. }
  1109. /*
  1110. * Return success, if no ECC failures, else -EBADMSG
  1111. * fs driver will take care of that, because
  1112. * retlen == desired len and result == -EBADMSG
  1113. */
  1114. ops->retlen = read;
  1115. ops->oobretlen = oobread;
  1116. if (ret)
  1117. return ret;
  1118. if (mtd->ecc_stats.failed - stats.failed)
  1119. return -EBADMSG;
  1120. return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
  1121. }
  1122. /**
  1123. * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band
  1124. * @param mtd MTD device structure
  1125. * @param from offset to read from
  1126. * @param ops: oob operation description structure
  1127. *
  1128. * OneNAND read out-of-band data from the spare area
  1129. */
  1130. static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
  1131. struct mtd_oob_ops *ops)
  1132. {
  1133. struct onenand_chip *this = mtd->priv;
  1134. struct mtd_ecc_stats stats;
  1135. int read = 0, thislen, column, oobsize;
  1136. size_t len = ops->ooblen;
  1137. mtd_oob_mode_t mode = ops->mode;
  1138. u_char *buf = ops->oobbuf;
  1139. int ret = 0, readcmd;
  1140. from += ops->ooboffs;
  1141. DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n",
  1142. __func__, (unsigned int) from, (int) len);
  1143. /* Initialize return length value */
  1144. ops->oobretlen = 0;
  1145. if (mode == MTD_OOB_AUTO)
  1146. oobsize = this->ecclayout->oobavail;
  1147. else
  1148. oobsize = mtd->oobsize;
  1149. column = from & (mtd->oobsize - 1);
  1150. if (unlikely(column >= oobsize)) {
  1151. printk(KERN_ERR "%s: Attempted to start read outside oob\n",
  1152. __func__);
  1153. return -EINVAL;
  1154. }
  1155. /* Do not allow reads past end of device */
  1156. if (unlikely(from >= mtd->size ||
  1157. column + len > ((mtd->size >> this->page_shift) -
  1158. (from >> this->page_shift)) * oobsize)) {
  1159. printk(KERN_ERR "%s: Attempted to read beyond end of device\n",
  1160. __func__);
  1161. return -EINVAL;
  1162. }
  1163. stats = mtd->ecc_stats;
  1164. readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
  1165. while (read < len) {
  1166. cond_resched();
  1167. thislen = oobsize - column;
  1168. thislen = min_t(int, thislen, len);
  1169. this->command(mtd, readcmd, from, mtd->oobsize);
  1170. onenand_update_bufferram(mtd, from, 0);
  1171. ret = this->wait(mtd, FL_READING);
  1172. if (unlikely(ret))
  1173. ret = onenand_recover_lsb(mtd, from, ret);
  1174. if (ret && ret != -EBADMSG) {
  1175. printk(KERN_ERR "%s: read failed = 0x%x\n",
  1176. __func__, ret);
  1177. break;
  1178. }
  1179. if (mode == MTD_OOB_AUTO)
  1180. onenand_transfer_auto_oob(mtd, buf, column, thislen);
  1181. else
  1182. this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
  1183. read += thislen;
  1184. if (read == len)
  1185. break;
  1186. buf += thislen;
  1187. /* Read more? */
  1188. if (read < len) {
  1189. /* Page size */
  1190. from += mtd->writesize;
  1191. column = 0;
  1192. }
  1193. }
  1194. ops->oobretlen = read;
  1195. if (ret)
  1196. return ret;
  1197. if (mtd->ecc_stats.failed - stats.failed)
  1198. return -EBADMSG;
  1199. return 0;
  1200. }
  1201. /**
  1202. * onenand_read - [MTD Interface] Read data from flash
  1203. * @param mtd MTD device structure
  1204. * @param from offset to read from
  1205. * @param len number of bytes to read
  1206. * @param retlen pointer to variable to store the number of read bytes
  1207. * @param buf the databuffer to put data
  1208. *
  1209. * Read with ecc
  1210. */
  1211. static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
  1212. size_t *retlen, u_char *buf)
  1213. {
  1214. struct onenand_chip *this = mtd->priv;
  1215. struct mtd_oob_ops ops = {
  1216. .len = len,
  1217. .ooblen = 0,
  1218. .datbuf = buf,
  1219. .oobbuf = NULL,
  1220. };
  1221. int ret;
  1222. onenand_get_device(mtd, FL_READING);
  1223. ret = ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this) ?
  1224. onenand_mlc_read_ops_nolock(mtd, from, &ops) :
  1225. onenand_read_ops_nolock(mtd, from, &ops);
  1226. onenand_release_device(mtd);
  1227. *retlen = ops.retlen;
  1228. return ret;
  1229. }
  1230. /**
  1231. * onenand_read_oob - [MTD Interface] Read main and/or out-of-band
  1232. * @param mtd: MTD device structure
  1233. * @param from: offset to read from
  1234. * @param ops: oob operation description structure
  1235. * Read main and/or out-of-band
  1236. */
  1237. static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
  1238. struct mtd_oob_ops *ops)
  1239. {
  1240. struct onenand_chip *this = mtd->priv;
  1241. int ret;
  1242. switch (ops->mode) {
  1243. case MTD_OOB_PLACE:
  1244. case MTD_OOB_AUTO:
  1245. break;
  1246. case MTD_OOB_RAW:
  1247. /* Not implemented yet */
  1248. default:
  1249. return -EINVAL;
  1250. }
  1251. onenand_get_device(mtd, FL_READING);
  1252. if (ops->datbuf)
  1253. ret = ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this) ?
  1254. onenand_mlc_read_ops_nolock(mtd, from, ops) :
  1255. onenand_read_ops_nolock(mtd, from, ops);
  1256. else
  1257. ret = onenand_read_oob_nolock(mtd, from, ops);
  1258. onenand_release_device(mtd);
  1259. return ret;
  1260. }
  1261. /**
  1262. * onenand_bbt_wait - [DEFAULT] wait until the command is done
  1263. * @param mtd MTD device structure
  1264. * @param state state to select the max. timeout value
  1265. *
  1266. * Wait for command done.
  1267. */
  1268. static int onenand_bbt_wait(struct mtd_info *mtd, int state)
  1269. {
  1270. struct onenand_chip *this = mtd->priv;
  1271. unsigned long timeout;
  1272. unsigned int interrupt;
  1273. unsigned int ctrl;
  1274. /* The 20 msec is enough */
  1275. timeout = jiffies + msecs_to_jiffies(20);
  1276. while (time_before(jiffies, timeout)) {
  1277. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  1278. if (interrupt & ONENAND_INT_MASTER)
  1279. break;
  1280. }
  1281. /* To get correct interrupt status in timeout case */
  1282. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  1283. ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
  1284. if (interrupt & ONENAND_INT_READ) {
  1285. int ecc = onenand_read_ecc(this);
  1286. if (ecc & ONENAND_ECC_2BIT_ALL) {
  1287. printk(KERN_WARNING "%s: ecc error = 0x%04x, "
  1288. "controller error 0x%04x\n",
  1289. __func__, ecc, ctrl);
  1290. return ONENAND_BBT_READ_ECC_ERROR;
  1291. }
  1292. } else {
  1293. printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n",
  1294. __func__, ctrl, interrupt);
  1295. return ONENAND_BBT_READ_FATAL_ERROR;
  1296. }
  1297. /* Initial bad block case: 0x2400 or 0x0400 */
  1298. if (ctrl & ONENAND_CTRL_ERROR) {
  1299. printk(KERN_DEBUG "%s: controller error = 0x%04x\n",
  1300. __func__, ctrl);
  1301. return ONENAND_BBT_READ_ERROR;
  1302. }
  1303. return 0;
  1304. }
  1305. /**
  1306. * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
  1307. * @param mtd MTD device structure
  1308. * @param from offset to read from
  1309. * @param ops oob operation description structure
  1310. *
  1311. * OneNAND read out-of-band data from the spare area for bbt scan
  1312. */
  1313. int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
  1314. struct mtd_oob_ops *ops)
  1315. {
  1316. struct onenand_chip *this = mtd->priv;
  1317. int read = 0, thislen, column;
  1318. int ret = 0, readcmd;
  1319. size_t len = ops->ooblen;
  1320. u_char *buf = ops->oobbuf;
  1321. DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %zi\n",
  1322. __func__, (unsigned int) from, len);
  1323. /* Initialize return value */
  1324. ops->oobretlen = 0;
  1325. /* Do not allow reads past end of device */
  1326. if (unlikely((from + len) > mtd->size)) {
  1327. printk(KERN_ERR "%s: Attempt read beyond end of device\n",
  1328. __func__);
  1329. return ONENAND_BBT_READ_FATAL_ERROR;
  1330. }
  1331. /* Grab the lock and see if the device is available */
  1332. onenand_get_device(mtd, FL_READING);
  1333. column = from & (mtd->oobsize - 1);
  1334. readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
  1335. while (read < len) {
  1336. cond_resched();
  1337. thislen = mtd->oobsize - column;
  1338. thislen = min_t(int, thislen, len);
  1339. this->command(mtd, readcmd, from, mtd->oobsize);
  1340. onenand_update_bufferram(mtd, from, 0);
  1341. ret = this->bbt_wait(mtd, FL_READING);
  1342. if (unlikely(ret))
  1343. ret = onenand_recover_lsb(mtd, from, ret);
  1344. if (ret)
  1345. break;
  1346. this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
  1347. read += thislen;
  1348. if (read == len)
  1349. break;
  1350. buf += thislen;
  1351. /* Read more? */
  1352. if (read < len) {
  1353. /* Update Page size */
  1354. from += this->writesize;
  1355. column = 0;
  1356. }
  1357. }
  1358. /* Deselect and wake up anyone waiting on the device */
  1359. onenand_release_device(mtd);
  1360. ops->oobretlen = read;
  1361. return ret;
  1362. }
  1363. #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
  1364. /**
  1365. * onenand_verify_oob - [GENERIC] verify the oob contents after a write
  1366. * @param mtd MTD device structure
  1367. * @param buf the databuffer to verify
  1368. * @param to offset to read from
  1369. */
  1370. static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
  1371. {
  1372. struct onenand_chip *this = mtd->priv;
  1373. u_char *oob_buf = this->oob_buf;
  1374. int status, i, readcmd;
  1375. readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
  1376. this->command(mtd, readcmd, to, mtd->oobsize);
  1377. onenand_update_bufferram(mtd, to, 0);
  1378. status = this->wait(mtd, FL_READING);
  1379. if (status)
  1380. return status;
  1381. this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
  1382. for (i = 0; i < mtd->oobsize; i++)
  1383. if (buf[i] != 0xFF && buf[i] != oob_buf[i])
  1384. return -EBADMSG;
  1385. return 0;
  1386. }
  1387. /**
  1388. * onenand_verify - [GENERIC] verify the chip contents after a write
  1389. * @param mtd MTD device structure
  1390. * @param buf the databuffer to verify
  1391. * @param addr offset to read from
  1392. * @param len number of bytes to read and compare
  1393. */
  1394. static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
  1395. {
  1396. struct onenand_chip *this = mtd->priv;
  1397. int ret = 0;
  1398. int thislen, column;
  1399. while (len != 0) {
  1400. thislen = min_t(int, this->writesize, len);
  1401. column = addr & (this->writesize - 1);
  1402. if (column + thislen > this->writesize)
  1403. thislen = this->writesize - column;
  1404. this->command(mtd, ONENAND_CMD_READ, addr, this->writesize);
  1405. onenand_update_bufferram(mtd, addr, 0);
  1406. ret = this->wait(mtd, FL_READING);
  1407. if (ret)
  1408. return ret;
  1409. onenand_update_bufferram(mtd, addr, 1);
  1410. this->read_bufferram(mtd, ONENAND_DATARAM, this->verify_buf, 0, mtd->writesize);
  1411. if (memcmp(buf, this->verify_buf, thislen))
  1412. return -EBADMSG;
  1413. len -= thislen;
  1414. buf += thislen;
  1415. addr += thislen;
  1416. }
  1417. return 0;
  1418. }
  1419. #else
  1420. #define onenand_verify(...) (0)
  1421. #define onenand_verify_oob(...) (0)
  1422. #endif
  1423. #define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0)
  1424. static void onenand_panic_wait(struct mtd_info *mtd)
  1425. {
  1426. struct onenand_chip *this = mtd->priv;
  1427. unsigned int interrupt;
  1428. int i;
  1429. for (i = 0; i < 2000; i++) {
  1430. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  1431. if (interrupt & ONENAND_INT_MASTER)
  1432. break;
  1433. udelay(10);
  1434. }
  1435. }
  1436. /**
  1437. * onenand_panic_write - [MTD Interface] write buffer to FLASH in a panic context
  1438. * @param mtd MTD device structure
  1439. * @param to offset to write to
  1440. * @param len number of bytes to write
  1441. * @param retlen pointer to variable to store the number of written bytes
  1442. * @param buf the data to write
  1443. *
  1444. * Write with ECC
  1445. */
  1446. static int onenand_panic_write(struct mtd_info *mtd, loff_t to, size_t len,
  1447. size_t *retlen, const u_char *buf)
  1448. {
  1449. struct onenand_chip *this = mtd->priv;
  1450. int column, subpage;
  1451. int written = 0;
  1452. int ret = 0;
  1453. if (this->state == FL_PM_SUSPENDED)
  1454. return -EBUSY;
  1455. /* Wait for any existing operation to clear */
  1456. onenand_panic_wait(mtd);
  1457. DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n",
  1458. __func__, (unsigned int) to, (int) len);
  1459. /* Initialize retlen, in case of early exit */
  1460. *retlen = 0;
  1461. /* Do not allow writes past end of device */
  1462. if (unlikely((to + len) > mtd->size)) {
  1463. printk(KERN_ERR "%s: Attempt write to past end of device\n",
  1464. __func__);
  1465. return -EINVAL;
  1466. }
  1467. /* Reject writes, which are not page aligned */
  1468. if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
  1469. printk(KERN_ERR "%s: Attempt to write not page aligned data\n",
  1470. __func__);
  1471. return -EINVAL;
  1472. }
  1473. column = to & (mtd->writesize - 1);
  1474. /* Loop until all data write */
  1475. while (written < len) {
  1476. int thislen = min_t(int, mtd->writesize - column, len - written);
  1477. u_char *wbuf = (u_char *) buf;
  1478. this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
  1479. /* Partial page write */
  1480. subpage = thislen < mtd->writesize;
  1481. if (subpage) {
  1482. memset(this->page_buf, 0xff, mtd->writesize);
  1483. memcpy(this->page_buf + column, buf, thislen);
  1484. wbuf = this->page_buf;
  1485. }
  1486. this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
  1487. this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
  1488. this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
  1489. onenand_panic_wait(mtd);
  1490. /* In partial page write we don't update bufferram */
  1491. onenand_update_bufferram(mtd, to, !ret && !subpage);
  1492. if (ONENAND_IS_2PLANE(this)) {
  1493. ONENAND_SET_BUFFERRAM1(this);
  1494. onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage);
  1495. }
  1496. if (ret) {
  1497. printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
  1498. break;
  1499. }
  1500. written += thislen;
  1501. if (written == len)
  1502. break;
  1503. column = 0;
  1504. to += thislen;
  1505. buf += thislen;
  1506. }
  1507. *retlen = written;
  1508. return ret;
  1509. }
  1510. /**
  1511. * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
  1512. * @param mtd MTD device structure
  1513. * @param oob_buf oob buffer
  1514. * @param buf source address
  1515. * @param column oob offset to write to
  1516. * @param thislen oob length to write
  1517. */
  1518. static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
  1519. const u_char *buf, int column, int thislen)
  1520. {
  1521. struct onenand_chip *this = mtd->priv;
  1522. struct nand_oobfree *free;
  1523. int writecol = column;
  1524. int writeend = column + thislen;
  1525. int lastgap = 0;
  1526. unsigned int i;
  1527. free = this->ecclayout->oobfree;
  1528. for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
  1529. if (writecol >= lastgap)
  1530. writecol += free->offset - lastgap;
  1531. if (writeend >= lastgap)
  1532. writeend += free->offset - lastgap;
  1533. lastgap = free->offset + free->length;
  1534. }
  1535. free = this->ecclayout->oobfree;
  1536. for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
  1537. int free_end = free->offset + free->length;
  1538. if (free->offset < writeend && free_end > writecol) {
  1539. int st = max_t(int,free->offset,writecol);
  1540. int ed = min_t(int,free_end,writeend);
  1541. int n = ed - st;
  1542. memcpy(oob_buf + st, buf, n);
  1543. buf += n;
  1544. } else if (column == 0)
  1545. break;
  1546. }
  1547. return 0;
  1548. }
  1549. /**
  1550. * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band
  1551. * @param mtd MTD device structure
  1552. * @param to offset to write to
  1553. * @param ops oob operation description structure
  1554. *
  1555. * Write main and/or oob with ECC
  1556. */
  1557. static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
  1558. struct mtd_oob_ops *ops)
  1559. {
  1560. struct onenand_chip *this = mtd->priv;
  1561. int written = 0, column, thislen = 0, subpage = 0;
  1562. int prev = 0, prevlen = 0, prev_subpage = 0, first = 1;
  1563. int oobwritten = 0, oobcolumn, thisooblen, oobsize;
  1564. size_t len = ops->len;
  1565. size_t ooblen = ops->ooblen;
  1566. const u_char *buf = ops->datbuf;
  1567. const u_char *oob = ops->oobbuf;
  1568. u_char *oobbuf;
  1569. int ret = 0;
  1570. DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n",
  1571. __func__, (unsigned int) to, (int) len);
  1572. /* Initialize retlen, in case of early exit */
  1573. ops->retlen = 0;
  1574. ops->oobretlen = 0;
  1575. /* Do not allow writes past end of device */
  1576. if (unlikely((to + len) > mtd->size)) {
  1577. printk(KERN_ERR "%s: Attempt write to past end of device\n",
  1578. __func__);
  1579. return -EINVAL;
  1580. }
  1581. /* Reject writes, which are not page aligned */
  1582. if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
  1583. printk(KERN_ERR "%s: Attempt to write not page aligned data\n",
  1584. __func__);
  1585. return -EINVAL;
  1586. }
  1587. /* Check zero length */
  1588. if (!len)
  1589. return 0;
  1590. if (ops->mode == MTD_OOB_AUTO)
  1591. oobsize = this->ecclayout->oobavail;
  1592. else
  1593. oobsize = mtd->oobsize;
  1594. oobcolumn = to & (mtd->oobsize - 1);
  1595. column = to & (mtd->writesize - 1);
  1596. /* Loop until all data write */
  1597. while (1) {
  1598. if (written < len) {
  1599. u_char *wbuf = (u_char *) buf;
  1600. thislen = min_t(int, mtd->writesize - column, len - written);
  1601. thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten);
  1602. cond_resched();
  1603. this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
  1604. /* Partial page write */
  1605. subpage = thislen < mtd->writesize;
  1606. if (subpage) {
  1607. memset(this->page_buf, 0xff, mtd->writesize);
  1608. memcpy(this->page_buf + column, buf, thislen);
  1609. wbuf = this->page_buf;
  1610. }
  1611. this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
  1612. if (oob) {
  1613. oobbuf = this->oob_buf;
  1614. /* We send data to spare ram with oobsize
  1615. * to prevent byte access */
  1616. memset(oobbuf, 0xff, mtd->oobsize);
  1617. if (ops->mode == MTD_OOB_AUTO)
  1618. onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen);
  1619. else
  1620. memcpy(oobbuf + oobcolumn, oob, thisooblen);
  1621. oobwritten += thisooblen;
  1622. oob += thisooblen;
  1623. oobcolumn = 0;
  1624. } else
  1625. oobbuf = (u_char *) ffchars;
  1626. this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
  1627. } else
  1628. ONENAND_SET_NEXT_BUFFERRAM(this);
  1629. /*
  1630. * 2 PLANE, MLC, and Flex-OneNAND do not support
  1631. * write-while-program feature.
  1632. */
  1633. if (!ONENAND_IS_2PLANE(this) && !ONENAND_IS_4KB_PAGE(this) && !first) {
  1634. ONENAND_SET_PREV_BUFFERRAM(this);
  1635. ret = this->wait(mtd, FL_WRITING);
  1636. /* In partial page write we don't update bufferram */
  1637. onenand_update_bufferram(mtd, prev, !ret && !prev_subpage);
  1638. if (ret) {
  1639. written -= prevlen;
  1640. printk(KERN_ERR "%s: write failed %d\n",
  1641. __func__, ret);
  1642. break;
  1643. }
  1644. if (written == len) {
  1645. /* Only check verify write turn on */
  1646. ret = onenand_verify(mtd, buf - len, to - len, len);
  1647. if (ret)
  1648. printk(KERN_ERR "%s: verify failed %d\n",
  1649. __func__, ret);
  1650. break;
  1651. }
  1652. ONENAND_SET_NEXT_BUFFERRAM(this);
  1653. }
  1654. this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
  1655. /*
  1656. * 2 PLANE, MLC, and Flex-OneNAND wait here
  1657. */
  1658. if (ONENAND_IS_2PLANE(this) || ONENAND_IS_4KB_PAGE(this)) {
  1659. ret = this->wait(mtd, FL_WRITING);
  1660. /* In partial page write we don't update bufferram */
  1661. onenand_update_bufferram(mtd, to, !ret && !subpage);
  1662. if (ret) {
  1663. printk(KERN_ERR "%s: write failed %d\n",
  1664. __func__, ret);
  1665. break;
  1666. }
  1667. /* Only check verify write turn on */
  1668. ret = onenand_verify(mtd, buf, to, thislen);
  1669. if (ret) {
  1670. printk(KERN_ERR "%s: verify failed %d\n",
  1671. __func__, ret);
  1672. break;
  1673. }
  1674. written += thislen;
  1675. if (written == len)
  1676. break;
  1677. } else
  1678. written += thislen;
  1679. column = 0;
  1680. prev_subpage = subpage;
  1681. prev = to;
  1682. prevlen = thislen;
  1683. to += thislen;
  1684. buf += thislen;
  1685. first = 0;
  1686. }
  1687. /* In error case, clear all bufferrams */
  1688. if (written != len)
  1689. onenand_invalidate_bufferram(mtd, 0, -1);
  1690. ops->retlen = written;
  1691. ops->oobretlen = oobwritten;
  1692. return ret;
  1693. }
  1694. /**
  1695. * onenand_write_oob_nolock - [Internal] OneNAND write out-of-band
  1696. * @param mtd MTD device structure
  1697. * @param to offset to write to
  1698. * @param len number of bytes to write
  1699. * @param retlen pointer to variable to store the number of written bytes
  1700. * @param buf the data to write
  1701. * @param mode operation mode
  1702. *
  1703. * OneNAND write out-of-band
  1704. */
  1705. static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
  1706. struct mtd_oob_ops *ops)
  1707. {
  1708. struct onenand_chip *this = mtd->priv;
  1709. int column, ret = 0, oobsize;
  1710. int written = 0, oobcmd;
  1711. u_char *oobbuf;
  1712. size_t len = ops->ooblen;
  1713. const u_char *buf = ops->oobbuf;
  1714. mtd_oob_mode_t mode = ops->mode;
  1715. to += ops->ooboffs;
  1716. DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n",
  1717. __func__, (unsigned int) to, (int) len);
  1718. /* Initialize retlen, in case of early exit */
  1719. ops->oobretlen = 0;
  1720. if (mode == MTD_OOB_AUTO)
  1721. oobsize = this->ecclayout->oobavail;
  1722. else
  1723. oobsize = mtd->oobsize;
  1724. column = to & (mtd->oobsize - 1);
  1725. if (unlikely(column >= oobsize)) {
  1726. printk(KERN_ERR "%s: Attempted to start write outside oob\n",
  1727. __func__);
  1728. return -EINVAL;
  1729. }
  1730. /* For compatibility with NAND: Do not allow write past end of page */
  1731. if (unlikely(column + len > oobsize)) {
  1732. printk(KERN_ERR "%s: Attempt to write past end of page\n",
  1733. __func__);
  1734. return -EINVAL;
  1735. }
  1736. /* Do not allow reads past end of device */
  1737. if (unlikely(to >= mtd->size ||
  1738. column + len > ((mtd->size >> this->page_shift) -
  1739. (to >> this->page_shift)) * oobsize)) {
  1740. printk(KERN_ERR "%s: Attempted to write past end of device\n",
  1741. __func__);
  1742. return -EINVAL;
  1743. }
  1744. oobbuf = this->oob_buf;
  1745. oobcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_PROG : ONENAND_CMD_PROGOOB;
  1746. /* Loop until all data write */
  1747. while (written < len) {
  1748. int thislen = min_t(int, oobsize, len - written);
  1749. cond_resched();
  1750. this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
  1751. /* We send data to spare ram with oobsize
  1752. * to prevent byte access */
  1753. memset(oobbuf, 0xff, mtd->oobsize);
  1754. if (mode == MTD_OOB_AUTO)
  1755. onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
  1756. else
  1757. memcpy(oobbuf + column, buf, thislen);
  1758. this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
  1759. if (ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this)) {
  1760. /* Set main area of DataRAM to 0xff*/
  1761. memset(this->page_buf, 0xff, mtd->writesize);
  1762. this->write_bufferram(mtd, ONENAND_DATARAM,
  1763. this->page_buf, 0, mtd->writesize);
  1764. }
  1765. this->command(mtd, oobcmd, to, mtd->oobsize);
  1766. onenand_update_bufferram(mtd, to, 0);
  1767. if (ONENAND_IS_2PLANE(this)) {
  1768. ONENAND_SET_BUFFERRAM1(this);
  1769. onenand_update_bufferram(mtd, to + this->writesize, 0);
  1770. }
  1771. ret = this->wait(mtd, FL_WRITING);
  1772. if (ret) {
  1773. printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
  1774. break;
  1775. }
  1776. ret = onenand_verify_oob(mtd, oobbuf, to);
  1777. if (ret) {
  1778. printk(KERN_ERR "%s: verify failed %d\n",
  1779. __func__, ret);
  1780. break;
  1781. }
  1782. written += thislen;
  1783. if (written == len)
  1784. break;
  1785. to += mtd->writesize;
  1786. buf += thislen;
  1787. column = 0;
  1788. }
  1789. ops->oobretlen = written;
  1790. return ret;
  1791. }
  1792. /**
  1793. * onenand_write - [MTD Interface] write buffer to FLASH
  1794. * @param mtd MTD device structure
  1795. * @param to offset to write to
  1796. * @param len number of bytes to write
  1797. * @param retlen pointer to variable to store the number of written bytes
  1798. * @param buf the data to write
  1799. *
  1800. * Write with ECC
  1801. */
  1802. static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
  1803. size_t *retlen, const u_char *buf)
  1804. {
  1805. struct mtd_oob_ops ops = {
  1806. .len = len,
  1807. .ooblen = 0,
  1808. .datbuf = (u_char *) buf,
  1809. .oobbuf = NULL,
  1810. };
  1811. int ret;
  1812. onenand_get_device(mtd, FL_WRITING);
  1813. ret = onenand_write_ops_nolock(mtd, to, &ops);
  1814. onenand_release_device(mtd);
  1815. *retlen = ops.retlen;
  1816. return ret;
  1817. }
  1818. /**
  1819. * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
  1820. * @param mtd: MTD device structure
  1821. * @param to: offset to write
  1822. * @param ops: oob operation description structure
  1823. */
  1824. static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
  1825. struct mtd_oob_ops *ops)
  1826. {
  1827. int ret;
  1828. switch (ops->mode) {
  1829. case MTD_OOB_PLACE:
  1830. case MTD_OOB_AUTO:
  1831. break;
  1832. case MTD_OOB_RAW:
  1833. /* Not implemented yet */
  1834. default:
  1835. return -EINVAL;
  1836. }
  1837. onenand_get_device(mtd, FL_WRITING);
  1838. if (ops->datbuf)
  1839. ret = onenand_write_ops_nolock(mtd, to, ops);
  1840. else
  1841. ret = onenand_write_oob_nolock(mtd, to, ops);
  1842. onenand_release_device(mtd);
  1843. return ret;
  1844. }
  1845. /**
  1846. * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad
  1847. * @param mtd MTD device structure
  1848. * @param ofs offset from device start
  1849. * @param allowbbt 1, if its allowed to access the bbt area
  1850. *
  1851. * Check, if the block is bad. Either by reading the bad block table or
  1852. * calling of the scan function.
  1853. */
  1854. static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt)
  1855. {
  1856. struct onenand_chip *this = mtd->priv;
  1857. struct bbm_info *bbm = this->bbm;
  1858. /* Return info from the table */
  1859. return bbm->isbad_bbt(mtd, ofs, allowbbt);
  1860. }
  1861. static int onenand_multiblock_erase_verify(struct mtd_info *mtd,
  1862. struct erase_info *instr)
  1863. {
  1864. struct onenand_chip *this = mtd->priv;
  1865. loff_t addr = instr->addr;
  1866. int len = instr->len;
  1867. unsigned int block_size = (1 << this->erase_shift);
  1868. int ret = 0;
  1869. while (len) {
  1870. this->command(mtd, ONENAND_CMD_ERASE_VERIFY, addr, block_size);
  1871. ret = this->wait(mtd, FL_VERIFYING_ERASE);
  1872. if (ret) {
  1873. printk(KERN_ERR "%s: Failed verify, block %d\n",
  1874. __func__, onenand_block(this, addr));
  1875. instr->state = MTD_ERASE_FAILED;
  1876. instr->fail_addr = addr;
  1877. return -1;
  1878. }
  1879. len -= block_size;
  1880. addr += block_size;
  1881. }
  1882. return 0;
  1883. }
  1884. /**
  1885. * onenand_multiblock_erase - [Internal] erase block(s) using multiblock erase
  1886. * @param mtd MTD device structure
  1887. * @param instr erase instruction
  1888. * @param region erase region
  1889. *
  1890. * Erase one or more blocks up to 64 block at a time
  1891. */
  1892. static int onenand_multiblock_erase(struct mtd_info *mtd,
  1893. struct erase_info *instr,
  1894. unsigned int block_size)
  1895. {
  1896. struct onenand_chip *this = mtd->priv;
  1897. loff_t addr = instr->addr;
  1898. int len = instr->len;
  1899. int eb_count = 0;
  1900. int ret = 0;
  1901. int bdry_block = 0;
  1902. instr->state = MTD_ERASING;
  1903. if (ONENAND_IS_DDP(this)) {
  1904. loff_t bdry_addr = this->chipsize >> 1;
  1905. if (addr < bdry_addr && (addr + len) > bdry_addr)
  1906. bdry_block = bdry_addr >> this->erase_shift;
  1907. }
  1908. /* Pre-check bbs */
  1909. while (len) {
  1910. /* Check if we have a bad block, we do not erase bad blocks */
  1911. if (onenand_block_isbad_nolock(mtd, addr, 0)) {
  1912. printk(KERN_WARNING "%s: attempt to erase a bad block "
  1913. "at addr 0x%012llx\n",
  1914. __func__, (unsigned long long) addr);
  1915. instr->state = MTD_ERASE_FAILED;
  1916. return -EIO;
  1917. }
  1918. len -= block_size;
  1919. addr += block_size;
  1920. }
  1921. len = instr->len;
  1922. addr = instr->addr;
  1923. /* loop over 64 eb batches */
  1924. while (len) {
  1925. struct erase_info verify_instr = *instr;
  1926. int max_eb_count = MB_ERASE_MAX_BLK_COUNT;
  1927. verify_instr.addr = addr;
  1928. verify_instr.len = 0;
  1929. /* do not cross chip boundary */
  1930. if (bdry_block) {
  1931. int this_block = (addr >> this->erase_shift);
  1932. if (this_block < bdry_block) {
  1933. max_eb_count = min(max_eb_count,
  1934. (bdry_block - this_block));
  1935. }
  1936. }
  1937. eb_count = 0;
  1938. while (len > block_size && eb_count < (max_eb_count - 1)) {
  1939. this->command(mtd, ONENAND_CMD_MULTIBLOCK_ERASE,
  1940. addr, block_size);
  1941. onenand_invalidate_bufferram(mtd, addr, block_size);
  1942. ret = this->wait(mtd, FL_PREPARING_ERASE);
  1943. if (ret) {
  1944. printk(KERN_ERR "%s: Failed multiblock erase, "
  1945. "block %d\n", __func__,
  1946. onenand_block(this, addr));
  1947. instr->state = MTD_ERASE_FAILED;
  1948. instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
  1949. return -EIO;
  1950. }
  1951. len -= block_size;
  1952. addr += block_size;
  1953. eb_count++;
  1954. }
  1955. /* last block of 64-eb series */
  1956. cond_resched();
  1957. this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
  1958. onenand_invalidate_bufferram(mtd, addr, block_size);
  1959. ret = this->wait(mtd, FL_ERASING);
  1960. /* Check if it is write protected */
  1961. if (ret) {
  1962. printk(KERN_ERR "%s: Failed erase, block %d\n",
  1963. __func__, onenand_block(this, addr));
  1964. instr->state = MTD_ERASE_FAILED;
  1965. instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
  1966. return -EIO;
  1967. }
  1968. len -= block_size;
  1969. addr += block_size;
  1970. eb_count++;
  1971. /* verify */
  1972. verify_instr.len = eb_count * block_size;
  1973. if (onenand_multiblock_erase_verify(mtd, &verify_instr)) {
  1974. instr->state = verify_instr.state;
  1975. instr->fail_addr = verify_instr.fail_addr;
  1976. return -EIO;
  1977. }
  1978. }
  1979. return 0;
  1980. }
  1981. /**
  1982. * onenand_block_by_block_erase - [Internal] erase block(s) using regular erase
  1983. * @param mtd MTD device structure
  1984. * @param instr erase instruction
  1985. * @param region erase region
  1986. * @param block_size erase block size
  1987. *
  1988. * Erase one or more blocks one block at a time
  1989. */
  1990. static int onenand_block_by_block_erase(struct mtd_info *mtd,
  1991. struct erase_info *instr,
  1992. struct mtd_erase_region_info *region,
  1993. unsigned int block_size)
  1994. {
  1995. struct onenand_chip *this = mtd->priv;
  1996. loff_t addr = instr->addr;
  1997. int len = instr->len;
  1998. loff_t region_end = 0;
  1999. int ret = 0;
  2000. if (region) {
  2001. /* region is set for Flex-OneNAND */
  2002. region_end = region->offset + region->erasesize * region->numblocks;
  2003. }
  2004. instr->state = MTD_ERASING;
  2005. /* Loop through the blocks */
  2006. while (len) {
  2007. cond_resched();
  2008. /* Check if we have a bad block, we do not erase bad blocks */
  2009. if (onenand_block_isbad_nolock(mtd, addr, 0)) {
  2010. printk(KERN_WARNING "%s: attempt to erase a bad block "
  2011. "at addr 0x%012llx\n",
  2012. __func__, (unsigned long long) addr);
  2013. instr->state = MTD_ERASE_FAILED;
  2014. return -EIO;
  2015. }
  2016. this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
  2017. onenand_invalidate_bufferram(mtd, addr, block_size);
  2018. ret = this->wait(mtd, FL_ERASING);
  2019. /* Check, if it is write protected */
  2020. if (ret) {
  2021. printk(KERN_ERR "%s: Failed erase, block %d\n",
  2022. __func__, onenand_block(this, addr));
  2023. instr->state = MTD_ERASE_FAILED;
  2024. instr->fail_addr = addr;
  2025. return -EIO;
  2026. }
  2027. len -= block_size;
  2028. addr += block_size;
  2029. if (addr == region_end) {
  2030. if (!len)
  2031. break;
  2032. region++;
  2033. block_size = region->erasesize;
  2034. region_end = region->offset + region->erasesize * region->numblocks;
  2035. if (len & (block_size - 1)) {
  2036. /* FIXME: This should be handled at MTD partitioning level. */
  2037. printk(KERN_ERR "%s: Unaligned address\n",
  2038. __func__);
  2039. return -EIO;
  2040. }
  2041. }
  2042. }
  2043. return 0;
  2044. }
  2045. /**
  2046. * onenand_erase - [MTD Interface] erase block(s)
  2047. * @param mtd MTD device structure
  2048. * @param instr erase instruction
  2049. *
  2050. * Erase one or more blocks
  2051. */
  2052. static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
  2053. {
  2054. struct onenand_chip *this = mtd->priv;
  2055. unsigned int block_size;
  2056. loff_t addr = instr->addr;
  2057. loff_t len = instr->len;
  2058. int ret = 0;
  2059. struct mtd_erase_region_info *region = NULL;
  2060. loff_t region_offset = 0;
  2061. DEBUG(MTD_DEBUG_LEVEL3, "%s: start=0x%012llx, len=%llu\n", __func__,
  2062. (unsigned long long) instr->addr, (unsigned long long) instr->len);
  2063. /* Do not allow erase past end of device */
  2064. if (unlikely((len + addr) > mtd->size)) {
  2065. printk(KERN_ERR "%s: Erase past end of device\n", __func__);
  2066. return -EINVAL;
  2067. }
  2068. if (FLEXONENAND(this)) {
  2069. /* Find the eraseregion of this address */
  2070. int i = flexonenand_region(mtd, addr);
  2071. region = &mtd->eraseregions[i];
  2072. block_size = region->erasesize;
  2073. /* Start address within region must align on block boundary.
  2074. * Erase region's start offset is always block start address.
  2075. */
  2076. region_offset = region->offset;
  2077. } else
  2078. block_size = 1 << this->erase_shift;
  2079. /* Start address must align on block boundary */
  2080. if (unlikely((addr - region_offset) & (block_size - 1))) {
  2081. printk(KERN_ERR "%s: Unaligned address\n", __func__);
  2082. return -EINVAL;
  2083. }
  2084. /* Length must align on block boundary */
  2085. if (unlikely(len & (block_size - 1))) {
  2086. printk(KERN_ERR "%s: Length not block aligned\n", __func__);
  2087. return -EINVAL;
  2088. }
  2089. instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
  2090. /* Grab the lock and see if the device is available */
  2091. onenand_get_device(mtd, FL_ERASING);
  2092. if (region || instr->len < MB_ERASE_MIN_BLK_COUNT * block_size) {
  2093. /* region is set for Flex-OneNAND (no mb erase) */
  2094. ret = onenand_block_by_block_erase(mtd, instr,
  2095. region, block_size);
  2096. } else {
  2097. ret = onenand_multiblock_erase(mtd, instr, block_size);
  2098. }
  2099. /* Deselect and wake up anyone waiting on the device */
  2100. onenand_release_device(mtd);
  2101. /* Do call back function */
  2102. if (!ret) {
  2103. instr->state = MTD_ERASE_DONE;
  2104. mtd_erase_callback(instr);
  2105. }
  2106. return ret;
  2107. }
  2108. /**
  2109. * onenand_sync - [MTD Interface] sync
  2110. * @param mtd MTD device structure
  2111. *
  2112. * Sync is actually a wait for chip ready function
  2113. */
  2114. static void onenand_sync(struct mtd_info *mtd)
  2115. {
  2116. DEBUG(MTD_DEBUG_LEVEL3, "%s: called\n", __func__);
  2117. /* Grab the lock and see if the device is available */
  2118. onenand_get_device(mtd, FL_SYNCING);
  2119. /* Release it and go back */
  2120. onenand_release_device(mtd);
  2121. }
  2122. /**
  2123. * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
  2124. * @param mtd MTD device structure
  2125. * @param ofs offset relative to mtd start
  2126. *
  2127. * Check whether the block is bad
  2128. */
  2129. static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
  2130. {
  2131. int ret;
  2132. /* Check for invalid offset */
  2133. if (ofs > mtd->size)
  2134. return -EINVAL;
  2135. onenand_get_device(mtd, FL_READING);
  2136. ret = onenand_block_isbad_nolock(mtd, ofs, 0);
  2137. onenand_release_device(mtd);
  2138. return ret;
  2139. }
  2140. /**
  2141. * onenand_default_block_markbad - [DEFAULT] mark a block bad
  2142. * @param mtd MTD device structure
  2143. * @param ofs offset from device start
  2144. *
  2145. * This is the default implementation, which can be overridden by
  2146. * a hardware specific driver.
  2147. */
  2148. static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
  2149. {
  2150. struct onenand_chip *this = mtd->priv;
  2151. struct bbm_info *bbm = this->bbm;
  2152. u_char buf[2] = {0, 0};
  2153. struct mtd_oob_ops ops = {
  2154. .mode = MTD_OOB_PLACE,
  2155. .ooblen = 2,
  2156. .oobbuf = buf,
  2157. .ooboffs = 0,
  2158. };
  2159. int block;
  2160. /* Get block number */
  2161. block = onenand_block(this, ofs);
  2162. if (bbm->bbt)
  2163. bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
  2164. /* We write two bytes, so we don't have to mess with 16-bit access */
  2165. ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
  2166. /* FIXME : What to do when marking SLC block in partition
  2167. * with MLC erasesize? For now, it is not advisable to
  2168. * create partitions containing both SLC and MLC regions.
  2169. */
  2170. return onenand_write_oob_nolock(mtd, ofs, &ops);
  2171. }
  2172. /**
  2173. * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
  2174. * @param mtd MTD device structure
  2175. * @param ofs offset relative to mtd start
  2176. *
  2177. * Mark the block as bad
  2178. */
  2179. static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
  2180. {
  2181. struct onenand_chip *this = mtd->priv;
  2182. int ret;
  2183. ret = onenand_block_isbad(mtd, ofs);
  2184. if (ret) {
  2185. /* If it was bad already, return success and do nothing */
  2186. if (ret > 0)
  2187. return 0;
  2188. return ret;
  2189. }
  2190. onenand_get_device(mtd, FL_WRITING);
  2191. ret = this->block_markbad(mtd, ofs);
  2192. onenand_release_device(mtd);
  2193. return ret;
  2194. }
  2195. /**
  2196. * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
  2197. * @param mtd MTD device structure
  2198. * @param ofs offset relative to mtd start
  2199. * @param len number of bytes to lock or unlock
  2200. * @param cmd lock or unlock command
  2201. *
  2202. * Lock or unlock one or more blocks
  2203. */
  2204. static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
  2205. {
  2206. struct onenand_chip *this = mtd->priv;
  2207. int start, end, block, value, status;
  2208. int wp_status_mask;
  2209. start = onenand_block(this, ofs);
  2210. end = onenand_block(this, ofs + len) - 1;
  2211. if (cmd == ONENAND_CMD_LOCK)
  2212. wp_status_mask = ONENAND_WP_LS;
  2213. else
  2214. wp_status_mask = ONENAND_WP_US;
  2215. /* Continuous lock scheme */
  2216. if (this->options & ONENAND_HAS_CONT_LOCK) {
  2217. /* Set start block address */
  2218. this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  2219. /* Set end block address */
  2220. this->write_word(end, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
  2221. /* Write lock command */
  2222. this->command(mtd, cmd, 0, 0);
  2223. /* There's no return value */
  2224. this->wait(mtd, FL_LOCKING);
  2225. /* Sanity check */
  2226. while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
  2227. & ONENAND_CTRL_ONGO)
  2228. continue;
  2229. /* Check lock status */
  2230. status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
  2231. if (!(status & wp_status_mask))
  2232. printk(KERN_ERR "%s: wp status = 0x%x\n",
  2233. __func__, status);
  2234. return 0;
  2235. }
  2236. /* Block lock scheme */
  2237. for (block = start; block < end + 1; block++) {
  2238. /* Set block address */
  2239. value = onenand_block_address(this, block);
  2240. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
  2241. /* Select DataRAM for DDP */
  2242. value = onenand_bufferram_address(this, block);
  2243. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  2244. /* Set start block address */
  2245. this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  2246. /* Write lock command */
  2247. this->command(mtd, cmd, 0, 0);
  2248. /* There's no return value */
  2249. this->wait(mtd, FL_LOCKING);
  2250. /* Sanity check */
  2251. while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
  2252. & ONENAND_CTRL_ONGO)
  2253. continue;
  2254. /* Check lock status */
  2255. status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
  2256. if (!(status & wp_status_mask))
  2257. printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n",
  2258. __func__, block, status);
  2259. }
  2260. return 0;
  2261. }
  2262. /**
  2263. * onenand_lock - [MTD Interface] Lock block(s)
  2264. * @param mtd MTD device structure
  2265. * @param ofs offset relative to mtd start
  2266. * @param len number of bytes to unlock
  2267. *
  2268. * Lock one or more blocks
  2269. */
  2270. static int onenand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
  2271. {
  2272. int ret;
  2273. onenand_get_device(mtd, FL_LOCKING);
  2274. ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
  2275. onenand_release_device(mtd);
  2276. return ret;
  2277. }
  2278. /**
  2279. * onenand_unlock - [MTD Interface] Unlock block(s)
  2280. * @param mtd MTD device structure
  2281. * @param ofs offset relative to mtd start
  2282. * @param len number of bytes to unlock
  2283. *
  2284. * Unlock one or more blocks
  2285. */
  2286. static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
  2287. {
  2288. int ret;
  2289. onenand_get_device(mtd, FL_LOCKING);
  2290. ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
  2291. onenand_release_device(mtd);
  2292. return ret;
  2293. }
  2294. /**
  2295. * onenand_check_lock_status - [OneNAND Interface] Check lock status
  2296. * @param this onenand chip data structure
  2297. *
  2298. * Check lock status
  2299. */
  2300. static int onenand_check_lock_status(struct onenand_chip *this)
  2301. {
  2302. unsigned int value, block, status;
  2303. unsigned int end;
  2304. end = this->chipsize >> this->erase_shift;
  2305. for (block = 0; block < end; block++) {
  2306. /* Set block address */
  2307. value = onenand_block_address(this, block);
  2308. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
  2309. /* Select DataRAM for DDP */
  2310. value = onenand_bufferram_address(this, block);
  2311. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  2312. /* Set start block address */
  2313. this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  2314. /* Check lock status */
  2315. status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
  2316. if (!(status & ONENAND_WP_US)) {
  2317. printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n",
  2318. __func__, block, status);
  2319. return 0;
  2320. }
  2321. }
  2322. return 1;
  2323. }
  2324. /**
  2325. * onenand_unlock_all - [OneNAND Interface] unlock all blocks
  2326. * @param mtd MTD device structure
  2327. *
  2328. * Unlock all blocks
  2329. */
  2330. static void onenand_unlock_all(struct mtd_info *mtd)
  2331. {
  2332. struct onenand_chip *this = mtd->priv;
  2333. loff_t ofs = 0;
  2334. loff_t len = mtd->size;
  2335. if (this->options & ONENAND_HAS_UNLOCK_ALL) {
  2336. /* Set start block address */
  2337. this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  2338. /* Write unlock command */
  2339. this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
  2340. /* There's no return value */
  2341. this->wait(mtd, FL_LOCKING);
  2342. /* Sanity check */
  2343. while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
  2344. & ONENAND_CTRL_ONGO)
  2345. continue;
  2346. /* Don't check lock status */
  2347. if (this->options & ONENAND_SKIP_UNLOCK_CHECK)
  2348. return;
  2349. /* Check lock status */
  2350. if (onenand_check_lock_status(this))
  2351. return;
  2352. /* Workaround for all block unlock in DDP */
  2353. if (ONENAND_IS_DDP(this) && !FLEXONENAND(this)) {
  2354. /* All blocks on another chip */
  2355. ofs = this->chipsize >> 1;
  2356. len = this->chipsize >> 1;
  2357. }
  2358. }
  2359. onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
  2360. }
  2361. #ifdef CONFIG_MTD_ONENAND_OTP
  2362. /**
  2363. * onenand_otp_command - Send OTP specific command to OneNAND device
  2364. * @param mtd MTD device structure
  2365. * @param cmd the command to be sent
  2366. * @param addr offset to read from or write to
  2367. * @param len number of bytes to read or write
  2368. */
  2369. static int onenand_otp_command(struct mtd_info *mtd, int cmd, loff_t addr,
  2370. size_t len)
  2371. {
  2372. struct onenand_chip *this = mtd->priv;
  2373. int value, block, page;
  2374. /* Address translation */
  2375. switch (cmd) {
  2376. case ONENAND_CMD_OTP_ACCESS:
  2377. block = (int) (addr >> this->erase_shift);
  2378. page = -1;
  2379. break;
  2380. default:
  2381. block = (int) (addr >> this->erase_shift);
  2382. page = (int) (addr >> this->page_shift);
  2383. if (ONENAND_IS_2PLANE(this)) {
  2384. /* Make the even block number */
  2385. block &= ~1;
  2386. /* Is it the odd plane? */
  2387. if (addr & this->writesize)
  2388. block++;
  2389. page >>= 1;
  2390. }
  2391. page &= this->page_mask;
  2392. break;
  2393. }
  2394. if (block != -1) {
  2395. /* Write 'DFS, FBA' of Flash */
  2396. value = onenand_block_address(this, block);
  2397. this->write_word(value, this->base +
  2398. ONENAND_REG_START_ADDRESS1);
  2399. }
  2400. if (page != -1) {
  2401. /* Now we use page size operation */
  2402. int sectors = 4, count = 4;
  2403. int dataram;
  2404. switch (cmd) {
  2405. default:
  2406. if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
  2407. cmd = ONENAND_CMD_2X_PROG;
  2408. dataram = ONENAND_CURRENT_BUFFERRAM(this);
  2409. break;
  2410. }
  2411. /* Write 'FPA, FSA' of Flash */
  2412. value = onenand_page_address(page, sectors);
  2413. this->write_word(value, this->base +
  2414. ONENAND_REG_START_ADDRESS8);
  2415. /* Write 'BSA, BSC' of DataRAM */
  2416. value = onenand_buffer_address(dataram, sectors, count);
  2417. this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
  2418. }
  2419. /* Interrupt clear */
  2420. this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
  2421. /* Write command */
  2422. this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
  2423. return 0;
  2424. }
  2425. /**
  2426. * onenand_otp_write_oob_nolock - [Internal] OneNAND write out-of-band, specific to OTP
  2427. * @param mtd MTD device structure
  2428. * @param to offset to write to
  2429. * @param len number of bytes to write
  2430. * @param retlen pointer to variable to store the number of written bytes
  2431. * @param buf the data to write
  2432. *
  2433. * OneNAND write out-of-band only for OTP
  2434. */
  2435. static int onenand_otp_write_oob_nolock(struct mtd_info *mtd, loff_t to,
  2436. struct mtd_oob_ops *ops)
  2437. {
  2438. struct onenand_chip *this = mtd->priv;
  2439. int column, ret = 0, oobsize;
  2440. int written = 0;
  2441. u_char *oobbuf;
  2442. size_t len = ops->ooblen;
  2443. const u_char *buf = ops->oobbuf;
  2444. int block, value, status;
  2445. to += ops->ooboffs;
  2446. /* Initialize retlen, in case of early exit */
  2447. ops->oobretlen = 0;
  2448. oobsize = mtd->oobsize;
  2449. column = to & (mtd->oobsize - 1);
  2450. oobbuf = this->oob_buf;
  2451. /* Loop until all data write */
  2452. while (written < len) {
  2453. int thislen = min_t(int, oobsize, len - written);
  2454. cond_resched();
  2455. block = (int) (to >> this->erase_shift);
  2456. /*
  2457. * Write 'DFS, FBA' of Flash
  2458. * Add: F100h DQ=DFS, FBA
  2459. */
  2460. value = onenand_block_address(this, block);
  2461. this->write_word(value, this->base +
  2462. ONENAND_REG_START_ADDRESS1);
  2463. /*
  2464. * Select DataRAM for DDP
  2465. * Add: F101h DQ=DBS
  2466. */
  2467. value = onenand_bufferram_address(this, block);
  2468. this->write_word(value, this->base +
  2469. ONENAND_REG_START_ADDRESS2);
  2470. ONENAND_SET_NEXT_BUFFERRAM(this);
  2471. /*
  2472. * Enter OTP access mode
  2473. */
  2474. this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
  2475. this->wait(mtd, FL_OTPING);
  2476. /* We send data to spare ram with oobsize
  2477. * to prevent byte access */
  2478. memcpy(oobbuf + column, buf, thislen);
  2479. /*
  2480. * Write Data into DataRAM
  2481. * Add: 8th Word
  2482. * in sector0/spare/page0
  2483. * DQ=XXFCh
  2484. */
  2485. this->write_bufferram(mtd, ONENAND_SPARERAM,
  2486. oobbuf, 0, mtd->oobsize);
  2487. onenand_otp_command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
  2488. onenand_update_bufferram(mtd, to, 0);
  2489. if (ONENAND_IS_2PLANE(this)) {
  2490. ONENAND_SET_BUFFERRAM1(this);
  2491. onenand_update_bufferram(mtd, to + this->writesize, 0);
  2492. }
  2493. ret = this->wait(mtd, FL_WRITING);
  2494. if (ret) {
  2495. printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
  2496. break;
  2497. }
  2498. /* Exit OTP access mode */
  2499. this->command(mtd, ONENAND_CMD_RESET, 0, 0);
  2500. this->wait(mtd, FL_RESETING);
  2501. status = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
  2502. status &= 0x60;
  2503. if (status == 0x60) {
  2504. printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
  2505. printk(KERN_DEBUG "1st Block\tLOCKED\n");
  2506. printk(KERN_DEBUG "OTP Block\tLOCKED\n");
  2507. } else if (status == 0x20) {
  2508. printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
  2509. printk(KERN_DEBUG "1st Block\tLOCKED\n");
  2510. printk(KERN_DEBUG "OTP Block\tUN-LOCKED\n");
  2511. } else if (status == 0x40) {
  2512. printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
  2513. printk(KERN_DEBUG "1st Block\tUN-LOCKED\n");
  2514. printk(KERN_DEBUG "OTP Block\tLOCKED\n");
  2515. } else {
  2516. printk(KERN_DEBUG "Reboot to check\n");
  2517. }
  2518. written += thislen;
  2519. if (written == len)
  2520. break;
  2521. to += mtd->writesize;
  2522. buf += thislen;
  2523. column = 0;
  2524. }
  2525. ops->oobretlen = written;
  2526. return ret;
  2527. }
  2528. /* Internal OTP operation */
  2529. typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
  2530. size_t *retlen, u_char *buf);
  2531. /**
  2532. * do_otp_read - [DEFAULT] Read OTP block area
  2533. * @param mtd MTD device structure
  2534. * @param from The offset to read
  2535. * @param len number of bytes to read
  2536. * @param retlen pointer to variable to store the number of readbytes
  2537. * @param buf the databuffer to put/get data
  2538. *
  2539. * Read OTP block area.
  2540. */
  2541. static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
  2542. size_t *retlen, u_char *buf)
  2543. {
  2544. struct onenand_chip *this = mtd->priv;
  2545. struct mtd_oob_ops ops = {
  2546. .len = len,
  2547. .ooblen = 0,
  2548. .datbuf = buf,
  2549. .oobbuf = NULL,
  2550. };
  2551. int ret;
  2552. /* Enter OTP access mode */
  2553. this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
  2554. this->wait(mtd, FL_OTPING);
  2555. ret = ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this) ?
  2556. onenand_mlc_read_ops_nolock(mtd, from, &ops) :
  2557. onenand_read_ops_nolock(mtd, from, &ops);
  2558. /* Exit OTP access mode */
  2559. this->command(mtd, ONENAND_CMD_RESET, 0, 0);
  2560. this->wait(mtd, FL_RESETING);
  2561. return ret;
  2562. }
  2563. /**
  2564. * do_otp_write - [DEFAULT] Write OTP block area
  2565. * @param mtd MTD device structure
  2566. * @param to The offset to write
  2567. * @param len number of bytes to write
  2568. * @param retlen pointer to variable to store the number of write bytes
  2569. * @param buf the databuffer to put/get data
  2570. *
  2571. * Write OTP block area.
  2572. */
  2573. static int do_otp_write(struct mtd_info *mtd, loff_t to, size_t len,
  2574. size_t *retlen, u_char *buf)
  2575. {
  2576. struct onenand_chip *this = mtd->priv;
  2577. unsigned char *pbuf = buf;
  2578. int ret;
  2579. struct mtd_oob_ops ops;
  2580. /* Force buffer page aligned */
  2581. if (len < mtd->writesize) {
  2582. memcpy(this->page_buf, buf, len);
  2583. memset(this->page_buf + len, 0xff, mtd->writesize - len);
  2584. pbuf = this->page_buf;
  2585. len = mtd->writesize;
  2586. }
  2587. /* Enter OTP access mode */
  2588. this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
  2589. this->wait(mtd, FL_OTPING);
  2590. ops.len = len;
  2591. ops.ooblen = 0;
  2592. ops.datbuf = pbuf;
  2593. ops.oobbuf = NULL;
  2594. ret = onenand_write_ops_nolock(mtd, to, &ops);
  2595. *retlen = ops.retlen;
  2596. /* Exit OTP access mode */
  2597. this->command(mtd, ONENAND_CMD_RESET, 0, 0);
  2598. this->wait(mtd, FL_RESETING);
  2599. return ret;
  2600. }
  2601. /**
  2602. * do_otp_lock - [DEFAULT] Lock OTP block area
  2603. * @param mtd MTD device structure
  2604. * @param from The offset to lock
  2605. * @param len number of bytes to lock
  2606. * @param retlen pointer to variable to store the number of lock bytes
  2607. * @param buf the databuffer to put/get data
  2608. *
  2609. * Lock OTP block area.
  2610. */
  2611. static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
  2612. size_t *retlen, u_char *buf)
  2613. {
  2614. struct onenand_chip *this = mtd->priv;
  2615. struct mtd_oob_ops ops;
  2616. int ret;
  2617. if (FLEXONENAND(this)) {
  2618. /* Enter OTP access mode */
  2619. this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
  2620. this->wait(mtd, FL_OTPING);
  2621. /*
  2622. * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
  2623. * main area of page 49.
  2624. */
  2625. ops.len = mtd->writesize;
  2626. ops.ooblen = 0;
  2627. ops.datbuf = buf;
  2628. ops.oobbuf = NULL;
  2629. ret = onenand_write_ops_nolock(mtd, mtd->writesize * 49, &ops);
  2630. *retlen = ops.retlen;
  2631. /* Exit OTP access mode */
  2632. this->command(mtd, ONENAND_CMD_RESET, 0, 0);
  2633. this->wait(mtd, FL_RESETING);
  2634. } else {
  2635. ops.mode = MTD_OOB_PLACE;
  2636. ops.ooblen = len;
  2637. ops.oobbuf = buf;
  2638. ops.ooboffs = 0;
  2639. ret = onenand_otp_write_oob_nolock(mtd, from, &ops);
  2640. *retlen = ops.oobretlen;
  2641. }
  2642. return ret;
  2643. }
  2644. /**
  2645. * onenand_otp_walk - [DEFAULT] Handle OTP operation
  2646. * @param mtd MTD device structure
  2647. * @param from The offset to read/write
  2648. * @param len number of bytes to read/write
  2649. * @param retlen pointer to variable to store the number of read bytes
  2650. * @param buf the databuffer to put/get data
  2651. * @param action do given action
  2652. * @param mode specify user and factory
  2653. *
  2654. * Handle OTP operation.
  2655. */
  2656. static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
  2657. size_t *retlen, u_char *buf,
  2658. otp_op_t action, int mode)
  2659. {
  2660. struct onenand_chip *this = mtd->priv;
  2661. int otp_pages;
  2662. int density;
  2663. int ret = 0;
  2664. *retlen = 0;
  2665. density = onenand_get_density(this->device_id);
  2666. if (density < ONENAND_DEVICE_DENSITY_512Mb)
  2667. otp_pages = 20;
  2668. else
  2669. otp_pages = 50;
  2670. if (mode == MTD_OTP_FACTORY) {
  2671. from += mtd->writesize * otp_pages;
  2672. otp_pages = ONENAND_PAGES_PER_BLOCK - otp_pages;
  2673. }
  2674. /* Check User/Factory boundary */
  2675. if (mode == MTD_OTP_USER) {
  2676. if (mtd->writesize * otp_pages < from + len)
  2677. return 0;
  2678. } else {
  2679. if (mtd->writesize * otp_pages < len)
  2680. return 0;
  2681. }
  2682. onenand_get_device(mtd, FL_OTPING);
  2683. while (len > 0 && otp_pages > 0) {
  2684. if (!action) { /* OTP Info functions */
  2685. struct otp_info *otpinfo;
  2686. len -= sizeof(struct otp_info);
  2687. if (len <= 0) {
  2688. ret = -ENOSPC;
  2689. break;
  2690. }
  2691. otpinfo = (struct otp_info *) buf;
  2692. otpinfo->start = from;
  2693. otpinfo->length = mtd->writesize;
  2694. otpinfo->locked = 0;
  2695. from += mtd->writesize;
  2696. buf += sizeof(struct otp_info);
  2697. *retlen += sizeof(struct otp_info);
  2698. } else {
  2699. size_t tmp_retlen;
  2700. ret = action(mtd, from, len, &tmp_retlen, buf);
  2701. buf += tmp_retlen;
  2702. len -= tmp_retlen;
  2703. *retlen += tmp_retlen;
  2704. if (ret)
  2705. break;
  2706. }
  2707. otp_pages--;
  2708. }
  2709. onenand_release_device(mtd);
  2710. return ret;
  2711. }
  2712. /**
  2713. * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
  2714. * @param mtd MTD device structure
  2715. * @param buf the databuffer to put/get data
  2716. * @param len number of bytes to read
  2717. *
  2718. * Read factory OTP info.
  2719. */
  2720. static int onenand_get_fact_prot_info(struct mtd_info *mtd,
  2721. struct otp_info *buf, size_t len)
  2722. {
  2723. size_t retlen;
  2724. int ret;
  2725. ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
  2726. return ret ? : retlen;
  2727. }
  2728. /**
  2729. * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
  2730. * @param mtd MTD device structure
  2731. * @param from The offset to read
  2732. * @param len number of bytes to read
  2733. * @param retlen pointer to variable to store the number of read bytes
  2734. * @param buf the databuffer to put/get data
  2735. *
  2736. * Read factory OTP area.
  2737. */
  2738. static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
  2739. size_t len, size_t *retlen, u_char *buf)
  2740. {
  2741. return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
  2742. }
  2743. /**
  2744. * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
  2745. * @param mtd MTD device structure
  2746. * @param buf the databuffer to put/get data
  2747. * @param len number of bytes to read
  2748. *
  2749. * Read user OTP info.
  2750. */
  2751. static int onenand_get_user_prot_info(struct mtd_info *mtd,
  2752. struct otp_info *buf, size_t len)
  2753. {
  2754. size_t retlen;
  2755. int ret;
  2756. ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
  2757. return ret ? : retlen;
  2758. }
  2759. /**
  2760. * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
  2761. * @param mtd MTD device structure
  2762. * @param from The offset to read
  2763. * @param len number of bytes to read
  2764. * @param retlen pointer to variable to store the number of read bytes
  2765. * @param buf the databuffer to put/get data
  2766. *
  2767. * Read user OTP area.
  2768. */
  2769. static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
  2770. size_t len, size_t *retlen, u_char *buf)
  2771. {
  2772. return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
  2773. }
  2774. /**
  2775. * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
  2776. * @param mtd MTD device structure
  2777. * @param from The offset to write
  2778. * @param len number of bytes to write
  2779. * @param retlen pointer to variable to store the number of write bytes
  2780. * @param buf the databuffer to put/get data
  2781. *
  2782. * Write user OTP area.
  2783. */
  2784. static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
  2785. size_t len, size_t *retlen, u_char *buf)
  2786. {
  2787. return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
  2788. }
  2789. /**
  2790. * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
  2791. * @param mtd MTD device structure
  2792. * @param from The offset to lock
  2793. * @param len number of bytes to unlock
  2794. *
  2795. * Write lock mark on spare area in page 0 in OTP block
  2796. */
  2797. static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
  2798. size_t len)
  2799. {
  2800. struct onenand_chip *this = mtd->priv;
  2801. u_char *buf = FLEXONENAND(this) ? this->page_buf : this->oob_buf;
  2802. size_t retlen;
  2803. int ret;
  2804. unsigned int otp_lock_offset = ONENAND_OTP_LOCK_OFFSET;
  2805. memset(buf, 0xff, FLEXONENAND(this) ? this->writesize
  2806. : mtd->oobsize);
  2807. /*
  2808. * Write lock mark to 8th word of sector0 of page0 of the spare0.
  2809. * We write 16 bytes spare area instead of 2 bytes.
  2810. * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
  2811. * main area of page 49.
  2812. */
  2813. from = 0;
  2814. len = FLEXONENAND(this) ? mtd->writesize : 16;
  2815. /*
  2816. * Note: OTP lock operation
  2817. * OTP block : 0xXXFC XX 1111 1100
  2818. * 1st block : 0xXXF3 (If chip support) XX 1111 0011
  2819. * Both : 0xXXF0 (If chip support) XX 1111 0000
  2820. */
  2821. if (FLEXONENAND(this))
  2822. otp_lock_offset = FLEXONENAND_OTP_LOCK_OFFSET;
  2823. /* ONENAND_OTP_AREA | ONENAND_OTP_BLOCK0 | ONENAND_OTP_AREA_BLOCK0 */
  2824. if (otp == 1)
  2825. buf[otp_lock_offset] = 0xFC;
  2826. else if (otp == 2)
  2827. buf[otp_lock_offset] = 0xF3;
  2828. else if (otp == 3)
  2829. buf[otp_lock_offset] = 0xF0;
  2830. else if (otp != 0)
  2831. printk(KERN_DEBUG "[OneNAND] Invalid option selected for OTP\n");
  2832. ret = onenand_otp_walk(mtd, from, len, &retlen, buf, do_otp_lock, MTD_OTP_USER);
  2833. return ret ? : retlen;
  2834. }
  2835. #endif /* CONFIG_MTD_ONENAND_OTP */
  2836. /**
  2837. * onenand_check_features - Check and set OneNAND features
  2838. * @param mtd MTD data structure
  2839. *
  2840. * Check and set OneNAND features
  2841. * - lock scheme
  2842. * - two plane
  2843. */
  2844. static void onenand_check_features(struct mtd_info *mtd)
  2845. {
  2846. struct onenand_chip *this = mtd->priv;
  2847. unsigned int density, process;
  2848. /* Lock scheme depends on density and process */
  2849. density = onenand_get_density(this->device_id);
  2850. process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
  2851. /* Lock scheme */
  2852. switch (density) {
  2853. case ONENAND_DEVICE_DENSITY_4Gb:
  2854. if (ONENAND_IS_DDP(this))
  2855. this->options |= ONENAND_HAS_2PLANE;
  2856. else
  2857. this->options |= ONENAND_HAS_4KB_PAGE;
  2858. case ONENAND_DEVICE_DENSITY_2Gb:
  2859. /* 2Gb DDP does not have 2 plane */
  2860. if (!ONENAND_IS_DDP(this))
  2861. this->options |= ONENAND_HAS_2PLANE;
  2862. this->options |= ONENAND_HAS_UNLOCK_ALL;
  2863. case ONENAND_DEVICE_DENSITY_1Gb:
  2864. /* A-Die has all block unlock */
  2865. if (process)
  2866. this->options |= ONENAND_HAS_UNLOCK_ALL;
  2867. break;
  2868. default:
  2869. /* Some OneNAND has continuous lock scheme */
  2870. if (!process)
  2871. this->options |= ONENAND_HAS_CONT_LOCK;
  2872. break;
  2873. }
  2874. if (ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this))
  2875. this->options &= ~ONENAND_HAS_2PLANE;
  2876. if (FLEXONENAND(this)) {
  2877. this->options &= ~ONENAND_HAS_CONT_LOCK;
  2878. this->options |= ONENAND_HAS_UNLOCK_ALL;
  2879. }
  2880. if (this->options & ONENAND_HAS_CONT_LOCK)
  2881. printk(KERN_DEBUG "Lock scheme is Continuous Lock\n");
  2882. if (this->options & ONENAND_HAS_UNLOCK_ALL)
  2883. printk(KERN_DEBUG "Chip support all block unlock\n");
  2884. if (this->options & ONENAND_HAS_2PLANE)
  2885. printk(KERN_DEBUG "Chip has 2 plane\n");
  2886. if (this->options & ONENAND_HAS_4KB_PAGE)
  2887. printk(KERN_DEBUG "Chip has 4KiB pagesize\n");
  2888. }
  2889. /**
  2890. * onenand_print_device_info - Print device & version ID
  2891. * @param device device ID
  2892. * @param version version ID
  2893. *
  2894. * Print device & version ID
  2895. */
  2896. static void onenand_print_device_info(int device, int version)
  2897. {
  2898. int vcc, demuxed, ddp, density, flexonenand;
  2899. vcc = device & ONENAND_DEVICE_VCC_MASK;
  2900. demuxed = device & ONENAND_DEVICE_IS_DEMUX;
  2901. ddp = device & ONENAND_DEVICE_IS_DDP;
  2902. density = onenand_get_density(device);
  2903. flexonenand = device & DEVICE_IS_FLEXONENAND;
  2904. printk(KERN_INFO "%s%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
  2905. demuxed ? "" : "Muxed ",
  2906. flexonenand ? "Flex-" : "",
  2907. ddp ? "(DDP)" : "",
  2908. (16 << density),
  2909. vcc ? "2.65/3.3" : "1.8",
  2910. device);
  2911. printk(KERN_INFO "OneNAND version = 0x%04x\n", version);
  2912. }
  2913. static const struct onenand_manufacturers onenand_manuf_ids[] = {
  2914. {ONENAND_MFR_SAMSUNG, "Samsung"},
  2915. {ONENAND_MFR_NUMONYX, "Numonyx"},
  2916. };
  2917. /**
  2918. * onenand_check_maf - Check manufacturer ID
  2919. * @param manuf manufacturer ID
  2920. *
  2921. * Check manufacturer ID
  2922. */
  2923. static int onenand_check_maf(int manuf)
  2924. {
  2925. int size = ARRAY_SIZE(onenand_manuf_ids);
  2926. char *name;
  2927. int i;
  2928. for (i = 0; i < size; i++)
  2929. if (manuf == onenand_manuf_ids[i].id)
  2930. break;
  2931. if (i < size)
  2932. name = onenand_manuf_ids[i].name;
  2933. else
  2934. name = "Unknown";
  2935. printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
  2936. return (i == size);
  2937. }
  2938. /**
  2939. * flexonenand_get_boundary - Reads the SLC boundary
  2940. * @param onenand_info - onenand info structure
  2941. **/
  2942. static int flexonenand_get_boundary(struct mtd_info *mtd)
  2943. {
  2944. struct onenand_chip *this = mtd->priv;
  2945. unsigned die, bdry;
  2946. int ret, syscfg, locked;
  2947. /* Disable ECC */
  2948. syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
  2949. this->write_word((syscfg | 0x0100), this->base + ONENAND_REG_SYS_CFG1);
  2950. for (die = 0; die < this->dies; die++) {
  2951. this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0);
  2952. this->wait(mtd, FL_SYNCING);
  2953. this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0);
  2954. ret = this->wait(mtd, FL_READING);
  2955. bdry = this->read_word(this->base + ONENAND_DATARAM);
  2956. if ((bdry >> FLEXONENAND_PI_UNLOCK_SHIFT) == 3)
  2957. locked = 0;
  2958. else
  2959. locked = 1;
  2960. this->boundary[die] = bdry & FLEXONENAND_PI_MASK;
  2961. this->command(mtd, ONENAND_CMD_RESET, 0, 0);
  2962. ret = this->wait(mtd, FL_RESETING);
  2963. printk(KERN_INFO "Die %d boundary: %d%s\n", die,
  2964. this->boundary[die], locked ? "(Locked)" : "(Unlocked)");
  2965. }
  2966. /* Enable ECC */
  2967. this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
  2968. return 0;
  2969. }
  2970. /**
  2971. * flexonenand_get_size - Fill up fields in onenand_chip and mtd_info
  2972. * boundary[], diesize[], mtd->size, mtd->erasesize
  2973. * @param mtd - MTD device structure
  2974. */
  2975. static void flexonenand_get_size(struct mtd_info *mtd)
  2976. {
  2977. struct onenand_chip *this = mtd->priv;
  2978. int die, i, eraseshift, density;
  2979. int blksperdie, maxbdry;
  2980. loff_t ofs;
  2981. density = onenand_get_density(this->device_id);
  2982. blksperdie = ((loff_t)(16 << density) << 20) >> (this->erase_shift);
  2983. blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
  2984. maxbdry = blksperdie - 1;
  2985. eraseshift = this->erase_shift - 1;
  2986. mtd->numeraseregions = this->dies << 1;
  2987. /* This fills up the device boundary */
  2988. flexonenand_get_boundary(mtd);
  2989. die = ofs = 0;
  2990. i = -1;
  2991. for (; die < this->dies; die++) {
  2992. if (!die || this->boundary[die-1] != maxbdry) {
  2993. i++;
  2994. mtd->eraseregions[i].offset = ofs;
  2995. mtd->eraseregions[i].erasesize = 1 << eraseshift;
  2996. mtd->eraseregions[i].numblocks =
  2997. this->boundary[die] + 1;
  2998. ofs += mtd->eraseregions[i].numblocks << eraseshift;
  2999. eraseshift++;
  3000. } else {
  3001. mtd->numeraseregions -= 1;
  3002. mtd->eraseregions[i].numblocks +=
  3003. this->boundary[die] + 1;
  3004. ofs += (this->boundary[die] + 1) << (eraseshift - 1);
  3005. }
  3006. if (this->boundary[die] != maxbdry) {
  3007. i++;
  3008. mtd->eraseregions[i].offset = ofs;
  3009. mtd->eraseregions[i].erasesize = 1 << eraseshift;
  3010. mtd->eraseregions[i].numblocks = maxbdry ^
  3011. this->boundary[die];
  3012. ofs += mtd->eraseregions[i].numblocks << eraseshift;
  3013. eraseshift--;
  3014. } else
  3015. mtd->numeraseregions -= 1;
  3016. }
  3017. /* Expose MLC erase size except when all blocks are SLC */
  3018. mtd->erasesize = 1 << this->erase_shift;
  3019. if (mtd->numeraseregions == 1)
  3020. mtd->erasesize >>= 1;
  3021. printk(KERN_INFO "Device has %d eraseregions\n", mtd->numeraseregions);
  3022. for (i = 0; i < mtd->numeraseregions; i++)
  3023. printk(KERN_INFO "[offset: 0x%08x, erasesize: 0x%05x,"
  3024. " numblocks: %04u]\n",
  3025. (unsigned int) mtd->eraseregions[i].offset,
  3026. mtd->eraseregions[i].erasesize,
  3027. mtd->eraseregions[i].numblocks);
  3028. for (die = 0, mtd->size = 0; die < this->dies; die++) {
  3029. this->diesize[die] = (loff_t)blksperdie << this->erase_shift;
  3030. this->diesize[die] -= (loff_t)(this->boundary[die] + 1)
  3031. << (this->erase_shift - 1);
  3032. mtd->size += this->diesize[die];
  3033. }
  3034. }
  3035. /**
  3036. * flexonenand_check_blocks_erased - Check if blocks are erased
  3037. * @param mtd_info - mtd info structure
  3038. * @param start - first erase block to check
  3039. * @param end - last erase block to check
  3040. *
  3041. * Converting an unerased block from MLC to SLC
  3042. * causes byte values to change. Since both data and its ECC
  3043. * have changed, reads on the block give uncorrectable error.
  3044. * This might lead to the block being detected as bad.
  3045. *
  3046. * Avoid this by ensuring that the block to be converted is
  3047. * erased.
  3048. */
  3049. static int flexonenand_check_blocks_erased(struct mtd_info *mtd, int start, int end)
  3050. {
  3051. struct onenand_chip *this = mtd->priv;
  3052. int i, ret;
  3053. int block;
  3054. struct mtd_oob_ops ops = {
  3055. .mode = MTD_OOB_PLACE,
  3056. .ooboffs = 0,
  3057. .ooblen = mtd->oobsize,
  3058. .datbuf = NULL,
  3059. .oobbuf = this->oob_buf,
  3060. };
  3061. loff_t addr;
  3062. printk(KERN_DEBUG "Check blocks from %d to %d\n", start, end);
  3063. for (block = start; block <= end; block++) {
  3064. addr = flexonenand_addr(this, block);
  3065. if (onenand_block_isbad_nolock(mtd, addr, 0))
  3066. continue;
  3067. /*
  3068. * Since main area write results in ECC write to spare,
  3069. * it is sufficient to check only ECC bytes for change.
  3070. */
  3071. ret = onenand_read_oob_nolock(mtd, addr, &ops);
  3072. if (ret)
  3073. return ret;
  3074. for (i = 0; i < mtd->oobsize; i++)
  3075. if (this->oob_buf[i] != 0xff)
  3076. break;
  3077. if (i != mtd->oobsize) {
  3078. printk(KERN_WARNING "%s: Block %d not erased.\n",
  3079. __func__, block);
  3080. return 1;
  3081. }
  3082. }
  3083. return 0;
  3084. }
  3085. /**
  3086. * flexonenand_set_boundary - Writes the SLC boundary
  3087. * @param mtd - mtd info structure
  3088. */
  3089. int flexonenand_set_boundary(struct mtd_info *mtd, int die,
  3090. int boundary, int lock)
  3091. {
  3092. struct onenand_chip *this = mtd->priv;
  3093. int ret, density, blksperdie, old, new, thisboundary;
  3094. loff_t addr;
  3095. /* Change only once for SDP Flex-OneNAND */
  3096. if (die && (!ONENAND_IS_DDP(this)))
  3097. return 0;
  3098. /* boundary value of -1 indicates no required change */
  3099. if (boundary < 0 || boundary == this->boundary[die])
  3100. return 0;
  3101. density = onenand_get_density(this->device_id);
  3102. blksperdie = ((16 << density) << 20) >> this->erase_shift;
  3103. blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
  3104. if (boundary >= blksperdie) {
  3105. printk(KERN_ERR "%s: Invalid boundary value. "
  3106. "Boundary not changed.\n", __func__);
  3107. return -EINVAL;
  3108. }
  3109. /* Check if converting blocks are erased */
  3110. old = this->boundary[die] + (die * this->density_mask);
  3111. new = boundary + (die * this->density_mask);
  3112. ret = flexonenand_check_blocks_erased(mtd, min(old, new) + 1, max(old, new));
  3113. if (ret) {
  3114. printk(KERN_ERR "%s: Please erase blocks "
  3115. "before boundary change\n", __func__);
  3116. return ret;
  3117. }
  3118. this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0);
  3119. this->wait(mtd, FL_SYNCING);
  3120. /* Check is boundary is locked */
  3121. this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0);
  3122. ret = this->wait(mtd, FL_READING);
  3123. thisboundary = this->read_word(this->base + ONENAND_DATARAM);
  3124. if ((thisboundary >> FLEXONENAND_PI_UNLOCK_SHIFT) != 3) {
  3125. printk(KERN_ERR "%s: boundary locked\n", __func__);
  3126. ret = 1;
  3127. goto out;
  3128. }
  3129. printk(KERN_INFO "Changing die %d boundary: %d%s\n",
  3130. die, boundary, lock ? "(Locked)" : "(Unlocked)");
  3131. addr = die ? this->diesize[0] : 0;
  3132. boundary &= FLEXONENAND_PI_MASK;
  3133. boundary |= lock ? 0 : (3 << FLEXONENAND_PI_UNLOCK_SHIFT);
  3134. this->command(mtd, ONENAND_CMD_ERASE, addr, 0);
  3135. ret = this->wait(mtd, FL_ERASING);
  3136. if (ret) {
  3137. printk(KERN_ERR "%s: Failed PI erase for Die %d\n",
  3138. __func__, die);
  3139. goto out;
  3140. }
  3141. this->write_word(boundary, this->base + ONENAND_DATARAM);
  3142. this->command(mtd, ONENAND_CMD_PROG, addr, 0);
  3143. ret = this->wait(mtd, FL_WRITING);
  3144. if (ret) {
  3145. printk(KERN_ERR "%s: Failed PI write for Die %d\n",
  3146. __func__, die);
  3147. goto out;
  3148. }
  3149. this->command(mtd, FLEXONENAND_CMD_PI_UPDATE, die, 0);
  3150. ret = this->wait(mtd, FL_WRITING);
  3151. out:
  3152. this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_REG_COMMAND);
  3153. this->wait(mtd, FL_RESETING);
  3154. if (!ret)
  3155. /* Recalculate device size on boundary change*/
  3156. flexonenand_get_size(mtd);
  3157. return ret;
  3158. }
  3159. /**
  3160. * onenand_chip_probe - [OneNAND Interface] The generic chip probe
  3161. * @param mtd MTD device structure
  3162. *
  3163. * OneNAND detection method:
  3164. * Compare the values from command with ones from register
  3165. */
  3166. static int onenand_chip_probe(struct mtd_info *mtd)
  3167. {
  3168. struct onenand_chip *this = mtd->priv;
  3169. int bram_maf_id, bram_dev_id, maf_id, dev_id;
  3170. int syscfg;
  3171. /* Save system configuration 1 */
  3172. syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
  3173. /* Clear Sync. Burst Read mode to read BootRAM */
  3174. this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE), this->base + ONENAND_REG_SYS_CFG1);
  3175. /* Send the command for reading device ID from BootRAM */
  3176. this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
  3177. /* Read manufacturer and device IDs from BootRAM */
  3178. bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
  3179. bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
  3180. /* Reset OneNAND to read default register values */
  3181. this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
  3182. /* Wait reset */
  3183. this->wait(mtd, FL_RESETING);
  3184. /* Restore system configuration 1 */
  3185. this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
  3186. /* Check manufacturer ID */
  3187. if (onenand_check_maf(bram_maf_id))
  3188. return -ENXIO;
  3189. /* Read manufacturer and device IDs from Register */
  3190. maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
  3191. dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
  3192. /* Check OneNAND device */
  3193. if (maf_id != bram_maf_id || dev_id != bram_dev_id)
  3194. return -ENXIO;
  3195. return 0;
  3196. }
  3197. /**
  3198. * onenand_probe - [OneNAND Interface] Probe the OneNAND device
  3199. * @param mtd MTD device structure
  3200. */
  3201. static int onenand_probe(struct mtd_info *mtd)
  3202. {
  3203. struct onenand_chip *this = mtd->priv;
  3204. int maf_id, dev_id, ver_id;
  3205. int density;
  3206. int ret;
  3207. ret = this->chip_probe(mtd);
  3208. if (ret)
  3209. return ret;
  3210. /* Read manufacturer and device IDs from Register */
  3211. maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
  3212. dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
  3213. ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
  3214. this->technology = this->read_word(this->base + ONENAND_REG_TECHNOLOGY);
  3215. /* Flash device information */
  3216. onenand_print_device_info(dev_id, ver_id);
  3217. this->device_id = dev_id;
  3218. this->version_id = ver_id;
  3219. /* Check OneNAND features */
  3220. onenand_check_features(mtd);
  3221. density = onenand_get_density(dev_id);
  3222. if (FLEXONENAND(this)) {
  3223. this->dies = ONENAND_IS_DDP(this) ? 2 : 1;
  3224. /* Maximum possible erase regions */
  3225. mtd->numeraseregions = this->dies << 1;
  3226. mtd->eraseregions = kzalloc(sizeof(struct mtd_erase_region_info)
  3227. * (this->dies << 1), GFP_KERNEL);
  3228. if (!mtd->eraseregions)
  3229. return -ENOMEM;
  3230. }
  3231. /*
  3232. * For Flex-OneNAND, chipsize represents maximum possible device size.
  3233. * mtd->size represents the actual device size.
  3234. */
  3235. this->chipsize = (16 << density) << 20;
  3236. /* OneNAND page size & block size */
  3237. /* The data buffer size is equal to page size */
  3238. mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
  3239. /* We use the full BufferRAM */
  3240. if (ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this))
  3241. mtd->writesize <<= 1;
  3242. mtd->oobsize = mtd->writesize >> 5;
  3243. /* Pages per a block are always 64 in OneNAND */
  3244. mtd->erasesize = mtd->writesize << 6;
  3245. /*
  3246. * Flex-OneNAND SLC area has 64 pages per block.
  3247. * Flex-OneNAND MLC area has 128 pages per block.
  3248. * Expose MLC erase size to find erase_shift and page_mask.
  3249. */
  3250. if (FLEXONENAND(this))
  3251. mtd->erasesize <<= 1;
  3252. this->erase_shift = ffs(mtd->erasesize) - 1;
  3253. this->page_shift = ffs(mtd->writesize) - 1;
  3254. this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
  3255. /* Set density mask. it is used for DDP */
  3256. if (ONENAND_IS_DDP(this))
  3257. this->density_mask = this->chipsize >> (this->erase_shift + 1);
  3258. /* It's real page size */
  3259. this->writesize = mtd->writesize;
  3260. /* REVISIT: Multichip handling */
  3261. if (FLEXONENAND(this))
  3262. flexonenand_get_size(mtd);
  3263. else
  3264. mtd->size = this->chipsize;
  3265. /*
  3266. * We emulate the 4KiB page and 256KiB erase block size
  3267. * But oobsize is still 64 bytes.
  3268. * It is only valid if you turn on 2X program support,
  3269. * Otherwise it will be ignored by compiler.
  3270. */
  3271. if (ONENAND_IS_2PLANE(this)) {
  3272. mtd->writesize <<= 1;
  3273. mtd->erasesize <<= 1;
  3274. }
  3275. return 0;
  3276. }
  3277. /**
  3278. * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
  3279. * @param mtd MTD device structure
  3280. */
  3281. static int onenand_suspend(struct mtd_info *mtd)
  3282. {
  3283. return onenand_get_device(mtd, FL_PM_SUSPENDED);
  3284. }
  3285. /**
  3286. * onenand_resume - [MTD Interface] Resume the OneNAND flash
  3287. * @param mtd MTD device structure
  3288. */
  3289. static void onenand_resume(struct mtd_info *mtd)
  3290. {
  3291. struct onenand_chip *this = mtd->priv;
  3292. if (this->state == FL_PM_SUSPENDED)
  3293. onenand_release_device(mtd);
  3294. else
  3295. printk(KERN_ERR "%s: resume() called for the chip which is not "
  3296. "in suspended state\n", __func__);
  3297. }
  3298. /**
  3299. * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
  3300. * @param mtd MTD device structure
  3301. * @param maxchips Number of chips to scan for
  3302. *
  3303. * This fills out all the not initialized function pointers
  3304. * with the defaults.
  3305. * The flash ID is read and the mtd/chip structures are
  3306. * filled with the appropriate values.
  3307. */
  3308. int onenand_scan(struct mtd_info *mtd, int maxchips)
  3309. {
  3310. int i, ret;
  3311. struct onenand_chip *this = mtd->priv;
  3312. if (!this->read_word)
  3313. this->read_word = onenand_readw;
  3314. if (!this->write_word)
  3315. this->write_word = onenand_writew;
  3316. if (!this->command)
  3317. this->command = onenand_command;
  3318. if (!this->wait)
  3319. onenand_setup_wait(mtd);
  3320. if (!this->bbt_wait)
  3321. this->bbt_wait = onenand_bbt_wait;
  3322. if (!this->unlock_all)
  3323. this->unlock_all = onenand_unlock_all;
  3324. if (!this->chip_probe)
  3325. this->chip_probe = onenand_chip_probe;
  3326. if (!this->read_bufferram)
  3327. this->read_bufferram = onenand_read_bufferram;
  3328. if (!this->write_bufferram)
  3329. this->write_bufferram = onenand_write_bufferram;
  3330. if (!this->block_markbad)
  3331. this->block_markbad = onenand_default_block_markbad;
  3332. if (!this->scan_bbt)
  3333. this->scan_bbt = onenand_default_bbt;
  3334. if (onenand_probe(mtd))
  3335. return -ENXIO;
  3336. /* Set Sync. Burst Read after probing */
  3337. if (this->mmcontrol) {
  3338. printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
  3339. this->read_bufferram = onenand_sync_read_bufferram;
  3340. }
  3341. /* Allocate buffers, if necessary */
  3342. if (!this->page_buf) {
  3343. this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
  3344. if (!this->page_buf) {
  3345. printk(KERN_ERR "%s: Can't allocate page_buf\n",
  3346. __func__);
  3347. return -ENOMEM;
  3348. }
  3349. #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
  3350. this->verify_buf = kzalloc(mtd->writesize, GFP_KERNEL);
  3351. if (!this->verify_buf) {
  3352. kfree(this->page_buf);
  3353. return -ENOMEM;
  3354. }
  3355. #endif
  3356. this->options |= ONENAND_PAGEBUF_ALLOC;
  3357. }
  3358. if (!this->oob_buf) {
  3359. this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
  3360. if (!this->oob_buf) {
  3361. printk(KERN_ERR "%s: Can't allocate oob_buf\n",
  3362. __func__);
  3363. if (this->options & ONENAND_PAGEBUF_ALLOC) {
  3364. this->options &= ~ONENAND_PAGEBUF_ALLOC;
  3365. kfree(this->page_buf);
  3366. }
  3367. return -ENOMEM;
  3368. }
  3369. this->options |= ONENAND_OOBBUF_ALLOC;
  3370. }
  3371. this->state = FL_READY;
  3372. init_waitqueue_head(&this->wq);
  3373. spin_lock_init(&this->chip_lock);
  3374. /*
  3375. * Allow subpage writes up to oobsize.
  3376. */
  3377. switch (mtd->oobsize) {
  3378. case 128:
  3379. this->ecclayout = &onenand_oob_128;
  3380. mtd->subpage_sft = 0;
  3381. break;
  3382. case 64:
  3383. this->ecclayout = &onenand_oob_64;
  3384. mtd->subpage_sft = 2;
  3385. break;
  3386. case 32:
  3387. this->ecclayout = &onenand_oob_32;
  3388. mtd->subpage_sft = 1;
  3389. break;
  3390. default:
  3391. printk(KERN_WARNING "%s: No OOB scheme defined for oobsize %d\n",
  3392. __func__, mtd->oobsize);
  3393. mtd->subpage_sft = 0;
  3394. /* To prevent kernel oops */
  3395. this->ecclayout = &onenand_oob_32;
  3396. break;
  3397. }
  3398. this->subpagesize = mtd->writesize >> mtd->subpage_sft;
  3399. /*
  3400. * The number of bytes available for a client to place data into
  3401. * the out of band area
  3402. */
  3403. this->ecclayout->oobavail = 0;
  3404. for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES &&
  3405. this->ecclayout->oobfree[i].length; i++)
  3406. this->ecclayout->oobavail +=
  3407. this->ecclayout->oobfree[i].length;
  3408. mtd->oobavail = this->ecclayout->oobavail;
  3409. mtd->ecclayout = this->ecclayout;
  3410. /* Fill in remaining MTD driver data */
  3411. mtd->type = MTD_NANDFLASH;
  3412. mtd->flags = MTD_CAP_NANDFLASH;
  3413. mtd->erase = onenand_erase;
  3414. mtd->point = NULL;
  3415. mtd->unpoint = NULL;
  3416. mtd->read = onenand_read;
  3417. mtd->write = onenand_write;
  3418. mtd->read_oob = onenand_read_oob;
  3419. mtd->write_oob = onenand_write_oob;
  3420. mtd->panic_write = onenand_panic_write;
  3421. #ifdef CONFIG_MTD_ONENAND_OTP
  3422. mtd->get_fact_prot_info = onenand_get_fact_prot_info;
  3423. mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
  3424. mtd->get_user_prot_info = onenand_get_user_prot_info;
  3425. mtd->read_user_prot_reg = onenand_read_user_prot_reg;
  3426. mtd->write_user_prot_reg = onenand_write_user_prot_reg;
  3427. mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
  3428. #endif
  3429. mtd->sync = onenand_sync;
  3430. mtd->lock = onenand_lock;
  3431. mtd->unlock = onenand_unlock;
  3432. mtd->suspend = onenand_suspend;
  3433. mtd->resume = onenand_resume;
  3434. mtd->block_isbad = onenand_block_isbad;
  3435. mtd->block_markbad = onenand_block_markbad;
  3436. mtd->owner = THIS_MODULE;
  3437. /* Unlock whole block */
  3438. this->unlock_all(mtd);
  3439. ret = this->scan_bbt(mtd);
  3440. if ((!FLEXONENAND(this)) || ret)
  3441. return ret;
  3442. /* Change Flex-OneNAND boundaries if required */
  3443. for (i = 0; i < MAX_DIES; i++)
  3444. flexonenand_set_boundary(mtd, i, flex_bdry[2 * i],
  3445. flex_bdry[(2 * i) + 1]);
  3446. return 0;
  3447. }
  3448. /**
  3449. * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
  3450. * @param mtd MTD device structure
  3451. */
  3452. void onenand_release(struct mtd_info *mtd)
  3453. {
  3454. struct onenand_chip *this = mtd->priv;
  3455. #ifdef CONFIG_MTD_PARTITIONS
  3456. /* Deregister partitions */
  3457. del_mtd_partitions (mtd);
  3458. #endif
  3459. /* Deregister the device */
  3460. del_mtd_device (mtd);
  3461. /* Free bad block table memory, if allocated */
  3462. if (this->bbm) {
  3463. struct bbm_info *bbm = this->bbm;
  3464. kfree(bbm->bbt);
  3465. kfree(this->bbm);
  3466. }
  3467. /* Buffers allocated by onenand_scan */
  3468. if (this->options & ONENAND_PAGEBUF_ALLOC) {
  3469. kfree(this->page_buf);
  3470. #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
  3471. kfree(this->verify_buf);
  3472. #endif
  3473. }
  3474. if (this->options & ONENAND_OOBBUF_ALLOC)
  3475. kfree(this->oob_buf);
  3476. kfree(mtd->eraseregions);
  3477. }
  3478. EXPORT_SYMBOL_GPL(onenand_scan);
  3479. EXPORT_SYMBOL_GPL(onenand_release);
  3480. MODULE_LICENSE("GPL");
  3481. MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
  3482. MODULE_DESCRIPTION("Generic OneNAND flash driver code");