sdhci-pci.c 21 KB

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  1. /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
  2. *
  3. * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or (at
  8. * your option) any later version.
  9. *
  10. * Thanks to the following companies for their support:
  11. *
  12. * - JMicron (hardware and technical support)
  13. */
  14. #include <linux/delay.h>
  15. #include <linux/highmem.h>
  16. #include <linux/pci.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/slab.h>
  19. #include <linux/device.h>
  20. #include <linux/mmc/host.h>
  21. #include <asm/scatterlist.h>
  22. #include <asm/io.h>
  23. #include "sdhci.h"
  24. /*
  25. * PCI registers
  26. */
  27. #define PCI_SDHCI_IFPIO 0x00
  28. #define PCI_SDHCI_IFDMA 0x01
  29. #define PCI_SDHCI_IFVENDOR 0x02
  30. #define PCI_SLOT_INFO 0x40 /* 8 bits */
  31. #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
  32. #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
  33. #define MAX_SLOTS 8
  34. struct sdhci_pci_chip;
  35. struct sdhci_pci_slot;
  36. struct sdhci_pci_fixes {
  37. unsigned int quirks;
  38. int (*probe)(struct sdhci_pci_chip*);
  39. int (*probe_slot)(struct sdhci_pci_slot*);
  40. void (*remove_slot)(struct sdhci_pci_slot*, int);
  41. int (*suspend)(struct sdhci_pci_chip*,
  42. pm_message_t);
  43. int (*resume)(struct sdhci_pci_chip*);
  44. };
  45. struct sdhci_pci_slot {
  46. struct sdhci_pci_chip *chip;
  47. struct sdhci_host *host;
  48. int pci_bar;
  49. };
  50. struct sdhci_pci_chip {
  51. struct pci_dev *pdev;
  52. unsigned int quirks;
  53. const struct sdhci_pci_fixes *fixes;
  54. int num_slots; /* Slots on controller */
  55. struct sdhci_pci_slot *slots[MAX_SLOTS]; /* Pointers to host slots */
  56. };
  57. /*****************************************************************************\
  58. * *
  59. * Hardware specific quirk handling *
  60. * *
  61. \*****************************************************************************/
  62. static int ricoh_probe(struct sdhci_pci_chip *chip)
  63. {
  64. if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
  65. chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
  66. chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
  67. return 0;
  68. }
  69. static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot)
  70. {
  71. slot->host->caps =
  72. ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT)
  73. & SDHCI_TIMEOUT_CLK_MASK) |
  74. ((0x21 << SDHCI_CLOCK_BASE_SHIFT)
  75. & SDHCI_CLOCK_BASE_MASK) |
  76. SDHCI_TIMEOUT_CLK_UNIT |
  77. SDHCI_CAN_VDD_330 |
  78. SDHCI_CAN_DO_SDMA;
  79. return 0;
  80. }
  81. static int ricoh_mmc_resume(struct sdhci_pci_chip *chip)
  82. {
  83. /* Apply a delay to allow controller to settle */
  84. /* Otherwise it becomes confused if card state changed
  85. during suspend */
  86. msleep(500);
  87. return 0;
  88. }
  89. static const struct sdhci_pci_fixes sdhci_ricoh = {
  90. .probe = ricoh_probe,
  91. .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
  92. SDHCI_QUIRK_FORCE_DMA |
  93. SDHCI_QUIRK_CLOCK_BEFORE_RESET,
  94. };
  95. static const struct sdhci_pci_fixes sdhci_ricoh_mmc = {
  96. .probe_slot = ricoh_mmc_probe_slot,
  97. .resume = ricoh_mmc_resume,
  98. .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
  99. SDHCI_QUIRK_CLOCK_BEFORE_RESET |
  100. SDHCI_QUIRK_NO_CARD_NO_RESET |
  101. SDHCI_QUIRK_MISSING_CAPS
  102. };
  103. static const struct sdhci_pci_fixes sdhci_ene_712 = {
  104. .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
  105. SDHCI_QUIRK_BROKEN_DMA,
  106. };
  107. static const struct sdhci_pci_fixes sdhci_ene_714 = {
  108. .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
  109. SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
  110. SDHCI_QUIRK_BROKEN_DMA,
  111. };
  112. static const struct sdhci_pci_fixes sdhci_cafe = {
  113. .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
  114. SDHCI_QUIRK_NO_BUSY_IRQ |
  115. SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
  116. };
  117. static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
  118. {
  119. u8 scratch;
  120. int ret;
  121. ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
  122. if (ret)
  123. return ret;
  124. /*
  125. * Turn PMOS on [bit 0], set over current detection to 2.4 V
  126. * [bit 1:2] and enable over current debouncing [bit 6].
  127. */
  128. if (on)
  129. scratch |= 0x47;
  130. else
  131. scratch &= ~0x47;
  132. ret = pci_write_config_byte(chip->pdev, 0xAE, scratch);
  133. if (ret)
  134. return ret;
  135. return 0;
  136. }
  137. static int jmicron_probe(struct sdhci_pci_chip *chip)
  138. {
  139. int ret;
  140. if (chip->pdev->revision == 0) {
  141. chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
  142. SDHCI_QUIRK_32BIT_DMA_SIZE |
  143. SDHCI_QUIRK_32BIT_ADMA_SIZE |
  144. SDHCI_QUIRK_RESET_AFTER_REQUEST |
  145. SDHCI_QUIRK_BROKEN_SMALL_PIO;
  146. }
  147. /*
  148. * JMicron chips can have two interfaces to the same hardware
  149. * in order to work around limitations in Microsoft's driver.
  150. * We need to make sure we only bind to one of them.
  151. *
  152. * This code assumes two things:
  153. *
  154. * 1. The PCI code adds subfunctions in order.
  155. *
  156. * 2. The MMC interface has a lower subfunction number
  157. * than the SD interface.
  158. */
  159. if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD) {
  160. struct pci_dev *sd_dev;
  161. sd_dev = NULL;
  162. while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
  163. PCI_DEVICE_ID_JMICRON_JMB38X_MMC, sd_dev)) != NULL) {
  164. if ((PCI_SLOT(chip->pdev->devfn) ==
  165. PCI_SLOT(sd_dev->devfn)) &&
  166. (chip->pdev->bus == sd_dev->bus))
  167. break;
  168. }
  169. if (sd_dev) {
  170. pci_dev_put(sd_dev);
  171. dev_info(&chip->pdev->dev, "Refusing to bind to "
  172. "secondary interface.\n");
  173. return -ENODEV;
  174. }
  175. }
  176. /*
  177. * JMicron chips need a bit of a nudge to enable the power
  178. * output pins.
  179. */
  180. ret = jmicron_pmos(chip, 1);
  181. if (ret) {
  182. dev_err(&chip->pdev->dev, "Failure enabling card power\n");
  183. return ret;
  184. }
  185. return 0;
  186. }
  187. static void jmicron_enable_mmc(struct sdhci_host *host, int on)
  188. {
  189. u8 scratch;
  190. scratch = readb(host->ioaddr + 0xC0);
  191. if (on)
  192. scratch |= 0x01;
  193. else
  194. scratch &= ~0x01;
  195. writeb(scratch, host->ioaddr + 0xC0);
  196. }
  197. static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
  198. {
  199. if (slot->chip->pdev->revision == 0) {
  200. u16 version;
  201. version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
  202. version = (version & SDHCI_VENDOR_VER_MASK) >>
  203. SDHCI_VENDOR_VER_SHIFT;
  204. /*
  205. * Older versions of the chip have lots of nasty glitches
  206. * in the ADMA engine. It's best just to avoid it
  207. * completely.
  208. */
  209. if (version < 0xAC)
  210. slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
  211. }
  212. /*
  213. * The secondary interface requires a bit set to get the
  214. * interrupts.
  215. */
  216. if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC)
  217. jmicron_enable_mmc(slot->host, 1);
  218. return 0;
  219. }
  220. static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
  221. {
  222. if (dead)
  223. return;
  224. if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC)
  225. jmicron_enable_mmc(slot->host, 0);
  226. }
  227. static int jmicron_suspend(struct sdhci_pci_chip *chip, pm_message_t state)
  228. {
  229. int i;
  230. if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC) {
  231. for (i = 0;i < chip->num_slots;i++)
  232. jmicron_enable_mmc(chip->slots[i]->host, 0);
  233. }
  234. return 0;
  235. }
  236. static int jmicron_resume(struct sdhci_pci_chip *chip)
  237. {
  238. int ret, i;
  239. if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC) {
  240. for (i = 0;i < chip->num_slots;i++)
  241. jmicron_enable_mmc(chip->slots[i]->host, 1);
  242. }
  243. ret = jmicron_pmos(chip, 1);
  244. if (ret) {
  245. dev_err(&chip->pdev->dev, "Failure enabling card power\n");
  246. return ret;
  247. }
  248. return 0;
  249. }
  250. static const struct sdhci_pci_fixes sdhci_jmicron = {
  251. .probe = jmicron_probe,
  252. .probe_slot = jmicron_probe_slot,
  253. .remove_slot = jmicron_remove_slot,
  254. .suspend = jmicron_suspend,
  255. .resume = jmicron_resume,
  256. };
  257. /* SysKonnect CardBus2SDIO extra registers */
  258. #define SYSKT_CTRL 0x200
  259. #define SYSKT_RDFIFO_STAT 0x204
  260. #define SYSKT_WRFIFO_STAT 0x208
  261. #define SYSKT_POWER_DATA 0x20c
  262. #define SYSKT_POWER_330 0xef
  263. #define SYSKT_POWER_300 0xf8
  264. #define SYSKT_POWER_184 0xcc
  265. #define SYSKT_POWER_CMD 0x20d
  266. #define SYSKT_POWER_START (1 << 7)
  267. #define SYSKT_POWER_STATUS 0x20e
  268. #define SYSKT_POWER_STATUS_OK (1 << 0)
  269. #define SYSKT_BOARD_REV 0x210
  270. #define SYSKT_CHIP_REV 0x211
  271. #define SYSKT_CONF_DATA 0x212
  272. #define SYSKT_CONF_DATA_1V8 (1 << 2)
  273. #define SYSKT_CONF_DATA_2V5 (1 << 1)
  274. #define SYSKT_CONF_DATA_3V3 (1 << 0)
  275. static int syskt_probe(struct sdhci_pci_chip *chip)
  276. {
  277. if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
  278. chip->pdev->class &= ~0x0000FF;
  279. chip->pdev->class |= PCI_SDHCI_IFDMA;
  280. }
  281. return 0;
  282. }
  283. static int syskt_probe_slot(struct sdhci_pci_slot *slot)
  284. {
  285. int tm, ps;
  286. u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV);
  287. u8 chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV);
  288. dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, "
  289. "board rev %d.%d, chip rev %d.%d\n",
  290. board_rev >> 4, board_rev & 0xf,
  291. chip_rev >> 4, chip_rev & 0xf);
  292. if (chip_rev >= 0x20)
  293. slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA;
  294. writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA);
  295. writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD);
  296. udelay(50);
  297. tm = 10; /* Wait max 1 ms */
  298. do {
  299. ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS);
  300. if (ps & SYSKT_POWER_STATUS_OK)
  301. break;
  302. udelay(100);
  303. } while (--tm);
  304. if (!tm) {
  305. dev_err(&slot->chip->pdev->dev,
  306. "power regulator never stabilized");
  307. writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD);
  308. return -ENODEV;
  309. }
  310. return 0;
  311. }
  312. static const struct sdhci_pci_fixes sdhci_syskt = {
  313. .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER,
  314. .probe = syskt_probe,
  315. .probe_slot = syskt_probe_slot,
  316. };
  317. static int via_probe(struct sdhci_pci_chip *chip)
  318. {
  319. if (chip->pdev->revision == 0x10)
  320. chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
  321. return 0;
  322. }
  323. static const struct sdhci_pci_fixes sdhci_via = {
  324. .probe = via_probe,
  325. };
  326. static const struct pci_device_id pci_ids[] __devinitdata = {
  327. {
  328. .vendor = PCI_VENDOR_ID_RICOH,
  329. .device = PCI_DEVICE_ID_RICOH_R5C822,
  330. .subvendor = PCI_ANY_ID,
  331. .subdevice = PCI_ANY_ID,
  332. .driver_data = (kernel_ulong_t)&sdhci_ricoh,
  333. },
  334. {
  335. .vendor = PCI_VENDOR_ID_RICOH,
  336. .device = 0x843,
  337. .subvendor = PCI_ANY_ID,
  338. .subdevice = PCI_ANY_ID,
  339. .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
  340. },
  341. {
  342. .vendor = PCI_VENDOR_ID_RICOH,
  343. .device = 0xe822,
  344. .subvendor = PCI_ANY_ID,
  345. .subdevice = PCI_ANY_ID,
  346. .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
  347. },
  348. {
  349. .vendor = PCI_VENDOR_ID_ENE,
  350. .device = PCI_DEVICE_ID_ENE_CB712_SD,
  351. .subvendor = PCI_ANY_ID,
  352. .subdevice = PCI_ANY_ID,
  353. .driver_data = (kernel_ulong_t)&sdhci_ene_712,
  354. },
  355. {
  356. .vendor = PCI_VENDOR_ID_ENE,
  357. .device = PCI_DEVICE_ID_ENE_CB712_SD_2,
  358. .subvendor = PCI_ANY_ID,
  359. .subdevice = PCI_ANY_ID,
  360. .driver_data = (kernel_ulong_t)&sdhci_ene_712,
  361. },
  362. {
  363. .vendor = PCI_VENDOR_ID_ENE,
  364. .device = PCI_DEVICE_ID_ENE_CB714_SD,
  365. .subvendor = PCI_ANY_ID,
  366. .subdevice = PCI_ANY_ID,
  367. .driver_data = (kernel_ulong_t)&sdhci_ene_714,
  368. },
  369. {
  370. .vendor = PCI_VENDOR_ID_ENE,
  371. .device = PCI_DEVICE_ID_ENE_CB714_SD_2,
  372. .subvendor = PCI_ANY_ID,
  373. .subdevice = PCI_ANY_ID,
  374. .driver_data = (kernel_ulong_t)&sdhci_ene_714,
  375. },
  376. {
  377. .vendor = PCI_VENDOR_ID_MARVELL,
  378. .device = PCI_DEVICE_ID_MARVELL_88ALP01_SD,
  379. .subvendor = PCI_ANY_ID,
  380. .subdevice = PCI_ANY_ID,
  381. .driver_data = (kernel_ulong_t)&sdhci_cafe,
  382. },
  383. {
  384. .vendor = PCI_VENDOR_ID_JMICRON,
  385. .device = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
  386. .subvendor = PCI_ANY_ID,
  387. .subdevice = PCI_ANY_ID,
  388. .driver_data = (kernel_ulong_t)&sdhci_jmicron,
  389. },
  390. {
  391. .vendor = PCI_VENDOR_ID_JMICRON,
  392. .device = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
  393. .subvendor = PCI_ANY_ID,
  394. .subdevice = PCI_ANY_ID,
  395. .driver_data = (kernel_ulong_t)&sdhci_jmicron,
  396. },
  397. {
  398. .vendor = PCI_VENDOR_ID_SYSKONNECT,
  399. .device = 0x8000,
  400. .subvendor = PCI_ANY_ID,
  401. .subdevice = PCI_ANY_ID,
  402. .driver_data = (kernel_ulong_t)&sdhci_syskt,
  403. },
  404. {
  405. .vendor = PCI_VENDOR_ID_VIA,
  406. .device = 0x95d0,
  407. .subvendor = PCI_ANY_ID,
  408. .subdevice = PCI_ANY_ID,
  409. .driver_data = (kernel_ulong_t)&sdhci_via,
  410. },
  411. { /* Generic SD host controller */
  412. PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
  413. },
  414. { /* end: all zeroes */ },
  415. };
  416. MODULE_DEVICE_TABLE(pci, pci_ids);
  417. /*****************************************************************************\
  418. * *
  419. * SDHCI core callbacks *
  420. * *
  421. \*****************************************************************************/
  422. static int sdhci_pci_enable_dma(struct sdhci_host *host)
  423. {
  424. struct sdhci_pci_slot *slot;
  425. struct pci_dev *pdev;
  426. int ret;
  427. slot = sdhci_priv(host);
  428. pdev = slot->chip->pdev;
  429. if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
  430. ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
  431. (host->flags & SDHCI_USE_SDMA)) {
  432. dev_warn(&pdev->dev, "Will use DMA mode even though HW "
  433. "doesn't fully claim to support it.\n");
  434. }
  435. ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  436. if (ret)
  437. return ret;
  438. pci_set_master(pdev);
  439. return 0;
  440. }
  441. static struct sdhci_ops sdhci_pci_ops = {
  442. .enable_dma = sdhci_pci_enable_dma,
  443. };
  444. /*****************************************************************************\
  445. * *
  446. * Suspend/resume *
  447. * *
  448. \*****************************************************************************/
  449. #ifdef CONFIG_PM
  450. static int sdhci_pci_suspend (struct pci_dev *pdev, pm_message_t state)
  451. {
  452. struct sdhci_pci_chip *chip;
  453. struct sdhci_pci_slot *slot;
  454. mmc_pm_flag_t pm_flags = 0;
  455. int i, ret;
  456. chip = pci_get_drvdata(pdev);
  457. if (!chip)
  458. return 0;
  459. for (i = 0;i < chip->num_slots;i++) {
  460. slot = chip->slots[i];
  461. if (!slot)
  462. continue;
  463. ret = sdhci_suspend_host(slot->host, state);
  464. if (ret) {
  465. for (i--;i >= 0;i--)
  466. sdhci_resume_host(chip->slots[i]->host);
  467. return ret;
  468. }
  469. pm_flags |= slot->host->mmc->pm_flags;
  470. }
  471. if (chip->fixes && chip->fixes->suspend) {
  472. ret = chip->fixes->suspend(chip, state);
  473. if (ret) {
  474. for (i = chip->num_slots - 1;i >= 0;i--)
  475. sdhci_resume_host(chip->slots[i]->host);
  476. return ret;
  477. }
  478. }
  479. pci_save_state(pdev);
  480. if (pm_flags & MMC_PM_KEEP_POWER) {
  481. if (pm_flags & MMC_PM_WAKE_SDIO_IRQ)
  482. pci_enable_wake(pdev, PCI_D3hot, 1);
  483. pci_set_power_state(pdev, PCI_D3hot);
  484. } else {
  485. pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
  486. pci_disable_device(pdev);
  487. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  488. }
  489. return 0;
  490. }
  491. static int sdhci_pci_resume (struct pci_dev *pdev)
  492. {
  493. struct sdhci_pci_chip *chip;
  494. struct sdhci_pci_slot *slot;
  495. int i, ret;
  496. chip = pci_get_drvdata(pdev);
  497. if (!chip)
  498. return 0;
  499. pci_set_power_state(pdev, PCI_D0);
  500. pci_restore_state(pdev);
  501. ret = pci_enable_device(pdev);
  502. if (ret)
  503. return ret;
  504. if (chip->fixes && chip->fixes->resume) {
  505. ret = chip->fixes->resume(chip);
  506. if (ret)
  507. return ret;
  508. }
  509. for (i = 0;i < chip->num_slots;i++) {
  510. slot = chip->slots[i];
  511. if (!slot)
  512. continue;
  513. ret = sdhci_resume_host(slot->host);
  514. if (ret)
  515. return ret;
  516. }
  517. return 0;
  518. }
  519. #else /* CONFIG_PM */
  520. #define sdhci_pci_suspend NULL
  521. #define sdhci_pci_resume NULL
  522. #endif /* CONFIG_PM */
  523. /*****************************************************************************\
  524. * *
  525. * Device probing/removal *
  526. * *
  527. \*****************************************************************************/
  528. static struct sdhci_pci_slot * __devinit sdhci_pci_probe_slot(
  529. struct pci_dev *pdev, struct sdhci_pci_chip *chip, int bar)
  530. {
  531. struct sdhci_pci_slot *slot;
  532. struct sdhci_host *host;
  533. resource_size_t addr;
  534. int ret;
  535. if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
  536. dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
  537. return ERR_PTR(-ENODEV);
  538. }
  539. if (pci_resource_len(pdev, bar) != 0x100) {
  540. dev_err(&pdev->dev, "Invalid iomem size. You may "
  541. "experience problems.\n");
  542. }
  543. if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
  544. dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
  545. return ERR_PTR(-ENODEV);
  546. }
  547. if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
  548. dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
  549. return ERR_PTR(-ENODEV);
  550. }
  551. host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
  552. if (IS_ERR(host)) {
  553. dev_err(&pdev->dev, "cannot allocate host\n");
  554. return ERR_CAST(host);
  555. }
  556. slot = sdhci_priv(host);
  557. slot->chip = chip;
  558. slot->host = host;
  559. slot->pci_bar = bar;
  560. host->hw_name = "PCI";
  561. host->ops = &sdhci_pci_ops;
  562. host->quirks = chip->quirks;
  563. host->irq = pdev->irq;
  564. ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc));
  565. if (ret) {
  566. dev_err(&pdev->dev, "cannot request region\n");
  567. goto free;
  568. }
  569. addr = pci_resource_start(pdev, bar);
  570. host->ioaddr = pci_ioremap_bar(pdev, bar);
  571. if (!host->ioaddr) {
  572. dev_err(&pdev->dev, "failed to remap registers\n");
  573. goto release;
  574. }
  575. if (chip->fixes && chip->fixes->probe_slot) {
  576. ret = chip->fixes->probe_slot(slot);
  577. if (ret)
  578. goto unmap;
  579. }
  580. host->mmc->pm_caps = MMC_PM_KEEP_POWER | MMC_PM_WAKE_SDIO_IRQ;
  581. ret = sdhci_add_host(host);
  582. if (ret)
  583. goto remove;
  584. return slot;
  585. remove:
  586. if (chip->fixes && chip->fixes->remove_slot)
  587. chip->fixes->remove_slot(slot, 0);
  588. unmap:
  589. iounmap(host->ioaddr);
  590. release:
  591. pci_release_region(pdev, bar);
  592. free:
  593. sdhci_free_host(host);
  594. return ERR_PTR(ret);
  595. }
  596. static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
  597. {
  598. int dead;
  599. u32 scratch;
  600. dead = 0;
  601. scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
  602. if (scratch == (u32)-1)
  603. dead = 1;
  604. sdhci_remove_host(slot->host, dead);
  605. if (slot->chip->fixes && slot->chip->fixes->remove_slot)
  606. slot->chip->fixes->remove_slot(slot, dead);
  607. pci_release_region(slot->chip->pdev, slot->pci_bar);
  608. sdhci_free_host(slot->host);
  609. }
  610. static int __devinit sdhci_pci_probe(struct pci_dev *pdev,
  611. const struct pci_device_id *ent)
  612. {
  613. struct sdhci_pci_chip *chip;
  614. struct sdhci_pci_slot *slot;
  615. u8 slots, rev, first_bar;
  616. int ret, i;
  617. BUG_ON(pdev == NULL);
  618. BUG_ON(ent == NULL);
  619. pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev);
  620. dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
  621. (int)pdev->vendor, (int)pdev->device, (int)rev);
  622. ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
  623. if (ret)
  624. return ret;
  625. slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
  626. dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
  627. if (slots == 0)
  628. return -ENODEV;
  629. BUG_ON(slots > MAX_SLOTS);
  630. ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
  631. if (ret)
  632. return ret;
  633. first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
  634. if (first_bar > 5) {
  635. dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
  636. return -ENODEV;
  637. }
  638. ret = pci_enable_device(pdev);
  639. if (ret)
  640. return ret;
  641. chip = kzalloc(sizeof(struct sdhci_pci_chip), GFP_KERNEL);
  642. if (!chip) {
  643. ret = -ENOMEM;
  644. goto err;
  645. }
  646. chip->pdev = pdev;
  647. chip->fixes = (const struct sdhci_pci_fixes*)ent->driver_data;
  648. if (chip->fixes)
  649. chip->quirks = chip->fixes->quirks;
  650. chip->num_slots = slots;
  651. pci_set_drvdata(pdev, chip);
  652. if (chip->fixes && chip->fixes->probe) {
  653. ret = chip->fixes->probe(chip);
  654. if (ret)
  655. goto free;
  656. }
  657. for (i = 0;i < slots;i++) {
  658. slot = sdhci_pci_probe_slot(pdev, chip, first_bar + i);
  659. if (IS_ERR(slot)) {
  660. for (i--;i >= 0;i--)
  661. sdhci_pci_remove_slot(chip->slots[i]);
  662. ret = PTR_ERR(slot);
  663. goto free;
  664. }
  665. chip->slots[i] = slot;
  666. }
  667. return 0;
  668. free:
  669. pci_set_drvdata(pdev, NULL);
  670. kfree(chip);
  671. err:
  672. pci_disable_device(pdev);
  673. return ret;
  674. }
  675. static void __devexit sdhci_pci_remove(struct pci_dev *pdev)
  676. {
  677. int i;
  678. struct sdhci_pci_chip *chip;
  679. chip = pci_get_drvdata(pdev);
  680. if (chip) {
  681. for (i = 0;i < chip->num_slots; i++)
  682. sdhci_pci_remove_slot(chip->slots[i]);
  683. pci_set_drvdata(pdev, NULL);
  684. kfree(chip);
  685. }
  686. pci_disable_device(pdev);
  687. }
  688. static struct pci_driver sdhci_driver = {
  689. .name = "sdhci-pci",
  690. .id_table = pci_ids,
  691. .probe = sdhci_pci_probe,
  692. .remove = __devexit_p(sdhci_pci_remove),
  693. .suspend = sdhci_pci_suspend,
  694. .resume = sdhci_pci_resume,
  695. };
  696. /*****************************************************************************\
  697. * *
  698. * Driver init/exit *
  699. * *
  700. \*****************************************************************************/
  701. static int __init sdhci_drv_init(void)
  702. {
  703. return pci_register_driver(&sdhci_driver);
  704. }
  705. static void __exit sdhci_drv_exit(void)
  706. {
  707. pci_unregister_driver(&sdhci_driver);
  708. }
  709. module_init(sdhci_drv_init);
  710. module_exit(sdhci_drv_exit);
  711. MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
  712. MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
  713. MODULE_LICENSE("GPL");