qib_driver.c 18 KB

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  1. /*
  2. * Copyright (c) 2006, 2007, 2008, 2009 QLogic Corporation. All rights reserved.
  3. * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #include <linux/spinlock.h>
  34. #include <linux/pci.h>
  35. #include <linux/io.h>
  36. #include <linux/delay.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/vmalloc.h>
  39. #include "qib.h"
  40. /*
  41. * The size has to be longer than this string, so we can append
  42. * board/chip information to it in the init code.
  43. */
  44. const char ib_qib_version[] = QIB_IDSTR "\n";
  45. DEFINE_SPINLOCK(qib_devs_lock);
  46. LIST_HEAD(qib_dev_list);
  47. DEFINE_MUTEX(qib_mutex); /* general driver use */
  48. unsigned qib_ibmtu;
  49. module_param_named(ibmtu, qib_ibmtu, uint, S_IRUGO);
  50. MODULE_PARM_DESC(ibmtu, "Set max IB MTU (0=2KB, 1=256, 2=512, ... 5=4096");
  51. unsigned qib_compat_ddr_negotiate = 1;
  52. module_param_named(compat_ddr_negotiate, qib_compat_ddr_negotiate, uint,
  53. S_IWUSR | S_IRUGO);
  54. MODULE_PARM_DESC(compat_ddr_negotiate,
  55. "Attempt pre-IBTA 1.2 DDR speed negotiation");
  56. MODULE_LICENSE("Dual BSD/GPL");
  57. MODULE_AUTHOR("QLogic <support@qlogic.com>");
  58. MODULE_DESCRIPTION("QLogic IB driver");
  59. /*
  60. * QIB_PIO_MAXIBHDR is the max IB header size allowed for in our
  61. * PIO send buffers. This is well beyond anything currently
  62. * defined in the InfiniBand spec.
  63. */
  64. #define QIB_PIO_MAXIBHDR 128
  65. struct qlogic_ib_stats qib_stats;
  66. const char *qib_get_unit_name(int unit)
  67. {
  68. static char iname[16];
  69. snprintf(iname, sizeof iname, "infinipath%u", unit);
  70. return iname;
  71. }
  72. /*
  73. * Return count of units with at least one port ACTIVE.
  74. */
  75. int qib_count_active_units(void)
  76. {
  77. struct qib_devdata *dd;
  78. struct qib_pportdata *ppd;
  79. unsigned long flags;
  80. int pidx, nunits_active = 0;
  81. spin_lock_irqsave(&qib_devs_lock, flags);
  82. list_for_each_entry(dd, &qib_dev_list, list) {
  83. if (!(dd->flags & QIB_PRESENT) || !dd->kregbase)
  84. continue;
  85. for (pidx = 0; pidx < dd->num_pports; ++pidx) {
  86. ppd = dd->pport + pidx;
  87. if (ppd->lid && (ppd->lflags & (QIBL_LINKINIT |
  88. QIBL_LINKARMED | QIBL_LINKACTIVE))) {
  89. nunits_active++;
  90. break;
  91. }
  92. }
  93. }
  94. spin_unlock_irqrestore(&qib_devs_lock, flags);
  95. return nunits_active;
  96. }
  97. /*
  98. * Return count of all units, optionally return in arguments
  99. * the number of usable (present) units, and the number of
  100. * ports that are up.
  101. */
  102. int qib_count_units(int *npresentp, int *nupp)
  103. {
  104. int nunits = 0, npresent = 0, nup = 0;
  105. struct qib_devdata *dd;
  106. unsigned long flags;
  107. int pidx;
  108. struct qib_pportdata *ppd;
  109. spin_lock_irqsave(&qib_devs_lock, flags);
  110. list_for_each_entry(dd, &qib_dev_list, list) {
  111. nunits++;
  112. if ((dd->flags & QIB_PRESENT) && dd->kregbase)
  113. npresent++;
  114. for (pidx = 0; pidx < dd->num_pports; ++pidx) {
  115. ppd = dd->pport + pidx;
  116. if (ppd->lid && (ppd->lflags & (QIBL_LINKINIT |
  117. QIBL_LINKARMED | QIBL_LINKACTIVE)))
  118. nup++;
  119. }
  120. }
  121. spin_unlock_irqrestore(&qib_devs_lock, flags);
  122. if (npresentp)
  123. *npresentp = npresent;
  124. if (nupp)
  125. *nupp = nup;
  126. return nunits;
  127. }
  128. /**
  129. * qib_wait_linkstate - wait for an IB link state change to occur
  130. * @dd: the qlogic_ib device
  131. * @state: the state to wait for
  132. * @msecs: the number of milliseconds to wait
  133. *
  134. * wait up to msecs milliseconds for IB link state change to occur for
  135. * now, take the easy polling route. Currently used only by
  136. * qib_set_linkstate. Returns 0 if state reached, otherwise
  137. * -ETIMEDOUT state can have multiple states set, for any of several
  138. * transitions.
  139. */
  140. int qib_wait_linkstate(struct qib_pportdata *ppd, u32 state, int msecs)
  141. {
  142. int ret;
  143. unsigned long flags;
  144. spin_lock_irqsave(&ppd->lflags_lock, flags);
  145. if (ppd->state_wanted) {
  146. spin_unlock_irqrestore(&ppd->lflags_lock, flags);
  147. ret = -EBUSY;
  148. goto bail;
  149. }
  150. ppd->state_wanted = state;
  151. spin_unlock_irqrestore(&ppd->lflags_lock, flags);
  152. wait_event_interruptible_timeout(ppd->state_wait,
  153. (ppd->lflags & state),
  154. msecs_to_jiffies(msecs));
  155. spin_lock_irqsave(&ppd->lflags_lock, flags);
  156. ppd->state_wanted = 0;
  157. spin_unlock_irqrestore(&ppd->lflags_lock, flags);
  158. if (!(ppd->lflags & state))
  159. ret = -ETIMEDOUT;
  160. else
  161. ret = 0;
  162. bail:
  163. return ret;
  164. }
  165. int qib_set_linkstate(struct qib_pportdata *ppd, u8 newstate)
  166. {
  167. u32 lstate;
  168. int ret;
  169. struct qib_devdata *dd = ppd->dd;
  170. unsigned long flags;
  171. switch (newstate) {
  172. case QIB_IB_LINKDOWN_ONLY:
  173. dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
  174. IB_LINKCMD_DOWN | IB_LINKINITCMD_NOP);
  175. /* don't wait */
  176. ret = 0;
  177. goto bail;
  178. case QIB_IB_LINKDOWN:
  179. dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
  180. IB_LINKCMD_DOWN | IB_LINKINITCMD_POLL);
  181. /* don't wait */
  182. ret = 0;
  183. goto bail;
  184. case QIB_IB_LINKDOWN_SLEEP:
  185. dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
  186. IB_LINKCMD_DOWN | IB_LINKINITCMD_SLEEP);
  187. /* don't wait */
  188. ret = 0;
  189. goto bail;
  190. case QIB_IB_LINKDOWN_DISABLE:
  191. dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
  192. IB_LINKCMD_DOWN | IB_LINKINITCMD_DISABLE);
  193. /* don't wait */
  194. ret = 0;
  195. goto bail;
  196. case QIB_IB_LINKARM:
  197. if (ppd->lflags & QIBL_LINKARMED) {
  198. ret = 0;
  199. goto bail;
  200. }
  201. if (!(ppd->lflags & (QIBL_LINKINIT | QIBL_LINKACTIVE))) {
  202. ret = -EINVAL;
  203. goto bail;
  204. }
  205. /*
  206. * Since the port can be ACTIVE when we ask for ARMED,
  207. * clear QIBL_LINKV so we can wait for a transition.
  208. * If the link isn't ARMED, then something else happened
  209. * and there is no point waiting for ARMED.
  210. */
  211. spin_lock_irqsave(&ppd->lflags_lock, flags);
  212. ppd->lflags &= ~QIBL_LINKV;
  213. spin_unlock_irqrestore(&ppd->lflags_lock, flags);
  214. dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
  215. IB_LINKCMD_ARMED | IB_LINKINITCMD_NOP);
  216. lstate = QIBL_LINKV;
  217. break;
  218. case QIB_IB_LINKACTIVE:
  219. if (ppd->lflags & QIBL_LINKACTIVE) {
  220. ret = 0;
  221. goto bail;
  222. }
  223. if (!(ppd->lflags & QIBL_LINKARMED)) {
  224. ret = -EINVAL;
  225. goto bail;
  226. }
  227. dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
  228. IB_LINKCMD_ACTIVE | IB_LINKINITCMD_NOP);
  229. lstate = QIBL_LINKACTIVE;
  230. break;
  231. default:
  232. ret = -EINVAL;
  233. goto bail;
  234. }
  235. ret = qib_wait_linkstate(ppd, lstate, 10);
  236. bail:
  237. return ret;
  238. }
  239. /*
  240. * Get address of eager buffer from it's index (allocated in chunks, not
  241. * contiguous).
  242. */
  243. static inline void *qib_get_egrbuf(const struct qib_ctxtdata *rcd, u32 etail)
  244. {
  245. const u32 chunk = etail / rcd->rcvegrbufs_perchunk;
  246. const u32 idx = etail % rcd->rcvegrbufs_perchunk;
  247. return rcd->rcvegrbuf[chunk] + idx * rcd->dd->rcvegrbufsize;
  248. }
  249. /*
  250. * Returns 1 if error was a CRC, else 0.
  251. * Needed for some chip's synthesized error counters.
  252. */
  253. static u32 qib_rcv_hdrerr(struct qib_pportdata *ppd, u32 ctxt,
  254. u32 eflags, u32 l, u32 etail, __le32 *rhf_addr,
  255. struct qib_message_header *hdr)
  256. {
  257. u32 ret = 0;
  258. if (eflags & (QLOGIC_IB_RHF_H_ICRCERR | QLOGIC_IB_RHF_H_VCRCERR))
  259. ret = 1;
  260. return ret;
  261. }
  262. /*
  263. * qib_kreceive - receive a packet
  264. * @rcd: the qlogic_ib context
  265. * @llic: gets count of good packets needed to clear lli,
  266. * (used with chips that need need to track crcs for lli)
  267. *
  268. * called from interrupt handler for errors or receive interrupt
  269. * Returns number of CRC error packets, needed by some chips for
  270. * local link integrity tracking. crcs are adjusted down by following
  271. * good packets, if any, and count of good packets is also tracked.
  272. */
  273. u32 qib_kreceive(struct qib_ctxtdata *rcd, u32 *llic, u32 *npkts)
  274. {
  275. struct qib_devdata *dd = rcd->dd;
  276. struct qib_pportdata *ppd = rcd->ppd;
  277. __le32 *rhf_addr;
  278. void *ebuf;
  279. const u32 rsize = dd->rcvhdrentsize; /* words */
  280. const u32 maxcnt = dd->rcvhdrcnt * rsize; /* words */
  281. u32 etail = -1, l, hdrqtail;
  282. struct qib_message_header *hdr;
  283. u32 eflags, etype, tlen, i = 0, updegr = 0, crcs = 0;
  284. int last;
  285. u64 lval;
  286. struct qib_qp *qp, *nqp;
  287. l = rcd->head;
  288. rhf_addr = (__le32 *) rcd->rcvhdrq + l + dd->rhf_offset;
  289. if (dd->flags & QIB_NODMA_RTAIL) {
  290. u32 seq = qib_hdrget_seq(rhf_addr);
  291. if (seq != rcd->seq_cnt)
  292. goto bail;
  293. hdrqtail = 0;
  294. } else {
  295. hdrqtail = qib_get_rcvhdrtail(rcd);
  296. if (l == hdrqtail)
  297. goto bail;
  298. smp_rmb(); /* prevent speculative reads of dma'ed hdrq */
  299. }
  300. for (last = 0, i = 1; !last && i <= 64; i += !last) {
  301. hdr = dd->f_get_msgheader(dd, rhf_addr);
  302. eflags = qib_hdrget_err_flags(rhf_addr);
  303. etype = qib_hdrget_rcv_type(rhf_addr);
  304. /* total length */
  305. tlen = qib_hdrget_length_in_bytes(rhf_addr);
  306. ebuf = NULL;
  307. if ((dd->flags & QIB_NODMA_RTAIL) ?
  308. qib_hdrget_use_egr_buf(rhf_addr) :
  309. (etype != RCVHQ_RCV_TYPE_EXPECTED)) {
  310. etail = qib_hdrget_index(rhf_addr);
  311. updegr = 1;
  312. if (tlen > sizeof(*hdr) ||
  313. etype >= RCVHQ_RCV_TYPE_NON_KD)
  314. ebuf = qib_get_egrbuf(rcd, etail);
  315. }
  316. if (!eflags) {
  317. u16 lrh_len = be16_to_cpu(hdr->lrh[2]) << 2;
  318. if (lrh_len != tlen) {
  319. qib_stats.sps_lenerrs++;
  320. goto move_along;
  321. }
  322. }
  323. if (etype == RCVHQ_RCV_TYPE_NON_KD && !eflags &&
  324. ebuf == NULL &&
  325. tlen > (dd->rcvhdrentsize - 2 + 1 -
  326. qib_hdrget_offset(rhf_addr)) << 2) {
  327. goto move_along;
  328. }
  329. /*
  330. * Both tiderr and qibhdrerr are set for all plain IB
  331. * packets; only qibhdrerr should be set.
  332. */
  333. if (unlikely(eflags))
  334. crcs += qib_rcv_hdrerr(ppd, rcd->ctxt, eflags, l,
  335. etail, rhf_addr, hdr);
  336. else if (etype == RCVHQ_RCV_TYPE_NON_KD) {
  337. qib_ib_rcv(rcd, hdr, ebuf, tlen);
  338. if (crcs)
  339. crcs--;
  340. else if (llic && *llic)
  341. --*llic;
  342. }
  343. move_along:
  344. l += rsize;
  345. if (l >= maxcnt)
  346. l = 0;
  347. rhf_addr = (__le32 *) rcd->rcvhdrq + l + dd->rhf_offset;
  348. if (dd->flags & QIB_NODMA_RTAIL) {
  349. u32 seq = qib_hdrget_seq(rhf_addr);
  350. if (++rcd->seq_cnt > 13)
  351. rcd->seq_cnt = 1;
  352. if (seq != rcd->seq_cnt)
  353. last = 1;
  354. } else if (l == hdrqtail)
  355. last = 1;
  356. /*
  357. * Update head regs etc., every 16 packets, if not last pkt,
  358. * to help prevent rcvhdrq overflows, when many packets
  359. * are processed and queue is nearly full.
  360. * Don't request an interrupt for intermediate updates.
  361. */
  362. lval = l;
  363. if (!last && !(i & 0xf)) {
  364. dd->f_update_usrhead(rcd, lval, updegr, etail);
  365. updegr = 0;
  366. }
  367. }
  368. rcd->head = l;
  369. rcd->pkt_count += i;
  370. /*
  371. * Iterate over all QPs waiting to respond.
  372. * The list won't change since the IRQ is only run on one CPU.
  373. */
  374. list_for_each_entry_safe(qp, nqp, &rcd->qp_wait_list, rspwait) {
  375. list_del_init(&qp->rspwait);
  376. if (qp->r_flags & QIB_R_RSP_NAK) {
  377. qp->r_flags &= ~QIB_R_RSP_NAK;
  378. qib_send_rc_ack(qp);
  379. }
  380. if (qp->r_flags & QIB_R_RSP_SEND) {
  381. unsigned long flags;
  382. qp->r_flags &= ~QIB_R_RSP_SEND;
  383. spin_lock_irqsave(&qp->s_lock, flags);
  384. if (ib_qib_state_ops[qp->state] &
  385. QIB_PROCESS_OR_FLUSH_SEND)
  386. qib_schedule_send(qp);
  387. spin_unlock_irqrestore(&qp->s_lock, flags);
  388. }
  389. if (atomic_dec_and_test(&qp->refcount))
  390. wake_up(&qp->wait);
  391. }
  392. bail:
  393. /* Report number of packets consumed */
  394. if (npkts)
  395. *npkts = i;
  396. /*
  397. * Always write head at end, and setup rcv interrupt, even
  398. * if no packets were processed.
  399. */
  400. lval = (u64)rcd->head | dd->rhdrhead_intr_off;
  401. dd->f_update_usrhead(rcd, lval, updegr, etail);
  402. return crcs;
  403. }
  404. /**
  405. * qib_set_mtu - set the MTU
  406. * @ppd: the perport data
  407. * @arg: the new MTU
  408. *
  409. * We can handle "any" incoming size, the issue here is whether we
  410. * need to restrict our outgoing size. For now, we don't do any
  411. * sanity checking on this, and we don't deal with what happens to
  412. * programs that are already running when the size changes.
  413. * NOTE: changing the MTU will usually cause the IBC to go back to
  414. * link INIT state...
  415. */
  416. int qib_set_mtu(struct qib_pportdata *ppd, u16 arg)
  417. {
  418. u32 piosize;
  419. int ret, chk;
  420. if (arg != 256 && arg != 512 && arg != 1024 && arg != 2048 &&
  421. arg != 4096) {
  422. ret = -EINVAL;
  423. goto bail;
  424. }
  425. chk = ib_mtu_enum_to_int(qib_ibmtu);
  426. if (chk > 0 && arg > chk) {
  427. ret = -EINVAL;
  428. goto bail;
  429. }
  430. piosize = ppd->ibmaxlen;
  431. ppd->ibmtu = arg;
  432. if (arg >= (piosize - QIB_PIO_MAXIBHDR)) {
  433. /* Only if it's not the initial value (or reset to it) */
  434. if (piosize != ppd->init_ibmaxlen) {
  435. if (arg > piosize && arg <= ppd->init_ibmaxlen)
  436. piosize = ppd->init_ibmaxlen - 2 * sizeof(u32);
  437. ppd->ibmaxlen = piosize;
  438. }
  439. } else if ((arg + QIB_PIO_MAXIBHDR) != ppd->ibmaxlen) {
  440. piosize = arg + QIB_PIO_MAXIBHDR - 2 * sizeof(u32);
  441. ppd->ibmaxlen = piosize;
  442. }
  443. ppd->dd->f_set_ib_cfg(ppd, QIB_IB_CFG_MTU, 0);
  444. ret = 0;
  445. bail:
  446. return ret;
  447. }
  448. int qib_set_lid(struct qib_pportdata *ppd, u32 lid, u8 lmc)
  449. {
  450. struct qib_devdata *dd = ppd->dd;
  451. ppd->lid = lid;
  452. ppd->lmc = lmc;
  453. dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LIDLMC,
  454. lid | (~((1U << lmc) - 1)) << 16);
  455. qib_devinfo(dd->pcidev, "IB%u:%u got a lid: 0x%x\n",
  456. dd->unit, ppd->port, lid);
  457. return 0;
  458. }
  459. /*
  460. * Following deal with the "obviously simple" task of overriding the state
  461. * of the LEDS, which normally indicate link physical and logical status.
  462. * The complications arise in dealing with different hardware mappings
  463. * and the board-dependent routine being called from interrupts.
  464. * and then there's the requirement to _flash_ them.
  465. */
  466. #define LED_OVER_FREQ_SHIFT 8
  467. #define LED_OVER_FREQ_MASK (0xFF<<LED_OVER_FREQ_SHIFT)
  468. /* Below is "non-zero" to force override, but both actual LEDs are off */
  469. #define LED_OVER_BOTH_OFF (8)
  470. static void qib_run_led_override(unsigned long opaque)
  471. {
  472. struct qib_pportdata *ppd = (struct qib_pportdata *)opaque;
  473. struct qib_devdata *dd = ppd->dd;
  474. int timeoff;
  475. int ph_idx;
  476. if (!(dd->flags & QIB_INITTED))
  477. return;
  478. ph_idx = ppd->led_override_phase++ & 1;
  479. ppd->led_override = ppd->led_override_vals[ph_idx];
  480. timeoff = ppd->led_override_timeoff;
  481. dd->f_setextled(ppd, 1);
  482. /*
  483. * don't re-fire the timer if user asked for it to be off; we let
  484. * it fire one more time after they turn it off to simplify
  485. */
  486. if (ppd->led_override_vals[0] || ppd->led_override_vals[1])
  487. mod_timer(&ppd->led_override_timer, jiffies + timeoff);
  488. }
  489. void qib_set_led_override(struct qib_pportdata *ppd, unsigned int val)
  490. {
  491. struct qib_devdata *dd = ppd->dd;
  492. int timeoff, freq;
  493. if (!(dd->flags & QIB_INITTED))
  494. return;
  495. /* First check if we are blinking. If not, use 1HZ polling */
  496. timeoff = HZ;
  497. freq = (val & LED_OVER_FREQ_MASK) >> LED_OVER_FREQ_SHIFT;
  498. if (freq) {
  499. /* For blink, set each phase from one nybble of val */
  500. ppd->led_override_vals[0] = val & 0xF;
  501. ppd->led_override_vals[1] = (val >> 4) & 0xF;
  502. timeoff = (HZ << 4)/freq;
  503. } else {
  504. /* Non-blink set both phases the same. */
  505. ppd->led_override_vals[0] = val & 0xF;
  506. ppd->led_override_vals[1] = val & 0xF;
  507. }
  508. ppd->led_override_timeoff = timeoff;
  509. /*
  510. * If the timer has not already been started, do so. Use a "quick"
  511. * timeout so the function will be called soon, to look at our request.
  512. */
  513. if (atomic_inc_return(&ppd->led_override_timer_active) == 1) {
  514. /* Need to start timer */
  515. init_timer(&ppd->led_override_timer);
  516. ppd->led_override_timer.function = qib_run_led_override;
  517. ppd->led_override_timer.data = (unsigned long) ppd;
  518. ppd->led_override_timer.expires = jiffies + 1;
  519. add_timer(&ppd->led_override_timer);
  520. } else {
  521. if (ppd->led_override_vals[0] || ppd->led_override_vals[1])
  522. mod_timer(&ppd->led_override_timer, jiffies + 1);
  523. atomic_dec(&ppd->led_override_timer_active);
  524. }
  525. }
  526. /**
  527. * qib_reset_device - reset the chip if possible
  528. * @unit: the device to reset
  529. *
  530. * Whether or not reset is successful, we attempt to re-initialize the chip
  531. * (that is, much like a driver unload/reload). We clear the INITTED flag
  532. * so that the various entry points will fail until we reinitialize. For
  533. * now, we only allow this if no user contexts are open that use chip resources
  534. */
  535. int qib_reset_device(int unit)
  536. {
  537. int ret, i;
  538. struct qib_devdata *dd = qib_lookup(unit);
  539. struct qib_pportdata *ppd;
  540. unsigned long flags;
  541. int pidx;
  542. if (!dd) {
  543. ret = -ENODEV;
  544. goto bail;
  545. }
  546. qib_devinfo(dd->pcidev, "Reset on unit %u requested\n", unit);
  547. if (!dd->kregbase || !(dd->flags & QIB_PRESENT)) {
  548. qib_devinfo(dd->pcidev, "Invalid unit number %u or "
  549. "not initialized or not present\n", unit);
  550. ret = -ENXIO;
  551. goto bail;
  552. }
  553. spin_lock_irqsave(&dd->uctxt_lock, flags);
  554. if (dd->rcd)
  555. for (i = dd->first_user_ctxt; i < dd->cfgctxts; i++) {
  556. if (!dd->rcd[i] || !dd->rcd[i]->cnt)
  557. continue;
  558. spin_unlock_irqrestore(&dd->uctxt_lock, flags);
  559. ret = -EBUSY;
  560. goto bail;
  561. }
  562. spin_unlock_irqrestore(&dd->uctxt_lock, flags);
  563. for (pidx = 0; pidx < dd->num_pports; ++pidx) {
  564. ppd = dd->pport + pidx;
  565. if (atomic_read(&ppd->led_override_timer_active)) {
  566. /* Need to stop LED timer, _then_ shut off LEDs */
  567. del_timer_sync(&ppd->led_override_timer);
  568. atomic_set(&ppd->led_override_timer_active, 0);
  569. }
  570. /* Shut off LEDs after we are sure timer is not running */
  571. ppd->led_override = LED_OVER_BOTH_OFF;
  572. dd->f_setextled(ppd, 0);
  573. if (dd->flags & QIB_HAS_SEND_DMA)
  574. qib_teardown_sdma(ppd);
  575. }
  576. ret = dd->f_reset(dd);
  577. if (ret == 1)
  578. ret = qib_init(dd, 1);
  579. else
  580. ret = -EAGAIN;
  581. if (ret)
  582. qib_dev_err(dd, "Reinitialize unit %u after "
  583. "reset failed with %d\n", unit, ret);
  584. else
  585. qib_devinfo(dd->pcidev, "Reinitialized unit %u after "
  586. "resetting\n", unit);
  587. bail:
  588. return ret;
  589. }