i2c-nuc900.c 14 KB

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  1. /*
  2. * linux/drivers/i2c/busses/i2c-nuc900.c
  3. *
  4. * Copyright (c) 2010 Nuvoton technology corporation.
  5. *
  6. * This driver based on S3C2410 I2C driver of Ben Dooks <ben-Y5A6D6n0/KfQXOPxS62xeg@public.gmane.org>.
  7. * Written by Wan ZongShun <mcuos.com-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation;version 2 of the License.
  12. *
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/module.h>
  16. #include <linux/i2c.h>
  17. #include <linux/i2c-id.h>
  18. #include <linux/init.h>
  19. #include <linux/time.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/delay.h>
  22. #include <linux/errno.h>
  23. #include <linux/err.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/clk.h>
  26. #include <linux/cpufreq.h>
  27. #include <linux/slab.h>
  28. #include <linux/io.h>
  29. #include <mach/mfp.h>
  30. #include <mach/i2c.h>
  31. /* nuc900 i2c registers offset */
  32. #define CSR 0x00
  33. #define DIVIDER 0x04
  34. #define CMDR 0x08
  35. #define SWR 0x0C
  36. #define RXR 0x10
  37. #define TXR 0x14
  38. /* nuc900 i2c CSR register bits */
  39. #define IRQEN 0x003
  40. #define I2CBUSY 0x400
  41. #define I2CSTART 0x018
  42. #define IRQFLAG 0x004
  43. #define ARBIT_LOST 0x200
  44. #define SLAVE_ACK 0x800
  45. /* nuc900 i2c CMDR register bits */
  46. #define I2C_CMD_START 0x10
  47. #define I2C_CMD_STOP 0x08
  48. #define I2C_CMD_READ 0x04
  49. #define I2C_CMD_WRITE 0x02
  50. #define I2C_CMD_NACK 0x01
  51. /* i2c controller state */
  52. enum nuc900_i2c_state {
  53. STATE_IDLE,
  54. STATE_START,
  55. STATE_READ,
  56. STATE_WRITE,
  57. STATE_STOP
  58. };
  59. /* i2c controller private data */
  60. struct nuc900_i2c {
  61. spinlock_t lock;
  62. wait_queue_head_t wait;
  63. struct i2c_msg *msg;
  64. unsigned int msg_num;
  65. unsigned int msg_idx;
  66. unsigned int msg_ptr;
  67. unsigned int irq;
  68. enum nuc900_i2c_state state;
  69. void __iomem *regs;
  70. struct clk *clk;
  71. struct device *dev;
  72. struct resource *ioarea;
  73. struct i2c_adapter adap;
  74. };
  75. /* nuc900_i2c_master_complete
  76. *
  77. * complete the message and wake up the caller, using the given return code,
  78. * or zero to mean ok.
  79. */
  80. static inline void nuc900_i2c_master_complete(struct nuc900_i2c *i2c, int ret)
  81. {
  82. dev_dbg(i2c->dev, "master_complete %d\n", ret);
  83. i2c->msg_ptr = 0;
  84. i2c->msg = NULL;
  85. i2c->msg_idx++;
  86. i2c->msg_num = 0;
  87. if (ret)
  88. i2c->msg_idx = ret;
  89. wake_up(&i2c->wait);
  90. }
  91. /* irq enable/disable functions */
  92. static inline void nuc900_i2c_disable_irq(struct nuc900_i2c *i2c)
  93. {
  94. unsigned long tmp;
  95. tmp = readl(i2c->regs + CSR);
  96. writel(tmp & ~IRQEN, i2c->regs + CSR);
  97. }
  98. static inline void nuc900_i2c_enable_irq(struct nuc900_i2c *i2c)
  99. {
  100. unsigned long tmp;
  101. tmp = readl(i2c->regs + CSR);
  102. writel(tmp | IRQEN, i2c->regs + CSR);
  103. }
  104. /* nuc900_i2c_message_start
  105. *
  106. * put the start of a message onto the bus
  107. */
  108. static void nuc900_i2c_message_start(struct nuc900_i2c *i2c,
  109. struct i2c_msg *msg)
  110. {
  111. unsigned int addr = (msg->addr & 0x7f) << 1;
  112. if (msg->flags & I2C_M_RD)
  113. addr |= 0x1;
  114. writel(addr & 0xff, i2c->regs + TXR);
  115. writel(I2C_CMD_START | I2C_CMD_WRITE, i2c->regs + CMDR);
  116. }
  117. static inline void nuc900_i2c_stop(struct nuc900_i2c *i2c, int ret)
  118. {
  119. dev_dbg(i2c->dev, "STOP\n");
  120. /* stop the transfer */
  121. i2c->state = STATE_STOP;
  122. writel(I2C_CMD_STOP, i2c->regs + CMDR);
  123. nuc900_i2c_master_complete(i2c, ret);
  124. nuc900_i2c_disable_irq(i2c);
  125. }
  126. /* helper functions to determine the current state in the set of
  127. * messages we are sending
  128. */
  129. /* is_lastmsg()
  130. *
  131. * returns TRUE if the current message is the last in the set
  132. */
  133. static inline int is_lastmsg(struct nuc900_i2c *i2c)
  134. {
  135. return i2c->msg_idx >= (i2c->msg_num - 1);
  136. }
  137. /* is_msglast
  138. *
  139. * returns TRUE if we this is the last byte in the current message
  140. */
  141. static inline int is_msglast(struct nuc900_i2c *i2c)
  142. {
  143. return i2c->msg_ptr == i2c->msg->len-1;
  144. }
  145. /* is_msgend
  146. *
  147. * returns TRUE if we reached the end of the current message
  148. */
  149. static inline int is_msgend(struct nuc900_i2c *i2c)
  150. {
  151. return i2c->msg_ptr >= i2c->msg->len;
  152. }
  153. /* i2c_nuc900_irq_nextbyte
  154. *
  155. * process an interrupt and work out what to do
  156. */
  157. static void i2c_nuc900_irq_nextbyte(struct nuc900_i2c *i2c,
  158. unsigned long iicstat)
  159. {
  160. unsigned char byte;
  161. switch (i2c->state) {
  162. case STATE_IDLE:
  163. dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __func__);
  164. break;
  165. case STATE_STOP:
  166. dev_err(i2c->dev, "%s: called in STATE_STOP\n", __func__);
  167. nuc900_i2c_disable_irq(i2c);
  168. break;
  169. case STATE_START:
  170. /* last thing we did was send a start condition on the
  171. * bus, or started a new i2c message
  172. */
  173. if (iicstat & SLAVE_ACK &&
  174. !(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
  175. /* ack was not received... */
  176. dev_dbg(i2c->dev, "ack was not received\n");
  177. nuc900_i2c_stop(i2c, -ENXIO);
  178. break;
  179. }
  180. if (i2c->msg->flags & I2C_M_RD)
  181. i2c->state = STATE_READ;
  182. else
  183. i2c->state = STATE_WRITE;
  184. /* terminate the transfer if there is nothing to do
  185. * as this is used by the i2c probe to find devices.
  186. */
  187. if (is_lastmsg(i2c) && i2c->msg->len == 0) {
  188. nuc900_i2c_stop(i2c, 0);
  189. break;
  190. }
  191. if (i2c->state == STATE_READ)
  192. goto prepare_read;
  193. /* fall through to the write state, as we will need to
  194. * send a byte as well
  195. */
  196. case STATE_WRITE:
  197. /* we are writing data to the device... check for the
  198. * end of the message, and if so, work out what to do
  199. */
  200. if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
  201. if (iicstat & SLAVE_ACK) {
  202. dev_dbg(i2c->dev, "WRITE: No Ack\n");
  203. nuc900_i2c_stop(i2c, -ECONNREFUSED);
  204. break;
  205. }
  206. }
  207. retry_write:
  208. if (!is_msgend(i2c)) {
  209. byte = i2c->msg->buf[i2c->msg_ptr++];
  210. writeb(byte, i2c->regs + TXR);
  211. writel(I2C_CMD_WRITE, i2c->regs + CMDR);
  212. } else if (!is_lastmsg(i2c)) {
  213. /* we need to go to the next i2c message */
  214. dev_dbg(i2c->dev, "WRITE: Next Message\n");
  215. i2c->msg_ptr = 0;
  216. i2c->msg_idx++;
  217. i2c->msg++;
  218. /* check to see if we need to do another message */
  219. if (i2c->msg->flags & I2C_M_NOSTART) {
  220. if (i2c->msg->flags & I2C_M_RD) {
  221. /* cannot do this, the controller
  222. * forces us to send a new START
  223. * when we change direction
  224. */
  225. nuc900_i2c_stop(i2c, -EINVAL);
  226. }
  227. goto retry_write;
  228. } else {
  229. /* send the new start */
  230. nuc900_i2c_message_start(i2c, i2c->msg);
  231. i2c->state = STATE_START;
  232. }
  233. } else {
  234. /* send stop */
  235. nuc900_i2c_stop(i2c, 0);
  236. }
  237. break;
  238. case STATE_READ:
  239. /* we have a byte of data in the data register, do
  240. * something with it, and then work out wether we are
  241. * going to do any more read/write
  242. */
  243. byte = readb(i2c->regs + RXR);
  244. i2c->msg->buf[i2c->msg_ptr++] = byte;
  245. prepare_read:
  246. if (is_msglast(i2c)) {
  247. /* last byte of buffer */
  248. if (is_lastmsg(i2c))
  249. writel(I2C_CMD_READ | I2C_CMD_NACK,
  250. i2c->regs + CMDR);
  251. } else if (is_msgend(i2c)) {
  252. /* ok, we've read the entire buffer, see if there
  253. * is anything else we need to do
  254. */
  255. if (is_lastmsg(i2c)) {
  256. /* last message, send stop and complete */
  257. dev_dbg(i2c->dev, "READ: Send Stop\n");
  258. nuc900_i2c_stop(i2c, 0);
  259. } else {
  260. /* go to the next transfer */
  261. dev_dbg(i2c->dev, "READ: Next Transfer\n");
  262. i2c->msg_ptr = 0;
  263. i2c->msg_idx++;
  264. i2c->msg++;
  265. writel(I2C_CMD_READ, i2c->regs + CMDR);
  266. }
  267. } else {
  268. writel(I2C_CMD_READ, i2c->regs + CMDR);
  269. }
  270. break;
  271. }
  272. }
  273. /* nuc900_i2c_irq
  274. *
  275. * top level IRQ servicing routine
  276. */
  277. static irqreturn_t nuc900_i2c_irq(int irqno, void *dev_id)
  278. {
  279. struct nuc900_i2c *i2c = dev_id;
  280. unsigned long status;
  281. status = readl(i2c->regs + CSR);
  282. writel(status | IRQFLAG, i2c->regs + CSR);
  283. if (status & ARBIT_LOST) {
  284. /* deal with arbitration loss */
  285. dev_err(i2c->dev, "deal with arbitration loss\n");
  286. goto out;
  287. }
  288. if (i2c->state == STATE_IDLE) {
  289. dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n");
  290. goto out;
  291. }
  292. /* pretty much this leaves us with the fact that we've
  293. * transmitted or received whatever byte we last sent
  294. */
  295. i2c_nuc900_irq_nextbyte(i2c, status);
  296. out:
  297. return IRQ_HANDLED;
  298. }
  299. /* nuc900_i2c_set_master
  300. *
  301. * get the i2c bus for a master transaction
  302. */
  303. static int nuc900_i2c_set_master(struct nuc900_i2c *i2c)
  304. {
  305. int timeout = 400;
  306. while (timeout-- > 0) {
  307. if (((readl(i2c->regs + SWR) & I2CSTART) == I2CSTART) &&
  308. ((readl(i2c->regs + CSR) & I2CBUSY) == 0)) {
  309. return 0;
  310. }
  311. msleep(1);
  312. }
  313. return -ETIMEDOUT;
  314. }
  315. /* nuc900_i2c_doxfer
  316. *
  317. * this starts an i2c transfer
  318. */
  319. static int nuc900_i2c_doxfer(struct nuc900_i2c *i2c,
  320. struct i2c_msg *msgs, int num)
  321. {
  322. unsigned long iicstat, timeout;
  323. int spins = 20;
  324. int ret;
  325. ret = nuc900_i2c_set_master(i2c);
  326. if (ret != 0) {
  327. dev_err(i2c->dev, "cannot get bus (error %d)\n", ret);
  328. ret = -EAGAIN;
  329. goto out;
  330. }
  331. spin_lock_irq(&i2c->lock);
  332. i2c->msg = msgs;
  333. i2c->msg_num = num;
  334. i2c->msg_ptr = 0;
  335. i2c->msg_idx = 0;
  336. i2c->state = STATE_START;
  337. nuc900_i2c_message_start(i2c, msgs);
  338. spin_unlock_irq(&i2c->lock);
  339. timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);
  340. ret = i2c->msg_idx;
  341. /* having these next two as dev_err() makes life very
  342. * noisy when doing an i2cdetect
  343. */
  344. if (timeout == 0)
  345. dev_dbg(i2c->dev, "timeout\n");
  346. else if (ret != num)
  347. dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret);
  348. /* ensure the stop has been through the bus */
  349. dev_dbg(i2c->dev, "waiting for bus idle\n");
  350. /* first, try busy waiting briefly */
  351. do {
  352. iicstat = readl(i2c->regs + CSR);
  353. } while ((iicstat & I2CBUSY) && --spins);
  354. /* if that timed out sleep */
  355. if (!spins) {
  356. msleep(1);
  357. iicstat = readl(i2c->regs + CSR);
  358. }
  359. if (iicstat & I2CBUSY)
  360. dev_warn(i2c->dev, "timeout waiting for bus idle\n");
  361. out:
  362. return ret;
  363. }
  364. /* nuc900_i2c_xfer
  365. *
  366. * first port of call from the i2c bus code when an message needs
  367. * transferring across the i2c bus.
  368. */
  369. static int nuc900_i2c_xfer(struct i2c_adapter *adap,
  370. struct i2c_msg *msgs, int num)
  371. {
  372. struct nuc900_i2c *i2c = (struct nuc900_i2c *)adap->algo_data;
  373. int retry;
  374. int ret;
  375. nuc900_i2c_enable_irq(i2c);
  376. for (retry = 0; retry < adap->retries; retry++) {
  377. ret = nuc900_i2c_doxfer(i2c, msgs, num);
  378. if (ret != -EAGAIN)
  379. return ret;
  380. dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry);
  381. udelay(100);
  382. }
  383. return -EREMOTEIO;
  384. }
  385. /* declare our i2c functionality */
  386. static u32 nuc900_i2c_func(struct i2c_adapter *adap)
  387. {
  388. return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_PROTOCOL_MANGLING;
  389. }
  390. /* i2c bus registration info */
  391. static const struct i2c_algorithm nuc900_i2c_algorithm = {
  392. .master_xfer = nuc900_i2c_xfer,
  393. .functionality = nuc900_i2c_func,
  394. };
  395. /* nuc900_i2c_probe
  396. *
  397. * called by the bus driver when a suitable device is found
  398. */
  399. static int __devinit nuc900_i2c_probe(struct platform_device *pdev)
  400. {
  401. struct nuc900_i2c *i2c;
  402. struct nuc900_platform_i2c *pdata;
  403. struct resource *res;
  404. int ret;
  405. pdata = pdev->dev.platform_data;
  406. if (!pdata) {
  407. dev_err(&pdev->dev, "no platform data\n");
  408. return -EINVAL;
  409. }
  410. i2c = kzalloc(sizeof(struct nuc900_i2c), GFP_KERNEL);
  411. if (!i2c) {
  412. dev_err(&pdev->dev, "no memory for state\n");
  413. return -ENOMEM;
  414. }
  415. strlcpy(i2c->adap.name, "nuc900-i2c0", sizeof(i2c->adap.name));
  416. i2c->adap.owner = THIS_MODULE;
  417. i2c->adap.algo = &nuc900_i2c_algorithm;
  418. i2c->adap.retries = 2;
  419. i2c->adap.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
  420. spin_lock_init(&i2c->lock);
  421. init_waitqueue_head(&i2c->wait);
  422. /* find the clock and enable it */
  423. i2c->dev = &pdev->dev;
  424. i2c->clk = clk_get(&pdev->dev, NULL);
  425. if (IS_ERR(i2c->clk)) {
  426. dev_err(&pdev->dev, "cannot get clock\n");
  427. ret = -ENOENT;
  428. goto err_noclk;
  429. }
  430. dev_dbg(&pdev->dev, "clock source %p\n", i2c->clk);
  431. clk_enable(i2c->clk);
  432. /* map the registers */
  433. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  434. if (res == NULL) {
  435. dev_err(&pdev->dev, "cannot find IO resource\n");
  436. ret = -ENOENT;
  437. goto err_clk;
  438. }
  439. i2c->ioarea = request_mem_region(res->start, resource_size(res),
  440. pdev->name);
  441. if (i2c->ioarea == NULL) {
  442. dev_err(&pdev->dev, "cannot request IO\n");
  443. ret = -ENXIO;
  444. goto err_clk;
  445. }
  446. i2c->regs = ioremap(res->start, resource_size(res));
  447. if (i2c->regs == NULL) {
  448. dev_err(&pdev->dev, "cannot map IO\n");
  449. ret = -ENXIO;
  450. goto err_ioarea;
  451. }
  452. dev_dbg(&pdev->dev, "registers %p (%p, %p)\n",
  453. i2c->regs, i2c->ioarea, res);
  454. /* setup info block for the i2c core */
  455. i2c->adap.algo_data = i2c;
  456. i2c->adap.dev.parent = &pdev->dev;
  457. mfp_set_groupg(&pdev->dev);
  458. clk_get_rate(i2c->clk);
  459. ret = (i2c->clk.apbfreq)/(pdata->bus_freq * 5) - 1;
  460. writel(ret & 0xffff, i2c->regs + DIVIDER);
  461. /* find the IRQ for this unit (note, this relies on the init call to
  462. * ensure no current IRQs pending
  463. */
  464. i2c->irq = ret = platform_get_irq(pdev, 0);
  465. if (ret <= 0) {
  466. dev_err(&pdev->dev, "cannot find IRQ\n");
  467. goto err_iomap;
  468. }
  469. ret = request_irq(i2c->irq, nuc900_i2c_irq, IRQF_DISABLED | IRQF_SHARED,
  470. dev_name(&pdev->dev), i2c);
  471. if (ret != 0) {
  472. dev_err(&pdev->dev, "cannot claim IRQ %d\n", i2c->irq);
  473. goto err_iomap;
  474. }
  475. /* Note, previous versions of the driver used i2c_add_adapter()
  476. * to add the bus at any number. We now pass the bus number via
  477. * the platform data, so if unset it will now default to always
  478. * being bus 0.
  479. */
  480. i2c->adap.nr = pdata->bus_num;
  481. ret = i2c_add_numbered_adapter(&i2c->adap);
  482. if (ret < 0) {
  483. dev_err(&pdev->dev, "failed to add bus to i2c core\n");
  484. goto err_irq;
  485. }
  486. platform_set_drvdata(pdev, i2c);
  487. dev_info(&pdev->dev, "%s: NUC900 I2C adapter\n",
  488. dev_name(&i2c->adap.dev));
  489. return 0;
  490. err_irq:
  491. free_irq(i2c->irq, i2c);
  492. err_iomap:
  493. iounmap(i2c->regs);
  494. err_ioarea:
  495. release_resource(i2c->ioarea);
  496. kfree(i2c->ioarea);
  497. err_clk:
  498. clk_disable(i2c->clk);
  499. clk_put(i2c->clk);
  500. err_noclk:
  501. kfree(i2c);
  502. return ret;
  503. }
  504. /* nuc900_i2c_remove
  505. *
  506. * called when device is removed from the bus
  507. */
  508. static int __devexit nuc900_i2c_remove(struct platform_device *pdev)
  509. {
  510. struct nuc900_i2c *i2c = platform_get_drvdata(pdev);
  511. i2c_del_adapter(&i2c->adap);
  512. free_irq(i2c->irq, i2c);
  513. clk_disable(i2c->clk);
  514. clk_put(i2c->clk);
  515. iounmap(i2c->regs);
  516. release_resource(i2c->ioarea);
  517. kfree(i2c->ioarea);
  518. kfree(i2c);
  519. return 0;
  520. }
  521. static struct platform_driver nuc900_i2c_driver = {
  522. .probe = nuc900_i2c_probe,
  523. .remove = __devexit_p(nuc900_i2c_remove),
  524. .driver = {
  525. .owner = THIS_MODULE,
  526. .name = "nuc900-i2c0",
  527. },
  528. };
  529. static int __init i2c_adap_nuc900_init(void)
  530. {
  531. return platform_driver_register(&nuc900_i2c_driver);
  532. }
  533. static void __exit i2c_adap_nuc900_exit(void)
  534. {
  535. platform_driver_unregister(&nuc900_i2c_driver);
  536. }
  537. subsys_initcall(i2c_adap_nuc900_init);
  538. module_exit(i2c_adap_nuc900_exit);
  539. MODULE_DESCRIPTION("NUC900 I2C Bus driver");
  540. MODULE_AUTHOR("Wan ZongShun, <mcuos.com-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>");
  541. MODULE_LICENSE("GPL");
  542. MODULE_ALIAS("platform:nuc900-i2c0");