nouveau_drv.c 12 KB

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  1. /*
  2. * Copyright 2005 Stephane Marchesin.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. */
  24. #include <linux/console.h>
  25. #include "drmP.h"
  26. #include "drm.h"
  27. #include "drm_crtc_helper.h"
  28. #include "nouveau_drv.h"
  29. #include "nouveau_hw.h"
  30. #include "nouveau_fb.h"
  31. #include "nouveau_fbcon.h"
  32. #include "nv50_display.h"
  33. #include "drm_pciids.h"
  34. MODULE_PARM_DESC(noagp, "Disable AGP");
  35. int nouveau_noagp;
  36. module_param_named(noagp, nouveau_noagp, int, 0400);
  37. MODULE_PARM_DESC(modeset, "Enable kernel modesetting");
  38. static int nouveau_modeset = -1; /* kms */
  39. module_param_named(modeset, nouveau_modeset, int, 0400);
  40. MODULE_PARM_DESC(vbios, "Override default VBIOS location");
  41. char *nouveau_vbios;
  42. module_param_named(vbios, nouveau_vbios, charp, 0400);
  43. MODULE_PARM_DESC(vram_pushbuf, "Force DMA push buffers to be in VRAM");
  44. int nouveau_vram_pushbuf;
  45. module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);
  46. MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
  47. int nouveau_vram_notify = 0;
  48. module_param_named(vram_notify, nouveau_vram_notify, int, 0400);
  49. MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
  50. int nouveau_duallink = 1;
  51. module_param_named(duallink, nouveau_duallink, int, 0400);
  52. MODULE_PARM_DESC(uscript_lvds, "LVDS output script table ID (>=GeForce 8)");
  53. int nouveau_uscript_lvds = -1;
  54. module_param_named(uscript_lvds, nouveau_uscript_lvds, int, 0400);
  55. MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
  56. int nouveau_uscript_tmds = -1;
  57. module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);
  58. MODULE_PARM_DESC(ignorelid, "Ignore ACPI lid status");
  59. int nouveau_ignorelid = 0;
  60. module_param_named(ignorelid, nouveau_ignorelid, int, 0400);
  61. MODULE_PARM_DESC(noaccel, "Disable all acceleration");
  62. int nouveau_noaccel = 0;
  63. module_param_named(noaccel, nouveau_noaccel, int, 0400);
  64. MODULE_PARM_DESC(nofbaccel, "Disable fbcon acceleration");
  65. int nouveau_nofbaccel = 0;
  66. module_param_named(nofbaccel, nouveau_nofbaccel, int, 0400);
  67. MODULE_PARM_DESC(override_conntype, "Ignore DCB connector type");
  68. int nouveau_override_conntype = 0;
  69. module_param_named(override_conntype, nouveau_override_conntype, int, 0400);
  70. MODULE_PARM_DESC(tv_disable, "Disable TV-out detection\n");
  71. int nouveau_tv_disable = 0;
  72. module_param_named(tv_disable, nouveau_tv_disable, int, 0400);
  73. MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
  74. "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
  75. "\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
  76. "\t\tDefault: PAL\n"
  77. "\t\t*NOTE* Ignored for cards with external TV encoders.");
  78. char *nouveau_tv_norm;
  79. module_param_named(tv_norm, nouveau_tv_norm, charp, 0400);
  80. MODULE_PARM_DESC(reg_debug, "Register access debug bitmask:\n"
  81. "\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
  82. "\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
  83. "\t\t0x100 vgaattr, 0x200 EVO (G80+). ");
  84. int nouveau_reg_debug;
  85. module_param_named(reg_debug, nouveau_reg_debug, int, 0600);
  86. int nouveau_fbpercrtc;
  87. #if 0
  88. module_param_named(fbpercrtc, nouveau_fbpercrtc, int, 0400);
  89. #endif
  90. static struct pci_device_id pciidlist[] = {
  91. {
  92. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
  93. .class = PCI_BASE_CLASS_DISPLAY << 16,
  94. .class_mask = 0xff << 16,
  95. },
  96. {
  97. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
  98. .class = PCI_BASE_CLASS_DISPLAY << 16,
  99. .class_mask = 0xff << 16,
  100. },
  101. {}
  102. };
  103. MODULE_DEVICE_TABLE(pci, pciidlist);
  104. static struct drm_driver driver;
  105. static int __devinit
  106. nouveau_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  107. {
  108. return drm_get_pci_dev(pdev, ent, &driver);
  109. }
  110. static void
  111. nouveau_pci_remove(struct pci_dev *pdev)
  112. {
  113. struct drm_device *dev = pci_get_drvdata(pdev);
  114. drm_put_dev(dev);
  115. }
  116. int
  117. nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
  118. {
  119. struct drm_device *dev = pci_get_drvdata(pdev);
  120. struct drm_nouveau_private *dev_priv = dev->dev_private;
  121. struct nouveau_instmem_engine *pinstmem = &dev_priv->engine.instmem;
  122. struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
  123. struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
  124. struct nouveau_channel *chan;
  125. struct drm_crtc *crtc;
  126. int ret, i;
  127. if (pm_state.event == PM_EVENT_PRETHAW)
  128. return 0;
  129. NV_INFO(dev, "Disabling fbcon acceleration...\n");
  130. nouveau_fbcon_save_disable_accel(dev);
  131. NV_INFO(dev, "Unpinning framebuffer(s)...\n");
  132. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  133. struct nouveau_framebuffer *nouveau_fb;
  134. nouveau_fb = nouveau_framebuffer(crtc->fb);
  135. if (!nouveau_fb || !nouveau_fb->nvbo)
  136. continue;
  137. nouveau_bo_unpin(nouveau_fb->nvbo);
  138. }
  139. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  140. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  141. nouveau_bo_unmap(nv_crtc->cursor.nvbo);
  142. nouveau_bo_unpin(nv_crtc->cursor.nvbo);
  143. }
  144. NV_INFO(dev, "Evicting buffers...\n");
  145. ttm_bo_evict_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);
  146. NV_INFO(dev, "Idling channels...\n");
  147. for (i = 0; i < pfifo->channels; i++) {
  148. struct nouveau_fence *fence = NULL;
  149. chan = dev_priv->fifos[i];
  150. if (!chan || (dev_priv->card_type >= NV_50 &&
  151. chan == dev_priv->fifos[0]))
  152. continue;
  153. ret = nouveau_fence_new(chan, &fence, true);
  154. if (ret == 0) {
  155. ret = nouveau_fence_wait(fence, NULL, false, false);
  156. nouveau_fence_unref((void *)&fence);
  157. }
  158. if (ret) {
  159. NV_ERROR(dev, "Failed to idle channel %d for suspend\n",
  160. chan->id);
  161. }
  162. }
  163. pgraph->fifo_access(dev, false);
  164. nouveau_wait_for_idle(dev);
  165. pfifo->reassign(dev, false);
  166. pfifo->disable(dev);
  167. pfifo->unload_context(dev);
  168. pgraph->unload_context(dev);
  169. NV_INFO(dev, "Suspending GPU objects...\n");
  170. ret = nouveau_gpuobj_suspend(dev);
  171. if (ret) {
  172. NV_ERROR(dev, "... failed: %d\n", ret);
  173. goto out_abort;
  174. }
  175. ret = pinstmem->suspend(dev);
  176. if (ret) {
  177. NV_ERROR(dev, "... failed: %d\n", ret);
  178. nouveau_gpuobj_suspend_cleanup(dev);
  179. goto out_abort;
  180. }
  181. NV_INFO(dev, "And we're gone!\n");
  182. pci_save_state(pdev);
  183. if (pm_state.event == PM_EVENT_SUSPEND) {
  184. pci_disable_device(pdev);
  185. pci_set_power_state(pdev, PCI_D3hot);
  186. }
  187. acquire_console_sem();
  188. nouveau_fbcon_set_suspend(dev, 1);
  189. release_console_sem();
  190. nouveau_fbcon_restore_accel(dev);
  191. return 0;
  192. out_abort:
  193. NV_INFO(dev, "Re-enabling acceleration..\n");
  194. pfifo->enable(dev);
  195. pfifo->reassign(dev, true);
  196. pgraph->fifo_access(dev, true);
  197. return ret;
  198. }
  199. int
  200. nouveau_pci_resume(struct pci_dev *pdev)
  201. {
  202. struct drm_device *dev = pci_get_drvdata(pdev);
  203. struct drm_nouveau_private *dev_priv = dev->dev_private;
  204. struct nouveau_engine *engine = &dev_priv->engine;
  205. struct drm_crtc *crtc;
  206. int ret, i;
  207. nouveau_fbcon_save_disable_accel(dev);
  208. NV_INFO(dev, "We're back, enabling device...\n");
  209. pci_set_power_state(pdev, PCI_D0);
  210. pci_restore_state(pdev);
  211. if (pci_enable_device(pdev))
  212. return -1;
  213. pci_set_master(dev->pdev);
  214. /* Make sure the AGP controller is in a consistent state */
  215. if (dev_priv->gart_info.type == NOUVEAU_GART_AGP)
  216. nouveau_mem_reset_agp(dev);
  217. /* Make the CRTCs accessible */
  218. engine->display.early_init(dev);
  219. NV_INFO(dev, "POSTing device...\n");
  220. ret = nouveau_run_vbios_init(dev);
  221. if (ret)
  222. return ret;
  223. if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
  224. ret = nouveau_mem_init_agp(dev);
  225. if (ret) {
  226. NV_ERROR(dev, "error reinitialising AGP: %d\n", ret);
  227. return ret;
  228. }
  229. }
  230. NV_INFO(dev, "Reinitialising engines...\n");
  231. engine->instmem.resume(dev);
  232. engine->mc.init(dev);
  233. engine->timer.init(dev);
  234. engine->fb.init(dev);
  235. engine->graph.init(dev);
  236. engine->fifo.init(dev);
  237. NV_INFO(dev, "Restoring GPU objects...\n");
  238. nouveau_gpuobj_resume(dev);
  239. nouveau_irq_postinstall(dev);
  240. /* Re-write SKIPS, they'll have been lost over the suspend */
  241. if (nouveau_vram_pushbuf) {
  242. struct nouveau_channel *chan;
  243. int j;
  244. for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
  245. chan = dev_priv->fifos[i];
  246. if (!chan || !chan->pushbuf_bo)
  247. continue;
  248. for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
  249. nouveau_bo_wr32(chan->pushbuf_bo, i, 0);
  250. }
  251. }
  252. NV_INFO(dev, "Restoring mode...\n");
  253. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  254. struct nouveau_framebuffer *nouveau_fb;
  255. nouveau_fb = nouveau_framebuffer(crtc->fb);
  256. if (!nouveau_fb || !nouveau_fb->nvbo)
  257. continue;
  258. nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
  259. }
  260. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  261. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  262. ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
  263. if (!ret)
  264. ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
  265. if (ret)
  266. NV_ERROR(dev, "Could not pin/map cursor.\n");
  267. }
  268. engine->display.init(dev);
  269. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  270. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  271. nv_crtc->cursor.set_offset(nv_crtc,
  272. nv_crtc->cursor.nvbo->bo.offset -
  273. dev_priv->vm_vram_base);
  274. nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
  275. nv_crtc->cursor_saved_y);
  276. }
  277. /* Force CLUT to get re-loaded during modeset */
  278. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  279. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  280. nv_crtc->lut.depth = 0;
  281. }
  282. acquire_console_sem();
  283. nouveau_fbcon_set_suspend(dev, 0);
  284. release_console_sem();
  285. nouveau_fbcon_zfill_all(dev);
  286. drm_helper_resume_force_mode(dev);
  287. nouveau_fbcon_restore_accel(dev);
  288. return 0;
  289. }
  290. static struct drm_driver driver = {
  291. .driver_features =
  292. DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
  293. DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
  294. DRIVER_MODESET,
  295. .load = nouveau_load,
  296. .firstopen = nouveau_firstopen,
  297. .lastclose = nouveau_lastclose,
  298. .unload = nouveau_unload,
  299. .preclose = nouveau_preclose,
  300. #if defined(CONFIG_DRM_NOUVEAU_DEBUG)
  301. .debugfs_init = nouveau_debugfs_init,
  302. .debugfs_cleanup = nouveau_debugfs_takedown,
  303. #endif
  304. .irq_preinstall = nouveau_irq_preinstall,
  305. .irq_postinstall = nouveau_irq_postinstall,
  306. .irq_uninstall = nouveau_irq_uninstall,
  307. .irq_handler = nouveau_irq_handler,
  308. .reclaim_buffers = drm_core_reclaim_buffers,
  309. .get_map_ofs = drm_core_get_map_ofs,
  310. .get_reg_ofs = drm_core_get_reg_ofs,
  311. .ioctls = nouveau_ioctls,
  312. .fops = {
  313. .owner = THIS_MODULE,
  314. .open = drm_open,
  315. .release = drm_release,
  316. .unlocked_ioctl = drm_ioctl,
  317. .mmap = nouveau_ttm_mmap,
  318. .poll = drm_poll,
  319. .fasync = drm_fasync,
  320. #if defined(CONFIG_COMPAT)
  321. .compat_ioctl = nouveau_compat_ioctl,
  322. #endif
  323. },
  324. .pci_driver = {
  325. .name = DRIVER_NAME,
  326. .id_table = pciidlist,
  327. .probe = nouveau_pci_probe,
  328. .remove = nouveau_pci_remove,
  329. .suspend = nouveau_pci_suspend,
  330. .resume = nouveau_pci_resume
  331. },
  332. .gem_init_object = nouveau_gem_object_new,
  333. .gem_free_object = nouveau_gem_object_del,
  334. .name = DRIVER_NAME,
  335. .desc = DRIVER_DESC,
  336. #ifdef GIT_REVISION
  337. .date = GIT_REVISION,
  338. #else
  339. .date = DRIVER_DATE,
  340. #endif
  341. .major = DRIVER_MAJOR,
  342. .minor = DRIVER_MINOR,
  343. .patchlevel = DRIVER_PATCHLEVEL,
  344. };
  345. static int __init nouveau_init(void)
  346. {
  347. driver.num_ioctls = nouveau_max_ioctl;
  348. if (nouveau_modeset == -1) {
  349. #ifdef CONFIG_VGA_CONSOLE
  350. if (vgacon_text_force())
  351. nouveau_modeset = 0;
  352. else
  353. #endif
  354. nouveau_modeset = 1;
  355. }
  356. if (!nouveau_modeset)
  357. return 0;
  358. nouveau_register_dsm_handler();
  359. return drm_init(&driver);
  360. }
  361. static void __exit nouveau_exit(void)
  362. {
  363. if (!nouveau_modeset)
  364. return;
  365. drm_exit(&driver);
  366. nouveau_unregister_dsm_handler();
  367. }
  368. module_init(nouveau_init);
  369. module_exit(nouveau_exit);
  370. MODULE_AUTHOR(DRIVER_AUTHOR);
  371. MODULE_DESCRIPTION(DRIVER_DESC);
  372. MODULE_LICENSE("GPL and additional rights");