pci-dma.c 2.3 KB

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  1. /*
  2. * arch/xtensa/kernel/pci-dma.c
  3. *
  4. * DMA coherent memory allocation.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. *
  11. * Copyright (C) 2002 - 2005 Tensilica Inc.
  12. *
  13. * Based on version for i386.
  14. *
  15. * Chris Zankel <chris@zankel.net>
  16. * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
  17. */
  18. #include <linux/types.h>
  19. #include <linux/mm.h>
  20. #include <linux/string.h>
  21. #include <linux/pci.h>
  22. #include <linux/gfp.h>
  23. #include <asm/io.h>
  24. #include <asm/cacheflush.h>
  25. /*
  26. * Note: We assume that the full memory space is always mapped to 'kseg'
  27. * Otherwise we have to use page attributes (not implemented).
  28. */
  29. void *
  30. dma_alloc_coherent(struct device *dev,size_t size,dma_addr_t *handle,gfp_t flag)
  31. {
  32. unsigned long ret;
  33. unsigned long uncached = 0;
  34. /* ignore region speicifiers */
  35. flag &= ~(__GFP_DMA | __GFP_HIGHMEM);
  36. if (dev == NULL || (dev->coherent_dma_mask < 0xffffffff))
  37. flag |= GFP_DMA;
  38. ret = (unsigned long)__get_free_pages(flag, get_order(size));
  39. if (ret == 0)
  40. return NULL;
  41. /* We currently don't support coherent memory outside KSEG */
  42. if (ret < XCHAL_KSEG_CACHED_VADDR
  43. || ret >= XCHAL_KSEG_CACHED_VADDR + XCHAL_KSEG_SIZE)
  44. BUG();
  45. if (ret != 0) {
  46. memset((void*) ret, 0, size);
  47. uncached = ret+XCHAL_KSEG_BYPASS_VADDR-XCHAL_KSEG_CACHED_VADDR;
  48. *handle = virt_to_bus((void*)ret);
  49. __flush_invalidate_dcache_range(ret, size);
  50. }
  51. return (void*)uncached;
  52. }
  53. void dma_free_coherent(struct device *hwdev, size_t size,
  54. void *vaddr, dma_addr_t dma_handle)
  55. {
  56. long addr=(long)vaddr+XCHAL_KSEG_CACHED_VADDR-XCHAL_KSEG_BYPASS_VADDR;
  57. if (addr < 0 || addr >= XCHAL_KSEG_SIZE)
  58. BUG();
  59. free_pages(addr, get_order(size));
  60. }
  61. void consistent_sync(void *vaddr, size_t size, int direction)
  62. {
  63. switch (direction) {
  64. case PCI_DMA_NONE:
  65. BUG();
  66. case PCI_DMA_FROMDEVICE: /* invalidate only */
  67. __invalidate_dcache_range((unsigned long)vaddr,
  68. (unsigned long)size);
  69. break;
  70. case PCI_DMA_TODEVICE: /* writeback only */
  71. case PCI_DMA_BIDIRECTIONAL: /* writeback and invalidate */
  72. __flush_invalidate_dcache_range((unsigned long)vaddr,
  73. (unsigned long)size);
  74. break;
  75. }
  76. }