mmu.c 56 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323
  1. /*
  2. * Xen mmu operations
  3. *
  4. * This file contains the various mmu fetch and update operations.
  5. * The most important job they must perform is the mapping between the
  6. * domain's pfn and the overall machine mfns.
  7. *
  8. * Xen allows guests to directly update the pagetable, in a controlled
  9. * fashion. In other words, the guest modifies the same pagetable
  10. * that the CPU actually uses, which eliminates the overhead of having
  11. * a separate shadow pagetable.
  12. *
  13. * In order to allow this, it falls on the guest domain to map its
  14. * notion of a "physical" pfn - which is just a domain-local linear
  15. * address - into a real "machine address" which the CPU's MMU can
  16. * use.
  17. *
  18. * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
  19. * inserted directly into the pagetable. When creating a new
  20. * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely,
  21. * when reading the content back with __(pgd|pmd|pte)_val, it converts
  22. * the mfn back into a pfn.
  23. *
  24. * The other constraint is that all pages which make up a pagetable
  25. * must be mapped read-only in the guest. This prevents uncontrolled
  26. * guest updates to the pagetable. Xen strictly enforces this, and
  27. * will disallow any pagetable update which will end up mapping a
  28. * pagetable page RW, and will disallow using any writable page as a
  29. * pagetable.
  30. *
  31. * Naively, when loading %cr3 with the base of a new pagetable, Xen
  32. * would need to validate the whole pagetable before going on.
  33. * Naturally, this is quite slow. The solution is to "pin" a
  34. * pagetable, which enforces all the constraints on the pagetable even
  35. * when it is not actively in use. This menas that Xen can be assured
  36. * that it is still valid when you do load it into %cr3, and doesn't
  37. * need to revalidate it.
  38. *
  39. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  40. */
  41. #include <linux/sched.h>
  42. #include <linux/highmem.h>
  43. #include <linux/debugfs.h>
  44. #include <linux/bug.h>
  45. #include <linux/vmalloc.h>
  46. #include <linux/module.h>
  47. #include <linux/gfp.h>
  48. #include <asm/pgtable.h>
  49. #include <asm/tlbflush.h>
  50. #include <asm/fixmap.h>
  51. #include <asm/mmu_context.h>
  52. #include <asm/setup.h>
  53. #include <asm/paravirt.h>
  54. #include <asm/e820.h>
  55. #include <asm/linkage.h>
  56. #include <asm/page.h>
  57. #include <asm/xen/hypercall.h>
  58. #include <asm/xen/hypervisor.h>
  59. #include <xen/xen.h>
  60. #include <xen/page.h>
  61. #include <xen/interface/xen.h>
  62. #include <xen/interface/hvm/hvm_op.h>
  63. #include <xen/interface/version.h>
  64. #include <xen/interface/memory.h>
  65. #include <xen/hvc-console.h>
  66. #include "multicalls.h"
  67. #include "mmu.h"
  68. #include "debugfs.h"
  69. #define MMU_UPDATE_HISTO 30
  70. /*
  71. * Protects atomic reservation decrease/increase against concurrent increases.
  72. * Also protects non-atomic updates of current_pages and driver_pages, and
  73. * balloon lists.
  74. */
  75. DEFINE_SPINLOCK(xen_reservation_lock);
  76. #ifdef CONFIG_XEN_DEBUG_FS
  77. static struct {
  78. u32 pgd_update;
  79. u32 pgd_update_pinned;
  80. u32 pgd_update_batched;
  81. u32 pud_update;
  82. u32 pud_update_pinned;
  83. u32 pud_update_batched;
  84. u32 pmd_update;
  85. u32 pmd_update_pinned;
  86. u32 pmd_update_batched;
  87. u32 pte_update;
  88. u32 pte_update_pinned;
  89. u32 pte_update_batched;
  90. u32 mmu_update;
  91. u32 mmu_update_extended;
  92. u32 mmu_update_histo[MMU_UPDATE_HISTO];
  93. u32 prot_commit;
  94. u32 prot_commit_batched;
  95. u32 set_pte_at;
  96. u32 set_pte_at_batched;
  97. u32 set_pte_at_pinned;
  98. u32 set_pte_at_current;
  99. u32 set_pte_at_kernel;
  100. } mmu_stats;
  101. static u8 zero_stats;
  102. static inline void check_zero(void)
  103. {
  104. if (unlikely(zero_stats)) {
  105. memset(&mmu_stats, 0, sizeof(mmu_stats));
  106. zero_stats = 0;
  107. }
  108. }
  109. #define ADD_STATS(elem, val) \
  110. do { check_zero(); mmu_stats.elem += (val); } while(0)
  111. #else /* !CONFIG_XEN_DEBUG_FS */
  112. #define ADD_STATS(elem, val) do { (void)(val); } while(0)
  113. #endif /* CONFIG_XEN_DEBUG_FS */
  114. /*
  115. * Identity map, in addition to plain kernel map. This needs to be
  116. * large enough to allocate page table pages to allocate the rest.
  117. * Each page can map 2MB.
  118. */
  119. static pte_t level1_ident_pgt[PTRS_PER_PTE * 4] __page_aligned_bss;
  120. #ifdef CONFIG_X86_64
  121. /* l3 pud for userspace vsyscall mapping */
  122. static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
  123. #endif /* CONFIG_X86_64 */
  124. /*
  125. * Note about cr3 (pagetable base) values:
  126. *
  127. * xen_cr3 contains the current logical cr3 value; it contains the
  128. * last set cr3. This may not be the current effective cr3, because
  129. * its update may be being lazily deferred. However, a vcpu looking
  130. * at its own cr3 can use this value knowing that it everything will
  131. * be self-consistent.
  132. *
  133. * xen_current_cr3 contains the actual vcpu cr3; it is set once the
  134. * hypercall to set the vcpu cr3 is complete (so it may be a little
  135. * out of date, but it will never be set early). If one vcpu is
  136. * looking at another vcpu's cr3 value, it should use this variable.
  137. */
  138. DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
  139. DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
  140. /*
  141. * Just beyond the highest usermode address. STACK_TOP_MAX has a
  142. * redzone above it, so round it up to a PGD boundary.
  143. */
  144. #define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
  145. #define P2M_ENTRIES_PER_PAGE (PAGE_SIZE / sizeof(unsigned long))
  146. #define TOP_ENTRIES (MAX_DOMAIN_PAGES / P2M_ENTRIES_PER_PAGE)
  147. /* Placeholder for holes in the address space */
  148. static unsigned long p2m_missing[P2M_ENTRIES_PER_PAGE] __page_aligned_data =
  149. { [ 0 ... P2M_ENTRIES_PER_PAGE-1 ] = ~0UL };
  150. /* Array of pointers to pages containing p2m entries */
  151. static unsigned long *p2m_top[TOP_ENTRIES] __page_aligned_data =
  152. { [ 0 ... TOP_ENTRIES - 1] = &p2m_missing[0] };
  153. /* Arrays of p2m arrays expressed in mfns used for save/restore */
  154. static unsigned long p2m_top_mfn[TOP_ENTRIES] __page_aligned_bss;
  155. static unsigned long p2m_top_mfn_list[TOP_ENTRIES / P2M_ENTRIES_PER_PAGE]
  156. __page_aligned_bss;
  157. static inline unsigned p2m_top_index(unsigned long pfn)
  158. {
  159. BUG_ON(pfn >= MAX_DOMAIN_PAGES);
  160. return pfn / P2M_ENTRIES_PER_PAGE;
  161. }
  162. static inline unsigned p2m_index(unsigned long pfn)
  163. {
  164. return pfn % P2M_ENTRIES_PER_PAGE;
  165. }
  166. /* Build the parallel p2m_top_mfn structures */
  167. void xen_build_mfn_list_list(void)
  168. {
  169. unsigned pfn, idx;
  170. for (pfn = 0; pfn < MAX_DOMAIN_PAGES; pfn += P2M_ENTRIES_PER_PAGE) {
  171. unsigned topidx = p2m_top_index(pfn);
  172. p2m_top_mfn[topidx] = virt_to_mfn(p2m_top[topidx]);
  173. }
  174. for (idx = 0; idx < ARRAY_SIZE(p2m_top_mfn_list); idx++) {
  175. unsigned topidx = idx * P2M_ENTRIES_PER_PAGE;
  176. p2m_top_mfn_list[idx] = virt_to_mfn(&p2m_top_mfn[topidx]);
  177. }
  178. }
  179. void xen_setup_mfn_list_list(void)
  180. {
  181. BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
  182. HYPERVISOR_shared_info->arch.pfn_to_mfn_frame_list_list =
  183. virt_to_mfn(p2m_top_mfn_list);
  184. HYPERVISOR_shared_info->arch.max_pfn = xen_start_info->nr_pages;
  185. }
  186. /* Set up p2m_top to point to the domain-builder provided p2m pages */
  187. void __init xen_build_dynamic_phys_to_machine(void)
  188. {
  189. unsigned long *mfn_list = (unsigned long *)xen_start_info->mfn_list;
  190. unsigned long max_pfn = min(MAX_DOMAIN_PAGES, xen_start_info->nr_pages);
  191. unsigned pfn;
  192. for (pfn = 0; pfn < max_pfn; pfn += P2M_ENTRIES_PER_PAGE) {
  193. unsigned topidx = p2m_top_index(pfn);
  194. p2m_top[topidx] = &mfn_list[pfn];
  195. }
  196. xen_build_mfn_list_list();
  197. }
  198. unsigned long get_phys_to_machine(unsigned long pfn)
  199. {
  200. unsigned topidx, idx;
  201. if (unlikely(pfn >= MAX_DOMAIN_PAGES))
  202. return INVALID_P2M_ENTRY;
  203. topidx = p2m_top_index(pfn);
  204. idx = p2m_index(pfn);
  205. return p2m_top[topidx][idx];
  206. }
  207. EXPORT_SYMBOL_GPL(get_phys_to_machine);
  208. /* install a new p2m_top page */
  209. bool install_p2mtop_page(unsigned long pfn, unsigned long *p)
  210. {
  211. unsigned topidx = p2m_top_index(pfn);
  212. unsigned long **pfnp, *mfnp;
  213. unsigned i;
  214. pfnp = &p2m_top[topidx];
  215. mfnp = &p2m_top_mfn[topidx];
  216. for (i = 0; i < P2M_ENTRIES_PER_PAGE; i++)
  217. p[i] = INVALID_P2M_ENTRY;
  218. if (cmpxchg(pfnp, p2m_missing, p) == p2m_missing) {
  219. *mfnp = virt_to_mfn(p);
  220. return true;
  221. }
  222. return false;
  223. }
  224. static void alloc_p2m(unsigned long pfn)
  225. {
  226. unsigned long *p;
  227. p = (void *)__get_free_page(GFP_KERNEL | __GFP_NOFAIL);
  228. BUG_ON(p == NULL);
  229. if (!install_p2mtop_page(pfn, p))
  230. free_page((unsigned long)p);
  231. }
  232. /* Try to install p2m mapping; fail if intermediate bits missing */
  233. bool __set_phys_to_machine(unsigned long pfn, unsigned long mfn)
  234. {
  235. unsigned topidx, idx;
  236. if (unlikely(pfn >= MAX_DOMAIN_PAGES)) {
  237. BUG_ON(mfn != INVALID_P2M_ENTRY);
  238. return true;
  239. }
  240. topidx = p2m_top_index(pfn);
  241. if (p2m_top[topidx] == p2m_missing) {
  242. if (mfn == INVALID_P2M_ENTRY)
  243. return true;
  244. return false;
  245. }
  246. idx = p2m_index(pfn);
  247. p2m_top[topidx][idx] = mfn;
  248. return true;
  249. }
  250. void set_phys_to_machine(unsigned long pfn, unsigned long mfn)
  251. {
  252. if (unlikely(xen_feature(XENFEAT_auto_translated_physmap))) {
  253. BUG_ON(pfn != mfn && mfn != INVALID_P2M_ENTRY);
  254. return;
  255. }
  256. if (unlikely(!__set_phys_to_machine(pfn, mfn))) {
  257. alloc_p2m(pfn);
  258. if (!__set_phys_to_machine(pfn, mfn))
  259. BUG();
  260. }
  261. }
  262. unsigned long arbitrary_virt_to_mfn(void *vaddr)
  263. {
  264. xmaddr_t maddr = arbitrary_virt_to_machine(vaddr);
  265. return PFN_DOWN(maddr.maddr);
  266. }
  267. xmaddr_t arbitrary_virt_to_machine(void *vaddr)
  268. {
  269. unsigned long address = (unsigned long)vaddr;
  270. unsigned int level;
  271. pte_t *pte;
  272. unsigned offset;
  273. /*
  274. * if the PFN is in the linear mapped vaddr range, we can just use
  275. * the (quick) virt_to_machine() p2m lookup
  276. */
  277. if (virt_addr_valid(vaddr))
  278. return virt_to_machine(vaddr);
  279. /* otherwise we have to do a (slower) full page-table walk */
  280. pte = lookup_address(address, &level);
  281. BUG_ON(pte == NULL);
  282. offset = address & ~PAGE_MASK;
  283. return XMADDR(((phys_addr_t)pte_mfn(*pte) << PAGE_SHIFT) + offset);
  284. }
  285. void make_lowmem_page_readonly(void *vaddr)
  286. {
  287. pte_t *pte, ptev;
  288. unsigned long address = (unsigned long)vaddr;
  289. unsigned int level;
  290. pte = lookup_address(address, &level);
  291. BUG_ON(pte == NULL);
  292. ptev = pte_wrprotect(*pte);
  293. if (HYPERVISOR_update_va_mapping(address, ptev, 0))
  294. BUG();
  295. }
  296. void make_lowmem_page_readwrite(void *vaddr)
  297. {
  298. pte_t *pte, ptev;
  299. unsigned long address = (unsigned long)vaddr;
  300. unsigned int level;
  301. pte = lookup_address(address, &level);
  302. BUG_ON(pte == NULL);
  303. ptev = pte_mkwrite(*pte);
  304. if (HYPERVISOR_update_va_mapping(address, ptev, 0))
  305. BUG();
  306. }
  307. static bool xen_page_pinned(void *ptr)
  308. {
  309. struct page *page = virt_to_page(ptr);
  310. return PagePinned(page);
  311. }
  312. static bool xen_iomap_pte(pte_t pte)
  313. {
  314. return pte_flags(pte) & _PAGE_IOMAP;
  315. }
  316. static void xen_set_iomap_pte(pte_t *ptep, pte_t pteval)
  317. {
  318. struct multicall_space mcs;
  319. struct mmu_update *u;
  320. mcs = xen_mc_entry(sizeof(*u));
  321. u = mcs.args;
  322. /* ptep might be kmapped when using 32-bit HIGHPTE */
  323. u->ptr = arbitrary_virt_to_machine(ptep).maddr;
  324. u->val = pte_val_ma(pteval);
  325. MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_IO);
  326. xen_mc_issue(PARAVIRT_LAZY_MMU);
  327. }
  328. static void xen_extend_mmu_update(const struct mmu_update *update)
  329. {
  330. struct multicall_space mcs;
  331. struct mmu_update *u;
  332. mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
  333. if (mcs.mc != NULL) {
  334. ADD_STATS(mmu_update_extended, 1);
  335. ADD_STATS(mmu_update_histo[mcs.mc->args[1]], -1);
  336. mcs.mc->args[1]++;
  337. if (mcs.mc->args[1] < MMU_UPDATE_HISTO)
  338. ADD_STATS(mmu_update_histo[mcs.mc->args[1]], 1);
  339. else
  340. ADD_STATS(mmu_update_histo[0], 1);
  341. } else {
  342. ADD_STATS(mmu_update, 1);
  343. mcs = __xen_mc_entry(sizeof(*u));
  344. MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
  345. ADD_STATS(mmu_update_histo[1], 1);
  346. }
  347. u = mcs.args;
  348. *u = *update;
  349. }
  350. void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
  351. {
  352. struct mmu_update u;
  353. preempt_disable();
  354. xen_mc_batch();
  355. /* ptr may be ioremapped for 64-bit pagetable setup */
  356. u.ptr = arbitrary_virt_to_machine(ptr).maddr;
  357. u.val = pmd_val_ma(val);
  358. xen_extend_mmu_update(&u);
  359. ADD_STATS(pmd_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
  360. xen_mc_issue(PARAVIRT_LAZY_MMU);
  361. preempt_enable();
  362. }
  363. void xen_set_pmd(pmd_t *ptr, pmd_t val)
  364. {
  365. ADD_STATS(pmd_update, 1);
  366. /* If page is not pinned, we can just update the entry
  367. directly */
  368. if (!xen_page_pinned(ptr)) {
  369. *ptr = val;
  370. return;
  371. }
  372. ADD_STATS(pmd_update_pinned, 1);
  373. xen_set_pmd_hyper(ptr, val);
  374. }
  375. /*
  376. * Associate a virtual page frame with a given physical page frame
  377. * and protection flags for that frame.
  378. */
  379. void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
  380. {
  381. set_pte_vaddr(vaddr, mfn_pte(mfn, flags));
  382. }
  383. void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
  384. pte_t *ptep, pte_t pteval)
  385. {
  386. if (xen_iomap_pte(pteval)) {
  387. xen_set_iomap_pte(ptep, pteval);
  388. goto out;
  389. }
  390. ADD_STATS(set_pte_at, 1);
  391. // ADD_STATS(set_pte_at_pinned, xen_page_pinned(ptep));
  392. ADD_STATS(set_pte_at_current, mm == current->mm);
  393. ADD_STATS(set_pte_at_kernel, mm == &init_mm);
  394. if (mm == current->mm || mm == &init_mm) {
  395. if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) {
  396. struct multicall_space mcs;
  397. mcs = xen_mc_entry(0);
  398. MULTI_update_va_mapping(mcs.mc, addr, pteval, 0);
  399. ADD_STATS(set_pte_at_batched, 1);
  400. xen_mc_issue(PARAVIRT_LAZY_MMU);
  401. goto out;
  402. } else
  403. if (HYPERVISOR_update_va_mapping(addr, pteval, 0) == 0)
  404. goto out;
  405. }
  406. xen_set_pte(ptep, pteval);
  407. out: return;
  408. }
  409. pte_t xen_ptep_modify_prot_start(struct mm_struct *mm,
  410. unsigned long addr, pte_t *ptep)
  411. {
  412. /* Just return the pte as-is. We preserve the bits on commit */
  413. return *ptep;
  414. }
  415. void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
  416. pte_t *ptep, pte_t pte)
  417. {
  418. struct mmu_update u;
  419. xen_mc_batch();
  420. u.ptr = arbitrary_virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
  421. u.val = pte_val_ma(pte);
  422. xen_extend_mmu_update(&u);
  423. ADD_STATS(prot_commit, 1);
  424. ADD_STATS(prot_commit_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
  425. xen_mc_issue(PARAVIRT_LAZY_MMU);
  426. }
  427. /* Assume pteval_t is equivalent to all the other *val_t types. */
  428. static pteval_t pte_mfn_to_pfn(pteval_t val)
  429. {
  430. if (val & _PAGE_PRESENT) {
  431. unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
  432. pteval_t flags = val & PTE_FLAGS_MASK;
  433. val = ((pteval_t)mfn_to_pfn(mfn) << PAGE_SHIFT) | flags;
  434. }
  435. return val;
  436. }
  437. static pteval_t pte_pfn_to_mfn(pteval_t val)
  438. {
  439. if (val & _PAGE_PRESENT) {
  440. unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
  441. pteval_t flags = val & PTE_FLAGS_MASK;
  442. val = ((pteval_t)pfn_to_mfn(pfn) << PAGE_SHIFT) | flags;
  443. }
  444. return val;
  445. }
  446. static pteval_t iomap_pte(pteval_t val)
  447. {
  448. if (val & _PAGE_PRESENT) {
  449. unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
  450. pteval_t flags = val & PTE_FLAGS_MASK;
  451. /* We assume the pte frame number is a MFN, so
  452. just use it as-is. */
  453. val = ((pteval_t)pfn << PAGE_SHIFT) | flags;
  454. }
  455. return val;
  456. }
  457. pteval_t xen_pte_val(pte_t pte)
  458. {
  459. if (xen_initial_domain() && (pte.pte & _PAGE_IOMAP))
  460. return pte.pte;
  461. return pte_mfn_to_pfn(pte.pte);
  462. }
  463. PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
  464. pgdval_t xen_pgd_val(pgd_t pgd)
  465. {
  466. return pte_mfn_to_pfn(pgd.pgd);
  467. }
  468. PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
  469. pte_t xen_make_pte(pteval_t pte)
  470. {
  471. phys_addr_t addr = (pte & PTE_PFN_MASK);
  472. /*
  473. * Unprivileged domains are allowed to do IOMAPpings for
  474. * PCI passthrough, but not map ISA space. The ISA
  475. * mappings are just dummy local mappings to keep other
  476. * parts of the kernel happy.
  477. */
  478. if (unlikely(pte & _PAGE_IOMAP) &&
  479. (xen_initial_domain() || addr >= ISA_END_ADDRESS)) {
  480. pte = iomap_pte(pte);
  481. } else {
  482. pte &= ~_PAGE_IOMAP;
  483. pte = pte_pfn_to_mfn(pte);
  484. }
  485. return native_make_pte(pte);
  486. }
  487. PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
  488. pgd_t xen_make_pgd(pgdval_t pgd)
  489. {
  490. pgd = pte_pfn_to_mfn(pgd);
  491. return native_make_pgd(pgd);
  492. }
  493. PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
  494. pmdval_t xen_pmd_val(pmd_t pmd)
  495. {
  496. return pte_mfn_to_pfn(pmd.pmd);
  497. }
  498. PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
  499. void xen_set_pud_hyper(pud_t *ptr, pud_t val)
  500. {
  501. struct mmu_update u;
  502. preempt_disable();
  503. xen_mc_batch();
  504. /* ptr may be ioremapped for 64-bit pagetable setup */
  505. u.ptr = arbitrary_virt_to_machine(ptr).maddr;
  506. u.val = pud_val_ma(val);
  507. xen_extend_mmu_update(&u);
  508. ADD_STATS(pud_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
  509. xen_mc_issue(PARAVIRT_LAZY_MMU);
  510. preempt_enable();
  511. }
  512. void xen_set_pud(pud_t *ptr, pud_t val)
  513. {
  514. ADD_STATS(pud_update, 1);
  515. /* If page is not pinned, we can just update the entry
  516. directly */
  517. if (!xen_page_pinned(ptr)) {
  518. *ptr = val;
  519. return;
  520. }
  521. ADD_STATS(pud_update_pinned, 1);
  522. xen_set_pud_hyper(ptr, val);
  523. }
  524. void xen_set_pte(pte_t *ptep, pte_t pte)
  525. {
  526. if (xen_iomap_pte(pte)) {
  527. xen_set_iomap_pte(ptep, pte);
  528. return;
  529. }
  530. ADD_STATS(pte_update, 1);
  531. // ADD_STATS(pte_update_pinned, xen_page_pinned(ptep));
  532. ADD_STATS(pte_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
  533. #ifdef CONFIG_X86_PAE
  534. ptep->pte_high = pte.pte_high;
  535. smp_wmb();
  536. ptep->pte_low = pte.pte_low;
  537. #else
  538. *ptep = pte;
  539. #endif
  540. }
  541. #ifdef CONFIG_X86_PAE
  542. void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
  543. {
  544. if (xen_iomap_pte(pte)) {
  545. xen_set_iomap_pte(ptep, pte);
  546. return;
  547. }
  548. set_64bit((u64 *)ptep, native_pte_val(pte));
  549. }
  550. void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
  551. {
  552. ptep->pte_low = 0;
  553. smp_wmb(); /* make sure low gets written first */
  554. ptep->pte_high = 0;
  555. }
  556. void xen_pmd_clear(pmd_t *pmdp)
  557. {
  558. set_pmd(pmdp, __pmd(0));
  559. }
  560. #endif /* CONFIG_X86_PAE */
  561. pmd_t xen_make_pmd(pmdval_t pmd)
  562. {
  563. pmd = pte_pfn_to_mfn(pmd);
  564. return native_make_pmd(pmd);
  565. }
  566. PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
  567. #if PAGETABLE_LEVELS == 4
  568. pudval_t xen_pud_val(pud_t pud)
  569. {
  570. return pte_mfn_to_pfn(pud.pud);
  571. }
  572. PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
  573. pud_t xen_make_pud(pudval_t pud)
  574. {
  575. pud = pte_pfn_to_mfn(pud);
  576. return native_make_pud(pud);
  577. }
  578. PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
  579. pgd_t *xen_get_user_pgd(pgd_t *pgd)
  580. {
  581. pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
  582. unsigned offset = pgd - pgd_page;
  583. pgd_t *user_ptr = NULL;
  584. if (offset < pgd_index(USER_LIMIT)) {
  585. struct page *page = virt_to_page(pgd_page);
  586. user_ptr = (pgd_t *)page->private;
  587. if (user_ptr)
  588. user_ptr += offset;
  589. }
  590. return user_ptr;
  591. }
  592. static void __xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
  593. {
  594. struct mmu_update u;
  595. u.ptr = virt_to_machine(ptr).maddr;
  596. u.val = pgd_val_ma(val);
  597. xen_extend_mmu_update(&u);
  598. }
  599. /*
  600. * Raw hypercall-based set_pgd, intended for in early boot before
  601. * there's a page structure. This implies:
  602. * 1. The only existing pagetable is the kernel's
  603. * 2. It is always pinned
  604. * 3. It has no user pagetable attached to it
  605. */
  606. void __init xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
  607. {
  608. preempt_disable();
  609. xen_mc_batch();
  610. __xen_set_pgd_hyper(ptr, val);
  611. xen_mc_issue(PARAVIRT_LAZY_MMU);
  612. preempt_enable();
  613. }
  614. void xen_set_pgd(pgd_t *ptr, pgd_t val)
  615. {
  616. pgd_t *user_ptr = xen_get_user_pgd(ptr);
  617. ADD_STATS(pgd_update, 1);
  618. /* If page is not pinned, we can just update the entry
  619. directly */
  620. if (!xen_page_pinned(ptr)) {
  621. *ptr = val;
  622. if (user_ptr) {
  623. WARN_ON(xen_page_pinned(user_ptr));
  624. *user_ptr = val;
  625. }
  626. return;
  627. }
  628. ADD_STATS(pgd_update_pinned, 1);
  629. ADD_STATS(pgd_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
  630. /* If it's pinned, then we can at least batch the kernel and
  631. user updates together. */
  632. xen_mc_batch();
  633. __xen_set_pgd_hyper(ptr, val);
  634. if (user_ptr)
  635. __xen_set_pgd_hyper(user_ptr, val);
  636. xen_mc_issue(PARAVIRT_LAZY_MMU);
  637. }
  638. #endif /* PAGETABLE_LEVELS == 4 */
  639. /*
  640. * (Yet another) pagetable walker. This one is intended for pinning a
  641. * pagetable. This means that it walks a pagetable and calls the
  642. * callback function on each page it finds making up the page table,
  643. * at every level. It walks the entire pagetable, but it only bothers
  644. * pinning pte pages which are below limit. In the normal case this
  645. * will be STACK_TOP_MAX, but at boot we need to pin up to
  646. * FIXADDR_TOP.
  647. *
  648. * For 32-bit the important bit is that we don't pin beyond there,
  649. * because then we start getting into Xen's ptes.
  650. *
  651. * For 64-bit, we must skip the Xen hole in the middle of the address
  652. * space, just after the big x86-64 virtual hole.
  653. */
  654. static int __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd,
  655. int (*func)(struct mm_struct *mm, struct page *,
  656. enum pt_level),
  657. unsigned long limit)
  658. {
  659. int flush = 0;
  660. unsigned hole_low, hole_high;
  661. unsigned pgdidx_limit, pudidx_limit, pmdidx_limit;
  662. unsigned pgdidx, pudidx, pmdidx;
  663. /* The limit is the last byte to be touched */
  664. limit--;
  665. BUG_ON(limit >= FIXADDR_TOP);
  666. if (xen_feature(XENFEAT_auto_translated_physmap))
  667. return 0;
  668. /*
  669. * 64-bit has a great big hole in the middle of the address
  670. * space, which contains the Xen mappings. On 32-bit these
  671. * will end up making a zero-sized hole and so is a no-op.
  672. */
  673. hole_low = pgd_index(USER_LIMIT);
  674. hole_high = pgd_index(PAGE_OFFSET);
  675. pgdidx_limit = pgd_index(limit);
  676. #if PTRS_PER_PUD > 1
  677. pudidx_limit = pud_index(limit);
  678. #else
  679. pudidx_limit = 0;
  680. #endif
  681. #if PTRS_PER_PMD > 1
  682. pmdidx_limit = pmd_index(limit);
  683. #else
  684. pmdidx_limit = 0;
  685. #endif
  686. for (pgdidx = 0; pgdidx <= pgdidx_limit; pgdidx++) {
  687. pud_t *pud;
  688. if (pgdidx >= hole_low && pgdidx < hole_high)
  689. continue;
  690. if (!pgd_val(pgd[pgdidx]))
  691. continue;
  692. pud = pud_offset(&pgd[pgdidx], 0);
  693. if (PTRS_PER_PUD > 1) /* not folded */
  694. flush |= (*func)(mm, virt_to_page(pud), PT_PUD);
  695. for (pudidx = 0; pudidx < PTRS_PER_PUD; pudidx++) {
  696. pmd_t *pmd;
  697. if (pgdidx == pgdidx_limit &&
  698. pudidx > pudidx_limit)
  699. goto out;
  700. if (pud_none(pud[pudidx]))
  701. continue;
  702. pmd = pmd_offset(&pud[pudidx], 0);
  703. if (PTRS_PER_PMD > 1) /* not folded */
  704. flush |= (*func)(mm, virt_to_page(pmd), PT_PMD);
  705. for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++) {
  706. struct page *pte;
  707. if (pgdidx == pgdidx_limit &&
  708. pudidx == pudidx_limit &&
  709. pmdidx > pmdidx_limit)
  710. goto out;
  711. if (pmd_none(pmd[pmdidx]))
  712. continue;
  713. pte = pmd_page(pmd[pmdidx]);
  714. flush |= (*func)(mm, pte, PT_PTE);
  715. }
  716. }
  717. }
  718. out:
  719. /* Do the top level last, so that the callbacks can use it as
  720. a cue to do final things like tlb flushes. */
  721. flush |= (*func)(mm, virt_to_page(pgd), PT_PGD);
  722. return flush;
  723. }
  724. static int xen_pgd_walk(struct mm_struct *mm,
  725. int (*func)(struct mm_struct *mm, struct page *,
  726. enum pt_level),
  727. unsigned long limit)
  728. {
  729. return __xen_pgd_walk(mm, mm->pgd, func, limit);
  730. }
  731. /* If we're using split pte locks, then take the page's lock and
  732. return a pointer to it. Otherwise return NULL. */
  733. static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm)
  734. {
  735. spinlock_t *ptl = NULL;
  736. #if USE_SPLIT_PTLOCKS
  737. ptl = __pte_lockptr(page);
  738. spin_lock_nest_lock(ptl, &mm->page_table_lock);
  739. #endif
  740. return ptl;
  741. }
  742. static void xen_pte_unlock(void *v)
  743. {
  744. spinlock_t *ptl = v;
  745. spin_unlock(ptl);
  746. }
  747. static void xen_do_pin(unsigned level, unsigned long pfn)
  748. {
  749. struct mmuext_op *op;
  750. struct multicall_space mcs;
  751. mcs = __xen_mc_entry(sizeof(*op));
  752. op = mcs.args;
  753. op->cmd = level;
  754. op->arg1.mfn = pfn_to_mfn(pfn);
  755. MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
  756. }
  757. static int xen_pin_page(struct mm_struct *mm, struct page *page,
  758. enum pt_level level)
  759. {
  760. unsigned pgfl = TestSetPagePinned(page);
  761. int flush;
  762. if (pgfl)
  763. flush = 0; /* already pinned */
  764. else if (PageHighMem(page))
  765. /* kmaps need flushing if we found an unpinned
  766. highpage */
  767. flush = 1;
  768. else {
  769. void *pt = lowmem_page_address(page);
  770. unsigned long pfn = page_to_pfn(page);
  771. struct multicall_space mcs = __xen_mc_entry(0);
  772. spinlock_t *ptl;
  773. flush = 0;
  774. /*
  775. * We need to hold the pagetable lock between the time
  776. * we make the pagetable RO and when we actually pin
  777. * it. If we don't, then other users may come in and
  778. * attempt to update the pagetable by writing it,
  779. * which will fail because the memory is RO but not
  780. * pinned, so Xen won't do the trap'n'emulate.
  781. *
  782. * If we're using split pte locks, we can't hold the
  783. * entire pagetable's worth of locks during the
  784. * traverse, because we may wrap the preempt count (8
  785. * bits). The solution is to mark RO and pin each PTE
  786. * page while holding the lock. This means the number
  787. * of locks we end up holding is never more than a
  788. * batch size (~32 entries, at present).
  789. *
  790. * If we're not using split pte locks, we needn't pin
  791. * the PTE pages independently, because we're
  792. * protected by the overall pagetable lock.
  793. */
  794. ptl = NULL;
  795. if (level == PT_PTE)
  796. ptl = xen_pte_lock(page, mm);
  797. MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
  798. pfn_pte(pfn, PAGE_KERNEL_RO),
  799. level == PT_PGD ? UVMF_TLB_FLUSH : 0);
  800. if (ptl) {
  801. xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
  802. /* Queue a deferred unlock for when this batch
  803. is completed. */
  804. xen_mc_callback(xen_pte_unlock, ptl);
  805. }
  806. }
  807. return flush;
  808. }
  809. /* This is called just after a mm has been created, but it has not
  810. been used yet. We need to make sure that its pagetable is all
  811. read-only, and can be pinned. */
  812. static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
  813. {
  814. xen_mc_batch();
  815. if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) {
  816. /* re-enable interrupts for flushing */
  817. xen_mc_issue(0);
  818. kmap_flush_unused();
  819. xen_mc_batch();
  820. }
  821. #ifdef CONFIG_X86_64
  822. {
  823. pgd_t *user_pgd = xen_get_user_pgd(pgd);
  824. xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
  825. if (user_pgd) {
  826. xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
  827. xen_do_pin(MMUEXT_PIN_L4_TABLE,
  828. PFN_DOWN(__pa(user_pgd)));
  829. }
  830. }
  831. #else /* CONFIG_X86_32 */
  832. #ifdef CONFIG_X86_PAE
  833. /* Need to make sure unshared kernel PMD is pinnable */
  834. xen_pin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
  835. PT_PMD);
  836. #endif
  837. xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd)));
  838. #endif /* CONFIG_X86_64 */
  839. xen_mc_issue(0);
  840. }
  841. static void xen_pgd_pin(struct mm_struct *mm)
  842. {
  843. __xen_pgd_pin(mm, mm->pgd);
  844. }
  845. /*
  846. * On save, we need to pin all pagetables to make sure they get their
  847. * mfns turned into pfns. Search the list for any unpinned pgds and pin
  848. * them (unpinned pgds are not currently in use, probably because the
  849. * process is under construction or destruction).
  850. *
  851. * Expected to be called in stop_machine() ("equivalent to taking
  852. * every spinlock in the system"), so the locking doesn't really
  853. * matter all that much.
  854. */
  855. void xen_mm_pin_all(void)
  856. {
  857. unsigned long flags;
  858. struct page *page;
  859. spin_lock_irqsave(&pgd_lock, flags);
  860. list_for_each_entry(page, &pgd_list, lru) {
  861. if (!PagePinned(page)) {
  862. __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page));
  863. SetPageSavePinned(page);
  864. }
  865. }
  866. spin_unlock_irqrestore(&pgd_lock, flags);
  867. }
  868. /*
  869. * The init_mm pagetable is really pinned as soon as its created, but
  870. * that's before we have page structures to store the bits. So do all
  871. * the book-keeping now.
  872. */
  873. static __init int xen_mark_pinned(struct mm_struct *mm, struct page *page,
  874. enum pt_level level)
  875. {
  876. SetPagePinned(page);
  877. return 0;
  878. }
  879. static void __init xen_mark_init_mm_pinned(void)
  880. {
  881. xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP);
  882. }
  883. static int xen_unpin_page(struct mm_struct *mm, struct page *page,
  884. enum pt_level level)
  885. {
  886. unsigned pgfl = TestClearPagePinned(page);
  887. if (pgfl && !PageHighMem(page)) {
  888. void *pt = lowmem_page_address(page);
  889. unsigned long pfn = page_to_pfn(page);
  890. spinlock_t *ptl = NULL;
  891. struct multicall_space mcs;
  892. /*
  893. * Do the converse to pin_page. If we're using split
  894. * pte locks, we must be holding the lock for while
  895. * the pte page is unpinned but still RO to prevent
  896. * concurrent updates from seeing it in this
  897. * partially-pinned state.
  898. */
  899. if (level == PT_PTE) {
  900. ptl = xen_pte_lock(page, mm);
  901. if (ptl)
  902. xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
  903. }
  904. mcs = __xen_mc_entry(0);
  905. MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
  906. pfn_pte(pfn, PAGE_KERNEL),
  907. level == PT_PGD ? UVMF_TLB_FLUSH : 0);
  908. if (ptl) {
  909. /* unlock when batch completed */
  910. xen_mc_callback(xen_pte_unlock, ptl);
  911. }
  912. }
  913. return 0; /* never need to flush on unpin */
  914. }
  915. /* Release a pagetables pages back as normal RW */
  916. static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
  917. {
  918. xen_mc_batch();
  919. xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
  920. #ifdef CONFIG_X86_64
  921. {
  922. pgd_t *user_pgd = xen_get_user_pgd(pgd);
  923. if (user_pgd) {
  924. xen_do_pin(MMUEXT_UNPIN_TABLE,
  925. PFN_DOWN(__pa(user_pgd)));
  926. xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
  927. }
  928. }
  929. #endif
  930. #ifdef CONFIG_X86_PAE
  931. /* Need to make sure unshared kernel PMD is unpinned */
  932. xen_unpin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
  933. PT_PMD);
  934. #endif
  935. __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT);
  936. xen_mc_issue(0);
  937. }
  938. static void xen_pgd_unpin(struct mm_struct *mm)
  939. {
  940. __xen_pgd_unpin(mm, mm->pgd);
  941. }
  942. /*
  943. * On resume, undo any pinning done at save, so that the rest of the
  944. * kernel doesn't see any unexpected pinned pagetables.
  945. */
  946. void xen_mm_unpin_all(void)
  947. {
  948. unsigned long flags;
  949. struct page *page;
  950. spin_lock_irqsave(&pgd_lock, flags);
  951. list_for_each_entry(page, &pgd_list, lru) {
  952. if (PageSavePinned(page)) {
  953. BUG_ON(!PagePinned(page));
  954. __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page));
  955. ClearPageSavePinned(page);
  956. }
  957. }
  958. spin_unlock_irqrestore(&pgd_lock, flags);
  959. }
  960. void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
  961. {
  962. spin_lock(&next->page_table_lock);
  963. xen_pgd_pin(next);
  964. spin_unlock(&next->page_table_lock);
  965. }
  966. void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
  967. {
  968. spin_lock(&mm->page_table_lock);
  969. xen_pgd_pin(mm);
  970. spin_unlock(&mm->page_table_lock);
  971. }
  972. #ifdef CONFIG_SMP
  973. /* Another cpu may still have their %cr3 pointing at the pagetable, so
  974. we need to repoint it somewhere else before we can unpin it. */
  975. static void drop_other_mm_ref(void *info)
  976. {
  977. struct mm_struct *mm = info;
  978. struct mm_struct *active_mm;
  979. active_mm = percpu_read(cpu_tlbstate.active_mm);
  980. if (active_mm == mm)
  981. leave_mm(smp_processor_id());
  982. /* If this cpu still has a stale cr3 reference, then make sure
  983. it has been flushed. */
  984. if (percpu_read(xen_current_cr3) == __pa(mm->pgd))
  985. load_cr3(swapper_pg_dir);
  986. }
  987. static void xen_drop_mm_ref(struct mm_struct *mm)
  988. {
  989. cpumask_var_t mask;
  990. unsigned cpu;
  991. if (current->active_mm == mm) {
  992. if (current->mm == mm)
  993. load_cr3(swapper_pg_dir);
  994. else
  995. leave_mm(smp_processor_id());
  996. }
  997. /* Get the "official" set of cpus referring to our pagetable. */
  998. if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
  999. for_each_online_cpu(cpu) {
  1000. if (!cpumask_test_cpu(cpu, mm_cpumask(mm))
  1001. && per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
  1002. continue;
  1003. smp_call_function_single(cpu, drop_other_mm_ref, mm, 1);
  1004. }
  1005. return;
  1006. }
  1007. cpumask_copy(mask, mm_cpumask(mm));
  1008. /* It's possible that a vcpu may have a stale reference to our
  1009. cr3, because its in lazy mode, and it hasn't yet flushed
  1010. its set of pending hypercalls yet. In this case, we can
  1011. look at its actual current cr3 value, and force it to flush
  1012. if needed. */
  1013. for_each_online_cpu(cpu) {
  1014. if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
  1015. cpumask_set_cpu(cpu, mask);
  1016. }
  1017. if (!cpumask_empty(mask))
  1018. smp_call_function_many(mask, drop_other_mm_ref, mm, 1);
  1019. free_cpumask_var(mask);
  1020. }
  1021. #else
  1022. static void xen_drop_mm_ref(struct mm_struct *mm)
  1023. {
  1024. if (current->active_mm == mm)
  1025. load_cr3(swapper_pg_dir);
  1026. }
  1027. #endif
  1028. /*
  1029. * While a process runs, Xen pins its pagetables, which means that the
  1030. * hypervisor forces it to be read-only, and it controls all updates
  1031. * to it. This means that all pagetable updates have to go via the
  1032. * hypervisor, which is moderately expensive.
  1033. *
  1034. * Since we're pulling the pagetable down, we switch to use init_mm,
  1035. * unpin old process pagetable and mark it all read-write, which
  1036. * allows further operations on it to be simple memory accesses.
  1037. *
  1038. * The only subtle point is that another CPU may be still using the
  1039. * pagetable because of lazy tlb flushing. This means we need need to
  1040. * switch all CPUs off this pagetable before we can unpin it.
  1041. */
  1042. void xen_exit_mmap(struct mm_struct *mm)
  1043. {
  1044. get_cpu(); /* make sure we don't move around */
  1045. xen_drop_mm_ref(mm);
  1046. put_cpu();
  1047. spin_lock(&mm->page_table_lock);
  1048. /* pgd may not be pinned in the error exit path of execve */
  1049. if (xen_page_pinned(mm->pgd))
  1050. xen_pgd_unpin(mm);
  1051. spin_unlock(&mm->page_table_lock);
  1052. }
  1053. static __init void xen_pagetable_setup_start(pgd_t *base)
  1054. {
  1055. }
  1056. static void xen_post_allocator_init(void);
  1057. static __init void xen_pagetable_setup_done(pgd_t *base)
  1058. {
  1059. xen_setup_shared_info();
  1060. xen_post_allocator_init();
  1061. }
  1062. static void xen_write_cr2(unsigned long cr2)
  1063. {
  1064. percpu_read(xen_vcpu)->arch.cr2 = cr2;
  1065. }
  1066. static unsigned long xen_read_cr2(void)
  1067. {
  1068. return percpu_read(xen_vcpu)->arch.cr2;
  1069. }
  1070. unsigned long xen_read_cr2_direct(void)
  1071. {
  1072. return percpu_read(xen_vcpu_info.arch.cr2);
  1073. }
  1074. static void xen_flush_tlb(void)
  1075. {
  1076. struct mmuext_op *op;
  1077. struct multicall_space mcs;
  1078. preempt_disable();
  1079. mcs = xen_mc_entry(sizeof(*op));
  1080. op = mcs.args;
  1081. op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
  1082. MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
  1083. xen_mc_issue(PARAVIRT_LAZY_MMU);
  1084. preempt_enable();
  1085. }
  1086. static void xen_flush_tlb_single(unsigned long addr)
  1087. {
  1088. struct mmuext_op *op;
  1089. struct multicall_space mcs;
  1090. preempt_disable();
  1091. mcs = xen_mc_entry(sizeof(*op));
  1092. op = mcs.args;
  1093. op->cmd = MMUEXT_INVLPG_LOCAL;
  1094. op->arg1.linear_addr = addr & PAGE_MASK;
  1095. MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
  1096. xen_mc_issue(PARAVIRT_LAZY_MMU);
  1097. preempt_enable();
  1098. }
  1099. static void xen_flush_tlb_others(const struct cpumask *cpus,
  1100. struct mm_struct *mm, unsigned long va)
  1101. {
  1102. struct {
  1103. struct mmuext_op op;
  1104. DECLARE_BITMAP(mask, NR_CPUS);
  1105. } *args;
  1106. struct multicall_space mcs;
  1107. if (cpumask_empty(cpus))
  1108. return; /* nothing to do */
  1109. mcs = xen_mc_entry(sizeof(*args));
  1110. args = mcs.args;
  1111. args->op.arg2.vcpumask = to_cpumask(args->mask);
  1112. /* Remove us, and any offline CPUS. */
  1113. cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
  1114. cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask));
  1115. if (va == TLB_FLUSH_ALL) {
  1116. args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
  1117. } else {
  1118. args->op.cmd = MMUEXT_INVLPG_MULTI;
  1119. args->op.arg1.linear_addr = va;
  1120. }
  1121. MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
  1122. xen_mc_issue(PARAVIRT_LAZY_MMU);
  1123. }
  1124. static unsigned long xen_read_cr3(void)
  1125. {
  1126. return percpu_read(xen_cr3);
  1127. }
  1128. static void set_current_cr3(void *v)
  1129. {
  1130. percpu_write(xen_current_cr3, (unsigned long)v);
  1131. }
  1132. static void __xen_write_cr3(bool kernel, unsigned long cr3)
  1133. {
  1134. struct mmuext_op *op;
  1135. struct multicall_space mcs;
  1136. unsigned long mfn;
  1137. if (cr3)
  1138. mfn = pfn_to_mfn(PFN_DOWN(cr3));
  1139. else
  1140. mfn = 0;
  1141. WARN_ON(mfn == 0 && kernel);
  1142. mcs = __xen_mc_entry(sizeof(*op));
  1143. op = mcs.args;
  1144. op->cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
  1145. op->arg1.mfn = mfn;
  1146. MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
  1147. if (kernel) {
  1148. percpu_write(xen_cr3, cr3);
  1149. /* Update xen_current_cr3 once the batch has actually
  1150. been submitted. */
  1151. xen_mc_callback(set_current_cr3, (void *)cr3);
  1152. }
  1153. }
  1154. static void xen_write_cr3(unsigned long cr3)
  1155. {
  1156. BUG_ON(preemptible());
  1157. xen_mc_batch(); /* disables interrupts */
  1158. /* Update while interrupts are disabled, so its atomic with
  1159. respect to ipis */
  1160. percpu_write(xen_cr3, cr3);
  1161. __xen_write_cr3(true, cr3);
  1162. #ifdef CONFIG_X86_64
  1163. {
  1164. pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
  1165. if (user_pgd)
  1166. __xen_write_cr3(false, __pa(user_pgd));
  1167. else
  1168. __xen_write_cr3(false, 0);
  1169. }
  1170. #endif
  1171. xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
  1172. }
  1173. static int xen_pgd_alloc(struct mm_struct *mm)
  1174. {
  1175. pgd_t *pgd = mm->pgd;
  1176. int ret = 0;
  1177. BUG_ON(PagePinned(virt_to_page(pgd)));
  1178. #ifdef CONFIG_X86_64
  1179. {
  1180. struct page *page = virt_to_page(pgd);
  1181. pgd_t *user_pgd;
  1182. BUG_ON(page->private != 0);
  1183. ret = -ENOMEM;
  1184. user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
  1185. page->private = (unsigned long)user_pgd;
  1186. if (user_pgd != NULL) {
  1187. user_pgd[pgd_index(VSYSCALL_START)] =
  1188. __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
  1189. ret = 0;
  1190. }
  1191. BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
  1192. }
  1193. #endif
  1194. return ret;
  1195. }
  1196. static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
  1197. {
  1198. #ifdef CONFIG_X86_64
  1199. pgd_t *user_pgd = xen_get_user_pgd(pgd);
  1200. if (user_pgd)
  1201. free_page((unsigned long)user_pgd);
  1202. #endif
  1203. }
  1204. #ifdef CONFIG_X86_32
  1205. static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte)
  1206. {
  1207. /* If there's an existing pte, then don't allow _PAGE_RW to be set */
  1208. if (pte_val_ma(*ptep) & _PAGE_PRESENT)
  1209. pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
  1210. pte_val_ma(pte));
  1211. return pte;
  1212. }
  1213. /* Init-time set_pte while constructing initial pagetables, which
  1214. doesn't allow RO pagetable pages to be remapped RW */
  1215. static __init void xen_set_pte_init(pte_t *ptep, pte_t pte)
  1216. {
  1217. pte = mask_rw_pte(ptep, pte);
  1218. xen_set_pte(ptep, pte);
  1219. }
  1220. #endif
  1221. static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
  1222. {
  1223. struct mmuext_op op;
  1224. op.cmd = cmd;
  1225. op.arg1.mfn = pfn_to_mfn(pfn);
  1226. if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
  1227. BUG();
  1228. }
  1229. /* Early in boot, while setting up the initial pagetable, assume
  1230. everything is pinned. */
  1231. static __init void xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
  1232. {
  1233. #ifdef CONFIG_FLATMEM
  1234. BUG_ON(mem_map); /* should only be used early */
  1235. #endif
  1236. make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
  1237. pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
  1238. }
  1239. /* Used for pmd and pud */
  1240. static __init void xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn)
  1241. {
  1242. #ifdef CONFIG_FLATMEM
  1243. BUG_ON(mem_map); /* should only be used early */
  1244. #endif
  1245. make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
  1246. }
  1247. /* Early release_pte assumes that all pts are pinned, since there's
  1248. only init_mm and anything attached to that is pinned. */
  1249. static __init void xen_release_pte_init(unsigned long pfn)
  1250. {
  1251. pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
  1252. make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
  1253. }
  1254. static __init void xen_release_pmd_init(unsigned long pfn)
  1255. {
  1256. make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
  1257. }
  1258. /* This needs to make sure the new pte page is pinned iff its being
  1259. attached to a pinned pagetable. */
  1260. static void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn, unsigned level)
  1261. {
  1262. struct page *page = pfn_to_page(pfn);
  1263. if (PagePinned(virt_to_page(mm->pgd))) {
  1264. SetPagePinned(page);
  1265. if (!PageHighMem(page)) {
  1266. make_lowmem_page_readonly(__va(PFN_PHYS((unsigned long)pfn)));
  1267. if (level == PT_PTE && USE_SPLIT_PTLOCKS)
  1268. pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
  1269. } else {
  1270. /* make sure there are no stray mappings of
  1271. this page */
  1272. kmap_flush_unused();
  1273. }
  1274. }
  1275. }
  1276. static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
  1277. {
  1278. xen_alloc_ptpage(mm, pfn, PT_PTE);
  1279. }
  1280. static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
  1281. {
  1282. xen_alloc_ptpage(mm, pfn, PT_PMD);
  1283. }
  1284. /* This should never happen until we're OK to use struct page */
  1285. static void xen_release_ptpage(unsigned long pfn, unsigned level)
  1286. {
  1287. struct page *page = pfn_to_page(pfn);
  1288. if (PagePinned(page)) {
  1289. if (!PageHighMem(page)) {
  1290. if (level == PT_PTE && USE_SPLIT_PTLOCKS)
  1291. pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
  1292. make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
  1293. }
  1294. ClearPagePinned(page);
  1295. }
  1296. }
  1297. static void xen_release_pte(unsigned long pfn)
  1298. {
  1299. xen_release_ptpage(pfn, PT_PTE);
  1300. }
  1301. static void xen_release_pmd(unsigned long pfn)
  1302. {
  1303. xen_release_ptpage(pfn, PT_PMD);
  1304. }
  1305. #if PAGETABLE_LEVELS == 4
  1306. static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
  1307. {
  1308. xen_alloc_ptpage(mm, pfn, PT_PUD);
  1309. }
  1310. static void xen_release_pud(unsigned long pfn)
  1311. {
  1312. xen_release_ptpage(pfn, PT_PUD);
  1313. }
  1314. #endif
  1315. void __init xen_reserve_top(void)
  1316. {
  1317. #ifdef CONFIG_X86_32
  1318. unsigned long top = HYPERVISOR_VIRT_START;
  1319. struct xen_platform_parameters pp;
  1320. if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
  1321. top = pp.virt_start;
  1322. reserve_top_address(-top);
  1323. #endif /* CONFIG_X86_32 */
  1324. }
  1325. /*
  1326. * Like __va(), but returns address in the kernel mapping (which is
  1327. * all we have until the physical memory mapping has been set up.
  1328. */
  1329. static void *__ka(phys_addr_t paddr)
  1330. {
  1331. #ifdef CONFIG_X86_64
  1332. return (void *)(paddr + __START_KERNEL_map);
  1333. #else
  1334. return __va(paddr);
  1335. #endif
  1336. }
  1337. /* Convert a machine address to physical address */
  1338. static unsigned long m2p(phys_addr_t maddr)
  1339. {
  1340. phys_addr_t paddr;
  1341. maddr &= PTE_PFN_MASK;
  1342. paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
  1343. return paddr;
  1344. }
  1345. /* Convert a machine address to kernel virtual */
  1346. static void *m2v(phys_addr_t maddr)
  1347. {
  1348. return __ka(m2p(maddr));
  1349. }
  1350. static void set_page_prot(void *addr, pgprot_t prot)
  1351. {
  1352. unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
  1353. pte_t pte = pfn_pte(pfn, prot);
  1354. if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0))
  1355. BUG();
  1356. }
  1357. static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
  1358. {
  1359. unsigned pmdidx, pteidx;
  1360. unsigned ident_pte;
  1361. unsigned long pfn;
  1362. ident_pte = 0;
  1363. pfn = 0;
  1364. for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
  1365. pte_t *pte_page;
  1366. /* Reuse or allocate a page of ptes */
  1367. if (pmd_present(pmd[pmdidx]))
  1368. pte_page = m2v(pmd[pmdidx].pmd);
  1369. else {
  1370. /* Check for free pte pages */
  1371. if (ident_pte == ARRAY_SIZE(level1_ident_pgt))
  1372. break;
  1373. pte_page = &level1_ident_pgt[ident_pte];
  1374. ident_pte += PTRS_PER_PTE;
  1375. pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
  1376. }
  1377. /* Install mappings */
  1378. for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
  1379. pte_t pte;
  1380. if (pfn > max_pfn_mapped)
  1381. max_pfn_mapped = pfn;
  1382. if (!pte_none(pte_page[pteidx]))
  1383. continue;
  1384. pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
  1385. pte_page[pteidx] = pte;
  1386. }
  1387. }
  1388. for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
  1389. set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
  1390. set_page_prot(pmd, PAGE_KERNEL_RO);
  1391. }
  1392. #ifdef CONFIG_X86_64
  1393. static void convert_pfn_mfn(void *v)
  1394. {
  1395. pte_t *pte = v;
  1396. int i;
  1397. /* All levels are converted the same way, so just treat them
  1398. as ptes. */
  1399. for (i = 0; i < PTRS_PER_PTE; i++)
  1400. pte[i] = xen_make_pte(pte[i].pte);
  1401. }
  1402. /*
  1403. * Set up the inital kernel pagetable.
  1404. *
  1405. * We can construct this by grafting the Xen provided pagetable into
  1406. * head_64.S's preconstructed pagetables. We copy the Xen L2's into
  1407. * level2_ident_pgt, level2_kernel_pgt and level2_fixmap_pgt. This
  1408. * means that only the kernel has a physical mapping to start with -
  1409. * but that's enough to get __va working. We need to fill in the rest
  1410. * of the physical mapping once some sort of allocator has been set
  1411. * up.
  1412. */
  1413. __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
  1414. unsigned long max_pfn)
  1415. {
  1416. pud_t *l3;
  1417. pmd_t *l2;
  1418. /* Zap identity mapping */
  1419. init_level4_pgt[0] = __pgd(0);
  1420. /* Pre-constructed entries are in pfn, so convert to mfn */
  1421. convert_pfn_mfn(init_level4_pgt);
  1422. convert_pfn_mfn(level3_ident_pgt);
  1423. convert_pfn_mfn(level3_kernel_pgt);
  1424. l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
  1425. l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
  1426. memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
  1427. memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
  1428. l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd);
  1429. l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud);
  1430. memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
  1431. /* Set up identity map */
  1432. xen_map_identity_early(level2_ident_pgt, max_pfn);
  1433. /* Make pagetable pieces RO */
  1434. set_page_prot(init_level4_pgt, PAGE_KERNEL_RO);
  1435. set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
  1436. set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
  1437. set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
  1438. set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
  1439. set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
  1440. /* Pin down new L4 */
  1441. pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
  1442. PFN_DOWN(__pa_symbol(init_level4_pgt)));
  1443. /* Unpin Xen-provided one */
  1444. pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
  1445. /* Switch over */
  1446. pgd = init_level4_pgt;
  1447. /*
  1448. * At this stage there can be no user pgd, and no page
  1449. * structure to attach it to, so make sure we just set kernel
  1450. * pgd.
  1451. */
  1452. xen_mc_batch();
  1453. __xen_write_cr3(true, __pa(pgd));
  1454. xen_mc_issue(PARAVIRT_LAZY_CPU);
  1455. reserve_early(__pa(xen_start_info->pt_base),
  1456. __pa(xen_start_info->pt_base +
  1457. xen_start_info->nr_pt_frames * PAGE_SIZE),
  1458. "XEN PAGETABLES");
  1459. return pgd;
  1460. }
  1461. #else /* !CONFIG_X86_64 */
  1462. static pmd_t level2_kernel_pgt[PTRS_PER_PMD] __page_aligned_bss;
  1463. __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
  1464. unsigned long max_pfn)
  1465. {
  1466. pmd_t *kernel_pmd;
  1467. max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->pt_base) +
  1468. xen_start_info->nr_pt_frames * PAGE_SIZE +
  1469. 512*1024);
  1470. kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
  1471. memcpy(level2_kernel_pgt, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD);
  1472. xen_map_identity_early(level2_kernel_pgt, max_pfn);
  1473. memcpy(swapper_pg_dir, pgd, sizeof(pgd_t) * PTRS_PER_PGD);
  1474. set_pgd(&swapper_pg_dir[KERNEL_PGD_BOUNDARY],
  1475. __pgd(__pa(level2_kernel_pgt) | _PAGE_PRESENT));
  1476. set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
  1477. set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
  1478. set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
  1479. pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
  1480. xen_write_cr3(__pa(swapper_pg_dir));
  1481. pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(swapper_pg_dir)));
  1482. reserve_early(__pa(xen_start_info->pt_base),
  1483. __pa(xen_start_info->pt_base +
  1484. xen_start_info->nr_pt_frames * PAGE_SIZE),
  1485. "XEN PAGETABLES");
  1486. return swapper_pg_dir;
  1487. }
  1488. #endif /* CONFIG_X86_64 */
  1489. static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
  1490. {
  1491. pte_t pte;
  1492. phys >>= PAGE_SHIFT;
  1493. switch (idx) {
  1494. case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
  1495. #ifdef CONFIG_X86_F00F_BUG
  1496. case FIX_F00F_IDT:
  1497. #endif
  1498. #ifdef CONFIG_X86_32
  1499. case FIX_WP_TEST:
  1500. case FIX_VDSO:
  1501. # ifdef CONFIG_HIGHMEM
  1502. case FIX_KMAP_BEGIN ... FIX_KMAP_END:
  1503. # endif
  1504. #else
  1505. case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE:
  1506. #endif
  1507. #ifdef CONFIG_X86_LOCAL_APIC
  1508. case FIX_APIC_BASE: /* maps dummy local APIC */
  1509. #endif
  1510. case FIX_TEXT_POKE0:
  1511. case FIX_TEXT_POKE1:
  1512. /* All local page mappings */
  1513. pte = pfn_pte(phys, prot);
  1514. break;
  1515. case FIX_PARAVIRT_BOOTMAP:
  1516. /* This is an MFN, but it isn't an IO mapping from the
  1517. IO domain */
  1518. pte = mfn_pte(phys, prot);
  1519. break;
  1520. default:
  1521. /* By default, set_fixmap is used for hardware mappings */
  1522. pte = mfn_pte(phys, __pgprot(pgprot_val(prot) | _PAGE_IOMAP));
  1523. break;
  1524. }
  1525. __native_set_fixmap(idx, pte);
  1526. #ifdef CONFIG_X86_64
  1527. /* Replicate changes to map the vsyscall page into the user
  1528. pagetable vsyscall mapping. */
  1529. if (idx >= VSYSCALL_LAST_PAGE && idx <= VSYSCALL_FIRST_PAGE) {
  1530. unsigned long vaddr = __fix_to_virt(idx);
  1531. set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
  1532. }
  1533. #endif
  1534. }
  1535. static __init void xen_post_allocator_init(void)
  1536. {
  1537. pv_mmu_ops.set_pte = xen_set_pte;
  1538. pv_mmu_ops.set_pmd = xen_set_pmd;
  1539. pv_mmu_ops.set_pud = xen_set_pud;
  1540. #if PAGETABLE_LEVELS == 4
  1541. pv_mmu_ops.set_pgd = xen_set_pgd;
  1542. #endif
  1543. /* This will work as long as patching hasn't happened yet
  1544. (which it hasn't) */
  1545. pv_mmu_ops.alloc_pte = xen_alloc_pte;
  1546. pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
  1547. pv_mmu_ops.release_pte = xen_release_pte;
  1548. pv_mmu_ops.release_pmd = xen_release_pmd;
  1549. #if PAGETABLE_LEVELS == 4
  1550. pv_mmu_ops.alloc_pud = xen_alloc_pud;
  1551. pv_mmu_ops.release_pud = xen_release_pud;
  1552. #endif
  1553. #ifdef CONFIG_X86_64
  1554. SetPagePinned(virt_to_page(level3_user_vsyscall));
  1555. #endif
  1556. xen_mark_init_mm_pinned();
  1557. }
  1558. static void xen_leave_lazy_mmu(void)
  1559. {
  1560. preempt_disable();
  1561. xen_mc_flush();
  1562. paravirt_leave_lazy_mmu();
  1563. preempt_enable();
  1564. }
  1565. static const struct pv_mmu_ops xen_mmu_ops __initdata = {
  1566. .read_cr2 = xen_read_cr2,
  1567. .write_cr2 = xen_write_cr2,
  1568. .read_cr3 = xen_read_cr3,
  1569. .write_cr3 = xen_write_cr3,
  1570. .flush_tlb_user = xen_flush_tlb,
  1571. .flush_tlb_kernel = xen_flush_tlb,
  1572. .flush_tlb_single = xen_flush_tlb_single,
  1573. .flush_tlb_others = xen_flush_tlb_others,
  1574. .pte_update = paravirt_nop,
  1575. .pte_update_defer = paravirt_nop,
  1576. .pgd_alloc = xen_pgd_alloc,
  1577. .pgd_free = xen_pgd_free,
  1578. .alloc_pte = xen_alloc_pte_init,
  1579. .release_pte = xen_release_pte_init,
  1580. .alloc_pmd = xen_alloc_pmd_init,
  1581. .alloc_pmd_clone = paravirt_nop,
  1582. .release_pmd = xen_release_pmd_init,
  1583. #ifdef CONFIG_X86_64
  1584. .set_pte = xen_set_pte,
  1585. #else
  1586. .set_pte = xen_set_pte_init,
  1587. #endif
  1588. .set_pte_at = xen_set_pte_at,
  1589. .set_pmd = xen_set_pmd_hyper,
  1590. .ptep_modify_prot_start = __ptep_modify_prot_start,
  1591. .ptep_modify_prot_commit = __ptep_modify_prot_commit,
  1592. .pte_val = PV_CALLEE_SAVE(xen_pte_val),
  1593. .pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
  1594. .make_pte = PV_CALLEE_SAVE(xen_make_pte),
  1595. .make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
  1596. #ifdef CONFIG_X86_PAE
  1597. .set_pte_atomic = xen_set_pte_atomic,
  1598. .pte_clear = xen_pte_clear,
  1599. .pmd_clear = xen_pmd_clear,
  1600. #endif /* CONFIG_X86_PAE */
  1601. .set_pud = xen_set_pud_hyper,
  1602. .make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
  1603. .pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
  1604. #if PAGETABLE_LEVELS == 4
  1605. .pud_val = PV_CALLEE_SAVE(xen_pud_val),
  1606. .make_pud = PV_CALLEE_SAVE(xen_make_pud),
  1607. .set_pgd = xen_set_pgd_hyper,
  1608. .alloc_pud = xen_alloc_pmd_init,
  1609. .release_pud = xen_release_pmd_init,
  1610. #endif /* PAGETABLE_LEVELS == 4 */
  1611. .activate_mm = xen_activate_mm,
  1612. .dup_mmap = xen_dup_mmap,
  1613. .exit_mmap = xen_exit_mmap,
  1614. .lazy_mode = {
  1615. .enter = paravirt_enter_lazy_mmu,
  1616. .leave = xen_leave_lazy_mmu,
  1617. },
  1618. .set_fixmap = xen_set_fixmap,
  1619. };
  1620. void __init xen_init_mmu_ops(void)
  1621. {
  1622. x86_init.paging.pagetable_setup_start = xen_pagetable_setup_start;
  1623. x86_init.paging.pagetable_setup_done = xen_pagetable_setup_done;
  1624. pv_mmu_ops = xen_mmu_ops;
  1625. vmap_lazy_unmap = false;
  1626. }
  1627. /* Protected by xen_reservation_lock. */
  1628. #define MAX_CONTIG_ORDER 9 /* 2MB */
  1629. static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER];
  1630. #define VOID_PTE (mfn_pte(0, __pgprot(0)))
  1631. static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order,
  1632. unsigned long *in_frames,
  1633. unsigned long *out_frames)
  1634. {
  1635. int i;
  1636. struct multicall_space mcs;
  1637. xen_mc_batch();
  1638. for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) {
  1639. mcs = __xen_mc_entry(0);
  1640. if (in_frames)
  1641. in_frames[i] = virt_to_mfn(vaddr);
  1642. MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0);
  1643. set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY);
  1644. if (out_frames)
  1645. out_frames[i] = virt_to_pfn(vaddr);
  1646. }
  1647. xen_mc_issue(0);
  1648. }
  1649. /*
  1650. * Update the pfn-to-mfn mappings for a virtual address range, either to
  1651. * point to an array of mfns, or contiguously from a single starting
  1652. * mfn.
  1653. */
  1654. static void xen_remap_exchanged_ptes(unsigned long vaddr, int order,
  1655. unsigned long *mfns,
  1656. unsigned long first_mfn)
  1657. {
  1658. unsigned i, limit;
  1659. unsigned long mfn;
  1660. xen_mc_batch();
  1661. limit = 1u << order;
  1662. for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) {
  1663. struct multicall_space mcs;
  1664. unsigned flags;
  1665. mcs = __xen_mc_entry(0);
  1666. if (mfns)
  1667. mfn = mfns[i];
  1668. else
  1669. mfn = first_mfn + i;
  1670. if (i < (limit - 1))
  1671. flags = 0;
  1672. else {
  1673. if (order == 0)
  1674. flags = UVMF_INVLPG | UVMF_ALL;
  1675. else
  1676. flags = UVMF_TLB_FLUSH | UVMF_ALL;
  1677. }
  1678. MULTI_update_va_mapping(mcs.mc, vaddr,
  1679. mfn_pte(mfn, PAGE_KERNEL), flags);
  1680. set_phys_to_machine(virt_to_pfn(vaddr), mfn);
  1681. }
  1682. xen_mc_issue(0);
  1683. }
  1684. /*
  1685. * Perform the hypercall to exchange a region of our pfns to point to
  1686. * memory with the required contiguous alignment. Takes the pfns as
  1687. * input, and populates mfns as output.
  1688. *
  1689. * Returns a success code indicating whether the hypervisor was able to
  1690. * satisfy the request or not.
  1691. */
  1692. static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in,
  1693. unsigned long *pfns_in,
  1694. unsigned long extents_out,
  1695. unsigned int order_out,
  1696. unsigned long *mfns_out,
  1697. unsigned int address_bits)
  1698. {
  1699. long rc;
  1700. int success;
  1701. struct xen_memory_exchange exchange = {
  1702. .in = {
  1703. .nr_extents = extents_in,
  1704. .extent_order = order_in,
  1705. .extent_start = pfns_in,
  1706. .domid = DOMID_SELF
  1707. },
  1708. .out = {
  1709. .nr_extents = extents_out,
  1710. .extent_order = order_out,
  1711. .extent_start = mfns_out,
  1712. .address_bits = address_bits,
  1713. .domid = DOMID_SELF
  1714. }
  1715. };
  1716. BUG_ON(extents_in << order_in != extents_out << order_out);
  1717. rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange);
  1718. success = (exchange.nr_exchanged == extents_in);
  1719. BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0)));
  1720. BUG_ON(success && (rc != 0));
  1721. return success;
  1722. }
  1723. int xen_create_contiguous_region(unsigned long vstart, unsigned int order,
  1724. unsigned int address_bits)
  1725. {
  1726. unsigned long *in_frames = discontig_frames, out_frame;
  1727. unsigned long flags;
  1728. int success;
  1729. /*
  1730. * Currently an auto-translated guest will not perform I/O, nor will
  1731. * it require PAE page directories below 4GB. Therefore any calls to
  1732. * this function are redundant and can be ignored.
  1733. */
  1734. if (xen_feature(XENFEAT_auto_translated_physmap))
  1735. return 0;
  1736. if (unlikely(order > MAX_CONTIG_ORDER))
  1737. return -ENOMEM;
  1738. memset((void *) vstart, 0, PAGE_SIZE << order);
  1739. spin_lock_irqsave(&xen_reservation_lock, flags);
  1740. /* 1. Zap current PTEs, remembering MFNs. */
  1741. xen_zap_pfn_range(vstart, order, in_frames, NULL);
  1742. /* 2. Get a new contiguous memory extent. */
  1743. out_frame = virt_to_pfn(vstart);
  1744. success = xen_exchange_memory(1UL << order, 0, in_frames,
  1745. 1, order, &out_frame,
  1746. address_bits);
  1747. /* 3. Map the new extent in place of old pages. */
  1748. if (success)
  1749. xen_remap_exchanged_ptes(vstart, order, NULL, out_frame);
  1750. else
  1751. xen_remap_exchanged_ptes(vstart, order, in_frames, 0);
  1752. spin_unlock_irqrestore(&xen_reservation_lock, flags);
  1753. return success ? 0 : -ENOMEM;
  1754. }
  1755. EXPORT_SYMBOL_GPL(xen_create_contiguous_region);
  1756. void xen_destroy_contiguous_region(unsigned long vstart, unsigned int order)
  1757. {
  1758. unsigned long *out_frames = discontig_frames, in_frame;
  1759. unsigned long flags;
  1760. int success;
  1761. if (xen_feature(XENFEAT_auto_translated_physmap))
  1762. return;
  1763. if (unlikely(order > MAX_CONTIG_ORDER))
  1764. return;
  1765. memset((void *) vstart, 0, PAGE_SIZE << order);
  1766. spin_lock_irqsave(&xen_reservation_lock, flags);
  1767. /* 1. Find start MFN of contiguous extent. */
  1768. in_frame = virt_to_mfn(vstart);
  1769. /* 2. Zap current PTEs. */
  1770. xen_zap_pfn_range(vstart, order, NULL, out_frames);
  1771. /* 3. Do the exchange for non-contiguous MFNs. */
  1772. success = xen_exchange_memory(1, order, &in_frame, 1UL << order,
  1773. 0, out_frames, 0);
  1774. /* 4. Map new pages in place of old pages. */
  1775. if (success)
  1776. xen_remap_exchanged_ptes(vstart, order, out_frames, 0);
  1777. else
  1778. xen_remap_exchanged_ptes(vstart, order, NULL, in_frame);
  1779. spin_unlock_irqrestore(&xen_reservation_lock, flags);
  1780. }
  1781. EXPORT_SYMBOL_GPL(xen_destroy_contiguous_region);
  1782. #ifdef CONFIG_XEN_PVHVM
  1783. static void xen_hvm_exit_mmap(struct mm_struct *mm)
  1784. {
  1785. struct xen_hvm_pagetable_dying a;
  1786. int rc;
  1787. a.domid = DOMID_SELF;
  1788. a.gpa = __pa(mm->pgd);
  1789. rc = HYPERVISOR_hvm_op(HVMOP_pagetable_dying, &a);
  1790. WARN_ON_ONCE(rc < 0);
  1791. }
  1792. static int is_pagetable_dying_supported(void)
  1793. {
  1794. struct xen_hvm_pagetable_dying a;
  1795. int rc = 0;
  1796. a.domid = DOMID_SELF;
  1797. a.gpa = 0x00;
  1798. rc = HYPERVISOR_hvm_op(HVMOP_pagetable_dying, &a);
  1799. if (rc < 0) {
  1800. printk(KERN_DEBUG "HVMOP_pagetable_dying not supported\n");
  1801. return 0;
  1802. }
  1803. return 1;
  1804. }
  1805. void __init xen_hvm_init_mmu_ops(void)
  1806. {
  1807. if (is_pagetable_dying_supported())
  1808. pv_mmu_ops.exit_mmap = xen_hvm_exit_mmap;
  1809. }
  1810. #endif
  1811. #ifdef CONFIG_XEN_DEBUG_FS
  1812. static struct dentry *d_mmu_debug;
  1813. static int __init xen_mmu_debugfs(void)
  1814. {
  1815. struct dentry *d_xen = xen_init_debugfs();
  1816. if (d_xen == NULL)
  1817. return -ENOMEM;
  1818. d_mmu_debug = debugfs_create_dir("mmu", d_xen);
  1819. debugfs_create_u8("zero_stats", 0644, d_mmu_debug, &zero_stats);
  1820. debugfs_create_u32("pgd_update", 0444, d_mmu_debug, &mmu_stats.pgd_update);
  1821. debugfs_create_u32("pgd_update_pinned", 0444, d_mmu_debug,
  1822. &mmu_stats.pgd_update_pinned);
  1823. debugfs_create_u32("pgd_update_batched", 0444, d_mmu_debug,
  1824. &mmu_stats.pgd_update_pinned);
  1825. debugfs_create_u32("pud_update", 0444, d_mmu_debug, &mmu_stats.pud_update);
  1826. debugfs_create_u32("pud_update_pinned", 0444, d_mmu_debug,
  1827. &mmu_stats.pud_update_pinned);
  1828. debugfs_create_u32("pud_update_batched", 0444, d_mmu_debug,
  1829. &mmu_stats.pud_update_pinned);
  1830. debugfs_create_u32("pmd_update", 0444, d_mmu_debug, &mmu_stats.pmd_update);
  1831. debugfs_create_u32("pmd_update_pinned", 0444, d_mmu_debug,
  1832. &mmu_stats.pmd_update_pinned);
  1833. debugfs_create_u32("pmd_update_batched", 0444, d_mmu_debug,
  1834. &mmu_stats.pmd_update_pinned);
  1835. debugfs_create_u32("pte_update", 0444, d_mmu_debug, &mmu_stats.pte_update);
  1836. // debugfs_create_u32("pte_update_pinned", 0444, d_mmu_debug,
  1837. // &mmu_stats.pte_update_pinned);
  1838. debugfs_create_u32("pte_update_batched", 0444, d_mmu_debug,
  1839. &mmu_stats.pte_update_pinned);
  1840. debugfs_create_u32("mmu_update", 0444, d_mmu_debug, &mmu_stats.mmu_update);
  1841. debugfs_create_u32("mmu_update_extended", 0444, d_mmu_debug,
  1842. &mmu_stats.mmu_update_extended);
  1843. xen_debugfs_create_u32_array("mmu_update_histo", 0444, d_mmu_debug,
  1844. mmu_stats.mmu_update_histo, 20);
  1845. debugfs_create_u32("set_pte_at", 0444, d_mmu_debug, &mmu_stats.set_pte_at);
  1846. debugfs_create_u32("set_pte_at_batched", 0444, d_mmu_debug,
  1847. &mmu_stats.set_pte_at_batched);
  1848. debugfs_create_u32("set_pte_at_current", 0444, d_mmu_debug,
  1849. &mmu_stats.set_pte_at_current);
  1850. debugfs_create_u32("set_pte_at_kernel", 0444, d_mmu_debug,
  1851. &mmu_stats.set_pte_at_kernel);
  1852. debugfs_create_u32("prot_commit", 0444, d_mmu_debug, &mmu_stats.prot_commit);
  1853. debugfs_create_u32("prot_commit_batched", 0444, d_mmu_debug,
  1854. &mmu_stats.prot_commit_batched);
  1855. return 0;
  1856. }
  1857. fs_initcall(xen_mmu_debugfs);
  1858. #endif /* CONFIG_XEN_DEBUG_FS */