tlb_uv.c 44 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655
  1. /*
  2. * SGI UltraViolet TLB flush routines.
  3. *
  4. * (c) 2008-2010 Cliff Wickman <cpw@sgi.com>, SGI.
  5. *
  6. * This code is released under the GNU General Public License version 2 or
  7. * later.
  8. */
  9. #include <linux/seq_file.h>
  10. #include <linux/proc_fs.h>
  11. #include <linux/debugfs.h>
  12. #include <linux/kernel.h>
  13. #include <linux/slab.h>
  14. #include <asm/mmu_context.h>
  15. #include <asm/uv/uv.h>
  16. #include <asm/uv/uv_mmrs.h>
  17. #include <asm/uv/uv_hub.h>
  18. #include <asm/uv/uv_bau.h>
  19. #include <asm/apic.h>
  20. #include <asm/idle.h>
  21. #include <asm/tsc.h>
  22. #include <asm/irq_vectors.h>
  23. #include <asm/timer.h>
  24. /* timeouts in nanoseconds (indexed by UVH_AGING_PRESCALE_SEL urgency7 30:28) */
  25. static int timeout_base_ns[] = {
  26. 20,
  27. 160,
  28. 1280,
  29. 10240,
  30. 81920,
  31. 655360,
  32. 5242880,
  33. 167772160
  34. };
  35. static int timeout_us;
  36. static int nobau;
  37. static int baudisabled;
  38. static spinlock_t disable_lock;
  39. static cycles_t congested_cycles;
  40. /* tunables: */
  41. static int max_bau_concurrent = MAX_BAU_CONCURRENT;
  42. static int max_bau_concurrent_constant = MAX_BAU_CONCURRENT;
  43. static int plugged_delay = PLUGGED_DELAY;
  44. static int plugsb4reset = PLUGSB4RESET;
  45. static int timeoutsb4reset = TIMEOUTSB4RESET;
  46. static int ipi_reset_limit = IPI_RESET_LIMIT;
  47. static int complete_threshold = COMPLETE_THRESHOLD;
  48. static int congested_response_us = CONGESTED_RESPONSE_US;
  49. static int congested_reps = CONGESTED_REPS;
  50. static int congested_period = CONGESTED_PERIOD;
  51. static struct dentry *tunables_dir;
  52. static struct dentry *tunables_file;
  53. static int __init setup_nobau(char *arg)
  54. {
  55. nobau = 1;
  56. return 0;
  57. }
  58. early_param("nobau", setup_nobau);
  59. /* base pnode in this partition */
  60. static int uv_partition_base_pnode __read_mostly;
  61. /* position of pnode (which is nasid>>1): */
  62. static int uv_nshift __read_mostly;
  63. static unsigned long uv_mmask __read_mostly;
  64. static DEFINE_PER_CPU(struct ptc_stats, ptcstats);
  65. static DEFINE_PER_CPU(struct bau_control, bau_control);
  66. static DEFINE_PER_CPU(cpumask_var_t, uv_flush_tlb_mask);
  67. /*
  68. * Determine the first node on a uvhub. 'Nodes' are used for kernel
  69. * memory allocation.
  70. */
  71. static int __init uvhub_to_first_node(int uvhub)
  72. {
  73. int node, b;
  74. for_each_online_node(node) {
  75. b = uv_node_to_blade_id(node);
  76. if (uvhub == b)
  77. return node;
  78. }
  79. return -1;
  80. }
  81. /*
  82. * Determine the apicid of the first cpu on a uvhub.
  83. */
  84. static int __init uvhub_to_first_apicid(int uvhub)
  85. {
  86. int cpu;
  87. for_each_present_cpu(cpu)
  88. if (uvhub == uv_cpu_to_blade_id(cpu))
  89. return per_cpu(x86_cpu_to_apicid, cpu);
  90. return -1;
  91. }
  92. /*
  93. * Free a software acknowledge hardware resource by clearing its Pending
  94. * bit. This will return a reply to the sender.
  95. * If the message has timed out, a reply has already been sent by the
  96. * hardware but the resource has not been released. In that case our
  97. * clear of the Timeout bit (as well) will free the resource. No reply will
  98. * be sent (the hardware will only do one reply per message).
  99. */
  100. static inline void uv_reply_to_message(struct msg_desc *mdp,
  101. struct bau_control *bcp)
  102. {
  103. unsigned long dw;
  104. struct bau_payload_queue_entry *msg;
  105. msg = mdp->msg;
  106. if (!msg->canceled) {
  107. dw = (msg->sw_ack_vector << UV_SW_ACK_NPENDING) |
  108. msg->sw_ack_vector;
  109. uv_write_local_mmr(
  110. UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS, dw);
  111. }
  112. msg->replied_to = 1;
  113. msg->sw_ack_vector = 0;
  114. }
  115. /*
  116. * Process the receipt of a RETRY message
  117. */
  118. static inline void uv_bau_process_retry_msg(struct msg_desc *mdp,
  119. struct bau_control *bcp)
  120. {
  121. int i;
  122. int cancel_count = 0;
  123. int slot2;
  124. unsigned long msg_res;
  125. unsigned long mmr = 0;
  126. struct bau_payload_queue_entry *msg;
  127. struct bau_payload_queue_entry *msg2;
  128. struct ptc_stats *stat;
  129. msg = mdp->msg;
  130. stat = bcp->statp;
  131. stat->d_retries++;
  132. /*
  133. * cancel any message from msg+1 to the retry itself
  134. */
  135. for (msg2 = msg+1, i = 0; i < DEST_Q_SIZE; msg2++, i++) {
  136. if (msg2 > mdp->va_queue_last)
  137. msg2 = mdp->va_queue_first;
  138. if (msg2 == msg)
  139. break;
  140. /* same conditions for cancellation as uv_do_reset */
  141. if ((msg2->replied_to == 0) && (msg2->canceled == 0) &&
  142. (msg2->sw_ack_vector) && ((msg2->sw_ack_vector &
  143. msg->sw_ack_vector) == 0) &&
  144. (msg2->sending_cpu == msg->sending_cpu) &&
  145. (msg2->msg_type != MSG_NOOP)) {
  146. slot2 = msg2 - mdp->va_queue_first;
  147. mmr = uv_read_local_mmr
  148. (UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE);
  149. msg_res = msg2->sw_ack_vector;
  150. /*
  151. * This is a message retry; clear the resources held
  152. * by the previous message only if they timed out.
  153. * If it has not timed out we have an unexpected
  154. * situation to report.
  155. */
  156. if (mmr & (msg_res << UV_SW_ACK_NPENDING)) {
  157. /*
  158. * is the resource timed out?
  159. * make everyone ignore the cancelled message.
  160. */
  161. msg2->canceled = 1;
  162. stat->d_canceled++;
  163. cancel_count++;
  164. uv_write_local_mmr(
  165. UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS,
  166. (msg_res << UV_SW_ACK_NPENDING) |
  167. msg_res);
  168. }
  169. }
  170. }
  171. if (!cancel_count)
  172. stat->d_nocanceled++;
  173. }
  174. /*
  175. * Do all the things a cpu should do for a TLB shootdown message.
  176. * Other cpu's may come here at the same time for this message.
  177. */
  178. static void uv_bau_process_message(struct msg_desc *mdp,
  179. struct bau_control *bcp)
  180. {
  181. int msg_ack_count;
  182. short socket_ack_count = 0;
  183. struct ptc_stats *stat;
  184. struct bau_payload_queue_entry *msg;
  185. struct bau_control *smaster = bcp->socket_master;
  186. /*
  187. * This must be a normal message, or retry of a normal message
  188. */
  189. msg = mdp->msg;
  190. stat = bcp->statp;
  191. if (msg->address == TLB_FLUSH_ALL) {
  192. local_flush_tlb();
  193. stat->d_alltlb++;
  194. } else {
  195. __flush_tlb_one(msg->address);
  196. stat->d_onetlb++;
  197. }
  198. stat->d_requestee++;
  199. /*
  200. * One cpu on each uvhub has the additional job on a RETRY
  201. * of releasing the resource held by the message that is
  202. * being retried. That message is identified by sending
  203. * cpu number.
  204. */
  205. if (msg->msg_type == MSG_RETRY && bcp == bcp->uvhub_master)
  206. uv_bau_process_retry_msg(mdp, bcp);
  207. /*
  208. * This is a sw_ack message, so we have to reply to it.
  209. * Count each responding cpu on the socket. This avoids
  210. * pinging the count's cache line back and forth between
  211. * the sockets.
  212. */
  213. socket_ack_count = atomic_add_short_return(1, (struct atomic_short *)
  214. &smaster->socket_acknowledge_count[mdp->msg_slot]);
  215. if (socket_ack_count == bcp->cpus_in_socket) {
  216. /*
  217. * Both sockets dump their completed count total into
  218. * the message's count.
  219. */
  220. smaster->socket_acknowledge_count[mdp->msg_slot] = 0;
  221. msg_ack_count = atomic_add_short_return(socket_ack_count,
  222. (struct atomic_short *)&msg->acknowledge_count);
  223. if (msg_ack_count == bcp->cpus_in_uvhub) {
  224. /*
  225. * All cpus in uvhub saw it; reply
  226. */
  227. uv_reply_to_message(mdp, bcp);
  228. }
  229. }
  230. return;
  231. }
  232. /*
  233. * Determine the first cpu on a uvhub.
  234. */
  235. static int uvhub_to_first_cpu(int uvhub)
  236. {
  237. int cpu;
  238. for_each_present_cpu(cpu)
  239. if (uvhub == uv_cpu_to_blade_id(cpu))
  240. return cpu;
  241. return -1;
  242. }
  243. /*
  244. * Last resort when we get a large number of destination timeouts is
  245. * to clear resources held by a given cpu.
  246. * Do this with IPI so that all messages in the BAU message queue
  247. * can be identified by their nonzero sw_ack_vector field.
  248. *
  249. * This is entered for a single cpu on the uvhub.
  250. * The sender want's this uvhub to free a specific message's
  251. * sw_ack resources.
  252. */
  253. static void
  254. uv_do_reset(void *ptr)
  255. {
  256. int i;
  257. int slot;
  258. int count = 0;
  259. unsigned long mmr;
  260. unsigned long msg_res;
  261. struct bau_control *bcp;
  262. struct reset_args *rap;
  263. struct bau_payload_queue_entry *msg;
  264. struct ptc_stats *stat;
  265. bcp = &per_cpu(bau_control, smp_processor_id());
  266. rap = (struct reset_args *)ptr;
  267. stat = bcp->statp;
  268. stat->d_resets++;
  269. /*
  270. * We're looking for the given sender, and
  271. * will free its sw_ack resource.
  272. * If all cpu's finally responded after the timeout, its
  273. * message 'replied_to' was set.
  274. */
  275. for (msg = bcp->va_queue_first, i = 0; i < DEST_Q_SIZE; msg++, i++) {
  276. /* uv_do_reset: same conditions for cancellation as
  277. uv_bau_process_retry_msg() */
  278. if ((msg->replied_to == 0) &&
  279. (msg->canceled == 0) &&
  280. (msg->sending_cpu == rap->sender) &&
  281. (msg->sw_ack_vector) &&
  282. (msg->msg_type != MSG_NOOP)) {
  283. /*
  284. * make everyone else ignore this message
  285. */
  286. msg->canceled = 1;
  287. slot = msg - bcp->va_queue_first;
  288. count++;
  289. /*
  290. * only reset the resource if it is still pending
  291. */
  292. mmr = uv_read_local_mmr
  293. (UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE);
  294. msg_res = msg->sw_ack_vector;
  295. if (mmr & msg_res) {
  296. stat->d_rcanceled++;
  297. uv_write_local_mmr(
  298. UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS,
  299. (msg_res << UV_SW_ACK_NPENDING) |
  300. msg_res);
  301. }
  302. }
  303. }
  304. return;
  305. }
  306. /*
  307. * Use IPI to get all target uvhubs to release resources held by
  308. * a given sending cpu number.
  309. */
  310. static void uv_reset_with_ipi(struct bau_target_uvhubmask *distribution,
  311. int sender)
  312. {
  313. int uvhub;
  314. int cpu;
  315. cpumask_t mask;
  316. struct reset_args reset_args;
  317. reset_args.sender = sender;
  318. cpus_clear(mask);
  319. /* find a single cpu for each uvhub in this distribution mask */
  320. for (uvhub = 0;
  321. uvhub < sizeof(struct bau_target_uvhubmask) * BITSPERBYTE;
  322. uvhub++) {
  323. if (!bau_uvhub_isset(uvhub, distribution))
  324. continue;
  325. /* find a cpu for this uvhub */
  326. cpu = uvhub_to_first_cpu(uvhub);
  327. cpu_set(cpu, mask);
  328. }
  329. /* IPI all cpus; Preemption is already disabled */
  330. smp_call_function_many(&mask, uv_do_reset, (void *)&reset_args, 1);
  331. return;
  332. }
  333. static inline unsigned long
  334. cycles_2_us(unsigned long long cyc)
  335. {
  336. unsigned long long ns;
  337. unsigned long us;
  338. ns = (cyc * per_cpu(cyc2ns, smp_processor_id()))
  339. >> CYC2NS_SCALE_FACTOR;
  340. us = ns / 1000;
  341. return us;
  342. }
  343. /*
  344. * wait for all cpus on this hub to finish their sends and go quiet
  345. * leaves uvhub_quiesce set so that no new broadcasts are started by
  346. * bau_flush_send_and_wait()
  347. */
  348. static inline void
  349. quiesce_local_uvhub(struct bau_control *hmaster)
  350. {
  351. atomic_add_short_return(1, (struct atomic_short *)
  352. &hmaster->uvhub_quiesce);
  353. }
  354. /*
  355. * mark this quiet-requestor as done
  356. */
  357. static inline void
  358. end_uvhub_quiesce(struct bau_control *hmaster)
  359. {
  360. atomic_add_short_return(-1, (struct atomic_short *)
  361. &hmaster->uvhub_quiesce);
  362. }
  363. /*
  364. * Wait for completion of a broadcast software ack message
  365. * return COMPLETE, RETRY(PLUGGED or TIMEOUT) or GIVEUP
  366. */
  367. static int uv_wait_completion(struct bau_desc *bau_desc,
  368. unsigned long mmr_offset, int right_shift, int this_cpu,
  369. struct bau_control *bcp, struct bau_control *smaster, long try)
  370. {
  371. unsigned long descriptor_status;
  372. cycles_t ttime;
  373. struct ptc_stats *stat = bcp->statp;
  374. struct bau_control *hmaster;
  375. hmaster = bcp->uvhub_master;
  376. /* spin on the status MMR, waiting for it to go idle */
  377. while ((descriptor_status = (((unsigned long)
  378. uv_read_local_mmr(mmr_offset) >>
  379. right_shift) & UV_ACT_STATUS_MASK)) !=
  380. DESC_STATUS_IDLE) {
  381. /*
  382. * Our software ack messages may be blocked because there are
  383. * no swack resources available. As long as none of them
  384. * has timed out hardware will NACK our message and its
  385. * state will stay IDLE.
  386. */
  387. if (descriptor_status == DESC_STATUS_SOURCE_TIMEOUT) {
  388. stat->s_stimeout++;
  389. return FLUSH_GIVEUP;
  390. } else if (descriptor_status ==
  391. DESC_STATUS_DESTINATION_TIMEOUT) {
  392. stat->s_dtimeout++;
  393. ttime = get_cycles();
  394. /*
  395. * Our retries may be blocked by all destination
  396. * swack resources being consumed, and a timeout
  397. * pending. In that case hardware returns the
  398. * ERROR that looks like a destination timeout.
  399. */
  400. if (cycles_2_us(ttime - bcp->send_message) <
  401. timeout_us) {
  402. bcp->conseccompletes = 0;
  403. return FLUSH_RETRY_PLUGGED;
  404. }
  405. bcp->conseccompletes = 0;
  406. return FLUSH_RETRY_TIMEOUT;
  407. } else {
  408. /*
  409. * descriptor_status is still BUSY
  410. */
  411. cpu_relax();
  412. }
  413. }
  414. bcp->conseccompletes++;
  415. return FLUSH_COMPLETE;
  416. }
  417. static inline cycles_t
  418. sec_2_cycles(unsigned long sec)
  419. {
  420. unsigned long ns;
  421. cycles_t cyc;
  422. ns = sec * 1000000000;
  423. cyc = (ns << CYC2NS_SCALE_FACTOR)/(per_cpu(cyc2ns, smp_processor_id()));
  424. return cyc;
  425. }
  426. /*
  427. * conditionally add 1 to *v, unless *v is >= u
  428. * return 0 if we cannot add 1 to *v because it is >= u
  429. * return 1 if we can add 1 to *v because it is < u
  430. * the add is atomic
  431. *
  432. * This is close to atomic_add_unless(), but this allows the 'u' value
  433. * to be lowered below the current 'v'. atomic_add_unless can only stop
  434. * on equal.
  435. */
  436. static inline int atomic_inc_unless_ge(spinlock_t *lock, atomic_t *v, int u)
  437. {
  438. spin_lock(lock);
  439. if (atomic_read(v) >= u) {
  440. spin_unlock(lock);
  441. return 0;
  442. }
  443. atomic_inc(v);
  444. spin_unlock(lock);
  445. return 1;
  446. }
  447. /*
  448. * Our retries are blocked by all destination swack resources being
  449. * in use, and a timeout is pending. In that case hardware immediately
  450. * returns the ERROR that looks like a destination timeout.
  451. */
  452. static void
  453. destination_plugged(struct bau_desc *bau_desc, struct bau_control *bcp,
  454. struct bau_control *hmaster, struct ptc_stats *stat)
  455. {
  456. udelay(bcp->plugged_delay);
  457. bcp->plugged_tries++;
  458. if (bcp->plugged_tries >= bcp->plugsb4reset) {
  459. bcp->plugged_tries = 0;
  460. quiesce_local_uvhub(hmaster);
  461. spin_lock(&hmaster->queue_lock);
  462. uv_reset_with_ipi(&bau_desc->distribution, bcp->cpu);
  463. spin_unlock(&hmaster->queue_lock);
  464. end_uvhub_quiesce(hmaster);
  465. bcp->ipi_attempts++;
  466. stat->s_resets_plug++;
  467. }
  468. }
  469. static void
  470. destination_timeout(struct bau_desc *bau_desc, struct bau_control *bcp,
  471. struct bau_control *hmaster, struct ptc_stats *stat)
  472. {
  473. hmaster->max_bau_concurrent = 1;
  474. bcp->timeout_tries++;
  475. if (bcp->timeout_tries >= bcp->timeoutsb4reset) {
  476. bcp->timeout_tries = 0;
  477. quiesce_local_uvhub(hmaster);
  478. spin_lock(&hmaster->queue_lock);
  479. uv_reset_with_ipi(&bau_desc->distribution, bcp->cpu);
  480. spin_unlock(&hmaster->queue_lock);
  481. end_uvhub_quiesce(hmaster);
  482. bcp->ipi_attempts++;
  483. stat->s_resets_timeout++;
  484. }
  485. }
  486. /*
  487. * Completions are taking a very long time due to a congested numalink
  488. * network.
  489. */
  490. static void
  491. disable_for_congestion(struct bau_control *bcp, struct ptc_stats *stat)
  492. {
  493. int tcpu;
  494. struct bau_control *tbcp;
  495. /* let only one cpu do this disabling */
  496. spin_lock(&disable_lock);
  497. if (!baudisabled && bcp->period_requests &&
  498. ((bcp->period_time / bcp->period_requests) > congested_cycles)) {
  499. /* it becomes this cpu's job to turn on the use of the
  500. BAU again */
  501. baudisabled = 1;
  502. bcp->set_bau_off = 1;
  503. bcp->set_bau_on_time = get_cycles() +
  504. sec_2_cycles(bcp->congested_period);
  505. stat->s_bau_disabled++;
  506. for_each_present_cpu(tcpu) {
  507. tbcp = &per_cpu(bau_control, tcpu);
  508. tbcp->baudisabled = 1;
  509. }
  510. }
  511. spin_unlock(&disable_lock);
  512. }
  513. /**
  514. * uv_flush_send_and_wait
  515. *
  516. * Send a broadcast and wait for it to complete.
  517. *
  518. * The flush_mask contains the cpus the broadcast is to be sent to including
  519. * cpus that are on the local uvhub.
  520. *
  521. * Returns 0 if all flushing represented in the mask was done.
  522. * Returns 1 if it gives up entirely and the original cpu mask is to be
  523. * returned to the kernel.
  524. */
  525. int uv_flush_send_and_wait(struct bau_desc *bau_desc,
  526. struct cpumask *flush_mask, struct bau_control *bcp)
  527. {
  528. int right_shift;
  529. int completion_status = 0;
  530. int seq_number = 0;
  531. long try = 0;
  532. int cpu = bcp->uvhub_cpu;
  533. int this_cpu = bcp->cpu;
  534. unsigned long mmr_offset;
  535. unsigned long index;
  536. cycles_t time1;
  537. cycles_t time2;
  538. cycles_t elapsed;
  539. struct ptc_stats *stat = bcp->statp;
  540. struct bau_control *smaster = bcp->socket_master;
  541. struct bau_control *hmaster = bcp->uvhub_master;
  542. if (!atomic_inc_unless_ge(&hmaster->uvhub_lock,
  543. &hmaster->active_descriptor_count,
  544. hmaster->max_bau_concurrent)) {
  545. stat->s_throttles++;
  546. do {
  547. cpu_relax();
  548. } while (!atomic_inc_unless_ge(&hmaster->uvhub_lock,
  549. &hmaster->active_descriptor_count,
  550. hmaster->max_bau_concurrent));
  551. }
  552. while (hmaster->uvhub_quiesce)
  553. cpu_relax();
  554. if (cpu < UV_CPUS_PER_ACT_STATUS) {
  555. mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
  556. right_shift = cpu * UV_ACT_STATUS_SIZE;
  557. } else {
  558. mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_1;
  559. right_shift =
  560. ((cpu - UV_CPUS_PER_ACT_STATUS) * UV_ACT_STATUS_SIZE);
  561. }
  562. time1 = get_cycles();
  563. do {
  564. if (try == 0) {
  565. bau_desc->header.msg_type = MSG_REGULAR;
  566. seq_number = bcp->message_number++;
  567. } else {
  568. bau_desc->header.msg_type = MSG_RETRY;
  569. stat->s_retry_messages++;
  570. }
  571. bau_desc->header.sequence = seq_number;
  572. index = (1UL << UVH_LB_BAU_SB_ACTIVATION_CONTROL_PUSH_SHFT) |
  573. bcp->uvhub_cpu;
  574. bcp->send_message = get_cycles();
  575. uv_write_local_mmr(UVH_LB_BAU_SB_ACTIVATION_CONTROL, index);
  576. try++;
  577. completion_status = uv_wait_completion(bau_desc, mmr_offset,
  578. right_shift, this_cpu, bcp, smaster, try);
  579. if (completion_status == FLUSH_RETRY_PLUGGED) {
  580. destination_plugged(bau_desc, bcp, hmaster, stat);
  581. } else if (completion_status == FLUSH_RETRY_TIMEOUT) {
  582. destination_timeout(bau_desc, bcp, hmaster, stat);
  583. }
  584. if (bcp->ipi_attempts >= bcp->ipi_reset_limit) {
  585. bcp->ipi_attempts = 0;
  586. completion_status = FLUSH_GIVEUP;
  587. break;
  588. }
  589. cpu_relax();
  590. } while ((completion_status == FLUSH_RETRY_PLUGGED) ||
  591. (completion_status == FLUSH_RETRY_TIMEOUT));
  592. time2 = get_cycles();
  593. bcp->plugged_tries = 0;
  594. bcp->timeout_tries = 0;
  595. if ((completion_status == FLUSH_COMPLETE) &&
  596. (bcp->conseccompletes > bcp->complete_threshold) &&
  597. (hmaster->max_bau_concurrent <
  598. hmaster->max_bau_concurrent_constant))
  599. hmaster->max_bau_concurrent++;
  600. while (hmaster->uvhub_quiesce)
  601. cpu_relax();
  602. atomic_dec(&hmaster->active_descriptor_count);
  603. if (time2 > time1) {
  604. elapsed = time2 - time1;
  605. stat->s_time += elapsed;
  606. if ((completion_status == FLUSH_COMPLETE) && (try == 1)) {
  607. bcp->period_requests++;
  608. bcp->period_time += elapsed;
  609. if ((elapsed > congested_cycles) &&
  610. (bcp->period_requests > bcp->congested_reps)) {
  611. disable_for_congestion(bcp, stat);
  612. }
  613. }
  614. } else
  615. stat->s_requestor--;
  616. if (completion_status == FLUSH_COMPLETE && try > 1)
  617. stat->s_retriesok++;
  618. else if (completion_status == FLUSH_GIVEUP) {
  619. stat->s_giveup++;
  620. return 1;
  621. }
  622. return 0;
  623. }
  624. /**
  625. * uv_flush_tlb_others - globally purge translation cache of a virtual
  626. * address or all TLB's
  627. * @cpumask: mask of all cpu's in which the address is to be removed
  628. * @mm: mm_struct containing virtual address range
  629. * @va: virtual address to be removed (or TLB_FLUSH_ALL for all TLB's on cpu)
  630. * @cpu: the current cpu
  631. *
  632. * This is the entry point for initiating any UV global TLB shootdown.
  633. *
  634. * Purges the translation caches of all specified processors of the given
  635. * virtual address, or purges all TLB's on specified processors.
  636. *
  637. * The caller has derived the cpumask from the mm_struct. This function
  638. * is called only if there are bits set in the mask. (e.g. flush_tlb_page())
  639. *
  640. * The cpumask is converted into a uvhubmask of the uvhubs containing
  641. * those cpus.
  642. *
  643. * Note that this function should be called with preemption disabled.
  644. *
  645. * Returns NULL if all remote flushing was done.
  646. * Returns pointer to cpumask if some remote flushing remains to be
  647. * done. The returned pointer is valid till preemption is re-enabled.
  648. */
  649. const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
  650. struct mm_struct *mm,
  651. unsigned long va, unsigned int cpu)
  652. {
  653. int tcpu;
  654. int uvhub;
  655. int locals = 0;
  656. int remotes = 0;
  657. int hubs = 0;
  658. struct bau_desc *bau_desc;
  659. struct cpumask *flush_mask;
  660. struct ptc_stats *stat;
  661. struct bau_control *bcp;
  662. struct bau_control *tbcp;
  663. /* kernel was booted 'nobau' */
  664. if (nobau)
  665. return cpumask;
  666. bcp = &per_cpu(bau_control, cpu);
  667. stat = bcp->statp;
  668. /* bau was disabled due to slow response */
  669. if (bcp->baudisabled) {
  670. /* the cpu that disabled it must re-enable it */
  671. if (bcp->set_bau_off) {
  672. if (get_cycles() >= bcp->set_bau_on_time) {
  673. stat->s_bau_reenabled++;
  674. baudisabled = 0;
  675. for_each_present_cpu(tcpu) {
  676. tbcp = &per_cpu(bau_control, tcpu);
  677. tbcp->baudisabled = 0;
  678. tbcp->period_requests = 0;
  679. tbcp->period_time = 0;
  680. }
  681. }
  682. }
  683. return cpumask;
  684. }
  685. /*
  686. * Each sending cpu has a per-cpu mask which it fills from the caller's
  687. * cpu mask. All cpus are converted to uvhubs and copied to the
  688. * activation descriptor.
  689. */
  690. flush_mask = (struct cpumask *)per_cpu(uv_flush_tlb_mask, cpu);
  691. /* don't actually do a shootdown of the local cpu */
  692. cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu));
  693. if (cpu_isset(cpu, *cpumask))
  694. stat->s_ntargself++;
  695. bau_desc = bcp->descriptor_base;
  696. bau_desc += UV_ITEMS_PER_DESCRIPTOR * bcp->uvhub_cpu;
  697. bau_uvhubs_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE);
  698. /* cpu statistics */
  699. for_each_cpu(tcpu, flush_mask) {
  700. uvhub = uv_cpu_to_blade_id(tcpu);
  701. bau_uvhub_set(uvhub, &bau_desc->distribution);
  702. if (uvhub == bcp->uvhub)
  703. locals++;
  704. else
  705. remotes++;
  706. }
  707. if ((locals + remotes) == 0)
  708. return NULL;
  709. stat->s_requestor++;
  710. stat->s_ntargcpu += remotes + locals;
  711. stat->s_ntargremotes += remotes;
  712. stat->s_ntarglocals += locals;
  713. remotes = bau_uvhub_weight(&bau_desc->distribution);
  714. /* uvhub statistics */
  715. hubs = bau_uvhub_weight(&bau_desc->distribution);
  716. if (locals) {
  717. stat->s_ntarglocaluvhub++;
  718. stat->s_ntargremoteuvhub += (hubs - 1);
  719. } else
  720. stat->s_ntargremoteuvhub += hubs;
  721. stat->s_ntarguvhub += hubs;
  722. if (hubs >= 16)
  723. stat->s_ntarguvhub16++;
  724. else if (hubs >= 8)
  725. stat->s_ntarguvhub8++;
  726. else if (hubs >= 4)
  727. stat->s_ntarguvhub4++;
  728. else if (hubs >= 2)
  729. stat->s_ntarguvhub2++;
  730. else
  731. stat->s_ntarguvhub1++;
  732. bau_desc->payload.address = va;
  733. bau_desc->payload.sending_cpu = cpu;
  734. /*
  735. * uv_flush_send_and_wait returns 0 if all cpu's were messaged,
  736. * or 1 if it gave up and the original cpumask should be returned.
  737. */
  738. if (!uv_flush_send_and_wait(bau_desc, flush_mask, bcp))
  739. return NULL;
  740. else
  741. return cpumask;
  742. }
  743. /*
  744. * The BAU message interrupt comes here. (registered by set_intr_gate)
  745. * See entry_64.S
  746. *
  747. * We received a broadcast assist message.
  748. *
  749. * Interrupts are disabled; this interrupt could represent
  750. * the receipt of several messages.
  751. *
  752. * All cores/threads on this hub get this interrupt.
  753. * The last one to see it does the software ack.
  754. * (the resource will not be freed until noninterruptable cpus see this
  755. * interrupt; hardware may timeout the s/w ack and reply ERROR)
  756. */
  757. void uv_bau_message_interrupt(struct pt_regs *regs)
  758. {
  759. int count = 0;
  760. cycles_t time_start;
  761. struct bau_payload_queue_entry *msg;
  762. struct bau_control *bcp;
  763. struct ptc_stats *stat;
  764. struct msg_desc msgdesc;
  765. time_start = get_cycles();
  766. bcp = &per_cpu(bau_control, smp_processor_id());
  767. stat = bcp->statp;
  768. msgdesc.va_queue_first = bcp->va_queue_first;
  769. msgdesc.va_queue_last = bcp->va_queue_last;
  770. msg = bcp->bau_msg_head;
  771. while (msg->sw_ack_vector) {
  772. count++;
  773. msgdesc.msg_slot = msg - msgdesc.va_queue_first;
  774. msgdesc.sw_ack_slot = ffs(msg->sw_ack_vector) - 1;
  775. msgdesc.msg = msg;
  776. uv_bau_process_message(&msgdesc, bcp);
  777. msg++;
  778. if (msg > msgdesc.va_queue_last)
  779. msg = msgdesc.va_queue_first;
  780. bcp->bau_msg_head = msg;
  781. }
  782. stat->d_time += (get_cycles() - time_start);
  783. if (!count)
  784. stat->d_nomsg++;
  785. else if (count > 1)
  786. stat->d_multmsg++;
  787. ack_APIC_irq();
  788. }
  789. /*
  790. * uv_enable_timeouts
  791. *
  792. * Each target uvhub (i.e. a uvhub that has no cpu's) needs to have
  793. * shootdown message timeouts enabled. The timeout does not cause
  794. * an interrupt, but causes an error message to be returned to
  795. * the sender.
  796. */
  797. static void uv_enable_timeouts(void)
  798. {
  799. int uvhub;
  800. int nuvhubs;
  801. int pnode;
  802. unsigned long mmr_image;
  803. nuvhubs = uv_num_possible_blades();
  804. for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
  805. if (!uv_blade_nr_possible_cpus(uvhub))
  806. continue;
  807. pnode = uv_blade_to_pnode(uvhub);
  808. mmr_image =
  809. uv_read_global_mmr64(pnode, UVH_LB_BAU_MISC_CONTROL);
  810. /*
  811. * Set the timeout period and then lock it in, in three
  812. * steps; captures and locks in the period.
  813. *
  814. * To program the period, the SOFT_ACK_MODE must be off.
  815. */
  816. mmr_image &= ~((unsigned long)1 <<
  817. UVH_LB_BAU_MISC_CONTROL_ENABLE_INTD_SOFT_ACK_MODE_SHFT);
  818. uv_write_global_mmr64
  819. (pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
  820. /*
  821. * Set the 4-bit period.
  822. */
  823. mmr_image &= ~((unsigned long)0xf <<
  824. UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHFT);
  825. mmr_image |= (UV_INTD_SOFT_ACK_TIMEOUT_PERIOD <<
  826. UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHFT);
  827. uv_write_global_mmr64
  828. (pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
  829. /*
  830. * Subsequent reversals of the timebase bit (3) cause an
  831. * immediate timeout of one or all INTD resources as
  832. * indicated in bits 2:0 (7 causes all of them to timeout).
  833. */
  834. mmr_image |= ((unsigned long)1 <<
  835. UVH_LB_BAU_MISC_CONTROL_ENABLE_INTD_SOFT_ACK_MODE_SHFT);
  836. uv_write_global_mmr64
  837. (pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
  838. }
  839. }
  840. static void *uv_ptc_seq_start(struct seq_file *file, loff_t *offset)
  841. {
  842. if (*offset < num_possible_cpus())
  843. return offset;
  844. return NULL;
  845. }
  846. static void *uv_ptc_seq_next(struct seq_file *file, void *data, loff_t *offset)
  847. {
  848. (*offset)++;
  849. if (*offset < num_possible_cpus())
  850. return offset;
  851. return NULL;
  852. }
  853. static void uv_ptc_seq_stop(struct seq_file *file, void *data)
  854. {
  855. }
  856. static inline unsigned long long
  857. microsec_2_cycles(unsigned long microsec)
  858. {
  859. unsigned long ns;
  860. unsigned long long cyc;
  861. ns = microsec * 1000;
  862. cyc = (ns << CYC2NS_SCALE_FACTOR)/(per_cpu(cyc2ns, smp_processor_id()));
  863. return cyc;
  864. }
  865. /*
  866. * Display the statistics thru /proc.
  867. * 'data' points to the cpu number
  868. */
  869. static int uv_ptc_seq_show(struct seq_file *file, void *data)
  870. {
  871. struct ptc_stats *stat;
  872. int cpu;
  873. cpu = *(loff_t *)data;
  874. if (!cpu) {
  875. seq_printf(file,
  876. "# cpu sent stime self locals remotes ncpus localhub ");
  877. seq_printf(file,
  878. "remotehub numuvhubs numuvhubs16 numuvhubs8 ");
  879. seq_printf(file,
  880. "numuvhubs4 numuvhubs2 numuvhubs1 dto ");
  881. seq_printf(file,
  882. "retries rok resetp resett giveup sto bz throt ");
  883. seq_printf(file,
  884. "sw_ack recv rtime all ");
  885. seq_printf(file,
  886. "one mult none retry canc nocan reset rcan ");
  887. seq_printf(file,
  888. "disable enable\n");
  889. }
  890. if (cpu < num_possible_cpus() && cpu_online(cpu)) {
  891. stat = &per_cpu(ptcstats, cpu);
  892. /* source side statistics */
  893. seq_printf(file,
  894. "cpu %d %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
  895. cpu, stat->s_requestor, cycles_2_us(stat->s_time),
  896. stat->s_ntargself, stat->s_ntarglocals,
  897. stat->s_ntargremotes, stat->s_ntargcpu,
  898. stat->s_ntarglocaluvhub, stat->s_ntargremoteuvhub,
  899. stat->s_ntarguvhub, stat->s_ntarguvhub16);
  900. seq_printf(file, "%ld %ld %ld %ld %ld ",
  901. stat->s_ntarguvhub8, stat->s_ntarguvhub4,
  902. stat->s_ntarguvhub2, stat->s_ntarguvhub1,
  903. stat->s_dtimeout);
  904. seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld ",
  905. stat->s_retry_messages, stat->s_retriesok,
  906. stat->s_resets_plug, stat->s_resets_timeout,
  907. stat->s_giveup, stat->s_stimeout,
  908. stat->s_busy, stat->s_throttles);
  909. /* destination side statistics */
  910. seq_printf(file,
  911. "%lx %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
  912. uv_read_global_mmr64(uv_cpu_to_pnode(cpu),
  913. UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE),
  914. stat->d_requestee, cycles_2_us(stat->d_time),
  915. stat->d_alltlb, stat->d_onetlb, stat->d_multmsg,
  916. stat->d_nomsg, stat->d_retries, stat->d_canceled,
  917. stat->d_nocanceled, stat->d_resets,
  918. stat->d_rcanceled);
  919. seq_printf(file, "%ld %ld\n",
  920. stat->s_bau_disabled, stat->s_bau_reenabled);
  921. }
  922. return 0;
  923. }
  924. /*
  925. * Display the tunables thru debugfs
  926. */
  927. static ssize_t tunables_read(struct file *file, char __user *userbuf,
  928. size_t count, loff_t *ppos)
  929. {
  930. char buf[300];
  931. int ret;
  932. ret = snprintf(buf, 300, "%s %s %s\n%d %d %d %d %d %d %d %d %d\n",
  933. "max_bau_concurrent plugged_delay plugsb4reset",
  934. "timeoutsb4reset ipi_reset_limit complete_threshold",
  935. "congested_response_us congested_reps congested_period",
  936. max_bau_concurrent, plugged_delay, plugsb4reset,
  937. timeoutsb4reset, ipi_reset_limit, complete_threshold,
  938. congested_response_us, congested_reps, congested_period);
  939. return simple_read_from_buffer(userbuf, count, ppos, buf, ret);
  940. }
  941. /*
  942. * -1: resetf the statistics
  943. * 0: display meaning of the statistics
  944. */
  945. static ssize_t uv_ptc_proc_write(struct file *file, const char __user *user,
  946. size_t count, loff_t *data)
  947. {
  948. int cpu;
  949. long input_arg;
  950. char optstr[64];
  951. struct ptc_stats *stat;
  952. if (count == 0 || count > sizeof(optstr))
  953. return -EINVAL;
  954. if (copy_from_user(optstr, user, count))
  955. return -EFAULT;
  956. optstr[count - 1] = '\0';
  957. if (strict_strtol(optstr, 10, &input_arg) < 0) {
  958. printk(KERN_DEBUG "%s is invalid\n", optstr);
  959. return -EINVAL;
  960. }
  961. if (input_arg == 0) {
  962. printk(KERN_DEBUG "# cpu: cpu number\n");
  963. printk(KERN_DEBUG "Sender statistics:\n");
  964. printk(KERN_DEBUG
  965. "sent: number of shootdown messages sent\n");
  966. printk(KERN_DEBUG
  967. "stime: time spent sending messages\n");
  968. printk(KERN_DEBUG
  969. "numuvhubs: number of hubs targeted with shootdown\n");
  970. printk(KERN_DEBUG
  971. "numuvhubs16: number times 16 or more hubs targeted\n");
  972. printk(KERN_DEBUG
  973. "numuvhubs8: number times 8 or more hubs targeted\n");
  974. printk(KERN_DEBUG
  975. "numuvhubs4: number times 4 or more hubs targeted\n");
  976. printk(KERN_DEBUG
  977. "numuvhubs2: number times 2 or more hubs targeted\n");
  978. printk(KERN_DEBUG
  979. "numuvhubs1: number times 1 hub targeted\n");
  980. printk(KERN_DEBUG
  981. "numcpus: number of cpus targeted with shootdown\n");
  982. printk(KERN_DEBUG
  983. "dto: number of destination timeouts\n");
  984. printk(KERN_DEBUG
  985. "retries: destination timeout retries sent\n");
  986. printk(KERN_DEBUG
  987. "rok: : destination timeouts successfully retried\n");
  988. printk(KERN_DEBUG
  989. "resetp: ipi-style resource resets for plugs\n");
  990. printk(KERN_DEBUG
  991. "resett: ipi-style resource resets for timeouts\n");
  992. printk(KERN_DEBUG
  993. "giveup: fall-backs to ipi-style shootdowns\n");
  994. printk(KERN_DEBUG
  995. "sto: number of source timeouts\n");
  996. printk(KERN_DEBUG
  997. "bz: number of stay-busy's\n");
  998. printk(KERN_DEBUG
  999. "throt: number times spun in throttle\n");
  1000. printk(KERN_DEBUG "Destination side statistics:\n");
  1001. printk(KERN_DEBUG
  1002. "sw_ack: image of UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE\n");
  1003. printk(KERN_DEBUG
  1004. "recv: shootdown messages received\n");
  1005. printk(KERN_DEBUG
  1006. "rtime: time spent processing messages\n");
  1007. printk(KERN_DEBUG
  1008. "all: shootdown all-tlb messages\n");
  1009. printk(KERN_DEBUG
  1010. "one: shootdown one-tlb messages\n");
  1011. printk(KERN_DEBUG
  1012. "mult: interrupts that found multiple messages\n");
  1013. printk(KERN_DEBUG
  1014. "none: interrupts that found no messages\n");
  1015. printk(KERN_DEBUG
  1016. "retry: number of retry messages processed\n");
  1017. printk(KERN_DEBUG
  1018. "canc: number messages canceled by retries\n");
  1019. printk(KERN_DEBUG
  1020. "nocan: number retries that found nothing to cancel\n");
  1021. printk(KERN_DEBUG
  1022. "reset: number of ipi-style reset requests processed\n");
  1023. printk(KERN_DEBUG
  1024. "rcan: number messages canceled by reset requests\n");
  1025. printk(KERN_DEBUG
  1026. "disable: number times use of the BAU was disabled\n");
  1027. printk(KERN_DEBUG
  1028. "enable: number times use of the BAU was re-enabled\n");
  1029. } else if (input_arg == -1) {
  1030. for_each_present_cpu(cpu) {
  1031. stat = &per_cpu(ptcstats, cpu);
  1032. memset(stat, 0, sizeof(struct ptc_stats));
  1033. }
  1034. }
  1035. return count;
  1036. }
  1037. static int local_atoi(const char *name)
  1038. {
  1039. int val = 0;
  1040. for (;; name++) {
  1041. switch (*name) {
  1042. case '0' ... '9':
  1043. val = 10*val+(*name-'0');
  1044. break;
  1045. default:
  1046. return val;
  1047. }
  1048. }
  1049. }
  1050. /*
  1051. * set the tunables
  1052. * 0 values reset them to defaults
  1053. */
  1054. static ssize_t tunables_write(struct file *file, const char __user *user,
  1055. size_t count, loff_t *data)
  1056. {
  1057. int cpu;
  1058. int cnt = 0;
  1059. int val;
  1060. char *p;
  1061. char *q;
  1062. char instr[64];
  1063. struct bau_control *bcp;
  1064. if (count == 0 || count > sizeof(instr)-1)
  1065. return -EINVAL;
  1066. if (copy_from_user(instr, user, count))
  1067. return -EFAULT;
  1068. instr[count] = '\0';
  1069. /* count the fields */
  1070. p = instr + strspn(instr, WHITESPACE);
  1071. q = p;
  1072. for (; *p; p = q + strspn(q, WHITESPACE)) {
  1073. q = p + strcspn(p, WHITESPACE);
  1074. cnt++;
  1075. if (q == p)
  1076. break;
  1077. }
  1078. if (cnt != 9) {
  1079. printk(KERN_INFO "bau tunable error: should be 9 numbers\n");
  1080. return -EINVAL;
  1081. }
  1082. p = instr + strspn(instr, WHITESPACE);
  1083. q = p;
  1084. for (cnt = 0; *p; p = q + strspn(q, WHITESPACE), cnt++) {
  1085. q = p + strcspn(p, WHITESPACE);
  1086. val = local_atoi(p);
  1087. switch (cnt) {
  1088. case 0:
  1089. if (val == 0) {
  1090. max_bau_concurrent = MAX_BAU_CONCURRENT;
  1091. max_bau_concurrent_constant =
  1092. MAX_BAU_CONCURRENT;
  1093. continue;
  1094. }
  1095. bcp = &per_cpu(bau_control, smp_processor_id());
  1096. if (val < 1 || val > bcp->cpus_in_uvhub) {
  1097. printk(KERN_DEBUG
  1098. "Error: BAU max concurrent %d is invalid\n",
  1099. val);
  1100. return -EINVAL;
  1101. }
  1102. max_bau_concurrent = val;
  1103. max_bau_concurrent_constant = val;
  1104. continue;
  1105. case 1:
  1106. if (val == 0)
  1107. plugged_delay = PLUGGED_DELAY;
  1108. else
  1109. plugged_delay = val;
  1110. continue;
  1111. case 2:
  1112. if (val == 0)
  1113. plugsb4reset = PLUGSB4RESET;
  1114. else
  1115. plugsb4reset = val;
  1116. continue;
  1117. case 3:
  1118. if (val == 0)
  1119. timeoutsb4reset = TIMEOUTSB4RESET;
  1120. else
  1121. timeoutsb4reset = val;
  1122. continue;
  1123. case 4:
  1124. if (val == 0)
  1125. ipi_reset_limit = IPI_RESET_LIMIT;
  1126. else
  1127. ipi_reset_limit = val;
  1128. continue;
  1129. case 5:
  1130. if (val == 0)
  1131. complete_threshold = COMPLETE_THRESHOLD;
  1132. else
  1133. complete_threshold = val;
  1134. continue;
  1135. case 6:
  1136. if (val == 0)
  1137. congested_response_us = CONGESTED_RESPONSE_US;
  1138. else
  1139. congested_response_us = val;
  1140. continue;
  1141. case 7:
  1142. if (val == 0)
  1143. congested_reps = CONGESTED_REPS;
  1144. else
  1145. congested_reps = val;
  1146. continue;
  1147. case 8:
  1148. if (val == 0)
  1149. congested_period = CONGESTED_PERIOD;
  1150. else
  1151. congested_period = val;
  1152. continue;
  1153. }
  1154. if (q == p)
  1155. break;
  1156. }
  1157. for_each_present_cpu(cpu) {
  1158. bcp = &per_cpu(bau_control, cpu);
  1159. bcp->max_bau_concurrent = max_bau_concurrent;
  1160. bcp->max_bau_concurrent_constant = max_bau_concurrent;
  1161. bcp->plugged_delay = plugged_delay;
  1162. bcp->plugsb4reset = plugsb4reset;
  1163. bcp->timeoutsb4reset = timeoutsb4reset;
  1164. bcp->ipi_reset_limit = ipi_reset_limit;
  1165. bcp->complete_threshold = complete_threshold;
  1166. bcp->congested_response_us = congested_response_us;
  1167. bcp->congested_reps = congested_reps;
  1168. bcp->congested_period = congested_period;
  1169. }
  1170. return count;
  1171. }
  1172. static const struct seq_operations uv_ptc_seq_ops = {
  1173. .start = uv_ptc_seq_start,
  1174. .next = uv_ptc_seq_next,
  1175. .stop = uv_ptc_seq_stop,
  1176. .show = uv_ptc_seq_show
  1177. };
  1178. static int uv_ptc_proc_open(struct inode *inode, struct file *file)
  1179. {
  1180. return seq_open(file, &uv_ptc_seq_ops);
  1181. }
  1182. static int tunables_open(struct inode *inode, struct file *file)
  1183. {
  1184. return 0;
  1185. }
  1186. static const struct file_operations proc_uv_ptc_operations = {
  1187. .open = uv_ptc_proc_open,
  1188. .read = seq_read,
  1189. .write = uv_ptc_proc_write,
  1190. .llseek = seq_lseek,
  1191. .release = seq_release,
  1192. };
  1193. static const struct file_operations tunables_fops = {
  1194. .open = tunables_open,
  1195. .read = tunables_read,
  1196. .write = tunables_write,
  1197. };
  1198. static int __init uv_ptc_init(void)
  1199. {
  1200. struct proc_dir_entry *proc_uv_ptc;
  1201. if (!is_uv_system())
  1202. return 0;
  1203. proc_uv_ptc = proc_create(UV_PTC_BASENAME, 0444, NULL,
  1204. &proc_uv_ptc_operations);
  1205. if (!proc_uv_ptc) {
  1206. printk(KERN_ERR "unable to create %s proc entry\n",
  1207. UV_PTC_BASENAME);
  1208. return -EINVAL;
  1209. }
  1210. tunables_dir = debugfs_create_dir(UV_BAU_TUNABLES_DIR, NULL);
  1211. if (!tunables_dir) {
  1212. printk(KERN_ERR "unable to create debugfs directory %s\n",
  1213. UV_BAU_TUNABLES_DIR);
  1214. return -EINVAL;
  1215. }
  1216. tunables_file = debugfs_create_file(UV_BAU_TUNABLES_FILE, 0600,
  1217. tunables_dir, NULL, &tunables_fops);
  1218. if (!tunables_file) {
  1219. printk(KERN_ERR "unable to create debugfs file %s\n",
  1220. UV_BAU_TUNABLES_FILE);
  1221. return -EINVAL;
  1222. }
  1223. return 0;
  1224. }
  1225. /*
  1226. * initialize the sending side's sending buffers
  1227. */
  1228. static void
  1229. uv_activation_descriptor_init(int node, int pnode)
  1230. {
  1231. int i;
  1232. int cpu;
  1233. unsigned long pa;
  1234. unsigned long m;
  1235. unsigned long n;
  1236. struct bau_desc *bau_desc;
  1237. struct bau_desc *bd2;
  1238. struct bau_control *bcp;
  1239. /*
  1240. * each bau_desc is 64 bytes; there are 8 (UV_ITEMS_PER_DESCRIPTOR)
  1241. * per cpu; and up to 32 (UV_ADP_SIZE) cpu's per uvhub
  1242. */
  1243. bau_desc = (struct bau_desc *)kmalloc_node(sizeof(struct bau_desc)*
  1244. UV_ADP_SIZE*UV_ITEMS_PER_DESCRIPTOR, GFP_KERNEL, node);
  1245. BUG_ON(!bau_desc);
  1246. pa = uv_gpa(bau_desc); /* need the real nasid*/
  1247. n = pa >> uv_nshift;
  1248. m = pa & uv_mmask;
  1249. uv_write_global_mmr64(pnode, UVH_LB_BAU_SB_DESCRIPTOR_BASE,
  1250. (n << UV_DESC_BASE_PNODE_SHIFT | m));
  1251. /*
  1252. * initializing all 8 (UV_ITEMS_PER_DESCRIPTOR) descriptors for each
  1253. * cpu even though we only use the first one; one descriptor can
  1254. * describe a broadcast to 256 uv hubs.
  1255. */
  1256. for (i = 0, bd2 = bau_desc; i < (UV_ADP_SIZE*UV_ITEMS_PER_DESCRIPTOR);
  1257. i++, bd2++) {
  1258. memset(bd2, 0, sizeof(struct bau_desc));
  1259. bd2->header.sw_ack_flag = 1;
  1260. /*
  1261. * base_dest_nodeid is the nasid (pnode<<1) of the first uvhub
  1262. * in the partition. The bit map will indicate uvhub numbers,
  1263. * which are 0-N in a partition. Pnodes are unique system-wide.
  1264. */
  1265. bd2->header.base_dest_nodeid = uv_partition_base_pnode << 1;
  1266. bd2->header.dest_subnodeid = 0x10; /* the LB */
  1267. bd2->header.command = UV_NET_ENDPOINT_INTD;
  1268. bd2->header.int_both = 1;
  1269. /*
  1270. * all others need to be set to zero:
  1271. * fairness chaining multilevel count replied_to
  1272. */
  1273. }
  1274. for_each_present_cpu(cpu) {
  1275. if (pnode != uv_blade_to_pnode(uv_cpu_to_blade_id(cpu)))
  1276. continue;
  1277. bcp = &per_cpu(bau_control, cpu);
  1278. bcp->descriptor_base = bau_desc;
  1279. }
  1280. }
  1281. /*
  1282. * initialize the destination side's receiving buffers
  1283. * entered for each uvhub in the partition
  1284. * - node is first node (kernel memory notion) on the uvhub
  1285. * - pnode is the uvhub's physical identifier
  1286. */
  1287. static void
  1288. uv_payload_queue_init(int node, int pnode)
  1289. {
  1290. int pn;
  1291. int cpu;
  1292. char *cp;
  1293. unsigned long pa;
  1294. struct bau_payload_queue_entry *pqp;
  1295. struct bau_payload_queue_entry *pqp_malloc;
  1296. struct bau_control *bcp;
  1297. pqp = (struct bau_payload_queue_entry *) kmalloc_node(
  1298. (DEST_Q_SIZE + 1) * sizeof(struct bau_payload_queue_entry),
  1299. GFP_KERNEL, node);
  1300. BUG_ON(!pqp);
  1301. pqp_malloc = pqp;
  1302. cp = (char *)pqp + 31;
  1303. pqp = (struct bau_payload_queue_entry *)(((unsigned long)cp >> 5) << 5);
  1304. for_each_present_cpu(cpu) {
  1305. if (pnode != uv_cpu_to_pnode(cpu))
  1306. continue;
  1307. /* for every cpu on this pnode: */
  1308. bcp = &per_cpu(bau_control, cpu);
  1309. bcp->va_queue_first = pqp;
  1310. bcp->bau_msg_head = pqp;
  1311. bcp->va_queue_last = pqp + (DEST_Q_SIZE - 1);
  1312. }
  1313. /*
  1314. * need the pnode of where the memory was really allocated
  1315. */
  1316. pa = uv_gpa(pqp);
  1317. pn = pa >> uv_nshift;
  1318. uv_write_global_mmr64(pnode,
  1319. UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST,
  1320. ((unsigned long)pn << UV_PAYLOADQ_PNODE_SHIFT) |
  1321. uv_physnodeaddr(pqp));
  1322. uv_write_global_mmr64(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL,
  1323. uv_physnodeaddr(pqp));
  1324. uv_write_global_mmr64(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST,
  1325. (unsigned long)
  1326. uv_physnodeaddr(pqp + (DEST_Q_SIZE - 1)));
  1327. /* in effect, all msg_type's are set to MSG_NOOP */
  1328. memset(pqp, 0, sizeof(struct bau_payload_queue_entry) * DEST_Q_SIZE);
  1329. }
  1330. /*
  1331. * Initialization of each UV hub's structures
  1332. */
  1333. static void __init uv_init_uvhub(int uvhub, int vector)
  1334. {
  1335. int node;
  1336. int pnode;
  1337. unsigned long apicid;
  1338. node = uvhub_to_first_node(uvhub);
  1339. pnode = uv_blade_to_pnode(uvhub);
  1340. uv_activation_descriptor_init(node, pnode);
  1341. uv_payload_queue_init(node, pnode);
  1342. /*
  1343. * the below initialization can't be in firmware because the
  1344. * messaging IRQ will be determined by the OS
  1345. */
  1346. apicid = uvhub_to_first_apicid(uvhub);
  1347. uv_write_global_mmr64(pnode, UVH_BAU_DATA_CONFIG,
  1348. ((apicid << 32) | vector));
  1349. }
  1350. /*
  1351. * We will set BAU_MISC_CONTROL with a timeout period.
  1352. * But the BIOS has set UVH_AGING_PRESCALE_SEL and UVH_TRANSACTION_TIMEOUT.
  1353. * So the destination timeout period has be be calculated from them.
  1354. */
  1355. static int
  1356. calculate_destination_timeout(void)
  1357. {
  1358. unsigned long mmr_image;
  1359. int mult1;
  1360. int mult2;
  1361. int index;
  1362. int base;
  1363. int ret;
  1364. unsigned long ts_ns;
  1365. mult1 = UV_INTD_SOFT_ACK_TIMEOUT_PERIOD & BAU_MISC_CONTROL_MULT_MASK;
  1366. mmr_image = uv_read_local_mmr(UVH_AGING_PRESCALE_SEL);
  1367. index = (mmr_image >> BAU_URGENCY_7_SHIFT) & BAU_URGENCY_7_MASK;
  1368. mmr_image = uv_read_local_mmr(UVH_TRANSACTION_TIMEOUT);
  1369. mult2 = (mmr_image >> BAU_TRANS_SHIFT) & BAU_TRANS_MASK;
  1370. base = timeout_base_ns[index];
  1371. ts_ns = base * mult1 * mult2;
  1372. ret = ts_ns / 1000;
  1373. return ret;
  1374. }
  1375. /*
  1376. * initialize the bau_control structure for each cpu
  1377. */
  1378. static void __init uv_init_per_cpu(int nuvhubs)
  1379. {
  1380. int i;
  1381. int cpu;
  1382. int pnode;
  1383. int uvhub;
  1384. int have_hmaster;
  1385. short socket = 0;
  1386. unsigned short socket_mask;
  1387. unsigned char *uvhub_mask;
  1388. struct bau_control *bcp;
  1389. struct uvhub_desc *bdp;
  1390. struct socket_desc *sdp;
  1391. struct bau_control *hmaster = NULL;
  1392. struct bau_control *smaster = NULL;
  1393. struct socket_desc {
  1394. short num_cpus;
  1395. short cpu_number[16];
  1396. };
  1397. struct uvhub_desc {
  1398. unsigned short socket_mask;
  1399. short num_cpus;
  1400. short uvhub;
  1401. short pnode;
  1402. struct socket_desc socket[2];
  1403. };
  1404. struct uvhub_desc *uvhub_descs;
  1405. timeout_us = calculate_destination_timeout();
  1406. uvhub_descs = (struct uvhub_desc *)
  1407. kmalloc(nuvhubs * sizeof(struct uvhub_desc), GFP_KERNEL);
  1408. memset(uvhub_descs, 0, nuvhubs * sizeof(struct uvhub_desc));
  1409. uvhub_mask = kzalloc((nuvhubs+7)/8, GFP_KERNEL);
  1410. for_each_present_cpu(cpu) {
  1411. bcp = &per_cpu(bau_control, cpu);
  1412. memset(bcp, 0, sizeof(struct bau_control));
  1413. pnode = uv_cpu_hub_info(cpu)->pnode;
  1414. uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
  1415. *(uvhub_mask + (uvhub/8)) |= (1 << (uvhub%8));
  1416. bdp = &uvhub_descs[uvhub];
  1417. bdp->num_cpus++;
  1418. bdp->uvhub = uvhub;
  1419. bdp->pnode = pnode;
  1420. /* kludge: 'assuming' one node per socket, and assuming that
  1421. disabling a socket just leaves a gap in node numbers */
  1422. socket = (cpu_to_node(cpu) & 1);
  1423. bdp->socket_mask |= (1 << socket);
  1424. sdp = &bdp->socket[socket];
  1425. sdp->cpu_number[sdp->num_cpus] = cpu;
  1426. sdp->num_cpus++;
  1427. }
  1428. for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
  1429. if (!(*(uvhub_mask + (uvhub/8)) & (1 << (uvhub%8))))
  1430. continue;
  1431. have_hmaster = 0;
  1432. bdp = &uvhub_descs[uvhub];
  1433. socket_mask = bdp->socket_mask;
  1434. socket = 0;
  1435. while (socket_mask) {
  1436. if (!(socket_mask & 1))
  1437. goto nextsocket;
  1438. sdp = &bdp->socket[socket];
  1439. for (i = 0; i < sdp->num_cpus; i++) {
  1440. cpu = sdp->cpu_number[i];
  1441. bcp = &per_cpu(bau_control, cpu);
  1442. bcp->cpu = cpu;
  1443. if (i == 0) {
  1444. smaster = bcp;
  1445. if (!have_hmaster) {
  1446. have_hmaster++;
  1447. hmaster = bcp;
  1448. }
  1449. }
  1450. bcp->cpus_in_uvhub = bdp->num_cpus;
  1451. bcp->cpus_in_socket = sdp->num_cpus;
  1452. bcp->socket_master = smaster;
  1453. bcp->uvhub = bdp->uvhub;
  1454. bcp->uvhub_master = hmaster;
  1455. bcp->uvhub_cpu = uv_cpu_hub_info(cpu)->
  1456. blade_processor_id;
  1457. }
  1458. nextsocket:
  1459. socket++;
  1460. socket_mask = (socket_mask >> 1);
  1461. }
  1462. }
  1463. kfree(uvhub_descs);
  1464. kfree(uvhub_mask);
  1465. for_each_present_cpu(cpu) {
  1466. bcp = &per_cpu(bau_control, cpu);
  1467. bcp->baudisabled = 0;
  1468. bcp->statp = &per_cpu(ptcstats, cpu);
  1469. /* time interval to catch a hardware stay-busy bug */
  1470. bcp->timeout_interval = microsec_2_cycles(2*timeout_us);
  1471. bcp->max_bau_concurrent = max_bau_concurrent;
  1472. bcp->max_bau_concurrent_constant = max_bau_concurrent;
  1473. bcp->plugged_delay = plugged_delay;
  1474. bcp->plugsb4reset = plugsb4reset;
  1475. bcp->timeoutsb4reset = timeoutsb4reset;
  1476. bcp->ipi_reset_limit = ipi_reset_limit;
  1477. bcp->complete_threshold = complete_threshold;
  1478. bcp->congested_response_us = congested_response_us;
  1479. bcp->congested_reps = congested_reps;
  1480. bcp->congested_period = congested_period;
  1481. }
  1482. }
  1483. /*
  1484. * Initialization of BAU-related structures
  1485. */
  1486. static int __init uv_bau_init(void)
  1487. {
  1488. int uvhub;
  1489. int pnode;
  1490. int nuvhubs;
  1491. int cur_cpu;
  1492. int vector;
  1493. unsigned long mmr;
  1494. if (!is_uv_system())
  1495. return 0;
  1496. if (nobau)
  1497. return 0;
  1498. for_each_possible_cpu(cur_cpu)
  1499. zalloc_cpumask_var_node(&per_cpu(uv_flush_tlb_mask, cur_cpu),
  1500. GFP_KERNEL, cpu_to_node(cur_cpu));
  1501. uv_nshift = uv_hub_info->m_val;
  1502. uv_mmask = (1UL << uv_hub_info->m_val) - 1;
  1503. nuvhubs = uv_num_possible_blades();
  1504. spin_lock_init(&disable_lock);
  1505. congested_cycles = microsec_2_cycles(congested_response_us);
  1506. uv_init_per_cpu(nuvhubs);
  1507. uv_partition_base_pnode = 0x7fffffff;
  1508. for (uvhub = 0; uvhub < nuvhubs; uvhub++)
  1509. if (uv_blade_nr_possible_cpus(uvhub) &&
  1510. (uv_blade_to_pnode(uvhub) < uv_partition_base_pnode))
  1511. uv_partition_base_pnode = uv_blade_to_pnode(uvhub);
  1512. vector = UV_BAU_MESSAGE;
  1513. for_each_possible_blade(uvhub)
  1514. if (uv_blade_nr_possible_cpus(uvhub))
  1515. uv_init_uvhub(uvhub, vector);
  1516. uv_enable_timeouts();
  1517. alloc_intr_gate(vector, uv_bau_message_intr1);
  1518. for_each_possible_blade(uvhub) {
  1519. if (uv_blade_nr_possible_cpus(uvhub)) {
  1520. pnode = uv_blade_to_pnode(uvhub);
  1521. /* INIT the bau */
  1522. uv_write_global_mmr64(pnode,
  1523. UVH_LB_BAU_SB_ACTIVATION_CONTROL,
  1524. ((unsigned long)1 << 63));
  1525. mmr = 1; /* should be 1 to broadcast to both sockets */
  1526. uv_write_global_mmr64(pnode, UVH_BAU_DATA_BROADCAST,
  1527. mmr);
  1528. }
  1529. }
  1530. return 0;
  1531. }
  1532. core_initcall(uv_bau_init);
  1533. fs_initcall(uv_ptc_init);