nmi.c 13 KB

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  1. /*
  2. * NMI watchdog support on APIC systems
  3. *
  4. * Started by Ingo Molnar <mingo@redhat.com>
  5. *
  6. * Fixes:
  7. * Mikael Pettersson : AMD K7 support for local APIC NMI watchdog.
  8. * Mikael Pettersson : Power Management for local APIC NMI watchdog.
  9. * Mikael Pettersson : Pentium 4 support for local APIC NMI watchdog.
  10. * Pavel Machek and
  11. * Mikael Pettersson : PM converted to driver model. Disable/enable API.
  12. */
  13. #include <asm/apic.h>
  14. #include <linux/nmi.h>
  15. #include <linux/mm.h>
  16. #include <linux/delay.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/module.h>
  19. #include <linux/slab.h>
  20. #include <linux/sysdev.h>
  21. #include <linux/sysctl.h>
  22. #include <linux/percpu.h>
  23. #include <linux/kprobes.h>
  24. #include <linux/cpumask.h>
  25. #include <linux/kernel_stat.h>
  26. #include <linux/kdebug.h>
  27. #include <linux/smp.h>
  28. #include <asm/i8259.h>
  29. #include <asm/io_apic.h>
  30. #include <asm/proto.h>
  31. #include <asm/timer.h>
  32. #include <asm/mce.h>
  33. #include <asm/mach_traps.h>
  34. int unknown_nmi_panic;
  35. int nmi_watchdog_enabled;
  36. /* For reliability, we're prepared to waste bits here. */
  37. static DECLARE_BITMAP(backtrace_mask, NR_CPUS) __read_mostly;
  38. /* nmi_active:
  39. * >0: the lapic NMI watchdog is active, but can be disabled
  40. * <0: the lapic NMI watchdog has not been set up, and cannot
  41. * be enabled
  42. * 0: the lapic NMI watchdog is disabled, but can be enabled
  43. */
  44. atomic_t nmi_active = ATOMIC_INIT(0); /* oprofile uses this */
  45. EXPORT_SYMBOL(nmi_active);
  46. unsigned int nmi_watchdog = NMI_NONE;
  47. EXPORT_SYMBOL(nmi_watchdog);
  48. static int panic_on_timeout;
  49. static unsigned int nmi_hz = HZ;
  50. static DEFINE_PER_CPU(short, wd_enabled);
  51. static int endflag __initdata;
  52. static inline unsigned int get_nmi_count(int cpu)
  53. {
  54. return per_cpu(irq_stat, cpu).__nmi_count;
  55. }
  56. static inline int mce_in_progress(void)
  57. {
  58. #if defined(CONFIG_X86_MCE)
  59. return atomic_read(&mce_entry) > 0;
  60. #endif
  61. return 0;
  62. }
  63. /*
  64. * Take the local apic timer and PIT/HPET into account. We don't
  65. * know which one is active, when we have highres/dyntick on
  66. */
  67. static inline unsigned int get_timer_irqs(int cpu)
  68. {
  69. return per_cpu(irq_stat, cpu).apic_timer_irqs +
  70. per_cpu(irq_stat, cpu).irq0_irqs;
  71. }
  72. #ifdef CONFIG_SMP
  73. /*
  74. * The performance counters used by NMI_LOCAL_APIC don't trigger when
  75. * the CPU is idle. To make sure the NMI watchdog really ticks on all
  76. * CPUs during the test make them busy.
  77. */
  78. static __init void nmi_cpu_busy(void *data)
  79. {
  80. local_irq_enable_in_hardirq();
  81. /*
  82. * Intentionally don't use cpu_relax here. This is
  83. * to make sure that the performance counter really ticks,
  84. * even if there is a simulator or similar that catches the
  85. * pause instruction. On a real HT machine this is fine because
  86. * all other CPUs are busy with "useless" delay loops and don't
  87. * care if they get somewhat less cycles.
  88. */
  89. while (endflag == 0)
  90. mb();
  91. }
  92. #endif
  93. static void report_broken_nmi(int cpu, unsigned int *prev_nmi_count)
  94. {
  95. printk(KERN_CONT "\n");
  96. printk(KERN_WARNING
  97. "WARNING: CPU#%d: NMI appears to be stuck (%d->%d)!\n",
  98. cpu, prev_nmi_count[cpu], get_nmi_count(cpu));
  99. printk(KERN_WARNING
  100. "Please report this to bugzilla.kernel.org,\n");
  101. printk(KERN_WARNING
  102. "and attach the output of the 'dmesg' command.\n");
  103. per_cpu(wd_enabled, cpu) = 0;
  104. atomic_dec(&nmi_active);
  105. }
  106. static void __acpi_nmi_disable(void *__unused)
  107. {
  108. apic_write(APIC_LVT0, APIC_DM_NMI | APIC_LVT_MASKED);
  109. }
  110. int __init check_nmi_watchdog(void)
  111. {
  112. unsigned int *prev_nmi_count;
  113. int cpu;
  114. if (!nmi_watchdog_active() || !atomic_read(&nmi_active))
  115. return 0;
  116. prev_nmi_count = kmalloc(nr_cpu_ids * sizeof(int), GFP_KERNEL);
  117. if (!prev_nmi_count)
  118. goto error;
  119. printk(KERN_INFO "Testing NMI watchdog ... ");
  120. #ifdef CONFIG_SMP
  121. if (nmi_watchdog == NMI_LOCAL_APIC)
  122. smp_call_function(nmi_cpu_busy, (void *)&endflag, 0);
  123. #endif
  124. for_each_possible_cpu(cpu)
  125. prev_nmi_count[cpu] = get_nmi_count(cpu);
  126. local_irq_enable();
  127. mdelay((20 * 1000) / nmi_hz); /* wait 20 ticks */
  128. for_each_online_cpu(cpu) {
  129. if (!per_cpu(wd_enabled, cpu))
  130. continue;
  131. if (get_nmi_count(cpu) - prev_nmi_count[cpu] <= 5)
  132. report_broken_nmi(cpu, prev_nmi_count);
  133. }
  134. endflag = 1;
  135. if (!atomic_read(&nmi_active)) {
  136. kfree(prev_nmi_count);
  137. atomic_set(&nmi_active, -1);
  138. goto error;
  139. }
  140. printk("OK.\n");
  141. /*
  142. * now that we know it works we can reduce NMI frequency to
  143. * something more reasonable; makes a difference in some configs
  144. */
  145. if (nmi_watchdog == NMI_LOCAL_APIC)
  146. nmi_hz = lapic_adjust_nmi_hz(1);
  147. kfree(prev_nmi_count);
  148. return 0;
  149. error:
  150. if (nmi_watchdog == NMI_IO_APIC) {
  151. if (!timer_through_8259)
  152. legacy_pic->chip->mask(0);
  153. on_each_cpu(__acpi_nmi_disable, NULL, 1);
  154. }
  155. #ifdef CONFIG_X86_32
  156. timer_ack = 0;
  157. #endif
  158. return -1;
  159. }
  160. static int __init setup_nmi_watchdog(char *str)
  161. {
  162. unsigned int nmi;
  163. if (!strncmp(str, "panic", 5)) {
  164. panic_on_timeout = 1;
  165. str = strchr(str, ',');
  166. if (!str)
  167. return 1;
  168. ++str;
  169. }
  170. if (!strncmp(str, "lapic", 5))
  171. nmi_watchdog = NMI_LOCAL_APIC;
  172. else if (!strncmp(str, "ioapic", 6))
  173. nmi_watchdog = NMI_IO_APIC;
  174. else {
  175. get_option(&str, &nmi);
  176. if (nmi >= NMI_INVALID)
  177. return 0;
  178. nmi_watchdog = nmi;
  179. }
  180. return 1;
  181. }
  182. __setup("nmi_watchdog=", setup_nmi_watchdog);
  183. /*
  184. * Suspend/resume support
  185. */
  186. #ifdef CONFIG_PM
  187. static int nmi_pm_active; /* nmi_active before suspend */
  188. static int lapic_nmi_suspend(struct sys_device *dev, pm_message_t state)
  189. {
  190. /* only CPU0 goes here, other CPUs should be offline */
  191. nmi_pm_active = atomic_read(&nmi_active);
  192. stop_apic_nmi_watchdog(NULL);
  193. BUG_ON(atomic_read(&nmi_active) != 0);
  194. return 0;
  195. }
  196. static int lapic_nmi_resume(struct sys_device *dev)
  197. {
  198. /* only CPU0 goes here, other CPUs should be offline */
  199. if (nmi_pm_active > 0) {
  200. setup_apic_nmi_watchdog(NULL);
  201. touch_nmi_watchdog();
  202. }
  203. return 0;
  204. }
  205. static struct sysdev_class nmi_sysclass = {
  206. .name = "lapic_nmi",
  207. .resume = lapic_nmi_resume,
  208. .suspend = lapic_nmi_suspend,
  209. };
  210. static struct sys_device device_lapic_nmi = {
  211. .id = 0,
  212. .cls = &nmi_sysclass,
  213. };
  214. static int __init init_lapic_nmi_sysfs(void)
  215. {
  216. int error;
  217. /*
  218. * should really be a BUG_ON but b/c this is an
  219. * init call, it just doesn't work. -dcz
  220. */
  221. if (nmi_watchdog != NMI_LOCAL_APIC)
  222. return 0;
  223. if (atomic_read(&nmi_active) < 0)
  224. return 0;
  225. error = sysdev_class_register(&nmi_sysclass);
  226. if (!error)
  227. error = sysdev_register(&device_lapic_nmi);
  228. return error;
  229. }
  230. /* must come after the local APIC's device_initcall() */
  231. late_initcall(init_lapic_nmi_sysfs);
  232. #endif /* CONFIG_PM */
  233. static void __acpi_nmi_enable(void *__unused)
  234. {
  235. apic_write(APIC_LVT0, APIC_DM_NMI);
  236. }
  237. /*
  238. * Enable timer based NMIs on all CPUs:
  239. */
  240. void acpi_nmi_enable(void)
  241. {
  242. if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC)
  243. on_each_cpu(__acpi_nmi_enable, NULL, 1);
  244. }
  245. /*
  246. * Disable timer based NMIs on all CPUs:
  247. */
  248. void acpi_nmi_disable(void)
  249. {
  250. if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC)
  251. on_each_cpu(__acpi_nmi_disable, NULL, 1);
  252. }
  253. /*
  254. * This function is called as soon the LAPIC NMI watchdog driver has everything
  255. * in place and it's ready to check if the NMIs belong to the NMI watchdog
  256. */
  257. void cpu_nmi_set_wd_enabled(void)
  258. {
  259. __get_cpu_var(wd_enabled) = 1;
  260. }
  261. void setup_apic_nmi_watchdog(void *unused)
  262. {
  263. if (__get_cpu_var(wd_enabled))
  264. return;
  265. /* cheap hack to support suspend/resume */
  266. /* if cpu0 is not active neither should the other cpus */
  267. if (smp_processor_id() != 0 && atomic_read(&nmi_active) <= 0)
  268. return;
  269. switch (nmi_watchdog) {
  270. case NMI_LOCAL_APIC:
  271. if (lapic_watchdog_init(nmi_hz) < 0) {
  272. __get_cpu_var(wd_enabled) = 0;
  273. return;
  274. }
  275. /* FALL THROUGH */
  276. case NMI_IO_APIC:
  277. __get_cpu_var(wd_enabled) = 1;
  278. atomic_inc(&nmi_active);
  279. }
  280. }
  281. void stop_apic_nmi_watchdog(void *unused)
  282. {
  283. /* only support LOCAL and IO APICs for now */
  284. if (!nmi_watchdog_active())
  285. return;
  286. if (__get_cpu_var(wd_enabled) == 0)
  287. return;
  288. if (nmi_watchdog == NMI_LOCAL_APIC)
  289. lapic_watchdog_stop();
  290. else
  291. __acpi_nmi_disable(NULL);
  292. __get_cpu_var(wd_enabled) = 0;
  293. atomic_dec(&nmi_active);
  294. }
  295. /*
  296. * the best way to detect whether a CPU has a 'hard lockup' problem
  297. * is to check it's local APIC timer IRQ counts. If they are not
  298. * changing then that CPU has some problem.
  299. *
  300. * as these watchdog NMI IRQs are generated on every CPU, we only
  301. * have to check the current processor.
  302. *
  303. * since NMIs don't listen to _any_ locks, we have to be extremely
  304. * careful not to rely on unsafe variables. The printk might lock
  305. * up though, so we have to break up any console locks first ...
  306. * [when there will be more tty-related locks, break them up here too!]
  307. */
  308. static DEFINE_PER_CPU(unsigned, last_irq_sum);
  309. static DEFINE_PER_CPU(long, alert_counter);
  310. static DEFINE_PER_CPU(int, nmi_touch);
  311. void touch_nmi_watchdog(void)
  312. {
  313. if (nmi_watchdog_active()) {
  314. unsigned cpu;
  315. /*
  316. * Tell other CPUs to reset their alert counters. We cannot
  317. * do it ourselves because the alert count increase is not
  318. * atomic.
  319. */
  320. for_each_present_cpu(cpu) {
  321. if (per_cpu(nmi_touch, cpu) != 1)
  322. per_cpu(nmi_touch, cpu) = 1;
  323. }
  324. }
  325. /*
  326. * Tickle the softlockup detector too:
  327. */
  328. touch_softlockup_watchdog();
  329. }
  330. EXPORT_SYMBOL(touch_nmi_watchdog);
  331. notrace __kprobes int
  332. nmi_watchdog_tick(struct pt_regs *regs, unsigned reason)
  333. {
  334. /*
  335. * Since current_thread_info()-> is always on the stack, and we
  336. * always switch the stack NMI-atomically, it's safe to use
  337. * smp_processor_id().
  338. */
  339. unsigned int sum;
  340. int touched = 0;
  341. int cpu = smp_processor_id();
  342. int rc = 0;
  343. sum = get_timer_irqs(cpu);
  344. if (__get_cpu_var(nmi_touch)) {
  345. __get_cpu_var(nmi_touch) = 0;
  346. touched = 1;
  347. }
  348. /* We can be called before check_nmi_watchdog, hence NULL check. */
  349. if (cpumask_test_cpu(cpu, to_cpumask(backtrace_mask))) {
  350. static DEFINE_RAW_SPINLOCK(lock); /* Serialise the printks */
  351. raw_spin_lock(&lock);
  352. printk(KERN_WARNING "NMI backtrace for cpu %d\n", cpu);
  353. show_regs(regs);
  354. dump_stack();
  355. raw_spin_unlock(&lock);
  356. cpumask_clear_cpu(cpu, to_cpumask(backtrace_mask));
  357. rc = 1;
  358. }
  359. /* Could check oops_in_progress here too, but it's safer not to */
  360. if (mce_in_progress())
  361. touched = 1;
  362. /* if the none of the timers isn't firing, this cpu isn't doing much */
  363. if (!touched && __get_cpu_var(last_irq_sum) == sum) {
  364. /*
  365. * Ayiee, looks like this CPU is stuck ...
  366. * wait a few IRQs (5 seconds) before doing the oops ...
  367. */
  368. __this_cpu_inc(alert_counter);
  369. if (__this_cpu_read(alert_counter) == 5 * nmi_hz)
  370. /*
  371. * die_nmi will return ONLY if NOTIFY_STOP happens..
  372. */
  373. die_nmi("BUG: NMI Watchdog detected LOCKUP",
  374. regs, panic_on_timeout);
  375. } else {
  376. __get_cpu_var(last_irq_sum) = sum;
  377. __this_cpu_write(alert_counter, 0);
  378. }
  379. /* see if the nmi watchdog went off */
  380. if (!__get_cpu_var(wd_enabled))
  381. return rc;
  382. switch (nmi_watchdog) {
  383. case NMI_LOCAL_APIC:
  384. rc |= lapic_wd_event(nmi_hz);
  385. break;
  386. case NMI_IO_APIC:
  387. /*
  388. * don't know how to accurately check for this.
  389. * just assume it was a watchdog timer interrupt
  390. * This matches the old behaviour.
  391. */
  392. rc = 1;
  393. break;
  394. }
  395. return rc;
  396. }
  397. #ifdef CONFIG_SYSCTL
  398. static void enable_ioapic_nmi_watchdog_single(void *unused)
  399. {
  400. __get_cpu_var(wd_enabled) = 1;
  401. atomic_inc(&nmi_active);
  402. __acpi_nmi_enable(NULL);
  403. }
  404. static void enable_ioapic_nmi_watchdog(void)
  405. {
  406. on_each_cpu(enable_ioapic_nmi_watchdog_single, NULL, 1);
  407. touch_nmi_watchdog();
  408. }
  409. static void disable_ioapic_nmi_watchdog(void)
  410. {
  411. on_each_cpu(stop_apic_nmi_watchdog, NULL, 1);
  412. }
  413. static int __init setup_unknown_nmi_panic(char *str)
  414. {
  415. unknown_nmi_panic = 1;
  416. return 1;
  417. }
  418. __setup("unknown_nmi_panic", setup_unknown_nmi_panic);
  419. static int unknown_nmi_panic_callback(struct pt_regs *regs, int cpu)
  420. {
  421. unsigned char reason = get_nmi_reason();
  422. char buf[64];
  423. sprintf(buf, "NMI received for unknown reason %02x\n", reason);
  424. die_nmi(buf, regs, 1); /* Always panic here */
  425. return 0;
  426. }
  427. /*
  428. * proc handler for /proc/sys/kernel/nmi
  429. */
  430. int proc_nmi_enabled(struct ctl_table *table, int write,
  431. void __user *buffer, size_t *length, loff_t *ppos)
  432. {
  433. int old_state;
  434. nmi_watchdog_enabled = (atomic_read(&nmi_active) > 0) ? 1 : 0;
  435. old_state = nmi_watchdog_enabled;
  436. proc_dointvec(table, write, buffer, length, ppos);
  437. if (!!old_state == !!nmi_watchdog_enabled)
  438. return 0;
  439. if (atomic_read(&nmi_active) < 0 || !nmi_watchdog_active()) {
  440. printk(KERN_WARNING
  441. "NMI watchdog is permanently disabled\n");
  442. return -EIO;
  443. }
  444. if (nmi_watchdog == NMI_LOCAL_APIC) {
  445. if (nmi_watchdog_enabled)
  446. enable_lapic_nmi_watchdog();
  447. else
  448. disable_lapic_nmi_watchdog();
  449. } else if (nmi_watchdog == NMI_IO_APIC) {
  450. if (nmi_watchdog_enabled)
  451. enable_ioapic_nmi_watchdog();
  452. else
  453. disable_ioapic_nmi_watchdog();
  454. } else {
  455. printk(KERN_WARNING
  456. "NMI watchdog doesn't know what hardware to touch\n");
  457. return -EIO;
  458. }
  459. return 0;
  460. }
  461. #endif /* CONFIG_SYSCTL */
  462. int do_nmi_callback(struct pt_regs *regs, int cpu)
  463. {
  464. #ifdef CONFIG_SYSCTL
  465. if (unknown_nmi_panic)
  466. return unknown_nmi_panic_callback(regs, cpu);
  467. #endif
  468. return 0;
  469. }
  470. void arch_trigger_all_cpu_backtrace(void)
  471. {
  472. int i;
  473. cpumask_copy(to_cpumask(backtrace_mask), cpu_online_mask);
  474. printk(KERN_INFO "sending NMI to all CPUs:\n");
  475. apic->send_IPI_all(NMI_VECTOR);
  476. /* Wait for up to 10 seconds for all CPUs to do the backtrace */
  477. for (i = 0; i < 10 * 1000; i++) {
  478. if (cpumask_empty(to_cpumask(backtrace_mask)))
  479. break;
  480. mdelay(1);
  481. }
  482. }