apic_flat_64.c 9.6 KB

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  1. /*
  2. * Copyright 2004 James Cleverdon, IBM.
  3. * Subject to the GNU Public License, v.2
  4. *
  5. * Flat APIC subarch code.
  6. *
  7. * Hacked for x86-64 by James Cleverdon from i386 architecture code by
  8. * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
  9. * James Cleverdon.
  10. */
  11. #include <linux/errno.h>
  12. #include <linux/threads.h>
  13. #include <linux/cpumask.h>
  14. #include <linux/string.h>
  15. #include <linux/kernel.h>
  16. #include <linux/ctype.h>
  17. #include <linux/init.h>
  18. #include <linux/hardirq.h>
  19. #include <asm/smp.h>
  20. #include <asm/apic.h>
  21. #include <asm/ipi.h>
  22. #ifdef CONFIG_ACPI
  23. #include <acpi/acpi_bus.h>
  24. #endif
  25. static int flat_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
  26. {
  27. return 1;
  28. }
  29. static const struct cpumask *flat_target_cpus(void)
  30. {
  31. return cpu_online_mask;
  32. }
  33. static void flat_vector_allocation_domain(int cpu, struct cpumask *retmask)
  34. {
  35. /* Careful. Some cpus do not strictly honor the set of cpus
  36. * specified in the interrupt destination when using lowest
  37. * priority interrupt delivery mode.
  38. *
  39. * In particular there was a hyperthreading cpu observed to
  40. * deliver interrupts to the wrong hyperthread when only one
  41. * hyperthread was specified in the interrupt desitination.
  42. */
  43. cpumask_clear(retmask);
  44. cpumask_bits(retmask)[0] = APIC_ALL_CPUS;
  45. }
  46. /*
  47. * Set up the logical destination ID.
  48. *
  49. * Intel recommends to set DFR, LDR and TPR before enabling
  50. * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
  51. * document number 292116). So here it goes...
  52. */
  53. static void flat_init_apic_ldr(void)
  54. {
  55. unsigned long val;
  56. unsigned long num, id;
  57. num = smp_processor_id();
  58. id = 1UL << num;
  59. apic_write(APIC_DFR, APIC_DFR_FLAT);
  60. val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
  61. val |= SET_APIC_LOGICAL_ID(id);
  62. apic_write(APIC_LDR, val);
  63. }
  64. static inline void _flat_send_IPI_mask(unsigned long mask, int vector)
  65. {
  66. unsigned long flags;
  67. local_irq_save(flags);
  68. __default_send_IPI_dest_field(mask, vector, apic->dest_logical);
  69. local_irq_restore(flags);
  70. }
  71. static void flat_send_IPI_mask(const struct cpumask *cpumask, int vector)
  72. {
  73. unsigned long mask = cpumask_bits(cpumask)[0];
  74. _flat_send_IPI_mask(mask, vector);
  75. }
  76. static void
  77. flat_send_IPI_mask_allbutself(const struct cpumask *cpumask, int vector)
  78. {
  79. unsigned long mask = cpumask_bits(cpumask)[0];
  80. int cpu = smp_processor_id();
  81. if (cpu < BITS_PER_LONG)
  82. clear_bit(cpu, &mask);
  83. _flat_send_IPI_mask(mask, vector);
  84. }
  85. static void flat_send_IPI_allbutself(int vector)
  86. {
  87. int cpu = smp_processor_id();
  88. #ifdef CONFIG_HOTPLUG_CPU
  89. int hotplug = 1;
  90. #else
  91. int hotplug = 0;
  92. #endif
  93. if (hotplug || vector == NMI_VECTOR) {
  94. if (!cpumask_equal(cpu_online_mask, cpumask_of(cpu))) {
  95. unsigned long mask = cpumask_bits(cpu_online_mask)[0];
  96. if (cpu < BITS_PER_LONG)
  97. clear_bit(cpu, &mask);
  98. _flat_send_IPI_mask(mask, vector);
  99. }
  100. } else if (num_online_cpus() > 1) {
  101. __default_send_IPI_shortcut(APIC_DEST_ALLBUT,
  102. vector, apic->dest_logical);
  103. }
  104. }
  105. static void flat_send_IPI_all(int vector)
  106. {
  107. if (vector == NMI_VECTOR) {
  108. flat_send_IPI_mask(cpu_online_mask, vector);
  109. } else {
  110. __default_send_IPI_shortcut(APIC_DEST_ALLINC,
  111. vector, apic->dest_logical);
  112. }
  113. }
  114. static unsigned int flat_get_apic_id(unsigned long x)
  115. {
  116. unsigned int id;
  117. id = (((x)>>24) & 0xFFu);
  118. return id;
  119. }
  120. static unsigned long set_apic_id(unsigned int id)
  121. {
  122. unsigned long x;
  123. x = ((id & 0xFFu)<<24);
  124. return x;
  125. }
  126. static unsigned int read_xapic_id(void)
  127. {
  128. unsigned int id;
  129. id = flat_get_apic_id(apic_read(APIC_ID));
  130. return id;
  131. }
  132. static int flat_apic_id_registered(void)
  133. {
  134. return physid_isset(read_xapic_id(), phys_cpu_present_map);
  135. }
  136. static int flat_phys_pkg_id(int initial_apic_id, int index_msb)
  137. {
  138. return initial_apic_id >> index_msb;
  139. }
  140. struct apic apic_flat = {
  141. .name = "flat",
  142. .probe = NULL,
  143. .acpi_madt_oem_check = flat_acpi_madt_oem_check,
  144. .apic_id_registered = flat_apic_id_registered,
  145. .irq_delivery_mode = dest_LowestPrio,
  146. .irq_dest_mode = 1, /* logical */
  147. .target_cpus = flat_target_cpus,
  148. .disable_esr = 0,
  149. .dest_logical = APIC_DEST_LOGICAL,
  150. .check_apicid_used = NULL,
  151. .check_apicid_present = NULL,
  152. .vector_allocation_domain = flat_vector_allocation_domain,
  153. .init_apic_ldr = flat_init_apic_ldr,
  154. .ioapic_phys_id_map = NULL,
  155. .setup_apic_routing = NULL,
  156. .multi_timer_check = NULL,
  157. .apicid_to_node = NULL,
  158. .cpu_to_logical_apicid = NULL,
  159. .cpu_present_to_apicid = default_cpu_present_to_apicid,
  160. .apicid_to_cpu_present = NULL,
  161. .setup_portio_remap = NULL,
  162. .check_phys_apicid_present = default_check_phys_apicid_present,
  163. .enable_apic_mode = NULL,
  164. .phys_pkg_id = flat_phys_pkg_id,
  165. .mps_oem_check = NULL,
  166. .get_apic_id = flat_get_apic_id,
  167. .set_apic_id = set_apic_id,
  168. .apic_id_mask = 0xFFu << 24,
  169. .cpu_mask_to_apicid = default_cpu_mask_to_apicid,
  170. .cpu_mask_to_apicid_and = default_cpu_mask_to_apicid_and,
  171. .send_IPI_mask = flat_send_IPI_mask,
  172. .send_IPI_mask_allbutself = flat_send_IPI_mask_allbutself,
  173. .send_IPI_allbutself = flat_send_IPI_allbutself,
  174. .send_IPI_all = flat_send_IPI_all,
  175. .send_IPI_self = apic_send_IPI_self,
  176. .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
  177. .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
  178. .wait_for_init_deassert = NULL,
  179. .smp_callin_clear_local_apic = NULL,
  180. .inquire_remote_apic = default_inquire_remote_apic,
  181. .read = native_apic_mem_read,
  182. .write = native_apic_mem_write,
  183. .icr_read = native_apic_icr_read,
  184. .icr_write = native_apic_icr_write,
  185. .wait_icr_idle = native_apic_wait_icr_idle,
  186. .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
  187. };
  188. /*
  189. * Physflat mode is used when there are more than 8 CPUs on a system.
  190. * We cannot use logical delivery in this case because the mask
  191. * overflows, so use physical mode.
  192. */
  193. static int physflat_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
  194. {
  195. #ifdef CONFIG_ACPI
  196. /*
  197. * Quirk: some x86_64 machines can only use physical APIC mode
  198. * regardless of how many processors are present (x86_64 ES7000
  199. * is an example).
  200. */
  201. if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
  202. (acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL)) {
  203. printk(KERN_DEBUG "system APIC only can use physical flat");
  204. return 1;
  205. }
  206. if (!strncmp(oem_id, "IBM", 3) && !strncmp(oem_table_id, "EXA", 3)) {
  207. printk(KERN_DEBUG "IBM Summit detected, will use apic physical");
  208. return 1;
  209. }
  210. #endif
  211. return 0;
  212. }
  213. static const struct cpumask *physflat_target_cpus(void)
  214. {
  215. return cpu_online_mask;
  216. }
  217. static void physflat_vector_allocation_domain(int cpu, struct cpumask *retmask)
  218. {
  219. cpumask_clear(retmask);
  220. cpumask_set_cpu(cpu, retmask);
  221. }
  222. static void physflat_send_IPI_mask(const struct cpumask *cpumask, int vector)
  223. {
  224. default_send_IPI_mask_sequence_phys(cpumask, vector);
  225. }
  226. static void physflat_send_IPI_mask_allbutself(const struct cpumask *cpumask,
  227. int vector)
  228. {
  229. default_send_IPI_mask_allbutself_phys(cpumask, vector);
  230. }
  231. static void physflat_send_IPI_allbutself(int vector)
  232. {
  233. default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector);
  234. }
  235. static void physflat_send_IPI_all(int vector)
  236. {
  237. physflat_send_IPI_mask(cpu_online_mask, vector);
  238. }
  239. static unsigned int physflat_cpu_mask_to_apicid(const struct cpumask *cpumask)
  240. {
  241. int cpu;
  242. /*
  243. * We're using fixed IRQ delivery, can only return one phys APIC ID.
  244. * May as well be the first.
  245. */
  246. cpu = cpumask_first(cpumask);
  247. if ((unsigned)cpu < nr_cpu_ids)
  248. return per_cpu(x86_cpu_to_apicid, cpu);
  249. else
  250. return BAD_APICID;
  251. }
  252. static unsigned int
  253. physflat_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
  254. const struct cpumask *andmask)
  255. {
  256. int cpu;
  257. /*
  258. * We're using fixed IRQ delivery, can only return one phys APIC ID.
  259. * May as well be the first.
  260. */
  261. for_each_cpu_and(cpu, cpumask, andmask) {
  262. if (cpumask_test_cpu(cpu, cpu_online_mask))
  263. break;
  264. }
  265. return per_cpu(x86_cpu_to_apicid, cpu);
  266. }
  267. struct apic apic_physflat = {
  268. .name = "physical flat",
  269. .probe = NULL,
  270. .acpi_madt_oem_check = physflat_acpi_madt_oem_check,
  271. .apic_id_registered = flat_apic_id_registered,
  272. .irq_delivery_mode = dest_Fixed,
  273. .irq_dest_mode = 0, /* physical */
  274. .target_cpus = physflat_target_cpus,
  275. .disable_esr = 0,
  276. .dest_logical = 0,
  277. .check_apicid_used = NULL,
  278. .check_apicid_present = NULL,
  279. .vector_allocation_domain = physflat_vector_allocation_domain,
  280. /* not needed, but shouldn't hurt: */
  281. .init_apic_ldr = flat_init_apic_ldr,
  282. .ioapic_phys_id_map = NULL,
  283. .setup_apic_routing = NULL,
  284. .multi_timer_check = NULL,
  285. .apicid_to_node = NULL,
  286. .cpu_to_logical_apicid = NULL,
  287. .cpu_present_to_apicid = default_cpu_present_to_apicid,
  288. .apicid_to_cpu_present = NULL,
  289. .setup_portio_remap = NULL,
  290. .check_phys_apicid_present = default_check_phys_apicid_present,
  291. .enable_apic_mode = NULL,
  292. .phys_pkg_id = flat_phys_pkg_id,
  293. .mps_oem_check = NULL,
  294. .get_apic_id = flat_get_apic_id,
  295. .set_apic_id = set_apic_id,
  296. .apic_id_mask = 0xFFu << 24,
  297. .cpu_mask_to_apicid = physflat_cpu_mask_to_apicid,
  298. .cpu_mask_to_apicid_and = physflat_cpu_mask_to_apicid_and,
  299. .send_IPI_mask = physflat_send_IPI_mask,
  300. .send_IPI_mask_allbutself = physflat_send_IPI_mask_allbutself,
  301. .send_IPI_allbutself = physflat_send_IPI_allbutself,
  302. .send_IPI_all = physflat_send_IPI_all,
  303. .send_IPI_self = apic_send_IPI_self,
  304. .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
  305. .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
  306. .wait_for_init_deassert = NULL,
  307. .smp_callin_clear_local_apic = NULL,
  308. .inquire_remote_apic = default_inquire_remote_apic,
  309. .read = native_apic_mem_read,
  310. .write = native_apic_mem_write,
  311. .icr_read = native_apic_icr_read,
  312. .icr_write = native_apic_icr_write,
  313. .wait_icr_idle = native_apic_wait_icr_idle,
  314. .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
  315. };