cache.c 9.2 KB

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  1. /*
  2. * arch/sh/mm/cache.c
  3. *
  4. * Copyright (C) 1999, 2000, 2002 Niibe Yutaka
  5. * Copyright (C) 2002 - 2010 Paul Mundt
  6. *
  7. * Released under the terms of the GNU GPL v2.0.
  8. */
  9. #include <linux/mm.h>
  10. #include <linux/init.h>
  11. #include <linux/mutex.h>
  12. #include <linux/fs.h>
  13. #include <linux/smp.h>
  14. #include <linux/highmem.h>
  15. #include <linux/module.h>
  16. #include <asm/mmu_context.h>
  17. #include <asm/cacheflush.h>
  18. void (*local_flush_cache_all)(void *args) = cache_noop;
  19. void (*local_flush_cache_mm)(void *args) = cache_noop;
  20. void (*local_flush_cache_dup_mm)(void *args) = cache_noop;
  21. void (*local_flush_cache_page)(void *args) = cache_noop;
  22. void (*local_flush_cache_range)(void *args) = cache_noop;
  23. void (*local_flush_dcache_page)(void *args) = cache_noop;
  24. void (*local_flush_icache_range)(void *args) = cache_noop;
  25. void (*local_flush_icache_page)(void *args) = cache_noop;
  26. void (*local_flush_cache_sigtramp)(void *args) = cache_noop;
  27. void (*__flush_wback_region)(void *start, int size);
  28. EXPORT_SYMBOL(__flush_wback_region);
  29. void (*__flush_purge_region)(void *start, int size);
  30. EXPORT_SYMBOL(__flush_purge_region);
  31. void (*__flush_invalidate_region)(void *start, int size);
  32. EXPORT_SYMBOL(__flush_invalidate_region);
  33. static inline void noop__flush_region(void *start, int size)
  34. {
  35. }
  36. static inline void cacheop_on_each_cpu(void (*func) (void *info), void *info,
  37. int wait)
  38. {
  39. preempt_disable();
  40. /*
  41. * It's possible that this gets called early on when IRQs are
  42. * still disabled due to ioremapping by the boot CPU, so don't
  43. * even attempt IPIs unless there are other CPUs online.
  44. */
  45. if (num_online_cpus() > 1)
  46. smp_call_function(func, info, wait);
  47. func(info);
  48. preempt_enable();
  49. }
  50. void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
  51. unsigned long vaddr, void *dst, const void *src,
  52. unsigned long len)
  53. {
  54. if (boot_cpu_data.dcache.n_aliases && page_mapped(page) &&
  55. !test_bit(PG_dcache_dirty, &page->flags)) {
  56. void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
  57. memcpy(vto, src, len);
  58. kunmap_coherent(vto);
  59. } else {
  60. memcpy(dst, src, len);
  61. if (boot_cpu_data.dcache.n_aliases)
  62. set_bit(PG_dcache_dirty, &page->flags);
  63. }
  64. if (vma->vm_flags & VM_EXEC)
  65. flush_cache_page(vma, vaddr, page_to_pfn(page));
  66. }
  67. void copy_from_user_page(struct vm_area_struct *vma, struct page *page,
  68. unsigned long vaddr, void *dst, const void *src,
  69. unsigned long len)
  70. {
  71. if (boot_cpu_data.dcache.n_aliases && page_mapped(page) &&
  72. !test_bit(PG_dcache_dirty, &page->flags)) {
  73. void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
  74. memcpy(dst, vfrom, len);
  75. kunmap_coherent(vfrom);
  76. } else {
  77. memcpy(dst, src, len);
  78. if (boot_cpu_data.dcache.n_aliases)
  79. set_bit(PG_dcache_dirty, &page->flags);
  80. }
  81. }
  82. void copy_user_highpage(struct page *to, struct page *from,
  83. unsigned long vaddr, struct vm_area_struct *vma)
  84. {
  85. void *vfrom, *vto;
  86. vto = kmap_atomic(to, KM_USER1);
  87. if (boot_cpu_data.dcache.n_aliases && page_mapped(from) &&
  88. !test_bit(PG_dcache_dirty, &from->flags)) {
  89. vfrom = kmap_coherent(from, vaddr);
  90. copy_page(vto, vfrom);
  91. kunmap_coherent(vfrom);
  92. } else {
  93. vfrom = kmap_atomic(from, KM_USER0);
  94. copy_page(vto, vfrom);
  95. kunmap_atomic(vfrom, KM_USER0);
  96. }
  97. if (pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK))
  98. __flush_purge_region(vto, PAGE_SIZE);
  99. kunmap_atomic(vto, KM_USER1);
  100. /* Make sure this page is cleared on other CPU's too before using it */
  101. smp_wmb();
  102. }
  103. EXPORT_SYMBOL(copy_user_highpage);
  104. void clear_user_highpage(struct page *page, unsigned long vaddr)
  105. {
  106. void *kaddr = kmap_atomic(page, KM_USER0);
  107. clear_page(kaddr);
  108. if (pages_do_alias((unsigned long)kaddr, vaddr & PAGE_MASK))
  109. __flush_purge_region(kaddr, PAGE_SIZE);
  110. kunmap_atomic(kaddr, KM_USER0);
  111. }
  112. EXPORT_SYMBOL(clear_user_highpage);
  113. void __update_cache(struct vm_area_struct *vma,
  114. unsigned long address, pte_t pte)
  115. {
  116. struct page *page;
  117. unsigned long pfn = pte_pfn(pte);
  118. if (!boot_cpu_data.dcache.n_aliases)
  119. return;
  120. page = pfn_to_page(pfn);
  121. if (pfn_valid(pfn)) {
  122. int dirty = test_and_clear_bit(PG_dcache_dirty, &page->flags);
  123. if (dirty)
  124. __flush_purge_region(page_address(page), PAGE_SIZE);
  125. }
  126. }
  127. void __flush_anon_page(struct page *page, unsigned long vmaddr)
  128. {
  129. unsigned long addr = (unsigned long) page_address(page);
  130. if (pages_do_alias(addr, vmaddr)) {
  131. if (boot_cpu_data.dcache.n_aliases && page_mapped(page) &&
  132. !test_bit(PG_dcache_dirty, &page->flags)) {
  133. void *kaddr;
  134. kaddr = kmap_coherent(page, vmaddr);
  135. /* XXX.. For now kunmap_coherent() does a purge */
  136. /* __flush_purge_region((void *)kaddr, PAGE_SIZE); */
  137. kunmap_coherent(kaddr);
  138. } else
  139. __flush_purge_region((void *)addr, PAGE_SIZE);
  140. }
  141. }
  142. void flush_cache_all(void)
  143. {
  144. cacheop_on_each_cpu(local_flush_cache_all, NULL, 1);
  145. }
  146. EXPORT_SYMBOL(flush_cache_all);
  147. void flush_cache_mm(struct mm_struct *mm)
  148. {
  149. if (boot_cpu_data.dcache.n_aliases == 0)
  150. return;
  151. cacheop_on_each_cpu(local_flush_cache_mm, mm, 1);
  152. }
  153. void flush_cache_dup_mm(struct mm_struct *mm)
  154. {
  155. if (boot_cpu_data.dcache.n_aliases == 0)
  156. return;
  157. cacheop_on_each_cpu(local_flush_cache_dup_mm, mm, 1);
  158. }
  159. void flush_cache_page(struct vm_area_struct *vma, unsigned long addr,
  160. unsigned long pfn)
  161. {
  162. struct flusher_data data;
  163. data.vma = vma;
  164. data.addr1 = addr;
  165. data.addr2 = pfn;
  166. cacheop_on_each_cpu(local_flush_cache_page, (void *)&data, 1);
  167. }
  168. void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
  169. unsigned long end)
  170. {
  171. struct flusher_data data;
  172. data.vma = vma;
  173. data.addr1 = start;
  174. data.addr2 = end;
  175. cacheop_on_each_cpu(local_flush_cache_range, (void *)&data, 1);
  176. }
  177. EXPORT_SYMBOL(flush_cache_range);
  178. void flush_dcache_page(struct page *page)
  179. {
  180. cacheop_on_each_cpu(local_flush_dcache_page, page, 1);
  181. }
  182. EXPORT_SYMBOL(flush_dcache_page);
  183. void flush_icache_range(unsigned long start, unsigned long end)
  184. {
  185. struct flusher_data data;
  186. data.vma = NULL;
  187. data.addr1 = start;
  188. data.addr2 = end;
  189. cacheop_on_each_cpu(local_flush_icache_range, (void *)&data, 1);
  190. }
  191. void flush_icache_page(struct vm_area_struct *vma, struct page *page)
  192. {
  193. /* Nothing uses the VMA, so just pass the struct page along */
  194. cacheop_on_each_cpu(local_flush_icache_page, page, 1);
  195. }
  196. void flush_cache_sigtramp(unsigned long address)
  197. {
  198. cacheop_on_each_cpu(local_flush_cache_sigtramp, (void *)address, 1);
  199. }
  200. static void compute_alias(struct cache_info *c)
  201. {
  202. c->alias_mask = ((c->sets - 1) << c->entry_shift) & ~(PAGE_SIZE - 1);
  203. c->n_aliases = c->alias_mask ? (c->alias_mask >> PAGE_SHIFT) + 1 : 0;
  204. }
  205. static void __init emit_cache_params(void)
  206. {
  207. printk(KERN_NOTICE "I-cache : n_ways=%d n_sets=%d way_incr=%d\n",
  208. boot_cpu_data.icache.ways,
  209. boot_cpu_data.icache.sets,
  210. boot_cpu_data.icache.way_incr);
  211. printk(KERN_NOTICE "I-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n",
  212. boot_cpu_data.icache.entry_mask,
  213. boot_cpu_data.icache.alias_mask,
  214. boot_cpu_data.icache.n_aliases);
  215. printk(KERN_NOTICE "D-cache : n_ways=%d n_sets=%d way_incr=%d\n",
  216. boot_cpu_data.dcache.ways,
  217. boot_cpu_data.dcache.sets,
  218. boot_cpu_data.dcache.way_incr);
  219. printk(KERN_NOTICE "D-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n",
  220. boot_cpu_data.dcache.entry_mask,
  221. boot_cpu_data.dcache.alias_mask,
  222. boot_cpu_data.dcache.n_aliases);
  223. /*
  224. * Emit Secondary Cache parameters if the CPU has a probed L2.
  225. */
  226. if (boot_cpu_data.flags & CPU_HAS_L2_CACHE) {
  227. printk(KERN_NOTICE "S-cache : n_ways=%d n_sets=%d way_incr=%d\n",
  228. boot_cpu_data.scache.ways,
  229. boot_cpu_data.scache.sets,
  230. boot_cpu_data.scache.way_incr);
  231. printk(KERN_NOTICE "S-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n",
  232. boot_cpu_data.scache.entry_mask,
  233. boot_cpu_data.scache.alias_mask,
  234. boot_cpu_data.scache.n_aliases);
  235. }
  236. }
  237. void __init cpu_cache_init(void)
  238. {
  239. unsigned int cache_disabled = 0;
  240. #ifdef CCR
  241. cache_disabled = !(__raw_readl(CCR) & CCR_CACHE_ENABLE);
  242. #endif
  243. compute_alias(&boot_cpu_data.icache);
  244. compute_alias(&boot_cpu_data.dcache);
  245. compute_alias(&boot_cpu_data.scache);
  246. __flush_wback_region = noop__flush_region;
  247. __flush_purge_region = noop__flush_region;
  248. __flush_invalidate_region = noop__flush_region;
  249. /*
  250. * No flushing is necessary in the disabled cache case so we can
  251. * just keep the noop functions in local_flush_..() and __flush_..()
  252. */
  253. if (unlikely(cache_disabled))
  254. goto skip;
  255. if (boot_cpu_data.family == CPU_FAMILY_SH2) {
  256. extern void __weak sh2_cache_init(void);
  257. sh2_cache_init();
  258. }
  259. if (boot_cpu_data.family == CPU_FAMILY_SH2A) {
  260. extern void __weak sh2a_cache_init(void);
  261. sh2a_cache_init();
  262. }
  263. if (boot_cpu_data.family == CPU_FAMILY_SH3) {
  264. extern void __weak sh3_cache_init(void);
  265. sh3_cache_init();
  266. if ((boot_cpu_data.type == CPU_SH7705) &&
  267. (boot_cpu_data.dcache.sets == 512)) {
  268. extern void __weak sh7705_cache_init(void);
  269. sh7705_cache_init();
  270. }
  271. }
  272. if ((boot_cpu_data.family == CPU_FAMILY_SH4) ||
  273. (boot_cpu_data.family == CPU_FAMILY_SH4A) ||
  274. (boot_cpu_data.family == CPU_FAMILY_SH4AL_DSP)) {
  275. extern void __weak sh4_cache_init(void);
  276. sh4_cache_init();
  277. if ((boot_cpu_data.type == CPU_SH7786) ||
  278. (boot_cpu_data.type == CPU_SHX3)) {
  279. extern void __weak shx3_cache_init(void);
  280. shx3_cache_init();
  281. }
  282. }
  283. if (boot_cpu_data.family == CPU_FAMILY_SH5) {
  284. extern void __weak sh5_cache_init(void);
  285. sh5_cache_init();
  286. }
  287. skip:
  288. emit_cache_params();
  289. }