setup.c 32 KB

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  1. /*
  2. * Copyright (C) 2009 Renesas Solutions Corp.
  3. *
  4. * Kuninori Morimoto <morimoto.kuninori@renesas.com>
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #include <linux/init.h>
  11. #include <linux/device.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/mfd/sh_mobile_sdhi.h>
  14. #include <linux/mmc/host.h>
  15. #include <linux/mmc/sh_mmcif.h>
  16. #include <linux/mtd/physmap.h>
  17. #include <linux/gpio.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/io.h>
  20. #include <linux/delay.h>
  21. #include <linux/usb/r8a66597.h>
  22. #include <linux/i2c.h>
  23. #include <linux/i2c/tsc2007.h>
  24. #include <linux/spi/spi.h>
  25. #include <linux/spi/sh_msiof.h>
  26. #include <linux/spi/mmc_spi.h>
  27. #include <linux/input.h>
  28. #include <linux/input/sh_keysc.h>
  29. #include <video/sh_mobile_lcdc.h>
  30. #include <sound/sh_fsi.h>
  31. #include <media/sh_mobile_ceu.h>
  32. #include <media/tw9910.h>
  33. #include <media/mt9t112.h>
  34. #include <asm/heartbeat.h>
  35. #include <asm/sh_eth.h>
  36. #include <asm/clock.h>
  37. #include <asm/suspend.h>
  38. #include <cpu/sh7724.h>
  39. /*
  40. * Address Interface BusWidth
  41. *-----------------------------------------
  42. * 0x0000_0000 uboot 16bit
  43. * 0x0004_0000 Linux romImage 16bit
  44. * 0x0014_0000 MTD for Linux 16bit
  45. * 0x0400_0000 Internal I/O 16/32bit
  46. * 0x0800_0000 DRAM 32bit
  47. * 0x1800_0000 MFI 16bit
  48. */
  49. /* SWITCH
  50. *------------------------------
  51. * DS2[1] = FlashROM write protect ON : write protect
  52. * OFF : No write protect
  53. * DS2[2] = RMII / TS, SCIF ON : RMII
  54. * OFF : TS, SCIF3
  55. * DS2[3] = Camera / Video ON : Camera
  56. * OFF : NTSC/PAL (IN)
  57. * DS2[5] = NTSC_OUT Clock ON : On board OSC
  58. * OFF : SH7724 DV_CLK
  59. * DS2[6-7] = MMC / SD ON-OFF : SD
  60. * OFF-ON : MMC
  61. */
  62. /* Heartbeat */
  63. static unsigned char led_pos[] = { 0, 1, 2, 3 };
  64. static struct heartbeat_data heartbeat_data = {
  65. .nr_bits = 4,
  66. .bit_pos = led_pos,
  67. };
  68. static struct resource heartbeat_resource = {
  69. .start = 0xA405012C, /* PTG */
  70. .end = 0xA405012E - 1,
  71. .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
  72. };
  73. static struct platform_device heartbeat_device = {
  74. .name = "heartbeat",
  75. .id = -1,
  76. .dev = {
  77. .platform_data = &heartbeat_data,
  78. },
  79. .num_resources = 1,
  80. .resource = &heartbeat_resource,
  81. };
  82. /* MTD */
  83. static struct mtd_partition nor_flash_partitions[] = {
  84. {
  85. .name = "boot loader",
  86. .offset = 0,
  87. .size = (5 * 1024 * 1024),
  88. .mask_flags = MTD_WRITEABLE, /* force read-only */
  89. }, {
  90. .name = "free-area",
  91. .offset = MTDPART_OFS_APPEND,
  92. .size = MTDPART_SIZ_FULL,
  93. },
  94. };
  95. static struct physmap_flash_data nor_flash_data = {
  96. .width = 2,
  97. .parts = nor_flash_partitions,
  98. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  99. };
  100. static struct resource nor_flash_resources[] = {
  101. [0] = {
  102. .name = "NOR Flash",
  103. .start = 0x00000000,
  104. .end = 0x03ffffff,
  105. .flags = IORESOURCE_MEM,
  106. }
  107. };
  108. static struct platform_device nor_flash_device = {
  109. .name = "physmap-flash",
  110. .resource = nor_flash_resources,
  111. .num_resources = ARRAY_SIZE(nor_flash_resources),
  112. .dev = {
  113. .platform_data = &nor_flash_data,
  114. },
  115. };
  116. /* SH Eth */
  117. #define SH_ETH_ADDR (0xA4600000)
  118. static struct resource sh_eth_resources[] = {
  119. [0] = {
  120. .start = SH_ETH_ADDR,
  121. .end = SH_ETH_ADDR + 0x1FC,
  122. .flags = IORESOURCE_MEM,
  123. },
  124. [1] = {
  125. .start = 91,
  126. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  127. },
  128. };
  129. static struct sh_eth_plat_data sh_eth_plat = {
  130. .phy = 0x1f, /* SMSC LAN8700 */
  131. .edmac_endian = EDMAC_LITTLE_ENDIAN,
  132. .ether_link_active_low = 1
  133. };
  134. static struct platform_device sh_eth_device = {
  135. .name = "sh-eth",
  136. .id = 0,
  137. .dev = {
  138. .platform_data = &sh_eth_plat,
  139. },
  140. .num_resources = ARRAY_SIZE(sh_eth_resources),
  141. .resource = sh_eth_resources,
  142. .archdata = {
  143. .hwblk_id = HWBLK_ETHER,
  144. },
  145. };
  146. /* USB0 host */
  147. static void usb0_port_power(int port, int power)
  148. {
  149. gpio_set_value(GPIO_PTB4, power);
  150. }
  151. static struct r8a66597_platdata usb0_host_data = {
  152. .on_chip = 1,
  153. .port_power = usb0_port_power,
  154. };
  155. static struct resource usb0_host_resources[] = {
  156. [0] = {
  157. .start = 0xa4d80000,
  158. .end = 0xa4d80124 - 1,
  159. .flags = IORESOURCE_MEM,
  160. },
  161. [1] = {
  162. .start = 65,
  163. .end = 65,
  164. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  165. },
  166. };
  167. static struct platform_device usb0_host_device = {
  168. .name = "r8a66597_hcd",
  169. .id = 0,
  170. .dev = {
  171. .dma_mask = NULL, /* not use dma */
  172. .coherent_dma_mask = 0xffffffff,
  173. .platform_data = &usb0_host_data,
  174. },
  175. .num_resources = ARRAY_SIZE(usb0_host_resources),
  176. .resource = usb0_host_resources,
  177. };
  178. /* USB1 host/function */
  179. static void usb1_port_power(int port, int power)
  180. {
  181. gpio_set_value(GPIO_PTB5, power);
  182. }
  183. static struct r8a66597_platdata usb1_common_data = {
  184. .on_chip = 1,
  185. .port_power = usb1_port_power,
  186. };
  187. static struct resource usb1_common_resources[] = {
  188. [0] = {
  189. .start = 0xa4d90000,
  190. .end = 0xa4d90124 - 1,
  191. .flags = IORESOURCE_MEM,
  192. },
  193. [1] = {
  194. .start = 66,
  195. .end = 66,
  196. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  197. },
  198. };
  199. static struct platform_device usb1_common_device = {
  200. /* .name will be added in arch_setup */
  201. .id = 1,
  202. .dev = {
  203. .dma_mask = NULL, /* not use dma */
  204. .coherent_dma_mask = 0xffffffff,
  205. .platform_data = &usb1_common_data,
  206. },
  207. .num_resources = ARRAY_SIZE(usb1_common_resources),
  208. .resource = usb1_common_resources,
  209. };
  210. /* LCDC */
  211. static struct sh_mobile_lcdc_info lcdc_info = {
  212. .ch[0] = {
  213. .interface_type = RGB18,
  214. .chan = LCDC_CHAN_MAINLCD,
  215. .bpp = 16,
  216. .lcd_cfg = {
  217. .sync = 0, /* hsync and vsync are active low */
  218. },
  219. .lcd_size_cfg = { /* 7.0 inch */
  220. .width = 152,
  221. .height = 91,
  222. },
  223. .board_cfg = {
  224. },
  225. }
  226. };
  227. static struct resource lcdc_resources[] = {
  228. [0] = {
  229. .name = "LCDC",
  230. .start = 0xfe940000,
  231. .end = 0xfe942fff,
  232. .flags = IORESOURCE_MEM,
  233. },
  234. [1] = {
  235. .start = 106,
  236. .flags = IORESOURCE_IRQ,
  237. },
  238. };
  239. static struct platform_device lcdc_device = {
  240. .name = "sh_mobile_lcdc_fb",
  241. .num_resources = ARRAY_SIZE(lcdc_resources),
  242. .resource = lcdc_resources,
  243. .dev = {
  244. .platform_data = &lcdc_info,
  245. },
  246. .archdata = {
  247. .hwblk_id = HWBLK_LCDC,
  248. },
  249. };
  250. /* CEU0 */
  251. static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
  252. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  253. };
  254. static struct resource ceu0_resources[] = {
  255. [0] = {
  256. .name = "CEU0",
  257. .start = 0xfe910000,
  258. .end = 0xfe91009f,
  259. .flags = IORESOURCE_MEM,
  260. },
  261. [1] = {
  262. .start = 52,
  263. .flags = IORESOURCE_IRQ,
  264. },
  265. [2] = {
  266. /* place holder for contiguous memory */
  267. },
  268. };
  269. static struct platform_device ceu0_device = {
  270. .name = "sh_mobile_ceu",
  271. .id = 0, /* "ceu0" clock */
  272. .num_resources = ARRAY_SIZE(ceu0_resources),
  273. .resource = ceu0_resources,
  274. .dev = {
  275. .platform_data = &sh_mobile_ceu0_info,
  276. },
  277. .archdata = {
  278. .hwblk_id = HWBLK_CEU0,
  279. },
  280. };
  281. /* CEU1 */
  282. static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
  283. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  284. };
  285. static struct resource ceu1_resources[] = {
  286. [0] = {
  287. .name = "CEU1",
  288. .start = 0xfe914000,
  289. .end = 0xfe91409f,
  290. .flags = IORESOURCE_MEM,
  291. },
  292. [1] = {
  293. .start = 63,
  294. .flags = IORESOURCE_IRQ,
  295. },
  296. [2] = {
  297. /* place holder for contiguous memory */
  298. },
  299. };
  300. static struct platform_device ceu1_device = {
  301. .name = "sh_mobile_ceu",
  302. .id = 1, /* "ceu1" clock */
  303. .num_resources = ARRAY_SIZE(ceu1_resources),
  304. .resource = ceu1_resources,
  305. .dev = {
  306. .platform_data = &sh_mobile_ceu1_info,
  307. },
  308. .archdata = {
  309. .hwblk_id = HWBLK_CEU1,
  310. },
  311. };
  312. /* I2C device */
  313. static struct i2c_board_info i2c0_devices[] = {
  314. {
  315. I2C_BOARD_INFO("da7210", 0x1a),
  316. },
  317. };
  318. static struct i2c_board_info i2c1_devices[] = {
  319. {
  320. I2C_BOARD_INFO("r2025sd", 0x32),
  321. },
  322. {
  323. I2C_BOARD_INFO("lis3lv02d", 0x1c),
  324. .irq = 33,
  325. }
  326. };
  327. /* KEYSC */
  328. static struct sh_keysc_info keysc_info = {
  329. .mode = SH_KEYSC_MODE_1,
  330. .scan_timing = 3,
  331. .delay = 50,
  332. .kycr2_delay = 100,
  333. .keycodes = { KEY_1, 0, 0, 0, 0,
  334. KEY_2, 0, 0, 0, 0,
  335. KEY_3, 0, 0, 0, 0,
  336. KEY_4, 0, 0, 0, 0,
  337. KEY_5, 0, 0, 0, 0,
  338. KEY_6, 0, 0, 0, 0, },
  339. };
  340. static struct resource keysc_resources[] = {
  341. [0] = {
  342. .name = "KEYSC",
  343. .start = 0x044b0000,
  344. .end = 0x044b000f,
  345. .flags = IORESOURCE_MEM,
  346. },
  347. [1] = {
  348. .start = 79,
  349. .flags = IORESOURCE_IRQ,
  350. },
  351. };
  352. static struct platform_device keysc_device = {
  353. .name = "sh_keysc",
  354. .id = 0, /* keysc0 clock */
  355. .num_resources = ARRAY_SIZE(keysc_resources),
  356. .resource = keysc_resources,
  357. .dev = {
  358. .platform_data = &keysc_info,
  359. },
  360. .archdata = {
  361. .hwblk_id = HWBLK_KEYSC,
  362. },
  363. };
  364. /* TouchScreen */
  365. #define IRQ0 32
  366. static int ts_get_pendown_state(void)
  367. {
  368. int val = 0;
  369. gpio_free(GPIO_FN_INTC_IRQ0);
  370. gpio_request(GPIO_PTZ0, NULL);
  371. gpio_direction_input(GPIO_PTZ0);
  372. val = gpio_get_value(GPIO_PTZ0);
  373. gpio_free(GPIO_PTZ0);
  374. gpio_request(GPIO_FN_INTC_IRQ0, NULL);
  375. return val ? 0 : 1;
  376. }
  377. static int ts_init(void)
  378. {
  379. gpio_request(GPIO_FN_INTC_IRQ0, NULL);
  380. return 0;
  381. }
  382. static struct tsc2007_platform_data tsc2007_info = {
  383. .model = 2007,
  384. .x_plate_ohms = 180,
  385. .get_pendown_state = ts_get_pendown_state,
  386. .init_platform_hw = ts_init,
  387. };
  388. static struct i2c_board_info ts_i2c_clients = {
  389. I2C_BOARD_INFO("tsc2007", 0x48),
  390. .type = "tsc2007",
  391. .platform_data = &tsc2007_info,
  392. .irq = IRQ0,
  393. };
  394. #ifdef CONFIG_MFD_SH_MOBILE_SDHI
  395. /* SDHI0 */
  396. static void sdhi0_set_pwr(struct platform_device *pdev, int state)
  397. {
  398. gpio_set_value(GPIO_PTB6, state);
  399. }
  400. static struct sh_mobile_sdhi_info sdhi0_info = {
  401. .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
  402. .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
  403. .set_pwr = sdhi0_set_pwr,
  404. };
  405. static struct resource sdhi0_resources[] = {
  406. [0] = {
  407. .name = "SDHI0",
  408. .start = 0x04ce0000,
  409. .end = 0x04ce01ff,
  410. .flags = IORESOURCE_MEM,
  411. },
  412. [1] = {
  413. .start = 100,
  414. .flags = IORESOURCE_IRQ,
  415. },
  416. };
  417. static struct platform_device sdhi0_device = {
  418. .name = "sh_mobile_sdhi",
  419. .num_resources = ARRAY_SIZE(sdhi0_resources),
  420. .resource = sdhi0_resources,
  421. .id = 0,
  422. .dev = {
  423. .platform_data = &sdhi0_info,
  424. },
  425. .archdata = {
  426. .hwblk_id = HWBLK_SDHI0,
  427. },
  428. };
  429. #if !defined(CONFIG_MMC_SH_MMCIF)
  430. /* SDHI1 */
  431. static void sdhi1_set_pwr(struct platform_device *pdev, int state)
  432. {
  433. gpio_set_value(GPIO_PTB7, state);
  434. }
  435. static struct sh_mobile_sdhi_info sdhi1_info = {
  436. .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
  437. .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
  438. .set_pwr = sdhi1_set_pwr,
  439. };
  440. static struct resource sdhi1_resources[] = {
  441. [0] = {
  442. .name = "SDHI1",
  443. .start = 0x04cf0000,
  444. .end = 0x04cf01ff,
  445. .flags = IORESOURCE_MEM,
  446. },
  447. [1] = {
  448. .start = 23,
  449. .flags = IORESOURCE_IRQ,
  450. },
  451. };
  452. static struct platform_device sdhi1_device = {
  453. .name = "sh_mobile_sdhi",
  454. .num_resources = ARRAY_SIZE(sdhi1_resources),
  455. .resource = sdhi1_resources,
  456. .id = 1,
  457. .dev = {
  458. .platform_data = &sdhi1_info,
  459. },
  460. .archdata = {
  461. .hwblk_id = HWBLK_SDHI1,
  462. },
  463. };
  464. #endif /* CONFIG_MMC_SH_MMCIF */
  465. #else
  466. /* MMC SPI */
  467. static int mmc_spi_get_ro(struct device *dev)
  468. {
  469. return gpio_get_value(GPIO_PTY6);
  470. }
  471. static int mmc_spi_get_cd(struct device *dev)
  472. {
  473. return !gpio_get_value(GPIO_PTY7);
  474. }
  475. static void mmc_spi_setpower(struct device *dev, unsigned int maskval)
  476. {
  477. gpio_set_value(GPIO_PTB6, maskval ? 1 : 0);
  478. }
  479. static struct mmc_spi_platform_data mmc_spi_info = {
  480. .get_ro = mmc_spi_get_ro,
  481. .get_cd = mmc_spi_get_cd,
  482. .caps = MMC_CAP_NEEDS_POLL,
  483. .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */
  484. .setpower = mmc_spi_setpower,
  485. };
  486. static struct spi_board_info spi_bus[] = {
  487. {
  488. .modalias = "mmc_spi",
  489. .platform_data = &mmc_spi_info,
  490. .max_speed_hz = 5000000,
  491. .mode = SPI_MODE_0,
  492. .controller_data = (void *) GPIO_PTM4,
  493. },
  494. };
  495. /* MSIOF0 */
  496. static struct sh_msiof_spi_info msiof0_data = {
  497. .num_chipselect = 1,
  498. };
  499. static struct resource msiof0_resources[] = {
  500. [0] = {
  501. .name = "MSIOF0",
  502. .start = 0xa4c40000,
  503. .end = 0xa4c40063,
  504. .flags = IORESOURCE_MEM,
  505. },
  506. [1] = {
  507. .start = 84,
  508. .flags = IORESOURCE_IRQ,
  509. },
  510. };
  511. static struct platform_device msiof0_device = {
  512. .name = "spi_sh_msiof",
  513. .id = 0, /* MSIOF0 */
  514. .dev = {
  515. .platform_data = &msiof0_data,
  516. },
  517. .num_resources = ARRAY_SIZE(msiof0_resources),
  518. .resource = msiof0_resources,
  519. .archdata = {
  520. .hwblk_id = HWBLK_MSIOF0,
  521. },
  522. };
  523. #endif
  524. /* I2C Video/Camera */
  525. static struct i2c_board_info i2c_camera[] = {
  526. {
  527. I2C_BOARD_INFO("tw9910", 0x45),
  528. },
  529. {
  530. /* 1st camera */
  531. I2C_BOARD_INFO("mt9t112", 0x3c),
  532. },
  533. {
  534. /* 2nd camera */
  535. I2C_BOARD_INFO("mt9t112", 0x3c),
  536. },
  537. };
  538. /* tw9910 */
  539. static int tw9910_power(struct device *dev, int mode)
  540. {
  541. int val = mode ? 0 : 1;
  542. gpio_set_value(GPIO_PTU2, val);
  543. if (mode)
  544. mdelay(100);
  545. return 0;
  546. }
  547. static struct tw9910_video_info tw9910_info = {
  548. .buswidth = SOCAM_DATAWIDTH_8,
  549. .mpout = TW9910_MPO_FIELD,
  550. };
  551. static struct soc_camera_link tw9910_link = {
  552. .i2c_adapter_id = 0,
  553. .bus_id = 1,
  554. .power = tw9910_power,
  555. .board_info = &i2c_camera[0],
  556. .module_name = "tw9910",
  557. .priv = &tw9910_info,
  558. };
  559. /* mt9t112 */
  560. static int mt9t112_power1(struct device *dev, int mode)
  561. {
  562. gpio_set_value(GPIO_PTA3, mode);
  563. if (mode)
  564. mdelay(100);
  565. return 0;
  566. }
  567. static struct mt9t112_camera_info mt9t112_info1 = {
  568. .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
  569. .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
  570. };
  571. static struct soc_camera_link mt9t112_link1 = {
  572. .i2c_adapter_id = 0,
  573. .power = mt9t112_power1,
  574. .bus_id = 0,
  575. .board_info = &i2c_camera[1],
  576. .module_name = "mt9t112",
  577. .priv = &mt9t112_info1,
  578. };
  579. static int mt9t112_power2(struct device *dev, int mode)
  580. {
  581. gpio_set_value(GPIO_PTA4, mode);
  582. if (mode)
  583. mdelay(100);
  584. return 0;
  585. }
  586. static struct mt9t112_camera_info mt9t112_info2 = {
  587. .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
  588. .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
  589. };
  590. static struct soc_camera_link mt9t112_link2 = {
  591. .i2c_adapter_id = 1,
  592. .power = mt9t112_power2,
  593. .bus_id = 1,
  594. .board_info = &i2c_camera[2],
  595. .module_name = "mt9t112",
  596. .priv = &mt9t112_info2,
  597. };
  598. static struct platform_device camera_devices[] = {
  599. {
  600. .name = "soc-camera-pdrv",
  601. .id = 0,
  602. .dev = {
  603. .platform_data = &tw9910_link,
  604. },
  605. },
  606. {
  607. .name = "soc-camera-pdrv",
  608. .id = 1,
  609. .dev = {
  610. .platform_data = &mt9t112_link1,
  611. },
  612. },
  613. {
  614. .name = "soc-camera-pdrv",
  615. .id = 2,
  616. .dev = {
  617. .platform_data = &mt9t112_link2,
  618. },
  619. },
  620. };
  621. /* FSI */
  622. /*
  623. * FSI-B use external clock which came from da7210.
  624. * So, we should change parent of fsi
  625. */
  626. #define FCLKBCR 0xa415000c
  627. static void fsimck_init(struct clk *clk)
  628. {
  629. u32 status = __raw_readl(clk->enable_reg);
  630. /* use external clock */
  631. status &= ~0x000000ff;
  632. status |= 0x00000080;
  633. __raw_writel(status, clk->enable_reg);
  634. }
  635. static struct clk_ops fsimck_clk_ops = {
  636. .init = fsimck_init,
  637. };
  638. static struct clk fsimckb_clk = {
  639. .ops = &fsimck_clk_ops,
  640. .enable_reg = (void __iomem *)FCLKBCR,
  641. .rate = 0, /* unknown */
  642. };
  643. static struct sh_fsi_platform_info fsi_info = {
  644. .portb_flags = SH_FSI_BRS_INV |
  645. SH_FSI_OUT_SLAVE_MODE |
  646. SH_FSI_IN_SLAVE_MODE |
  647. SH_FSI_OFMT(I2S) |
  648. SH_FSI_IFMT(I2S),
  649. };
  650. static struct resource fsi_resources[] = {
  651. [0] = {
  652. .name = "FSI",
  653. .start = 0xFE3C0000,
  654. .end = 0xFE3C021d,
  655. .flags = IORESOURCE_MEM,
  656. },
  657. [1] = {
  658. .start = 108,
  659. .flags = IORESOURCE_IRQ,
  660. },
  661. };
  662. static struct platform_device fsi_device = {
  663. .name = "sh_fsi",
  664. .id = 0,
  665. .num_resources = ARRAY_SIZE(fsi_resources),
  666. .resource = fsi_resources,
  667. .dev = {
  668. .platform_data = &fsi_info,
  669. },
  670. .archdata = {
  671. .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
  672. },
  673. };
  674. /* IrDA */
  675. static struct resource irda_resources[] = {
  676. [0] = {
  677. .name = "IrDA",
  678. .start = 0xA45D0000,
  679. .end = 0xA45D0049,
  680. .flags = IORESOURCE_MEM,
  681. },
  682. [1] = {
  683. .start = 20,
  684. .flags = IORESOURCE_IRQ,
  685. },
  686. };
  687. static struct platform_device irda_device = {
  688. .name = "sh_sir",
  689. .num_resources = ARRAY_SIZE(irda_resources),
  690. .resource = irda_resources,
  691. };
  692. #include <media/ak881x.h>
  693. #include <media/sh_vou.h>
  694. static struct ak881x_pdata ak881x_pdata = {
  695. .flags = AK881X_IF_MODE_SLAVE,
  696. };
  697. static struct i2c_board_info ak8813 = {
  698. I2C_BOARD_INFO("ak8813", 0x20),
  699. .platform_data = &ak881x_pdata,
  700. };
  701. static struct sh_vou_pdata sh_vou_pdata = {
  702. .bus_fmt = SH_VOU_BUS_8BIT,
  703. .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
  704. .board_info = &ak8813,
  705. .i2c_adap = 0,
  706. .module_name = "ak881x",
  707. };
  708. static struct resource sh_vou_resources[] = {
  709. [0] = {
  710. .start = 0xfe960000,
  711. .end = 0xfe962043,
  712. .flags = IORESOURCE_MEM,
  713. },
  714. [1] = {
  715. .start = 55,
  716. .flags = IORESOURCE_IRQ,
  717. },
  718. };
  719. static struct platform_device vou_device = {
  720. .name = "sh-vou",
  721. .id = -1,
  722. .num_resources = ARRAY_SIZE(sh_vou_resources),
  723. .resource = sh_vou_resources,
  724. .dev = {
  725. .platform_data = &sh_vou_pdata,
  726. },
  727. .archdata = {
  728. .hwblk_id = HWBLK_VOU,
  729. },
  730. };
  731. #if defined(CONFIG_MMC_SH_MMCIF)
  732. /* SH_MMCIF */
  733. static void mmcif_set_pwr(struct platform_device *pdev, int state)
  734. {
  735. gpio_set_value(GPIO_PTB7, state);
  736. }
  737. static void mmcif_down_pwr(struct platform_device *pdev)
  738. {
  739. gpio_set_value(GPIO_PTB7, 0);
  740. }
  741. static struct resource sh_mmcif_resources[] = {
  742. [0] = {
  743. .name = "SH_MMCIF",
  744. .start = 0xA4CA0000,
  745. .end = 0xA4CA00FF,
  746. .flags = IORESOURCE_MEM,
  747. },
  748. [1] = {
  749. /* MMC2I */
  750. .start = 29,
  751. .flags = IORESOURCE_IRQ,
  752. },
  753. [2] = {
  754. /* MMC3I */
  755. .start = 30,
  756. .flags = IORESOURCE_IRQ,
  757. },
  758. };
  759. static struct sh_mmcif_plat_data sh_mmcif_plat = {
  760. .set_pwr = mmcif_set_pwr,
  761. .down_pwr = mmcif_down_pwr,
  762. .sup_pclk = 0, /* SH7724: Max Pclk/2 */
  763. .caps = MMC_CAP_4_BIT_DATA |
  764. MMC_CAP_8_BIT_DATA |
  765. MMC_CAP_NEEDS_POLL,
  766. .ocr = MMC_VDD_32_33 | MMC_VDD_33_34,
  767. };
  768. static struct platform_device sh_mmcif_device = {
  769. .name = "sh_mmcif",
  770. .id = 0,
  771. .dev = {
  772. .platform_data = &sh_mmcif_plat,
  773. },
  774. .num_resources = ARRAY_SIZE(sh_mmcif_resources),
  775. .resource = sh_mmcif_resources,
  776. };
  777. #endif
  778. static struct platform_device *ecovec_devices[] __initdata = {
  779. &heartbeat_device,
  780. &nor_flash_device,
  781. &sh_eth_device,
  782. &usb0_host_device,
  783. &usb1_common_device,
  784. &lcdc_device,
  785. &ceu0_device,
  786. &ceu1_device,
  787. &keysc_device,
  788. #ifdef CONFIG_MFD_SH_MOBILE_SDHI
  789. &sdhi0_device,
  790. #if !defined(CONFIG_MMC_SH_MMCIF)
  791. &sdhi1_device,
  792. #endif
  793. #else
  794. &msiof0_device,
  795. #endif
  796. &camera_devices[0],
  797. &camera_devices[1],
  798. &camera_devices[2],
  799. &fsi_device,
  800. &irda_device,
  801. &vou_device,
  802. #if defined(CONFIG_MMC_SH_MMCIF)
  803. &sh_mmcif_device,
  804. #endif
  805. };
  806. #ifdef CONFIG_I2C
  807. #define EEPROM_ADDR 0x50
  808. static u8 mac_read(struct i2c_adapter *a, u8 command)
  809. {
  810. struct i2c_msg msg[2];
  811. u8 buf;
  812. int ret;
  813. msg[0].addr = EEPROM_ADDR;
  814. msg[0].flags = 0;
  815. msg[0].len = 1;
  816. msg[0].buf = &command;
  817. msg[1].addr = EEPROM_ADDR;
  818. msg[1].flags = I2C_M_RD;
  819. msg[1].len = 1;
  820. msg[1].buf = &buf;
  821. ret = i2c_transfer(a, msg, 2);
  822. if (ret < 0) {
  823. printk(KERN_ERR "error %d\n", ret);
  824. buf = 0xff;
  825. }
  826. return buf;
  827. }
  828. static void __init sh_eth_init(struct sh_eth_plat_data *pd)
  829. {
  830. struct i2c_adapter *a = i2c_get_adapter(1);
  831. int i;
  832. if (!a) {
  833. pr_err("can not get I2C 1\n");
  834. return;
  835. }
  836. /* read MAC address frome EEPROM */
  837. for (i = 0; i < sizeof(pd->mac_addr); i++) {
  838. pd->mac_addr[i] = mac_read(a, 0x10 + i);
  839. msleep(10);
  840. }
  841. i2c_put_adapter(a);
  842. }
  843. #else
  844. static void __init sh_eth_init(struct sh_eth_plat_data *pd)
  845. {
  846. pr_err("unable to read sh_eth MAC address\n");
  847. }
  848. #endif
  849. #define PORT_HIZA 0xA4050158
  850. #define IODRIVEA 0xA405018A
  851. extern char ecovec24_sdram_enter_start;
  852. extern char ecovec24_sdram_enter_end;
  853. extern char ecovec24_sdram_leave_start;
  854. extern char ecovec24_sdram_leave_end;
  855. static int __init arch_setup(void)
  856. {
  857. struct clk *clk;
  858. /* register board specific self-refresh code */
  859. sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
  860. SUSP_SH_RSTANDBY,
  861. &ecovec24_sdram_enter_start,
  862. &ecovec24_sdram_enter_end,
  863. &ecovec24_sdram_leave_start,
  864. &ecovec24_sdram_leave_end);
  865. /* enable STATUS0, STATUS2 and PDSTATUS */
  866. gpio_request(GPIO_FN_STATUS0, NULL);
  867. gpio_request(GPIO_FN_STATUS2, NULL);
  868. gpio_request(GPIO_FN_PDSTATUS, NULL);
  869. /* enable SCIFA0 */
  870. gpio_request(GPIO_FN_SCIF0_TXD, NULL);
  871. gpio_request(GPIO_FN_SCIF0_RXD, NULL);
  872. /* enable debug LED */
  873. gpio_request(GPIO_PTG0, NULL);
  874. gpio_request(GPIO_PTG1, NULL);
  875. gpio_request(GPIO_PTG2, NULL);
  876. gpio_request(GPIO_PTG3, NULL);
  877. gpio_direction_output(GPIO_PTG0, 0);
  878. gpio_direction_output(GPIO_PTG1, 0);
  879. gpio_direction_output(GPIO_PTG2, 0);
  880. gpio_direction_output(GPIO_PTG3, 0);
  881. __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
  882. /* enable SH-Eth */
  883. gpio_request(GPIO_PTA1, NULL);
  884. gpio_direction_output(GPIO_PTA1, 1);
  885. mdelay(20);
  886. gpio_request(GPIO_FN_RMII_RXD0, NULL);
  887. gpio_request(GPIO_FN_RMII_RXD1, NULL);
  888. gpio_request(GPIO_FN_RMII_TXD0, NULL);
  889. gpio_request(GPIO_FN_RMII_TXD1, NULL);
  890. gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
  891. gpio_request(GPIO_FN_RMII_TX_EN, NULL);
  892. gpio_request(GPIO_FN_RMII_RX_ER, NULL);
  893. gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
  894. gpio_request(GPIO_FN_MDIO, NULL);
  895. gpio_request(GPIO_FN_MDC, NULL);
  896. gpio_request(GPIO_FN_LNKSTA, NULL);
  897. /* enable USB */
  898. __raw_writew(0x0000, 0xA4D80000);
  899. __raw_writew(0x0000, 0xA4D90000);
  900. gpio_request(GPIO_PTB3, NULL);
  901. gpio_request(GPIO_PTB4, NULL);
  902. gpio_request(GPIO_PTB5, NULL);
  903. gpio_direction_input(GPIO_PTB3);
  904. gpio_direction_output(GPIO_PTB4, 0);
  905. gpio_direction_output(GPIO_PTB5, 0);
  906. __raw_writew(0x0600, 0xa40501d4);
  907. __raw_writew(0x0600, 0xa4050192);
  908. if (gpio_get_value(GPIO_PTB3)) {
  909. printk(KERN_INFO "USB1 function is selected\n");
  910. usb1_common_device.name = "r8a66597_udc";
  911. } else {
  912. printk(KERN_INFO "USB1 host is selected\n");
  913. usb1_common_device.name = "r8a66597_hcd";
  914. }
  915. /* enable LCDC */
  916. gpio_request(GPIO_FN_LCDD23, NULL);
  917. gpio_request(GPIO_FN_LCDD22, NULL);
  918. gpio_request(GPIO_FN_LCDD21, NULL);
  919. gpio_request(GPIO_FN_LCDD20, NULL);
  920. gpio_request(GPIO_FN_LCDD19, NULL);
  921. gpio_request(GPIO_FN_LCDD18, NULL);
  922. gpio_request(GPIO_FN_LCDD17, NULL);
  923. gpio_request(GPIO_FN_LCDD16, NULL);
  924. gpio_request(GPIO_FN_LCDD15, NULL);
  925. gpio_request(GPIO_FN_LCDD14, NULL);
  926. gpio_request(GPIO_FN_LCDD13, NULL);
  927. gpio_request(GPIO_FN_LCDD12, NULL);
  928. gpio_request(GPIO_FN_LCDD11, NULL);
  929. gpio_request(GPIO_FN_LCDD10, NULL);
  930. gpio_request(GPIO_FN_LCDD9, NULL);
  931. gpio_request(GPIO_FN_LCDD8, NULL);
  932. gpio_request(GPIO_FN_LCDD7, NULL);
  933. gpio_request(GPIO_FN_LCDD6, NULL);
  934. gpio_request(GPIO_FN_LCDD5, NULL);
  935. gpio_request(GPIO_FN_LCDD4, NULL);
  936. gpio_request(GPIO_FN_LCDD3, NULL);
  937. gpio_request(GPIO_FN_LCDD2, NULL);
  938. gpio_request(GPIO_FN_LCDD1, NULL);
  939. gpio_request(GPIO_FN_LCDD0, NULL);
  940. gpio_request(GPIO_FN_LCDDISP, NULL);
  941. gpio_request(GPIO_FN_LCDHSYN, NULL);
  942. gpio_request(GPIO_FN_LCDDCK, NULL);
  943. gpio_request(GPIO_FN_LCDVSYN, NULL);
  944. gpio_request(GPIO_FN_LCDDON, NULL);
  945. gpio_request(GPIO_FN_LCDLCLK, NULL);
  946. __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
  947. gpio_request(GPIO_PTE6, NULL);
  948. gpio_request(GPIO_PTU1, NULL);
  949. gpio_request(GPIO_PTR1, NULL);
  950. gpio_request(GPIO_PTA2, NULL);
  951. gpio_direction_input(GPIO_PTE6);
  952. gpio_direction_output(GPIO_PTU1, 0);
  953. gpio_direction_output(GPIO_PTR1, 0);
  954. gpio_direction_output(GPIO_PTA2, 0);
  955. /* I/O buffer drive ability is high */
  956. __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
  957. if (gpio_get_value(GPIO_PTE6)) {
  958. /* DVI */
  959. lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
  960. lcdc_info.ch[0].clock_divider = 1,
  961. lcdc_info.ch[0].lcd_cfg.name = "DVI";
  962. lcdc_info.ch[0].lcd_cfg.xres = 1280;
  963. lcdc_info.ch[0].lcd_cfg.yres = 720;
  964. lcdc_info.ch[0].lcd_cfg.left_margin = 220;
  965. lcdc_info.ch[0].lcd_cfg.right_margin = 110;
  966. lcdc_info.ch[0].lcd_cfg.hsync_len = 40;
  967. lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
  968. lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
  969. lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
  970. gpio_set_value(GPIO_PTA2, 1);
  971. gpio_set_value(GPIO_PTU1, 1);
  972. } else {
  973. /* Panel */
  974. lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
  975. lcdc_info.ch[0].clock_divider = 2,
  976. lcdc_info.ch[0].lcd_cfg.name = "Panel";
  977. lcdc_info.ch[0].lcd_cfg.xres = 800;
  978. lcdc_info.ch[0].lcd_cfg.yres = 480;
  979. lcdc_info.ch[0].lcd_cfg.left_margin = 220;
  980. lcdc_info.ch[0].lcd_cfg.right_margin = 110;
  981. lcdc_info.ch[0].lcd_cfg.hsync_len = 70;
  982. lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
  983. lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
  984. lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
  985. gpio_set_value(GPIO_PTR1, 1);
  986. /* FIXME
  987. *
  988. * LCDDON control is needed for Panel,
  989. * but current sh_mobile_lcdc driver doesn't control it.
  990. * It is temporary correspondence
  991. */
  992. gpio_request(GPIO_PTF4, NULL);
  993. gpio_direction_output(GPIO_PTF4, 1);
  994. /* enable TouchScreen */
  995. i2c_register_board_info(0, &ts_i2c_clients, 1);
  996. set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
  997. }
  998. /* enable CEU0 */
  999. gpio_request(GPIO_FN_VIO0_D15, NULL);
  1000. gpio_request(GPIO_FN_VIO0_D14, NULL);
  1001. gpio_request(GPIO_FN_VIO0_D13, NULL);
  1002. gpio_request(GPIO_FN_VIO0_D12, NULL);
  1003. gpio_request(GPIO_FN_VIO0_D11, NULL);
  1004. gpio_request(GPIO_FN_VIO0_D10, NULL);
  1005. gpio_request(GPIO_FN_VIO0_D9, NULL);
  1006. gpio_request(GPIO_FN_VIO0_D8, NULL);
  1007. gpio_request(GPIO_FN_VIO0_D7, NULL);
  1008. gpio_request(GPIO_FN_VIO0_D6, NULL);
  1009. gpio_request(GPIO_FN_VIO0_D5, NULL);
  1010. gpio_request(GPIO_FN_VIO0_D4, NULL);
  1011. gpio_request(GPIO_FN_VIO0_D3, NULL);
  1012. gpio_request(GPIO_FN_VIO0_D2, NULL);
  1013. gpio_request(GPIO_FN_VIO0_D1, NULL);
  1014. gpio_request(GPIO_FN_VIO0_D0, NULL);
  1015. gpio_request(GPIO_FN_VIO0_VD, NULL);
  1016. gpio_request(GPIO_FN_VIO0_CLK, NULL);
  1017. gpio_request(GPIO_FN_VIO0_FLD, NULL);
  1018. gpio_request(GPIO_FN_VIO0_HD, NULL);
  1019. platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
  1020. /* enable CEU1 */
  1021. gpio_request(GPIO_FN_VIO1_D7, NULL);
  1022. gpio_request(GPIO_FN_VIO1_D6, NULL);
  1023. gpio_request(GPIO_FN_VIO1_D5, NULL);
  1024. gpio_request(GPIO_FN_VIO1_D4, NULL);
  1025. gpio_request(GPIO_FN_VIO1_D3, NULL);
  1026. gpio_request(GPIO_FN_VIO1_D2, NULL);
  1027. gpio_request(GPIO_FN_VIO1_D1, NULL);
  1028. gpio_request(GPIO_FN_VIO1_D0, NULL);
  1029. gpio_request(GPIO_FN_VIO1_FLD, NULL);
  1030. gpio_request(GPIO_FN_VIO1_HD, NULL);
  1031. gpio_request(GPIO_FN_VIO1_VD, NULL);
  1032. gpio_request(GPIO_FN_VIO1_CLK, NULL);
  1033. platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
  1034. /* enable KEYSC */
  1035. gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
  1036. gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
  1037. gpio_request(GPIO_FN_KEYOUT3, NULL);
  1038. gpio_request(GPIO_FN_KEYOUT2, NULL);
  1039. gpio_request(GPIO_FN_KEYOUT1, NULL);
  1040. gpio_request(GPIO_FN_KEYOUT0, NULL);
  1041. gpio_request(GPIO_FN_KEYIN0, NULL);
  1042. /* enable user debug switch */
  1043. gpio_request(GPIO_PTR0, NULL);
  1044. gpio_request(GPIO_PTR4, NULL);
  1045. gpio_request(GPIO_PTR5, NULL);
  1046. gpio_request(GPIO_PTR6, NULL);
  1047. gpio_direction_input(GPIO_PTR0);
  1048. gpio_direction_input(GPIO_PTR4);
  1049. gpio_direction_input(GPIO_PTR5);
  1050. gpio_direction_input(GPIO_PTR6);
  1051. #ifdef CONFIG_MFD_SH_MOBILE_SDHI
  1052. /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
  1053. gpio_request(GPIO_FN_SDHI0CD, NULL);
  1054. gpio_request(GPIO_FN_SDHI0WP, NULL);
  1055. gpio_request(GPIO_FN_SDHI0CMD, NULL);
  1056. gpio_request(GPIO_FN_SDHI0CLK, NULL);
  1057. gpio_request(GPIO_FN_SDHI0D3, NULL);
  1058. gpio_request(GPIO_FN_SDHI0D2, NULL);
  1059. gpio_request(GPIO_FN_SDHI0D1, NULL);
  1060. gpio_request(GPIO_FN_SDHI0D0, NULL);
  1061. gpio_request(GPIO_PTB6, NULL);
  1062. gpio_direction_output(GPIO_PTB6, 0);
  1063. #if !defined(CONFIG_MMC_SH_MMCIF)
  1064. /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
  1065. gpio_request(GPIO_FN_SDHI1CD, NULL);
  1066. gpio_request(GPIO_FN_SDHI1WP, NULL);
  1067. gpio_request(GPIO_FN_SDHI1CMD, NULL);
  1068. gpio_request(GPIO_FN_SDHI1CLK, NULL);
  1069. gpio_request(GPIO_FN_SDHI1D3, NULL);
  1070. gpio_request(GPIO_FN_SDHI1D2, NULL);
  1071. gpio_request(GPIO_FN_SDHI1D1, NULL);
  1072. gpio_request(GPIO_FN_SDHI1D0, NULL);
  1073. gpio_request(GPIO_PTB7, NULL);
  1074. gpio_direction_output(GPIO_PTB7, 0);
  1075. /* I/O buffer drive ability is high for SDHI1 */
  1076. __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
  1077. #endif /* CONFIG_MMC_SH_MMCIF */
  1078. #else
  1079. /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
  1080. gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
  1081. gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
  1082. gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
  1083. gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */
  1084. gpio_direction_output(GPIO_PTM4, 1); /* active low CS */
  1085. gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
  1086. gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
  1087. gpio_request(GPIO_PTY6, NULL); /* write protect */
  1088. gpio_direction_input(GPIO_PTY6);
  1089. gpio_request(GPIO_PTY7, NULL); /* card detect */
  1090. gpio_direction_input(GPIO_PTY7);
  1091. spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
  1092. #endif
  1093. /* enable Video */
  1094. gpio_request(GPIO_PTU2, NULL);
  1095. gpio_direction_output(GPIO_PTU2, 1);
  1096. /* enable Camera */
  1097. gpio_request(GPIO_PTA3, NULL);
  1098. gpio_request(GPIO_PTA4, NULL);
  1099. gpio_direction_output(GPIO_PTA3, 0);
  1100. gpio_direction_output(GPIO_PTA4, 0);
  1101. /* enable FSI */
  1102. gpio_request(GPIO_FN_FSIMCKB, NULL);
  1103. gpio_request(GPIO_FN_FSIIBSD, NULL);
  1104. gpio_request(GPIO_FN_FSIOBSD, NULL);
  1105. gpio_request(GPIO_FN_FSIIBBCK, NULL);
  1106. gpio_request(GPIO_FN_FSIIBLRCK, NULL);
  1107. gpio_request(GPIO_FN_FSIOBBCK, NULL);
  1108. gpio_request(GPIO_FN_FSIOBLRCK, NULL);
  1109. gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
  1110. /* set SPU2 clock to 83.4 MHz */
  1111. clk = clk_get(NULL, "spu_clk");
  1112. if (clk) {
  1113. clk_set_rate(clk, clk_round_rate(clk, 83333333));
  1114. clk_put(clk);
  1115. }
  1116. /* change parent of FSI B */
  1117. clk = clk_get(NULL, "fsib_clk");
  1118. if (clk) {
  1119. clk_register(&fsimckb_clk);
  1120. clk_set_parent(clk, &fsimckb_clk);
  1121. clk_set_rate(clk, 11000);
  1122. clk_set_rate(&fsimckb_clk, 11000);
  1123. clk_put(clk);
  1124. }
  1125. gpio_request(GPIO_PTU0, NULL);
  1126. gpio_direction_output(GPIO_PTU0, 0);
  1127. mdelay(20);
  1128. /* enable motion sensor */
  1129. gpio_request(GPIO_FN_INTC_IRQ1, NULL);
  1130. gpio_direction_input(GPIO_FN_INTC_IRQ1);
  1131. /* set VPU clock to 166 MHz */
  1132. clk = clk_get(NULL, "vpu_clk");
  1133. if (clk) {
  1134. clk_set_rate(clk, clk_round_rate(clk, 166000000));
  1135. clk_put(clk);
  1136. }
  1137. /* enable IrDA */
  1138. gpio_request(GPIO_FN_IRDA_OUT, NULL);
  1139. gpio_request(GPIO_FN_IRDA_IN, NULL);
  1140. gpio_request(GPIO_PTU5, NULL);
  1141. gpio_direction_output(GPIO_PTU5, 0);
  1142. #if defined(CONFIG_MMC_SH_MMCIF)
  1143. /* enable MMCIF (needs DS2.6,7 set to OFF,ON) */
  1144. gpio_request(GPIO_FN_MMC_D7, NULL);
  1145. gpio_request(GPIO_FN_MMC_D6, NULL);
  1146. gpio_request(GPIO_FN_MMC_D5, NULL);
  1147. gpio_request(GPIO_FN_MMC_D4, NULL);
  1148. gpio_request(GPIO_FN_MMC_D3, NULL);
  1149. gpio_request(GPIO_FN_MMC_D2, NULL);
  1150. gpio_request(GPIO_FN_MMC_D1, NULL);
  1151. gpio_request(GPIO_FN_MMC_D0, NULL);
  1152. gpio_request(GPIO_FN_MMC_CLK, NULL);
  1153. gpio_request(GPIO_FN_MMC_CMD, NULL);
  1154. gpio_request(GPIO_PTB7, NULL);
  1155. gpio_direction_output(GPIO_PTB7, 0);
  1156. /* I/O buffer drive ability is high for MMCIF */
  1157. __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
  1158. #endif
  1159. /* enable I2C device */
  1160. i2c_register_board_info(0, i2c0_devices,
  1161. ARRAY_SIZE(i2c0_devices));
  1162. i2c_register_board_info(1, i2c1_devices,
  1163. ARRAY_SIZE(i2c1_devices));
  1164. /* VOU */
  1165. gpio_request(GPIO_FN_DV_D15, NULL);
  1166. gpio_request(GPIO_FN_DV_D14, NULL);
  1167. gpio_request(GPIO_FN_DV_D13, NULL);
  1168. gpio_request(GPIO_FN_DV_D12, NULL);
  1169. gpio_request(GPIO_FN_DV_D11, NULL);
  1170. gpio_request(GPIO_FN_DV_D10, NULL);
  1171. gpio_request(GPIO_FN_DV_D9, NULL);
  1172. gpio_request(GPIO_FN_DV_D8, NULL);
  1173. gpio_request(GPIO_FN_DV_CLKI, NULL);
  1174. gpio_request(GPIO_FN_DV_CLK, NULL);
  1175. gpio_request(GPIO_FN_DV_VSYNC, NULL);
  1176. gpio_request(GPIO_FN_DV_HSYNC, NULL);
  1177. /* AK8813 power / reset sequence */
  1178. gpio_request(GPIO_PTG4, NULL);
  1179. gpio_request(GPIO_PTU3, NULL);
  1180. /* Reset */
  1181. gpio_direction_output(GPIO_PTG4, 0);
  1182. /* Power down */
  1183. gpio_direction_output(GPIO_PTU3, 1);
  1184. udelay(10);
  1185. /* Power up, reset */
  1186. gpio_set_value(GPIO_PTU3, 0);
  1187. udelay(10);
  1188. /* Remove reset */
  1189. gpio_set_value(GPIO_PTG4, 1);
  1190. return platform_add_devices(ecovec_devices,
  1191. ARRAY_SIZE(ecovec_devices));
  1192. }
  1193. arch_initcall(arch_setup);
  1194. static int __init devices_setup(void)
  1195. {
  1196. sh_eth_init(&sh_eth_plat);
  1197. return 0;
  1198. }
  1199. device_initcall(devices_setup);
  1200. static struct sh_machine_vector mv_ecovec __initmv = {
  1201. .mv_name = "R0P7724 (EcoVec)",
  1202. };