fsl_booke_mmu.c 5.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217
  1. /*
  2. * Modifications by Kumar Gala (galak@kernel.crashing.org) to support
  3. * E500 Book E processors.
  4. *
  5. * Copyright 2004,2010 Freescale Semiconductor, Inc.
  6. *
  7. * This file contains the routines for initializing the MMU
  8. * on the 4xx series of chips.
  9. * -- paulus
  10. *
  11. * Derived from arch/ppc/mm/init.c:
  12. * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  13. *
  14. * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
  15. * and Cort Dougan (PReP) (cort@cs.nmt.edu)
  16. * Copyright (C) 1996 Paul Mackerras
  17. *
  18. * Derived from "arch/i386/mm/init.c"
  19. * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
  20. *
  21. * This program is free software; you can redistribute it and/or
  22. * modify it under the terms of the GNU General Public License
  23. * as published by the Free Software Foundation; either version
  24. * 2 of the License, or (at your option) any later version.
  25. *
  26. */
  27. #include <linux/signal.h>
  28. #include <linux/sched.h>
  29. #include <linux/kernel.h>
  30. #include <linux/errno.h>
  31. #include <linux/string.h>
  32. #include <linux/types.h>
  33. #include <linux/ptrace.h>
  34. #include <linux/mman.h>
  35. #include <linux/mm.h>
  36. #include <linux/swap.h>
  37. #include <linux/stddef.h>
  38. #include <linux/vmalloc.h>
  39. #include <linux/init.h>
  40. #include <linux/delay.h>
  41. #include <linux/highmem.h>
  42. #include <asm/pgalloc.h>
  43. #include <asm/prom.h>
  44. #include <asm/io.h>
  45. #include <asm/mmu_context.h>
  46. #include <asm/pgtable.h>
  47. #include <asm/mmu.h>
  48. #include <asm/uaccess.h>
  49. #include <asm/smp.h>
  50. #include <asm/machdep.h>
  51. #include <asm/setup.h>
  52. #include "mmu_decl.h"
  53. unsigned int tlbcam_index;
  54. #if defined(CONFIG_LOWMEM_CAM_NUM_BOOL) && (CONFIG_LOWMEM_CAM_NUM >= NUM_TLBCAMS)
  55. #error "LOWMEM_CAM_NUM must be less than NUM_TLBCAMS"
  56. #endif
  57. #define NUM_TLBCAMS (64)
  58. struct tlbcam TLBCAM[NUM_TLBCAMS];
  59. struct tlbcamrange {
  60. unsigned long start;
  61. unsigned long limit;
  62. phys_addr_t phys;
  63. } tlbcam_addrs[NUM_TLBCAMS];
  64. extern unsigned int tlbcam_index;
  65. unsigned long tlbcam_sz(int idx)
  66. {
  67. return tlbcam_addrs[idx].limit - tlbcam_addrs[idx].start + 1;
  68. }
  69. /*
  70. * Return PA for this VA if it is mapped by a CAM, or 0
  71. */
  72. phys_addr_t v_mapped_by_tlbcam(unsigned long va)
  73. {
  74. int b;
  75. for (b = 0; b < tlbcam_index; ++b)
  76. if (va >= tlbcam_addrs[b].start && va < tlbcam_addrs[b].limit)
  77. return tlbcam_addrs[b].phys + (va - tlbcam_addrs[b].start);
  78. return 0;
  79. }
  80. /*
  81. * Return VA for a given PA or 0 if not mapped
  82. */
  83. unsigned long p_mapped_by_tlbcam(phys_addr_t pa)
  84. {
  85. int b;
  86. for (b = 0; b < tlbcam_index; ++b)
  87. if (pa >= tlbcam_addrs[b].phys
  88. && pa < (tlbcam_addrs[b].limit-tlbcam_addrs[b].start)
  89. +tlbcam_addrs[b].phys)
  90. return tlbcam_addrs[b].start+(pa-tlbcam_addrs[b].phys);
  91. return 0;
  92. }
  93. /*
  94. * Set up a variable-size TLB entry (tlbcam). The parameters are not checked;
  95. * in particular size must be a power of 4 between 4k and 256M (or 1G, for cpus
  96. * that support extended page sizes). Note that while some cpus support a
  97. * page size of 4G, we don't allow its use here.
  98. */
  99. static void settlbcam(int index, unsigned long virt, phys_addr_t phys,
  100. unsigned long size, unsigned long flags, unsigned int pid)
  101. {
  102. unsigned int tsize, lz;
  103. asm (PPC_CNTLZL "%0,%1" : "=r" (lz) : "r" (size));
  104. tsize = 21 - lz;
  105. #ifdef CONFIG_SMP
  106. if ((flags & _PAGE_NO_CACHE) == 0)
  107. flags |= _PAGE_COHERENT;
  108. #endif
  109. TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index) | MAS0_NV(index+1);
  110. TLBCAM[index].MAS1 = MAS1_VALID | MAS1_IPROT | MAS1_TSIZE(tsize) | MAS1_TID(pid);
  111. TLBCAM[index].MAS2 = virt & PAGE_MASK;
  112. TLBCAM[index].MAS2 |= (flags & _PAGE_WRITETHRU) ? MAS2_W : 0;
  113. TLBCAM[index].MAS2 |= (flags & _PAGE_NO_CACHE) ? MAS2_I : 0;
  114. TLBCAM[index].MAS2 |= (flags & _PAGE_COHERENT) ? MAS2_M : 0;
  115. TLBCAM[index].MAS2 |= (flags & _PAGE_GUARDED) ? MAS2_G : 0;
  116. TLBCAM[index].MAS2 |= (flags & _PAGE_ENDIAN) ? MAS2_E : 0;
  117. TLBCAM[index].MAS3 = (phys & MAS3_RPN) | MAS3_SX | MAS3_SR;
  118. TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_SW : 0);
  119. if (mmu_has_feature(MMU_FTR_BIG_PHYS))
  120. TLBCAM[index].MAS7 = (u64)phys >> 32;
  121. if (flags & _PAGE_USER) {
  122. TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
  123. TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
  124. }
  125. tlbcam_addrs[index].start = virt;
  126. tlbcam_addrs[index].limit = virt + size - 1;
  127. tlbcam_addrs[index].phys = phys;
  128. loadcam_entry(index);
  129. }
  130. unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx)
  131. {
  132. int i;
  133. unsigned long virt = PAGE_OFFSET;
  134. phys_addr_t phys = memstart_addr;
  135. unsigned long amount_mapped = 0;
  136. unsigned long max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xf;
  137. /* Convert (4^max) kB to (2^max) bytes */
  138. max_cam = max_cam * 2 + 10;
  139. /* Calculate CAM values */
  140. for (i = 0; ram && i < max_cam_idx; i++) {
  141. unsigned int camsize = __ilog2(ram) & ~1U;
  142. unsigned int align = __ffs(virt | phys) & ~1U;
  143. unsigned long cam_sz;
  144. if (camsize > align)
  145. camsize = align;
  146. if (camsize > max_cam)
  147. camsize = max_cam;
  148. cam_sz = 1UL << camsize;
  149. settlbcam(i, virt, phys, cam_sz, PAGE_KERNEL_X, 0);
  150. ram -= cam_sz;
  151. amount_mapped += cam_sz;
  152. virt += cam_sz;
  153. phys += cam_sz;
  154. }
  155. tlbcam_index = i;
  156. return amount_mapped;
  157. }
  158. unsigned long __init mmu_mapin_ram(unsigned long top)
  159. {
  160. return tlbcam_addrs[tlbcam_index - 1].limit - PAGE_OFFSET + 1;
  161. }
  162. /*
  163. * MMU_init_hw does the chip-specific initialization of the MMU hardware.
  164. */
  165. void __init MMU_init_hw(void)
  166. {
  167. flush_instruction_cache();
  168. }
  169. void __init adjust_total_lowmem(void)
  170. {
  171. unsigned long ram;
  172. int i;
  173. /* adjust lowmem size to __max_low_memory */
  174. ram = min((phys_addr_t)__max_low_memory, (phys_addr_t)total_lowmem);
  175. __max_low_memory = map_mem_in_cams(ram, CONFIG_LOWMEM_CAM_NUM);
  176. pr_info("Memory CAM mapping: ");
  177. for (i = 0; i < tlbcam_index - 1; i++)
  178. pr_cont("%lu/", tlbcam_sz(i) >> 20);
  179. pr_cont("%lu Mb, residual: %dMb\n", tlbcam_sz(tlbcam_index - 1) >> 20,
  180. (unsigned int)((total_lowmem - __max_low_memory) >> 20));
  181. __initial_memory_limit_addr = memstart_addr + __max_low_memory;
  182. }