book3s_32_mmu_host.c 9.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373
  1. /*
  2. * Copyright (C) 2010 SUSE Linux Products GmbH. All rights reserved.
  3. *
  4. * Authors:
  5. * Alexander Graf <agraf@suse.de>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License, version 2, as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  19. */
  20. #include <linux/kvm_host.h>
  21. #include <linux/hash.h>
  22. #include <asm/kvm_ppc.h>
  23. #include <asm/kvm_book3s.h>
  24. #include <asm/mmu-hash32.h>
  25. #include <asm/machdep.h>
  26. #include <asm/mmu_context.h>
  27. #include <asm/hw_irq.h>
  28. /* #define DEBUG_MMU */
  29. /* #define DEBUG_SR */
  30. #ifdef DEBUG_MMU
  31. #define dprintk_mmu(a, ...) printk(KERN_INFO a, __VA_ARGS__)
  32. #else
  33. #define dprintk_mmu(a, ...) do { } while(0)
  34. #endif
  35. #ifdef DEBUG_SR
  36. #define dprintk_sr(a, ...) printk(KERN_INFO a, __VA_ARGS__)
  37. #else
  38. #define dprintk_sr(a, ...) do { } while(0)
  39. #endif
  40. #if PAGE_SHIFT != 12
  41. #error Unknown page size
  42. #endif
  43. #ifdef CONFIG_SMP
  44. #error XXX need to grab mmu_hash_lock
  45. #endif
  46. #ifdef CONFIG_PTE_64BIT
  47. #error Only 32 bit pages are supported for now
  48. #endif
  49. static ulong htab;
  50. static u32 htabmask;
  51. void kvmppc_mmu_invalidate_pte(struct kvm_vcpu *vcpu, struct hpte_cache *pte)
  52. {
  53. volatile u32 *pteg;
  54. /* Remove from host HTAB */
  55. pteg = (u32*)pte->slot;
  56. pteg[0] = 0;
  57. /* And make sure it's gone from the TLB too */
  58. asm volatile ("sync");
  59. asm volatile ("tlbie %0" : : "r" (pte->pte.eaddr) : "memory");
  60. asm volatile ("sync");
  61. asm volatile ("tlbsync");
  62. }
  63. /* We keep 512 gvsid->hvsid entries, mapping the guest ones to the array using
  64. * a hash, so we don't waste cycles on looping */
  65. static u16 kvmppc_sid_hash(struct kvm_vcpu *vcpu, u64 gvsid)
  66. {
  67. return hash_64(gvsid, SID_MAP_BITS);
  68. }
  69. static struct kvmppc_sid_map *find_sid_vsid(struct kvm_vcpu *vcpu, u64 gvsid)
  70. {
  71. struct kvmppc_sid_map *map;
  72. u16 sid_map_mask;
  73. if (vcpu->arch.msr & MSR_PR)
  74. gvsid |= VSID_PR;
  75. sid_map_mask = kvmppc_sid_hash(vcpu, gvsid);
  76. map = &to_book3s(vcpu)->sid_map[sid_map_mask];
  77. if (map->guest_vsid == gvsid) {
  78. dprintk_sr("SR: Searching 0x%llx -> 0x%llx\n",
  79. gvsid, map->host_vsid);
  80. return map;
  81. }
  82. map = &to_book3s(vcpu)->sid_map[SID_MAP_MASK - sid_map_mask];
  83. if (map->guest_vsid == gvsid) {
  84. dprintk_sr("SR: Searching 0x%llx -> 0x%llx\n",
  85. gvsid, map->host_vsid);
  86. return map;
  87. }
  88. dprintk_sr("SR: Searching 0x%llx -> not found\n", gvsid);
  89. return NULL;
  90. }
  91. static u32 *kvmppc_mmu_get_pteg(struct kvm_vcpu *vcpu, u32 vsid, u32 eaddr,
  92. bool primary)
  93. {
  94. u32 page, hash;
  95. ulong pteg = htab;
  96. page = (eaddr & ~ESID_MASK) >> 12;
  97. hash = ((vsid ^ page) << 6);
  98. if (!primary)
  99. hash = ~hash;
  100. hash &= htabmask;
  101. pteg |= hash;
  102. dprintk_mmu("htab: %lx | hash: %x | htabmask: %x | pteg: %lx\n",
  103. htab, hash, htabmask, pteg);
  104. return (u32*)pteg;
  105. }
  106. extern char etext[];
  107. int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *orig_pte)
  108. {
  109. pfn_t hpaddr;
  110. u64 va;
  111. u64 vsid;
  112. struct kvmppc_sid_map *map;
  113. volatile u32 *pteg;
  114. u32 eaddr = orig_pte->eaddr;
  115. u32 pteg0, pteg1;
  116. register int rr = 0;
  117. bool primary = false;
  118. bool evict = false;
  119. struct hpte_cache *pte;
  120. /* Get host physical address for gpa */
  121. hpaddr = gfn_to_pfn(vcpu->kvm, orig_pte->raddr >> PAGE_SHIFT);
  122. if (kvm_is_error_hva(hpaddr)) {
  123. printk(KERN_INFO "Couldn't get guest page for gfn %lx!\n",
  124. orig_pte->eaddr);
  125. return -EINVAL;
  126. }
  127. hpaddr <<= PAGE_SHIFT;
  128. /* and write the mapping ea -> hpa into the pt */
  129. vcpu->arch.mmu.esid_to_vsid(vcpu, orig_pte->eaddr >> SID_SHIFT, &vsid);
  130. map = find_sid_vsid(vcpu, vsid);
  131. if (!map) {
  132. kvmppc_mmu_map_segment(vcpu, eaddr);
  133. map = find_sid_vsid(vcpu, vsid);
  134. }
  135. BUG_ON(!map);
  136. vsid = map->host_vsid;
  137. va = (vsid << SID_SHIFT) | (eaddr & ~ESID_MASK);
  138. next_pteg:
  139. if (rr == 16) {
  140. primary = !primary;
  141. evict = true;
  142. rr = 0;
  143. }
  144. pteg = kvmppc_mmu_get_pteg(vcpu, vsid, eaddr, primary);
  145. /* not evicting yet */
  146. if (!evict && (pteg[rr] & PTE_V)) {
  147. rr += 2;
  148. goto next_pteg;
  149. }
  150. dprintk_mmu("KVM: old PTEG: %p (%d)\n", pteg, rr);
  151. dprintk_mmu("KVM: %08x - %08x\n", pteg[0], pteg[1]);
  152. dprintk_mmu("KVM: %08x - %08x\n", pteg[2], pteg[3]);
  153. dprintk_mmu("KVM: %08x - %08x\n", pteg[4], pteg[5]);
  154. dprintk_mmu("KVM: %08x - %08x\n", pteg[6], pteg[7]);
  155. dprintk_mmu("KVM: %08x - %08x\n", pteg[8], pteg[9]);
  156. dprintk_mmu("KVM: %08x - %08x\n", pteg[10], pteg[11]);
  157. dprintk_mmu("KVM: %08x - %08x\n", pteg[12], pteg[13]);
  158. dprintk_mmu("KVM: %08x - %08x\n", pteg[14], pteg[15]);
  159. pteg0 = ((eaddr & 0x0fffffff) >> 22) | (vsid << 7) | PTE_V |
  160. (primary ? 0 : PTE_SEC);
  161. pteg1 = hpaddr | PTE_M | PTE_R | PTE_C;
  162. if (orig_pte->may_write) {
  163. pteg1 |= PP_RWRW;
  164. mark_page_dirty(vcpu->kvm, orig_pte->raddr >> PAGE_SHIFT);
  165. } else {
  166. pteg1 |= PP_RWRX;
  167. }
  168. local_irq_disable();
  169. if (pteg[rr]) {
  170. pteg[rr] = 0;
  171. asm volatile ("sync");
  172. }
  173. pteg[rr + 1] = pteg1;
  174. pteg[rr] = pteg0;
  175. asm volatile ("sync");
  176. local_irq_enable();
  177. dprintk_mmu("KVM: new PTEG: %p\n", pteg);
  178. dprintk_mmu("KVM: %08x - %08x\n", pteg[0], pteg[1]);
  179. dprintk_mmu("KVM: %08x - %08x\n", pteg[2], pteg[3]);
  180. dprintk_mmu("KVM: %08x - %08x\n", pteg[4], pteg[5]);
  181. dprintk_mmu("KVM: %08x - %08x\n", pteg[6], pteg[7]);
  182. dprintk_mmu("KVM: %08x - %08x\n", pteg[8], pteg[9]);
  183. dprintk_mmu("KVM: %08x - %08x\n", pteg[10], pteg[11]);
  184. dprintk_mmu("KVM: %08x - %08x\n", pteg[12], pteg[13]);
  185. dprintk_mmu("KVM: %08x - %08x\n", pteg[14], pteg[15]);
  186. /* Now tell our Shadow PTE code about the new page */
  187. pte = kvmppc_mmu_hpte_cache_next(vcpu);
  188. dprintk_mmu("KVM: %c%c Map 0x%llx: [%lx] 0x%llx (0x%llx) -> %lx\n",
  189. orig_pte->may_write ? 'w' : '-',
  190. orig_pte->may_execute ? 'x' : '-',
  191. orig_pte->eaddr, (ulong)pteg, va,
  192. orig_pte->vpage, hpaddr);
  193. pte->slot = (ulong)&pteg[rr];
  194. pte->host_va = va;
  195. pte->pte = *orig_pte;
  196. pte->pfn = hpaddr >> PAGE_SHIFT;
  197. kvmppc_mmu_hpte_cache_map(vcpu, pte);
  198. return 0;
  199. }
  200. static struct kvmppc_sid_map *create_sid_map(struct kvm_vcpu *vcpu, u64 gvsid)
  201. {
  202. struct kvmppc_sid_map *map;
  203. struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
  204. u16 sid_map_mask;
  205. static int backwards_map = 0;
  206. if (vcpu->arch.msr & MSR_PR)
  207. gvsid |= VSID_PR;
  208. /* We might get collisions that trap in preceding order, so let's
  209. map them differently */
  210. sid_map_mask = kvmppc_sid_hash(vcpu, gvsid);
  211. if (backwards_map)
  212. sid_map_mask = SID_MAP_MASK - sid_map_mask;
  213. map = &to_book3s(vcpu)->sid_map[sid_map_mask];
  214. /* Make sure we're taking the other map next time */
  215. backwards_map = !backwards_map;
  216. /* Uh-oh ... out of mappings. Let's flush! */
  217. if (vcpu_book3s->vsid_next >= vcpu_book3s->vsid_max) {
  218. vcpu_book3s->vsid_next = vcpu_book3s->vsid_first;
  219. memset(vcpu_book3s->sid_map, 0,
  220. sizeof(struct kvmppc_sid_map) * SID_MAP_NUM);
  221. kvmppc_mmu_pte_flush(vcpu, 0, 0);
  222. kvmppc_mmu_flush_segments(vcpu);
  223. }
  224. map->host_vsid = vcpu_book3s->vsid_next;
  225. /* Would have to be 111 to be completely aligned with the rest of
  226. Linux, but that is just way too little space! */
  227. vcpu_book3s->vsid_next+=1;
  228. map->guest_vsid = gvsid;
  229. map->valid = true;
  230. return map;
  231. }
  232. int kvmppc_mmu_map_segment(struct kvm_vcpu *vcpu, ulong eaddr)
  233. {
  234. u32 esid = eaddr >> SID_SHIFT;
  235. u64 gvsid;
  236. u32 sr;
  237. struct kvmppc_sid_map *map;
  238. struct kvmppc_book3s_shadow_vcpu *svcpu = to_svcpu(vcpu);
  239. if (vcpu->arch.mmu.esid_to_vsid(vcpu, esid, &gvsid)) {
  240. /* Invalidate an entry */
  241. svcpu->sr[esid] = SR_INVALID;
  242. return -ENOENT;
  243. }
  244. map = find_sid_vsid(vcpu, gvsid);
  245. if (!map)
  246. map = create_sid_map(vcpu, gvsid);
  247. map->guest_esid = esid;
  248. sr = map->host_vsid | SR_KP;
  249. svcpu->sr[esid] = sr;
  250. dprintk_sr("MMU: mtsr %d, 0x%x\n", esid, sr);
  251. return 0;
  252. }
  253. void kvmppc_mmu_flush_segments(struct kvm_vcpu *vcpu)
  254. {
  255. int i;
  256. struct kvmppc_book3s_shadow_vcpu *svcpu = to_svcpu(vcpu);
  257. dprintk_sr("MMU: flushing all segments (%d)\n", ARRAY_SIZE(svcpu->sr));
  258. for (i = 0; i < ARRAY_SIZE(svcpu->sr); i++)
  259. svcpu->sr[i] = SR_INVALID;
  260. }
  261. void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
  262. {
  263. kvmppc_mmu_hpte_destroy(vcpu);
  264. preempt_disable();
  265. __destroy_context(to_book3s(vcpu)->context_id);
  266. preempt_enable();
  267. }
  268. /* From mm/mmu_context_hash32.c */
  269. #define CTX_TO_VSID(ctx) (((ctx) * (897 * 16)) & 0xffffff)
  270. int kvmppc_mmu_init(struct kvm_vcpu *vcpu)
  271. {
  272. struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
  273. int err;
  274. ulong sdr1;
  275. err = __init_new_context();
  276. if (err < 0)
  277. return -1;
  278. vcpu3s->context_id = err;
  279. vcpu3s->vsid_max = CTX_TO_VSID(vcpu3s->context_id + 1) - 1;
  280. vcpu3s->vsid_first = CTX_TO_VSID(vcpu3s->context_id);
  281. #if 0 /* XXX still doesn't guarantee uniqueness */
  282. /* We could collide with the Linux vsid space because the vsid
  283. * wraps around at 24 bits. We're safe if we do our own space
  284. * though, so let's always set the highest bit. */
  285. vcpu3s->vsid_max |= 0x00800000;
  286. vcpu3s->vsid_first |= 0x00800000;
  287. #endif
  288. BUG_ON(vcpu3s->vsid_max < vcpu3s->vsid_first);
  289. vcpu3s->vsid_next = vcpu3s->vsid_first;
  290. /* Remember where the HTAB is */
  291. asm ( "mfsdr1 %0" : "=r"(sdr1) );
  292. htabmask = ((sdr1 & 0x1FF) << 16) | 0xFFC0;
  293. htab = (ulong)__va(sdr1 & 0xffff0000);
  294. kvmppc_mmu_hpte_init(vcpu);
  295. return 0;
  296. }