setup.c 6.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292
  1. /* MN10300 Arch-specific initialisation
  2. *
  3. * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
  4. * Written by David Howells (dhowells@redhat.com)
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public Licence
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the Licence, or (at your option) any later version.
  10. */
  11. #include <linux/errno.h>
  12. #include <linux/sched.h>
  13. #include <linux/kernel.h>
  14. #include <linux/mm.h>
  15. #include <linux/stddef.h>
  16. #include <linux/unistd.h>
  17. #include <linux/ptrace.h>
  18. #include <linux/user.h>
  19. #include <linux/tty.h>
  20. #include <linux/ioport.h>
  21. #include <linux/delay.h>
  22. #include <linux/init.h>
  23. #include <linux/bootmem.h>
  24. #include <linux/seq_file.h>
  25. #include <asm/processor.h>
  26. #include <linux/console.h>
  27. #include <asm/uaccess.h>
  28. #include <asm/system.h>
  29. #include <asm/setup.h>
  30. #include <asm/io.h>
  31. #include <asm/smp.h>
  32. #include <proc/proc.h>
  33. #include <asm/busctl-regs.h>
  34. #include <asm/fpu.h>
  35. #include <asm/sections.h>
  36. struct mn10300_cpuinfo boot_cpu_data;
  37. /* For PCI or other memory-mapped resources */
  38. unsigned long pci_mem_start = 0x18000000;
  39. char redboot_command_line[COMMAND_LINE_SIZE] =
  40. "console=ttyS0,115200 root=/dev/mtdblock3 rw";
  41. char __initdata redboot_platform_name[COMMAND_LINE_SIZE];
  42. static struct resource code_resource = {
  43. .start = 0x100000,
  44. .end = 0,
  45. .name = "Kernel code",
  46. };
  47. static struct resource data_resource = {
  48. .start = 0,
  49. .end = 0,
  50. .name = "Kernel data",
  51. };
  52. static unsigned long __initdata phys_memory_base;
  53. static unsigned long __initdata phys_memory_end;
  54. static unsigned long __initdata memory_end;
  55. unsigned long memory_size;
  56. struct thread_info *__current_ti = &init_thread_union.thread_info;
  57. struct task_struct *__current = &init_task;
  58. #define mn10300_known_cpus 3
  59. static const char *const mn10300_cputypes[] = {
  60. "am33v1",
  61. "am33v2",
  62. "am34v1",
  63. "unknown"
  64. };
  65. /*
  66. *
  67. */
  68. static void __init parse_mem_cmdline(char **cmdline_p)
  69. {
  70. char *from, *to, c;
  71. /* save unparsed command line copy for /proc/cmdline */
  72. strcpy(boot_command_line, redboot_command_line);
  73. /* see if there's an explicit memory size option */
  74. from = redboot_command_line;
  75. to = redboot_command_line;
  76. c = ' ';
  77. for (;;) {
  78. if (c == ' ' && !memcmp(from, "mem=", 4)) {
  79. if (to != redboot_command_line)
  80. to--;
  81. memory_size = memparse(from + 4, &from);
  82. }
  83. c = *(from++);
  84. if (!c)
  85. break;
  86. *(to++) = c;
  87. }
  88. *to = '\0';
  89. *cmdline_p = redboot_command_line;
  90. if (memory_size == 0)
  91. panic("Memory size not known\n");
  92. memory_end = (unsigned long) CONFIG_KERNEL_RAM_BASE_ADDRESS +
  93. memory_size;
  94. if (memory_end > phys_memory_end)
  95. memory_end = phys_memory_end;
  96. }
  97. /*
  98. * architecture specific setup
  99. */
  100. void __init setup_arch(char **cmdline_p)
  101. {
  102. unsigned long bootmap_size;
  103. unsigned long kstart_pfn, start_pfn, free_pfn, end_pfn;
  104. cpu_init();
  105. unit_setup();
  106. parse_mem_cmdline(cmdline_p);
  107. init_mm.start_code = (unsigned long)&_text;
  108. init_mm.end_code = (unsigned long) &_etext;
  109. init_mm.end_data = (unsigned long) &_edata;
  110. init_mm.brk = (unsigned long) &_end;
  111. code_resource.start = virt_to_bus(&_text);
  112. code_resource.end = virt_to_bus(&_etext)-1;
  113. data_resource.start = virt_to_bus(&_etext);
  114. data_resource.end = virt_to_bus(&_edata)-1;
  115. start_pfn = (CONFIG_KERNEL_RAM_BASE_ADDRESS >> PAGE_SHIFT);
  116. kstart_pfn = PFN_UP(__pa(&_text));
  117. free_pfn = PFN_UP(__pa(&_end));
  118. end_pfn = PFN_DOWN(__pa(memory_end));
  119. bootmap_size = init_bootmem_node(&contig_page_data,
  120. free_pfn,
  121. start_pfn,
  122. end_pfn);
  123. if (kstart_pfn > start_pfn)
  124. free_bootmem(PFN_PHYS(start_pfn),
  125. PFN_PHYS(kstart_pfn - start_pfn));
  126. free_bootmem(PFN_PHYS(free_pfn),
  127. PFN_PHYS(end_pfn - free_pfn));
  128. /* If interrupt vector table is in main ram, then we need to
  129. reserve the page it is occupying. */
  130. if (CONFIG_INTERRUPT_VECTOR_BASE >= CONFIG_KERNEL_RAM_BASE_ADDRESS &&
  131. CONFIG_INTERRUPT_VECTOR_BASE < memory_end)
  132. reserve_bootmem(CONFIG_INTERRUPT_VECTOR_BASE, PAGE_SIZE,
  133. BOOTMEM_DEFAULT);
  134. reserve_bootmem(PAGE_ALIGN(PFN_PHYS(free_pfn)), bootmap_size,
  135. BOOTMEM_DEFAULT);
  136. #ifdef CONFIG_VT
  137. #if defined(CONFIG_VGA_CONSOLE)
  138. conswitchp = &vga_con;
  139. #elif defined(CONFIG_DUMMY_CONSOLE)
  140. conswitchp = &dummy_con;
  141. #endif
  142. #endif
  143. paging_init();
  144. }
  145. /*
  146. * perform CPU initialisation
  147. */
  148. void __init cpu_init(void)
  149. {
  150. unsigned long cpurev = CPUREV, type;
  151. unsigned long base, size;
  152. type = (CPUREV & CPUREV_TYPE) >> CPUREV_TYPE_S;
  153. if (type > mn10300_known_cpus)
  154. type = mn10300_known_cpus;
  155. printk(KERN_INFO "Matsushita %s, rev %ld\n",
  156. mn10300_cputypes[type],
  157. (cpurev & CPUREV_REVISION) >> CPUREV_REVISION_S);
  158. /* determine the memory size and base from the memory controller regs */
  159. memory_size = 0;
  160. base = SDBASE(0);
  161. if (base & SDBASE_CE) {
  162. size = (base & SDBASE_CBAM) << SDBASE_CBAM_SHIFT;
  163. size = ~size + 1;
  164. base &= SDBASE_CBA;
  165. printk(KERN_INFO "SDRAM[0]: %luMb @%08lx\n", size >> 20, base);
  166. memory_size += size;
  167. phys_memory_base = base;
  168. }
  169. base = SDBASE(1);
  170. if (base & SDBASE_CE) {
  171. size = (base & SDBASE_CBAM) << SDBASE_CBAM_SHIFT;
  172. size = ~size + 1;
  173. base &= SDBASE_CBA;
  174. printk(KERN_INFO "SDRAM[1]: %luMb @%08lx\n", size >> 20, base);
  175. memory_size += size;
  176. if (phys_memory_base == 0)
  177. phys_memory_base = base;
  178. }
  179. phys_memory_end = phys_memory_base + memory_size;
  180. #ifdef CONFIG_FPU
  181. fpu_init_state();
  182. #endif
  183. }
  184. /*
  185. * Get CPU information for use by the procfs.
  186. */
  187. static int show_cpuinfo(struct seq_file *m, void *v)
  188. {
  189. unsigned long cpurev = CPUREV, type, icachesz, dcachesz;
  190. type = (CPUREV & CPUREV_TYPE) >> CPUREV_TYPE_S;
  191. if (type > mn10300_known_cpus)
  192. type = mn10300_known_cpus;
  193. icachesz =
  194. ((cpurev & CPUREV_ICWAY ) >> CPUREV_ICWAY_S) *
  195. ((cpurev & CPUREV_ICSIZE) >> CPUREV_ICSIZE_S) *
  196. 1024;
  197. dcachesz =
  198. ((cpurev & CPUREV_DCWAY ) >> CPUREV_DCWAY_S) *
  199. ((cpurev & CPUREV_DCSIZE) >> CPUREV_DCSIZE_S) *
  200. 1024;
  201. seq_printf(m,
  202. "processor : 0\n"
  203. "vendor_id : Matsushita\n"
  204. "cpu core : %s\n"
  205. "cpu rev : %lu\n"
  206. "model name : " PROCESSOR_MODEL_NAME "\n"
  207. "icache size: %lu\n"
  208. "dcache size: %lu\n",
  209. mn10300_cputypes[type],
  210. (cpurev & CPUREV_REVISION) >> CPUREV_REVISION_S,
  211. icachesz,
  212. dcachesz
  213. );
  214. seq_printf(m,
  215. "ioclk speed: %lu.%02luMHz\n"
  216. "bogomips : %lu.%02lu\n\n",
  217. MN10300_IOCLK / 1000000,
  218. (MN10300_IOCLK / 10000) % 100,
  219. loops_per_jiffy / (500000 / HZ),
  220. (loops_per_jiffy / (5000 / HZ)) % 100
  221. );
  222. return 0;
  223. }
  224. static void *c_start(struct seq_file *m, loff_t *pos)
  225. {
  226. return *pos < NR_CPUS ? cpu_data + *pos : NULL;
  227. }
  228. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  229. {
  230. ++*pos;
  231. return c_start(m, pos);
  232. }
  233. static void c_stop(struct seq_file *m, void *v)
  234. {
  235. }
  236. const struct seq_operations cpuinfo_op = {
  237. .start = c_start,
  238. .next = c_next,
  239. .stop = c_stop,
  240. .show = show_cpuinfo,
  241. };