mn10300-serial.c 36 KB

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  1. /* MN10300 On-chip serial port UART driver
  2. *
  3. * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
  4. * Written by David Howells (dhowells@redhat.com)
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public Licence
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the Licence, or (at your option) any later version.
  10. */
  11. static const char serial_name[] = "MN10300 Serial driver";
  12. static const char serial_version[] = "mn10300_serial-1.0";
  13. static const char serial_revdate[] = "2007-11-06";
  14. #if defined(CONFIG_MN10300_TTYSM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  15. #define SUPPORT_SYSRQ
  16. #endif
  17. #include <linux/module.h>
  18. #include <linux/serial.h>
  19. #include <linux/circ_buf.h>
  20. #include <linux/errno.h>
  21. #include <linux/signal.h>
  22. #include <linux/sched.h>
  23. #include <linux/timer.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/tty.h>
  26. #include <linux/tty_flip.h>
  27. #include <linux/major.h>
  28. #include <linux/string.h>
  29. #include <linux/ioport.h>
  30. #include <linux/mm.h>
  31. #include <linux/slab.h>
  32. #include <linux/init.h>
  33. #include <linux/console.h>
  34. #include <linux/sysrq.h>
  35. #include <asm/system.h>
  36. #include <asm/io.h>
  37. #include <asm/irq.h>
  38. #include <asm/bitops.h>
  39. #include <asm/serial-regs.h>
  40. #include <unit/timex.h>
  41. #include "mn10300-serial.h"
  42. #define kenter(FMT, ...) \
  43. printk(KERN_DEBUG "-->%s(" FMT ")\n", __func__, ##__VA_ARGS__)
  44. #define _enter(FMT, ...) \
  45. no_printk(KERN_DEBUG "-->%s(" FMT ")\n", __func__, ##__VA_ARGS__)
  46. #define kdebug(FMT, ...) \
  47. printk(KERN_DEBUG "--- " FMT "\n", ##__VA_ARGS__)
  48. #define _debug(FMT, ...) \
  49. no_printk(KERN_DEBUG "--- " FMT "\n", ##__VA_ARGS__)
  50. #define kproto(FMT, ...) \
  51. printk(KERN_DEBUG "### MNSERIAL " FMT " ###\n", ##__VA_ARGS__)
  52. #define _proto(FMT, ...) \
  53. no_printk(KERN_DEBUG "### MNSERIAL " FMT " ###\n", ##__VA_ARGS__)
  54. #define NR_UARTS 3
  55. #ifdef CONFIG_MN10300_TTYSM_CONSOLE
  56. static void mn10300_serial_console_write(struct console *co,
  57. const char *s, unsigned count);
  58. static int __init mn10300_serial_console_setup(struct console *co,
  59. char *options);
  60. static struct uart_driver mn10300_serial_driver;
  61. static struct console mn10300_serial_console = {
  62. .name = "ttySM",
  63. .write = mn10300_serial_console_write,
  64. .device = uart_console_device,
  65. .setup = mn10300_serial_console_setup,
  66. .flags = CON_PRINTBUFFER,
  67. .index = -1,
  68. .data = &mn10300_serial_driver,
  69. };
  70. #endif
  71. static struct uart_driver mn10300_serial_driver = {
  72. .owner = NULL,
  73. .driver_name = "mn10300-serial",
  74. .dev_name = "ttySM",
  75. .major = TTY_MAJOR,
  76. .minor = 128,
  77. .nr = NR_UARTS,
  78. #ifdef CONFIG_MN10300_TTYSM_CONSOLE
  79. .cons = &mn10300_serial_console,
  80. #endif
  81. };
  82. static unsigned int mn10300_serial_tx_empty(struct uart_port *);
  83. static void mn10300_serial_set_mctrl(struct uart_port *, unsigned int mctrl);
  84. static unsigned int mn10300_serial_get_mctrl(struct uart_port *);
  85. static void mn10300_serial_stop_tx(struct uart_port *);
  86. static void mn10300_serial_start_tx(struct uart_port *);
  87. static void mn10300_serial_send_xchar(struct uart_port *, char ch);
  88. static void mn10300_serial_stop_rx(struct uart_port *);
  89. static void mn10300_serial_enable_ms(struct uart_port *);
  90. static void mn10300_serial_break_ctl(struct uart_port *, int ctl);
  91. static int mn10300_serial_startup(struct uart_port *);
  92. static void mn10300_serial_shutdown(struct uart_port *);
  93. static void mn10300_serial_set_termios(struct uart_port *,
  94. struct ktermios *new,
  95. struct ktermios *old);
  96. static const char *mn10300_serial_type(struct uart_port *);
  97. static void mn10300_serial_release_port(struct uart_port *);
  98. static int mn10300_serial_request_port(struct uart_port *);
  99. static void mn10300_serial_config_port(struct uart_port *, int);
  100. static int mn10300_serial_verify_port(struct uart_port *,
  101. struct serial_struct *);
  102. static const struct uart_ops mn10300_serial_ops = {
  103. .tx_empty = mn10300_serial_tx_empty,
  104. .set_mctrl = mn10300_serial_set_mctrl,
  105. .get_mctrl = mn10300_serial_get_mctrl,
  106. .stop_tx = mn10300_serial_stop_tx,
  107. .start_tx = mn10300_serial_start_tx,
  108. .send_xchar = mn10300_serial_send_xchar,
  109. .stop_rx = mn10300_serial_stop_rx,
  110. .enable_ms = mn10300_serial_enable_ms,
  111. .break_ctl = mn10300_serial_break_ctl,
  112. .startup = mn10300_serial_startup,
  113. .shutdown = mn10300_serial_shutdown,
  114. .set_termios = mn10300_serial_set_termios,
  115. .type = mn10300_serial_type,
  116. .release_port = mn10300_serial_release_port,
  117. .request_port = mn10300_serial_request_port,
  118. .config_port = mn10300_serial_config_port,
  119. .verify_port = mn10300_serial_verify_port,
  120. };
  121. static irqreturn_t mn10300_serial_interrupt(int irq, void *dev_id);
  122. /*
  123. * the first on-chip serial port: ttySM0 (aka SIF0)
  124. */
  125. #ifdef CONFIG_MN10300_TTYSM0
  126. struct mn10300_serial_port mn10300_serial_port_sif0 = {
  127. .uart.ops = &mn10300_serial_ops,
  128. .uart.membase = (void __iomem *) &SC0CTR,
  129. .uart.mapbase = (unsigned long) &SC0CTR,
  130. .uart.iotype = UPIO_MEM,
  131. .uart.irq = 0,
  132. .uart.uartclk = 0, /* MN10300_IOCLK, */
  133. .uart.fifosize = 1,
  134. .uart.flags = UPF_BOOT_AUTOCONF,
  135. .uart.line = 0,
  136. .uart.type = PORT_MN10300,
  137. .uart.lock =
  138. __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif0.uart.lock),
  139. .name = "ttySM0",
  140. ._iobase = &SC0CTR,
  141. ._control = &SC0CTR,
  142. ._status = (volatile u8 *) &SC0STR,
  143. ._intr = &SC0ICR,
  144. ._rxb = &SC0RXB,
  145. ._txb = &SC0TXB,
  146. .rx_name = "ttySM0:Rx",
  147. .tx_name = "ttySM0:Tx",
  148. #ifdef CONFIG_MN10300_TTYSM0_TIMER8
  149. .tm_name = "ttySM0:Timer8",
  150. ._tmxmd = &TM8MD,
  151. ._tmxbr = &TM8BR,
  152. ._tmicr = &TM8ICR,
  153. .tm_irq = TM8IRQ,
  154. .div_timer = MNSCx_DIV_TIMER_16BIT,
  155. #else /* CONFIG_MN10300_TTYSM0_TIMER2 */
  156. .tm_name = "ttySM0:Timer2",
  157. ._tmxmd = &TM2MD,
  158. ._tmxbr = (volatile u16 *) &TM2BR,
  159. ._tmicr = &TM2ICR,
  160. .tm_irq = TM2IRQ,
  161. .div_timer = MNSCx_DIV_TIMER_8BIT,
  162. #endif
  163. .rx_irq = SC0RXIRQ,
  164. .tx_irq = SC0TXIRQ,
  165. .rx_icr = &GxICR(SC0RXIRQ),
  166. .tx_icr = &GxICR(SC0TXIRQ),
  167. .clock_src = MNSCx_CLOCK_SRC_IOCLK,
  168. .options = 0,
  169. #ifdef CONFIG_GDBSTUB_ON_TTYSM0
  170. .gdbstub = 1,
  171. #endif
  172. };
  173. #endif /* CONFIG_MN10300_TTYSM0 */
  174. /*
  175. * the second on-chip serial port: ttySM1 (aka SIF1)
  176. */
  177. #ifdef CONFIG_MN10300_TTYSM1
  178. struct mn10300_serial_port mn10300_serial_port_sif1 = {
  179. .uart.ops = &mn10300_serial_ops,
  180. .uart.membase = (void __iomem *) &SC1CTR,
  181. .uart.mapbase = (unsigned long) &SC1CTR,
  182. .uart.iotype = UPIO_MEM,
  183. .uart.irq = 0,
  184. .uart.uartclk = 0, /* MN10300_IOCLK, */
  185. .uart.fifosize = 1,
  186. .uart.flags = UPF_BOOT_AUTOCONF,
  187. .uart.line = 1,
  188. .uart.type = PORT_MN10300,
  189. .uart.lock =
  190. __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif1.uart.lock),
  191. .name = "ttySM1",
  192. ._iobase = &SC1CTR,
  193. ._control = &SC1CTR,
  194. ._status = (volatile u8 *) &SC1STR,
  195. ._intr = &SC1ICR,
  196. ._rxb = &SC1RXB,
  197. ._txb = &SC1TXB,
  198. .rx_name = "ttySM1:Rx",
  199. .tx_name = "ttySM1:Tx",
  200. #ifdef CONFIG_MN10300_TTYSM1_TIMER9
  201. .tm_name = "ttySM1:Timer9",
  202. ._tmxmd = &TM9MD,
  203. ._tmxbr = &TM9BR,
  204. ._tmicr = &TM9ICR,
  205. .tm_irq = TM9IRQ,
  206. .div_timer = MNSCx_DIV_TIMER_16BIT,
  207. #else /* CONFIG_MN10300_TTYSM1_TIMER3 */
  208. .tm_name = "ttySM1:Timer3",
  209. ._tmxmd = &TM3MD,
  210. ._tmxbr = (volatile u16 *) &TM3BR,
  211. ._tmicr = &TM3ICR,
  212. .tm_irq = TM3IRQ,
  213. .div_timer = MNSCx_DIV_TIMER_8BIT,
  214. #endif
  215. .rx_irq = SC1RXIRQ,
  216. .tx_irq = SC1TXIRQ,
  217. .rx_icr = &GxICR(SC1RXIRQ),
  218. .tx_icr = &GxICR(SC1TXIRQ),
  219. .clock_src = MNSCx_CLOCK_SRC_IOCLK,
  220. .options = 0,
  221. #ifdef CONFIG_GDBSTUB_ON_TTYSM1
  222. .gdbstub = 1,
  223. #endif
  224. };
  225. #endif /* CONFIG_MN10300_TTYSM1 */
  226. /*
  227. * the third on-chip serial port: ttySM2 (aka SIF2)
  228. */
  229. #ifdef CONFIG_MN10300_TTYSM2
  230. struct mn10300_serial_port mn10300_serial_port_sif2 = {
  231. .uart.ops = &mn10300_serial_ops,
  232. .uart.membase = (void __iomem *) &SC2CTR,
  233. .uart.mapbase = (unsigned long) &SC2CTR,
  234. .uart.iotype = UPIO_MEM,
  235. .uart.irq = 0,
  236. .uart.uartclk = 0, /* MN10300_IOCLK, */
  237. .uart.fifosize = 1,
  238. .uart.flags = UPF_BOOT_AUTOCONF,
  239. .uart.line = 2,
  240. #ifdef CONFIG_MN10300_TTYSM2_CTS
  241. .uart.type = PORT_MN10300_CTS,
  242. #else
  243. .uart.type = PORT_MN10300,
  244. #endif
  245. .uart.lock =
  246. __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif2.uart.lock),
  247. .name = "ttySM2",
  248. .rx_name = "ttySM2:Rx",
  249. .tx_name = "ttySM2:Tx",
  250. .tm_name = "ttySM2:Timer10",
  251. ._iobase = &SC2CTR,
  252. ._control = &SC2CTR,
  253. ._status = &SC2STR,
  254. ._intr = &SC2ICR,
  255. ._rxb = &SC2RXB,
  256. ._txb = &SC2TXB,
  257. ._tmxmd = &TM10MD,
  258. ._tmxbr = &TM10BR,
  259. ._tmicr = &TM10ICR,
  260. .tm_irq = TM10IRQ,
  261. .div_timer = MNSCx_DIV_TIMER_16BIT,
  262. .rx_irq = SC2RXIRQ,
  263. .tx_irq = SC2TXIRQ,
  264. .rx_icr = &GxICR(SC2RXIRQ),
  265. .tx_icr = &GxICR(SC2TXIRQ),
  266. .clock_src = MNSCx_CLOCK_SRC_IOCLK,
  267. #ifdef CONFIG_MN10300_TTYSM2_CTS
  268. .options = MNSCx_OPT_CTS,
  269. #else
  270. .options = 0,
  271. #endif
  272. #ifdef CONFIG_GDBSTUB_ON_TTYSM2
  273. .gdbstub = 1,
  274. #endif
  275. };
  276. #endif /* CONFIG_MN10300_TTYSM2 */
  277. /*
  278. * list of available serial ports
  279. */
  280. struct mn10300_serial_port *mn10300_serial_ports[NR_UARTS + 1] = {
  281. #ifdef CONFIG_MN10300_TTYSM0
  282. [0] = &mn10300_serial_port_sif0,
  283. #endif
  284. #ifdef CONFIG_MN10300_TTYSM1
  285. [1] = &mn10300_serial_port_sif1,
  286. #endif
  287. #ifdef CONFIG_MN10300_TTYSM2
  288. [2] = &mn10300_serial_port_sif2,
  289. #endif
  290. [NR_UARTS] = NULL,
  291. };
  292. /*
  293. * we abuse the serial ports' baud timers' interrupt lines to get the ability
  294. * to deliver interrupts to userspace as we use the ports' interrupt lines to
  295. * do virtual DMA on account of the ports having no hardware FIFOs
  296. *
  297. * we can generate an interrupt manually in the assembly stubs by writing to
  298. * the enable and detect bits in the interrupt control register, so all we need
  299. * to do here is disable the interrupt line
  300. *
  301. * note that we can't just leave the line enabled as the baud rate timer *also*
  302. * generates interrupts
  303. */
  304. static void mn10300_serial_mask_ack(unsigned int irq)
  305. {
  306. u16 tmp;
  307. GxICR(irq) = GxICR_LEVEL_6;
  308. tmp = GxICR(irq); /* flush write buffer */
  309. }
  310. static void mn10300_serial_nop(unsigned int irq)
  311. {
  312. }
  313. static struct irq_chip mn10300_serial_pic = {
  314. .name = "mnserial",
  315. .ack = mn10300_serial_mask_ack,
  316. .mask = mn10300_serial_mask_ack,
  317. .mask_ack = mn10300_serial_mask_ack,
  318. .unmask = mn10300_serial_nop,
  319. .end = mn10300_serial_nop,
  320. };
  321. /*
  322. * serial virtual DMA interrupt jump table
  323. */
  324. struct mn10300_serial_int mn10300_serial_int_tbl[NR_IRQS];
  325. static void mn10300_serial_dis_tx_intr(struct mn10300_serial_port *port)
  326. {
  327. u16 x;
  328. *port->tx_icr = GxICR_LEVEL_1 | GxICR_DETECT;
  329. x = *port->tx_icr;
  330. }
  331. static void mn10300_serial_en_tx_intr(struct mn10300_serial_port *port)
  332. {
  333. u16 x;
  334. *port->tx_icr = GxICR_LEVEL_1 | GxICR_ENABLE;
  335. x = *port->tx_icr;
  336. }
  337. static void mn10300_serial_dis_rx_intr(struct mn10300_serial_port *port)
  338. {
  339. u16 x;
  340. *port->rx_icr = GxICR_LEVEL_1 | GxICR_DETECT;
  341. x = *port->rx_icr;
  342. }
  343. /*
  344. * multi-bit equivalent of test_and_clear_bit()
  345. */
  346. static int mask_test_and_clear(volatile u8 *ptr, u8 mask)
  347. {
  348. u32 epsw;
  349. asm volatile(" bclr %1,(%2) \n"
  350. " mov epsw,%0 \n"
  351. : "=d"(epsw) : "d"(mask), "a"(ptr)
  352. : "cc", "memory");
  353. return !(epsw & EPSW_FLAG_Z);
  354. }
  355. /*
  356. * receive chars from the ring buffer for this serial port
  357. * - must do break detection here (not done in the UART)
  358. */
  359. static void mn10300_serial_receive_interrupt(struct mn10300_serial_port *port)
  360. {
  361. struct uart_icount *icount = &port->uart.icount;
  362. struct tty_struct *tty = port->uart.state->port.tty;
  363. unsigned ix;
  364. int count;
  365. u8 st, ch, push, status, overrun;
  366. _enter("%s", port->name);
  367. push = 0;
  368. count = CIRC_CNT(port->rx_inp, port->rx_outp, MNSC_BUFFER_SIZE);
  369. count = tty_buffer_request_room(tty, count);
  370. if (count == 0) {
  371. if (!tty->low_latency)
  372. tty_flip_buffer_push(tty);
  373. return;
  374. }
  375. try_again:
  376. /* pull chars out of the hat */
  377. ix = port->rx_outp;
  378. if (ix == port->rx_inp) {
  379. if (push && !tty->low_latency)
  380. tty_flip_buffer_push(tty);
  381. return;
  382. }
  383. ch = port->rx_buffer[ix++];
  384. st = port->rx_buffer[ix++];
  385. smp_rmb();
  386. port->rx_outp = ix & (MNSC_BUFFER_SIZE - 1);
  387. port->uart.icount.rx++;
  388. st &= SC01STR_FEF | SC01STR_PEF | SC01STR_OEF;
  389. status = 0;
  390. overrun = 0;
  391. /* the UART doesn't detect BREAK, so we have to do that ourselves
  392. * - it starts as a framing error on a NUL character
  393. * - then we count another two NUL characters before issuing TTY_BREAK
  394. * - then we end on a normal char or one that has all the bottom bits
  395. * zero and the top bits set
  396. */
  397. switch (port->rx_brk) {
  398. case 0:
  399. /* not breaking at the moment */
  400. break;
  401. case 1:
  402. if (st & SC01STR_FEF && ch == 0) {
  403. port->rx_brk = 2;
  404. goto try_again;
  405. }
  406. goto not_break;
  407. case 2:
  408. if (st & SC01STR_FEF && ch == 0) {
  409. port->rx_brk = 3;
  410. _proto("Rx Break Detected");
  411. icount->brk++;
  412. if (uart_handle_break(&port->uart))
  413. goto ignore_char;
  414. status |= 1 << TTY_BREAK;
  415. goto insert;
  416. }
  417. goto not_break;
  418. default:
  419. if (st & (SC01STR_FEF | SC01STR_PEF | SC01STR_OEF))
  420. goto try_again; /* still breaking */
  421. port->rx_brk = 0; /* end of the break */
  422. switch (ch) {
  423. case 0xFF:
  424. case 0xFE:
  425. case 0xFC:
  426. case 0xF8:
  427. case 0xF0:
  428. case 0xE0:
  429. case 0xC0:
  430. case 0x80:
  431. case 0x00:
  432. /* discard char at probable break end */
  433. goto try_again;
  434. }
  435. break;
  436. }
  437. process_errors:
  438. /* handle framing error */
  439. if (st & SC01STR_FEF) {
  440. if (ch == 0) {
  441. /* framing error with NUL char is probably a BREAK */
  442. port->rx_brk = 1;
  443. goto try_again;
  444. }
  445. _proto("Rx Framing Error");
  446. icount->frame++;
  447. status |= 1 << TTY_FRAME;
  448. }
  449. /* handle parity error */
  450. if (st & SC01STR_PEF) {
  451. _proto("Rx Parity Error");
  452. icount->parity++;
  453. status = TTY_PARITY;
  454. }
  455. /* handle normal char */
  456. if (status == 0) {
  457. if (uart_handle_sysrq_char(&port->uart, ch))
  458. goto ignore_char;
  459. status = (1 << TTY_NORMAL);
  460. }
  461. /* handle overrun error */
  462. if (st & SC01STR_OEF) {
  463. if (port->rx_brk)
  464. goto try_again;
  465. _proto("Rx Overrun Error");
  466. icount->overrun++;
  467. overrun = 1;
  468. }
  469. insert:
  470. status &= port->uart.read_status_mask;
  471. if (!overrun && !(status & port->uart.ignore_status_mask)) {
  472. int flag;
  473. if (status & (1 << TTY_BREAK))
  474. flag = TTY_BREAK;
  475. else if (status & (1 << TTY_PARITY))
  476. flag = TTY_PARITY;
  477. else if (status & (1 << TTY_FRAME))
  478. flag = TTY_FRAME;
  479. else
  480. flag = TTY_NORMAL;
  481. tty_insert_flip_char(tty, ch, flag);
  482. }
  483. /* overrun is special, since it's reported immediately, and doesn't
  484. * affect the current character
  485. */
  486. if (overrun)
  487. tty_insert_flip_char(tty, 0, TTY_OVERRUN);
  488. count--;
  489. if (count <= 0) {
  490. if (!tty->low_latency)
  491. tty_flip_buffer_push(tty);
  492. return;
  493. }
  494. ignore_char:
  495. push = 1;
  496. goto try_again;
  497. not_break:
  498. port->rx_brk = 0;
  499. goto process_errors;
  500. }
  501. /*
  502. * handle an interrupt from the serial transmission "virtual DMA" driver
  503. * - note: the interrupt routine will disable its own interrupts when the Tx
  504. * buffer is empty
  505. */
  506. static void mn10300_serial_transmit_interrupt(struct mn10300_serial_port *port)
  507. {
  508. _enter("%s", port->name);
  509. if (!port->uart.state || !port->uart.state->port.tty) {
  510. mn10300_serial_dis_tx_intr(port);
  511. return;
  512. }
  513. if (uart_tx_stopped(&port->uart) ||
  514. uart_circ_empty(&port->uart.state->xmit))
  515. mn10300_serial_dis_tx_intr(port);
  516. if (uart_circ_chars_pending(&port->uart.state->xmit) < WAKEUP_CHARS)
  517. uart_write_wakeup(&port->uart);
  518. }
  519. /*
  520. * deal with a change in the status of the CTS line
  521. */
  522. static void mn10300_serial_cts_changed(struct mn10300_serial_port *port, u8 st)
  523. {
  524. u16 ctr;
  525. port->tx_cts = st;
  526. port->uart.icount.cts++;
  527. /* flip the CTS state selector flag to interrupt when it changes
  528. * back */
  529. ctr = *port->_control;
  530. ctr ^= SC2CTR_TWS;
  531. *port->_control = ctr;
  532. uart_handle_cts_change(&port->uart, st & SC2STR_CTS);
  533. wake_up_interruptible(&port->uart.state->port.delta_msr_wait);
  534. }
  535. /*
  536. * handle a virtual interrupt generated by the lower level "virtual DMA"
  537. * routines (irq is the baud timer interrupt)
  538. */
  539. static irqreturn_t mn10300_serial_interrupt(int irq, void *dev_id)
  540. {
  541. struct mn10300_serial_port *port = dev_id;
  542. u8 st;
  543. spin_lock(&port->uart.lock);
  544. if (port->intr_flags) {
  545. _debug("INT %s: %x", port->name, port->intr_flags);
  546. if (mask_test_and_clear(&port->intr_flags, MNSCx_RX_AVAIL))
  547. mn10300_serial_receive_interrupt(port);
  548. if (mask_test_and_clear(&port->intr_flags,
  549. MNSCx_TX_SPACE | MNSCx_TX_EMPTY))
  550. mn10300_serial_transmit_interrupt(port);
  551. }
  552. /* the only modem control line amongst the whole lot is CTS on
  553. * serial port 2 */
  554. if (port->type == PORT_MN10300_CTS) {
  555. st = *port->_status;
  556. if ((port->tx_cts ^ st) & SC2STR_CTS)
  557. mn10300_serial_cts_changed(port, st);
  558. }
  559. spin_unlock(&port->uart.lock);
  560. return IRQ_HANDLED;
  561. }
  562. /*
  563. * return indication of whether the hardware transmit buffer is empty
  564. */
  565. static unsigned int mn10300_serial_tx_empty(struct uart_port *_port)
  566. {
  567. struct mn10300_serial_port *port =
  568. container_of(_port, struct mn10300_serial_port, uart);
  569. _enter("%s", port->name);
  570. return (*port->_status & (SC01STR_TXF | SC01STR_TBF)) ?
  571. 0 : TIOCSER_TEMT;
  572. }
  573. /*
  574. * set the modem control lines (we don't have any)
  575. */
  576. static void mn10300_serial_set_mctrl(struct uart_port *_port,
  577. unsigned int mctrl)
  578. {
  579. struct mn10300_serial_port *port =
  580. container_of(_port, struct mn10300_serial_port, uart);
  581. _enter("%s,%x", port->name, mctrl);
  582. }
  583. /*
  584. * get the modem control line statuses
  585. */
  586. static unsigned int mn10300_serial_get_mctrl(struct uart_port *_port)
  587. {
  588. struct mn10300_serial_port *port =
  589. container_of(_port, struct mn10300_serial_port, uart);
  590. _enter("%s", port->name);
  591. if (port->type == PORT_MN10300_CTS && !(*port->_status & SC2STR_CTS))
  592. return TIOCM_CAR | TIOCM_DSR;
  593. return TIOCM_CAR | TIOCM_CTS | TIOCM_DSR;
  594. }
  595. /*
  596. * stop transmitting characters
  597. */
  598. static void mn10300_serial_stop_tx(struct uart_port *_port)
  599. {
  600. struct mn10300_serial_port *port =
  601. container_of(_port, struct mn10300_serial_port, uart);
  602. _enter("%s", port->name);
  603. /* disable the virtual DMA */
  604. mn10300_serial_dis_tx_intr(port);
  605. }
  606. /*
  607. * start transmitting characters
  608. * - jump-start transmission if it has stalled
  609. * - enable the serial Tx interrupt (used by the virtual DMA controller)
  610. * - force an interrupt to happen if necessary
  611. */
  612. static void mn10300_serial_start_tx(struct uart_port *_port)
  613. {
  614. struct mn10300_serial_port *port =
  615. container_of(_port, struct mn10300_serial_port, uart);
  616. u16 x;
  617. _enter("%s{%lu}",
  618. port->name,
  619. CIRC_CNT(&port->uart.state->xmit.head,
  620. &port->uart.state->xmit.tail,
  621. UART_XMIT_SIZE));
  622. /* kick the virtual DMA controller */
  623. x = *port->tx_icr;
  624. x |= GxICR_ENABLE;
  625. if (*port->_status & SC01STR_TBF)
  626. x &= ~(GxICR_REQUEST | GxICR_DETECT);
  627. else
  628. x |= GxICR_REQUEST | GxICR_DETECT;
  629. _debug("CTR=%04hx ICR=%02hx STR=%04x TMD=%02hx TBR=%04hx ICR=%04hx",
  630. *port->_control, *port->_intr, *port->_status,
  631. *port->_tmxmd, *port->_tmxbr, *port->tx_icr);
  632. *port->tx_icr = x;
  633. x = *port->tx_icr;
  634. }
  635. /*
  636. * transmit a high-priority XON/XOFF character
  637. */
  638. static void mn10300_serial_send_xchar(struct uart_port *_port, char ch)
  639. {
  640. struct mn10300_serial_port *port =
  641. container_of(_port, struct mn10300_serial_port, uart);
  642. _enter("%s,%02x", port->name, ch);
  643. if (likely(port->gdbstub)) {
  644. port->tx_xchar = ch;
  645. if (ch)
  646. mn10300_serial_en_tx_intr(port);
  647. }
  648. }
  649. /*
  650. * stop receiving characters
  651. * - called whilst the port is being closed
  652. */
  653. static void mn10300_serial_stop_rx(struct uart_port *_port)
  654. {
  655. struct mn10300_serial_port *port =
  656. container_of(_port, struct mn10300_serial_port, uart);
  657. u16 ctr;
  658. _enter("%s", port->name);
  659. ctr = *port->_control;
  660. ctr &= ~SC01CTR_RXE;
  661. *port->_control = ctr;
  662. mn10300_serial_dis_rx_intr(port);
  663. }
  664. /*
  665. * enable modem status interrupts
  666. */
  667. static void mn10300_serial_enable_ms(struct uart_port *_port)
  668. {
  669. struct mn10300_serial_port *port =
  670. container_of(_port, struct mn10300_serial_port, uart);
  671. u16 ctr, cts;
  672. _enter("%s", port->name);
  673. if (port->type == PORT_MN10300_CTS) {
  674. /* want to interrupt when CTS goes low if CTS is now high and
  675. * vice versa
  676. */
  677. port->tx_cts = *port->_status;
  678. cts = (port->tx_cts & SC2STR_CTS) ?
  679. SC2CTR_TWE : SC2CTR_TWE | SC2CTR_TWS;
  680. ctr = *port->_control;
  681. ctr &= ~SC2CTR_TWS;
  682. ctr |= cts;
  683. *port->_control = ctr;
  684. mn10300_serial_en_tx_intr(port);
  685. }
  686. }
  687. /*
  688. * transmit or cease transmitting a break signal
  689. */
  690. static void mn10300_serial_break_ctl(struct uart_port *_port, int ctl)
  691. {
  692. struct mn10300_serial_port *port =
  693. container_of(_port, struct mn10300_serial_port, uart);
  694. _enter("%s,%d", port->name, ctl);
  695. if (ctl) {
  696. /* tell the virtual DMA handler to assert BREAK */
  697. port->tx_break = 1;
  698. mn10300_serial_en_tx_intr(port);
  699. } else {
  700. port->tx_break = 0;
  701. *port->_control &= ~SC01CTR_BKE;
  702. mn10300_serial_en_tx_intr(port);
  703. }
  704. }
  705. /*
  706. * grab the interrupts and enable the port for reception
  707. */
  708. static int mn10300_serial_startup(struct uart_port *_port)
  709. {
  710. struct mn10300_serial_port *port =
  711. container_of(_port, struct mn10300_serial_port, uart);
  712. struct mn10300_serial_int *pint;
  713. _enter("%s{%d}", port->name, port->gdbstub);
  714. if (unlikely(port->gdbstub))
  715. return -EBUSY;
  716. /* allocate an Rx buffer for the virtual DMA handler */
  717. port->rx_buffer = kmalloc(MNSC_BUFFER_SIZE, GFP_KERNEL);
  718. if (!port->rx_buffer)
  719. return -ENOMEM;
  720. port->rx_inp = port->rx_outp = 0;
  721. /* finally, enable the device */
  722. *port->_intr = SC01ICR_TI;
  723. *port->_control |= SC01CTR_TXE | SC01CTR_RXE;
  724. pint = &mn10300_serial_int_tbl[port->rx_irq];
  725. pint->port = port;
  726. pint->vdma = mn10300_serial_vdma_rx_handler;
  727. pint = &mn10300_serial_int_tbl[port->tx_irq];
  728. pint->port = port;
  729. pint->vdma = mn10300_serial_vdma_tx_handler;
  730. set_intr_level(port->rx_irq, GxICR_LEVEL_1);
  731. set_intr_level(port->tx_irq, GxICR_LEVEL_1);
  732. set_irq_chip(port->tm_irq, &mn10300_serial_pic);
  733. if (request_irq(port->rx_irq, mn10300_serial_interrupt,
  734. IRQF_DISABLED, port->rx_name, port) < 0)
  735. goto error;
  736. if (request_irq(port->tx_irq, mn10300_serial_interrupt,
  737. IRQF_DISABLED, port->tx_name, port) < 0)
  738. goto error2;
  739. if (request_irq(port->tm_irq, mn10300_serial_interrupt,
  740. IRQF_DISABLED, port->tm_name, port) < 0)
  741. goto error3;
  742. mn10300_serial_mask_ack(port->tm_irq);
  743. return 0;
  744. error3:
  745. free_irq(port->tx_irq, port);
  746. error2:
  747. free_irq(port->rx_irq, port);
  748. error:
  749. kfree(port->rx_buffer);
  750. port->rx_buffer = NULL;
  751. return -EBUSY;
  752. }
  753. /*
  754. * shutdown the port and release interrupts
  755. */
  756. static void mn10300_serial_shutdown(struct uart_port *_port)
  757. {
  758. struct mn10300_serial_port *port =
  759. container_of(_port, struct mn10300_serial_port, uart);
  760. _enter("%s", port->name);
  761. /* disable the serial port and its baud rate timer */
  762. port->tx_break = 0;
  763. *port->_control &= ~(SC01CTR_TXE | SC01CTR_RXE | SC01CTR_BKE);
  764. *port->_tmxmd = 0;
  765. if (port->rx_buffer) {
  766. void *buf = port->rx_buffer;
  767. port->rx_buffer = NULL;
  768. kfree(buf);
  769. }
  770. /* disable all intrs */
  771. free_irq(port->tm_irq, port);
  772. free_irq(port->rx_irq, port);
  773. free_irq(port->tx_irq, port);
  774. *port->rx_icr = GxICR_LEVEL_1;
  775. *port->tx_icr = GxICR_LEVEL_1;
  776. }
  777. /*
  778. * this routine is called to set the UART divisor registers to match the
  779. * specified baud rate for a serial port.
  780. */
  781. static void mn10300_serial_change_speed(struct mn10300_serial_port *port,
  782. struct ktermios *new,
  783. struct ktermios *old)
  784. {
  785. unsigned long flags;
  786. unsigned long ioclk = port->ioclk;
  787. unsigned cflag;
  788. int baud, bits, xdiv, tmp;
  789. u16 tmxbr, scxctr;
  790. u8 tmxmd, battempt;
  791. u8 div_timer = port->div_timer;
  792. _enter("%s{%lu}", port->name, ioclk);
  793. /* byte size and parity */
  794. cflag = new->c_cflag;
  795. switch (cflag & CSIZE) {
  796. case CS7: scxctr = SC01CTR_CLN_7BIT; bits = 9; break;
  797. case CS8: scxctr = SC01CTR_CLN_8BIT; bits = 10; break;
  798. default: scxctr = SC01CTR_CLN_8BIT; bits = 10; break;
  799. }
  800. if (cflag & CSTOPB) {
  801. scxctr |= SC01CTR_STB_2BIT;
  802. bits++;
  803. }
  804. if (cflag & PARENB) {
  805. bits++;
  806. if (cflag & PARODD)
  807. scxctr |= SC01CTR_PB_ODD;
  808. #ifdef CMSPAR
  809. else if (cflag & CMSPAR)
  810. scxctr |= SC01CTR_PB_FIXED0;
  811. #endif
  812. else
  813. scxctr |= SC01CTR_PB_EVEN;
  814. }
  815. /* Determine divisor based on baud rate */
  816. battempt = 0;
  817. if (div_timer == MNSCx_DIV_TIMER_16BIT)
  818. scxctr |= SC0CTR_CK_TM8UFLOW_8; /* ( == SC1CTR_CK_TM9UFLOW_8
  819. * == SC2CTR_CK_TM10UFLOW) */
  820. else if (div_timer == MNSCx_DIV_TIMER_8BIT)
  821. scxctr |= SC0CTR_CK_TM2UFLOW_8;
  822. try_alternative:
  823. baud = uart_get_baud_rate(&port->uart, new, old, 0,
  824. port->ioclk / 8);
  825. _debug("ALT %d [baud %d]", battempt, baud);
  826. if (!baud)
  827. baud = 9600; /* B0 transition handled in rs_set_termios */
  828. xdiv = 1;
  829. if (baud == 134) {
  830. baud = 269; /* 134 is really 134.5 */
  831. xdiv = 2;
  832. }
  833. if (baud == 38400 &&
  834. (port->uart.flags & UPF_SPD_MASK) == UPF_SPD_CUST
  835. ) {
  836. _debug("CUSTOM %u", port->uart.custom_divisor);
  837. if (div_timer == MNSCx_DIV_TIMER_16BIT) {
  838. if (port->uart.custom_divisor <= 65535) {
  839. tmxmd = TM8MD_SRC_IOCLK;
  840. tmxbr = port->uart.custom_divisor;
  841. port->uart.uartclk = ioclk;
  842. goto timer_okay;
  843. }
  844. if (port->uart.custom_divisor / 8 <= 65535) {
  845. tmxmd = TM8MD_SRC_IOCLK_8;
  846. tmxbr = port->uart.custom_divisor / 8;
  847. port->uart.custom_divisor = tmxbr * 8;
  848. port->uart.uartclk = ioclk / 8;
  849. goto timer_okay;
  850. }
  851. if (port->uart.custom_divisor / 32 <= 65535) {
  852. tmxmd = TM8MD_SRC_IOCLK_32;
  853. tmxbr = port->uart.custom_divisor / 32;
  854. port->uart.custom_divisor = tmxbr * 32;
  855. port->uart.uartclk = ioclk / 32;
  856. goto timer_okay;
  857. }
  858. } else if (div_timer == MNSCx_DIV_TIMER_8BIT) {
  859. if (port->uart.custom_divisor <= 255) {
  860. tmxmd = TM2MD_SRC_IOCLK;
  861. tmxbr = port->uart.custom_divisor;
  862. port->uart.uartclk = ioclk;
  863. goto timer_okay;
  864. }
  865. if (port->uart.custom_divisor / 8 <= 255) {
  866. tmxmd = TM2MD_SRC_IOCLK_8;
  867. tmxbr = port->uart.custom_divisor / 8;
  868. port->uart.custom_divisor = tmxbr * 8;
  869. port->uart.uartclk = ioclk / 8;
  870. goto timer_okay;
  871. }
  872. if (port->uart.custom_divisor / 32 <= 255) {
  873. tmxmd = TM2MD_SRC_IOCLK_32;
  874. tmxbr = port->uart.custom_divisor / 32;
  875. port->uart.custom_divisor = tmxbr * 32;
  876. port->uart.uartclk = ioclk / 32;
  877. goto timer_okay;
  878. }
  879. }
  880. }
  881. switch (div_timer) {
  882. case MNSCx_DIV_TIMER_16BIT:
  883. port->uart.uartclk = ioclk;
  884. tmxmd = TM8MD_SRC_IOCLK;
  885. tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1;
  886. if (tmp > 0 && tmp <= 65535)
  887. goto timer_okay;
  888. port->uart.uartclk = ioclk / 8;
  889. tmxmd = TM8MD_SRC_IOCLK_8;
  890. tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1;
  891. if (tmp > 0 && tmp <= 65535)
  892. goto timer_okay;
  893. port->uart.uartclk = ioclk / 32;
  894. tmxmd = TM8MD_SRC_IOCLK_32;
  895. tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1;
  896. if (tmp > 0 && tmp <= 65535)
  897. goto timer_okay;
  898. break;
  899. case MNSCx_DIV_TIMER_8BIT:
  900. port->uart.uartclk = ioclk;
  901. tmxmd = TM2MD_SRC_IOCLK;
  902. tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1;
  903. if (tmp > 0 && tmp <= 255)
  904. goto timer_okay;
  905. port->uart.uartclk = ioclk / 8;
  906. tmxmd = TM2MD_SRC_IOCLK_8;
  907. tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1;
  908. if (tmp > 0 && tmp <= 255)
  909. goto timer_okay;
  910. port->uart.uartclk = ioclk / 32;
  911. tmxmd = TM2MD_SRC_IOCLK_32;
  912. tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1;
  913. if (tmp > 0 && tmp <= 255)
  914. goto timer_okay;
  915. break;
  916. default:
  917. BUG();
  918. return;
  919. }
  920. /* refuse to change to a baud rate we can't support */
  921. _debug("CAN'T SUPPORT");
  922. switch (battempt) {
  923. case 0:
  924. if (old) {
  925. new->c_cflag &= ~CBAUD;
  926. new->c_cflag |= (old->c_cflag & CBAUD);
  927. battempt = 1;
  928. goto try_alternative;
  929. }
  930. case 1:
  931. /* as a last resort, if the quotient is zero, default to 9600
  932. * bps */
  933. new->c_cflag &= ~CBAUD;
  934. new->c_cflag |= B9600;
  935. battempt = 2;
  936. goto try_alternative;
  937. default:
  938. /* hmmm... can't seem to support 9600 either
  939. * - we could try iterating through the speeds we know about to
  940. * find the lowest
  941. */
  942. new->c_cflag &= ~CBAUD;
  943. new->c_cflag |= B0;
  944. if (div_timer == MNSCx_DIV_TIMER_16BIT)
  945. tmxmd = TM8MD_SRC_IOCLK_32;
  946. else if (div_timer == MNSCx_DIV_TIMER_8BIT)
  947. tmxmd = TM2MD_SRC_IOCLK_32;
  948. tmxbr = 1;
  949. port->uart.uartclk = ioclk / 32;
  950. break;
  951. }
  952. timer_okay:
  953. _debug("UARTCLK: %u / %hu", port->uart.uartclk, tmxbr);
  954. /* make the changes */
  955. spin_lock_irqsave(&port->uart.lock, flags);
  956. uart_update_timeout(&port->uart, new->c_cflag, baud);
  957. /* set the timer to produce the required baud rate */
  958. switch (div_timer) {
  959. case MNSCx_DIV_TIMER_16BIT:
  960. *port->_tmxmd = 0;
  961. *port->_tmxbr = tmxbr;
  962. *port->_tmxmd = TM8MD_INIT_COUNTER;
  963. *port->_tmxmd = tmxmd | TM8MD_COUNT_ENABLE;
  964. break;
  965. case MNSCx_DIV_TIMER_8BIT:
  966. *port->_tmxmd = 0;
  967. *(volatile u8 *) port->_tmxbr = (u8) tmxbr;
  968. *port->_tmxmd = TM2MD_INIT_COUNTER;
  969. *port->_tmxmd = tmxmd | TM2MD_COUNT_ENABLE;
  970. break;
  971. }
  972. /* CTS flow control flag and modem status interrupts */
  973. scxctr &= ~(SC2CTR_TWE | SC2CTR_TWS);
  974. if (port->type == PORT_MN10300_CTS && cflag & CRTSCTS) {
  975. /* want to interrupt when CTS goes low if CTS is now
  976. * high and vice versa
  977. */
  978. port->tx_cts = *port->_status;
  979. if (port->tx_cts & SC2STR_CTS)
  980. scxctr |= SC2CTR_TWE;
  981. else
  982. scxctr |= SC2CTR_TWE | SC2CTR_TWS;
  983. }
  984. /* set up parity check flag */
  985. port->uart.read_status_mask = (1 << TTY_NORMAL) | (1 << TTY_OVERRUN);
  986. if (new->c_iflag & INPCK)
  987. port->uart.read_status_mask |=
  988. (1 << TTY_PARITY) | (1 << TTY_FRAME);
  989. if (new->c_iflag & (BRKINT | PARMRK))
  990. port->uart.read_status_mask |= (1 << TTY_BREAK);
  991. /* characters to ignore */
  992. port->uart.ignore_status_mask = 0;
  993. if (new->c_iflag & IGNPAR)
  994. port->uart.ignore_status_mask |=
  995. (1 << TTY_PARITY) | (1 << TTY_FRAME);
  996. if (new->c_iflag & IGNBRK) {
  997. port->uart.ignore_status_mask |= (1 << TTY_BREAK);
  998. /*
  999. * If we're ignoring parity and break indicators,
  1000. * ignore overruns to (for real raw support).
  1001. */
  1002. if (new->c_iflag & IGNPAR)
  1003. port->uart.ignore_status_mask |= (1 << TTY_OVERRUN);
  1004. }
  1005. /* Ignore all characters if CREAD is not set */
  1006. if ((new->c_cflag & CREAD) == 0)
  1007. port->uart.ignore_status_mask |= (1 << TTY_NORMAL);
  1008. scxctr |= *port->_control & (SC01CTR_TXE | SC01CTR_RXE | SC01CTR_BKE);
  1009. *port->_control = scxctr;
  1010. spin_unlock_irqrestore(&port->uart.lock, flags);
  1011. }
  1012. /*
  1013. * set the terminal I/O parameters
  1014. */
  1015. static void mn10300_serial_set_termios(struct uart_port *_port,
  1016. struct ktermios *new,
  1017. struct ktermios *old)
  1018. {
  1019. struct mn10300_serial_port *port =
  1020. container_of(_port, struct mn10300_serial_port, uart);
  1021. _enter("%s,%p,%p", port->name, new, old);
  1022. mn10300_serial_change_speed(port, new, old);
  1023. /* handle turning off CRTSCTS */
  1024. if (!(new->c_cflag & CRTSCTS)) {
  1025. u16 ctr = *port->_control;
  1026. ctr &= ~SC2CTR_TWE;
  1027. *port->_control = ctr;
  1028. }
  1029. }
  1030. /*
  1031. * return description of port type
  1032. */
  1033. static const char *mn10300_serial_type(struct uart_port *_port)
  1034. {
  1035. struct mn10300_serial_port *port =
  1036. container_of(_port, struct mn10300_serial_port, uart);
  1037. if (port->uart.type == PORT_MN10300_CTS)
  1038. return "MN10300 SIF_CTS";
  1039. return "MN10300 SIF";
  1040. }
  1041. /*
  1042. * release I/O and memory regions in use by port
  1043. */
  1044. static void mn10300_serial_release_port(struct uart_port *_port)
  1045. {
  1046. struct mn10300_serial_port *port =
  1047. container_of(_port, struct mn10300_serial_port, uart);
  1048. _enter("%s", port->name);
  1049. release_mem_region((unsigned long) port->_iobase, 16);
  1050. }
  1051. /*
  1052. * request I/O and memory regions for port
  1053. */
  1054. static int mn10300_serial_request_port(struct uart_port *_port)
  1055. {
  1056. struct mn10300_serial_port *port =
  1057. container_of(_port, struct mn10300_serial_port, uart);
  1058. _enter("%s", port->name);
  1059. request_mem_region((unsigned long) port->_iobase, 16, port->name);
  1060. return 0;
  1061. }
  1062. /*
  1063. * configure the type and reserve the ports
  1064. */
  1065. static void mn10300_serial_config_port(struct uart_port *_port, int type)
  1066. {
  1067. struct mn10300_serial_port *port =
  1068. container_of(_port, struct mn10300_serial_port, uart);
  1069. _enter("%s", port->name);
  1070. port->uart.type = PORT_MN10300;
  1071. if (port->options & MNSCx_OPT_CTS)
  1072. port->uart.type = PORT_MN10300_CTS;
  1073. mn10300_serial_request_port(_port);
  1074. }
  1075. /*
  1076. * verify serial parameters are suitable for this port type
  1077. */
  1078. static int mn10300_serial_verify_port(struct uart_port *_port,
  1079. struct serial_struct *ss)
  1080. {
  1081. struct mn10300_serial_port *port =
  1082. container_of(_port, struct mn10300_serial_port, uart);
  1083. void *mapbase = (void *) (unsigned long) port->uart.mapbase;
  1084. _enter("%s", port->name);
  1085. /* these things may not be changed */
  1086. if (ss->irq != port->uart.irq ||
  1087. ss->port != port->uart.iobase ||
  1088. ss->io_type != port->uart.iotype ||
  1089. ss->iomem_base != mapbase ||
  1090. ss->iomem_reg_shift != port->uart.regshift ||
  1091. ss->hub6 != port->uart.hub6 ||
  1092. ss->xmit_fifo_size != port->uart.fifosize)
  1093. return -EINVAL;
  1094. /* type may be changed on a port that supports CTS */
  1095. if (ss->type != port->uart.type) {
  1096. if (!(port->options & MNSCx_OPT_CTS))
  1097. return -EINVAL;
  1098. if (ss->type != PORT_MN10300 &&
  1099. ss->type != PORT_MN10300_CTS)
  1100. return -EINVAL;
  1101. }
  1102. return 0;
  1103. }
  1104. /*
  1105. * initialise the MN10300 on-chip UARTs
  1106. */
  1107. static int __init mn10300_serial_init(void)
  1108. {
  1109. struct mn10300_serial_port *port;
  1110. int ret, i;
  1111. printk(KERN_INFO "%s version %s (%s)\n",
  1112. serial_name, serial_version, serial_revdate);
  1113. #ifdef CONFIG_MN10300_TTYSM2
  1114. SC2TIM = 8; /* make the baud base of timer 2 IOCLK/8 */
  1115. #endif
  1116. set_intr_stub(EXCEP_IRQ_LEVEL1, mn10300_serial_vdma_interrupt);
  1117. ret = uart_register_driver(&mn10300_serial_driver);
  1118. if (!ret) {
  1119. for (i = 0 ; i < NR_PORTS ; i++) {
  1120. port = mn10300_serial_ports[i];
  1121. if (!port || port->gdbstub)
  1122. continue;
  1123. switch (port->clock_src) {
  1124. case MNSCx_CLOCK_SRC_IOCLK:
  1125. port->ioclk = MN10300_IOCLK;
  1126. break;
  1127. #ifdef MN10300_IOBCLK
  1128. case MNSCx_CLOCK_SRC_IOBCLK:
  1129. port->ioclk = MN10300_IOBCLK;
  1130. break;
  1131. #endif
  1132. default:
  1133. BUG();
  1134. }
  1135. ret = uart_add_one_port(&mn10300_serial_driver,
  1136. &port->uart);
  1137. if (ret < 0) {
  1138. _debug("ERROR %d", -ret);
  1139. break;
  1140. }
  1141. }
  1142. if (ret)
  1143. uart_unregister_driver(&mn10300_serial_driver);
  1144. }
  1145. return ret;
  1146. }
  1147. __initcall(mn10300_serial_init);
  1148. #ifdef CONFIG_MN10300_TTYSM_CONSOLE
  1149. /*
  1150. * print a string to the serial port without disturbing the real user of the
  1151. * port too much
  1152. * - the console must be locked by the caller
  1153. */
  1154. static void mn10300_serial_console_write(struct console *co,
  1155. const char *s, unsigned count)
  1156. {
  1157. struct mn10300_serial_port *port;
  1158. unsigned i;
  1159. u16 scxctr, txicr, tmp;
  1160. u8 tmxmd;
  1161. port = mn10300_serial_ports[co->index];
  1162. /* firstly hijack the serial port from the "virtual DMA" controller */
  1163. txicr = *port->tx_icr;
  1164. *port->tx_icr = GxICR_LEVEL_1;
  1165. tmp = *port->tx_icr;
  1166. /* the transmitter may be disabled */
  1167. scxctr = *port->_control;
  1168. if (!(scxctr & SC01CTR_TXE)) {
  1169. /* restart the UART clock */
  1170. tmxmd = *port->_tmxmd;
  1171. switch (port->div_timer) {
  1172. case MNSCx_DIV_TIMER_16BIT:
  1173. *port->_tmxmd = 0;
  1174. *port->_tmxmd = TM8MD_INIT_COUNTER;
  1175. *port->_tmxmd = tmxmd | TM8MD_COUNT_ENABLE;
  1176. break;
  1177. case MNSCx_DIV_TIMER_8BIT:
  1178. *port->_tmxmd = 0;
  1179. *port->_tmxmd = TM2MD_INIT_COUNTER;
  1180. *port->_tmxmd = tmxmd | TM2MD_COUNT_ENABLE;
  1181. break;
  1182. }
  1183. /* enable the transmitter */
  1184. *port->_control = (scxctr & ~SC01CTR_BKE) | SC01CTR_TXE;
  1185. } else if (scxctr & SC01CTR_BKE) {
  1186. /* stop transmitting BREAK */
  1187. *port->_control = (scxctr & ~SC01CTR_BKE);
  1188. }
  1189. /* send the chars into the serial port (with LF -> LFCR conversion) */
  1190. for (i = 0; i < count; i++) {
  1191. char ch = *s++;
  1192. while (*port->_status & SC01STR_TBF)
  1193. continue;
  1194. *(u8 *) port->_txb = ch;
  1195. if (ch == 0x0a) {
  1196. while (*port->_status & SC01STR_TBF)
  1197. continue;
  1198. *(u8 *) port->_txb = 0xd;
  1199. }
  1200. }
  1201. /* can't let the transmitter be turned off if it's actually
  1202. * transmitting */
  1203. while (*port->_status & (SC01STR_TXF | SC01STR_TBF))
  1204. continue;
  1205. /* disable the transmitter if we re-enabled it */
  1206. if (!(scxctr & SC01CTR_TXE))
  1207. *port->_control = scxctr;
  1208. *port->tx_icr = txicr;
  1209. tmp = *port->tx_icr;
  1210. }
  1211. /*
  1212. * set up a serial port as a console
  1213. * - construct a cflag setting for the first rs_open()
  1214. * - initialize the serial port
  1215. * - return non-zero if we didn't find a serial port.
  1216. */
  1217. static int __init mn10300_serial_console_setup(struct console *co,
  1218. char *options)
  1219. {
  1220. struct mn10300_serial_port *port;
  1221. int i, parity = 'n', baud = 9600, bits = 8, flow = 0;
  1222. for (i = 0 ; i < NR_PORTS ; i++) {
  1223. port = mn10300_serial_ports[i];
  1224. if (port && !port->gdbstub && port->uart.line == co->index)
  1225. goto found_device;
  1226. }
  1227. return -ENODEV;
  1228. found_device:
  1229. switch (port->clock_src) {
  1230. case MNSCx_CLOCK_SRC_IOCLK:
  1231. port->ioclk = MN10300_IOCLK;
  1232. break;
  1233. #ifdef MN10300_IOBCLK
  1234. case MNSCx_CLOCK_SRC_IOBCLK:
  1235. port->ioclk = MN10300_IOBCLK;
  1236. break;
  1237. #endif
  1238. default:
  1239. BUG();
  1240. }
  1241. if (options)
  1242. uart_parse_options(options, &baud, &parity, &bits, &flow);
  1243. return uart_set_options(&port->uart, co, baud, parity, bits, flow);
  1244. }
  1245. /*
  1246. * register console
  1247. */
  1248. static int __init mn10300_serial_console_init(void)
  1249. {
  1250. register_console(&mn10300_serial_console);
  1251. return 0;
  1252. }
  1253. console_initcall(mn10300_serial_console_init);
  1254. #endif