bfin_gpio.c 29 KB

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  1. /*
  2. * GPIO Abstraction Layer
  3. *
  4. * Copyright 2006-2009 Analog Devices Inc.
  5. *
  6. * Licensed under the GPL-2 or later
  7. */
  8. #include <linux/delay.h>
  9. #include <linux/module.h>
  10. #include <linux/err.h>
  11. #include <linux/proc_fs.h>
  12. #include <asm/blackfin.h>
  13. #include <asm/gpio.h>
  14. #include <asm/portmux.h>
  15. #include <linux/irq.h>
  16. #if ANOMALY_05000311 || ANOMALY_05000323
  17. enum {
  18. AWA_data = SYSCR,
  19. AWA_data_clear = SYSCR,
  20. AWA_data_set = SYSCR,
  21. AWA_toggle = SYSCR,
  22. AWA_maska = BFIN_UART_SCR,
  23. AWA_maska_clear = BFIN_UART_SCR,
  24. AWA_maska_set = BFIN_UART_SCR,
  25. AWA_maska_toggle = BFIN_UART_SCR,
  26. AWA_maskb = BFIN_UART_GCTL,
  27. AWA_maskb_clear = BFIN_UART_GCTL,
  28. AWA_maskb_set = BFIN_UART_GCTL,
  29. AWA_maskb_toggle = BFIN_UART_GCTL,
  30. AWA_dir = SPORT1_STAT,
  31. AWA_polar = SPORT1_STAT,
  32. AWA_edge = SPORT1_STAT,
  33. AWA_both = SPORT1_STAT,
  34. #if ANOMALY_05000311
  35. AWA_inen = TIMER_ENABLE,
  36. #elif ANOMALY_05000323
  37. AWA_inen = DMA1_1_CONFIG,
  38. #endif
  39. };
  40. /* Anomaly Workaround */
  41. #define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name)
  42. #else
  43. #define AWA_DUMMY_READ(...) do { } while (0)
  44. #endif
  45. static struct gpio_port_t * const gpio_array[] = {
  46. #if defined(BF533_FAMILY) || defined(BF538_FAMILY)
  47. (struct gpio_port_t *) FIO_FLAG_D,
  48. #elif defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  49. (struct gpio_port_t *) PORTFIO,
  50. (struct gpio_port_t *) PORTGIO,
  51. (struct gpio_port_t *) PORTHIO,
  52. #elif defined(BF561_FAMILY)
  53. (struct gpio_port_t *) FIO0_FLAG_D,
  54. (struct gpio_port_t *) FIO1_FLAG_D,
  55. (struct gpio_port_t *) FIO2_FLAG_D,
  56. #elif defined(CONFIG_BF54x)
  57. (struct gpio_port_t *)PORTA_FER,
  58. (struct gpio_port_t *)PORTB_FER,
  59. (struct gpio_port_t *)PORTC_FER,
  60. (struct gpio_port_t *)PORTD_FER,
  61. (struct gpio_port_t *)PORTE_FER,
  62. (struct gpio_port_t *)PORTF_FER,
  63. (struct gpio_port_t *)PORTG_FER,
  64. (struct gpio_port_t *)PORTH_FER,
  65. (struct gpio_port_t *)PORTI_FER,
  66. (struct gpio_port_t *)PORTJ_FER,
  67. #else
  68. # error no gpio arrays defined
  69. #endif
  70. };
  71. #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  72. static unsigned short * const port_fer[] = {
  73. (unsigned short *) PORTF_FER,
  74. (unsigned short *) PORTG_FER,
  75. (unsigned short *) PORTH_FER,
  76. };
  77. # if !defined(BF537_FAMILY)
  78. static unsigned short * const port_mux[] = {
  79. (unsigned short *) PORTF_MUX,
  80. (unsigned short *) PORTG_MUX,
  81. (unsigned short *) PORTH_MUX,
  82. };
  83. static const
  84. u8 pmux_offset[][16] = {
  85. # if defined(CONFIG_BF52x)
  86. { 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
  87. { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
  88. { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
  89. # elif defined(CONFIG_BF51x)
  90. { 0, 2, 2, 2, 2, 2, 2, 4, 6, 6, 6, 8, 8, 8, 8, 10 }, /* PORTF */
  91. { 0, 0, 0, 2, 4, 6, 6, 6, 8, 10, 10, 12, 14, 14, 14, 14 }, /* PORTG */
  92. { 0, 0, 0, 0, 2, 2, 4, 6, 10, 10, 10, 10, 10, 10, 10, 10 }, /* PORTH */
  93. # endif
  94. };
  95. # endif
  96. #elif defined(BF538_FAMILY)
  97. static unsigned short * const port_fer[] = {
  98. (unsigned short *) PORTCIO_FER,
  99. (unsigned short *) PORTDIO_FER,
  100. (unsigned short *) PORTEIO_FER,
  101. };
  102. #endif
  103. #define RESOURCE_LABEL_SIZE 16
  104. static struct str_ident {
  105. char name[RESOURCE_LABEL_SIZE];
  106. } str_ident[MAX_RESOURCES];
  107. #if defined(CONFIG_PM)
  108. static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM];
  109. #endif
  110. static void gpio_error(unsigned gpio)
  111. {
  112. printk(KERN_ERR "bfin-gpio: GPIO %d wasn't requested!\n", gpio);
  113. }
  114. static void set_label(unsigned short ident, const char *label)
  115. {
  116. if (label) {
  117. strncpy(str_ident[ident].name, label,
  118. RESOURCE_LABEL_SIZE);
  119. str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0;
  120. }
  121. }
  122. static char *get_label(unsigned short ident)
  123. {
  124. return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN");
  125. }
  126. static int cmp_label(unsigned short ident, const char *label)
  127. {
  128. if (label == NULL) {
  129. dump_stack();
  130. printk(KERN_ERR "Please provide none-null label\n");
  131. }
  132. if (label)
  133. return strcmp(str_ident[ident].name, label);
  134. else
  135. return -EINVAL;
  136. }
  137. #define map_entry(m, i) reserved_##m##_map[gpio_bank(i)]
  138. #define is_reserved(m, i, e) (map_entry(m, i) & gpio_bit(i))
  139. #define reserve(m, i) (map_entry(m, i) |= gpio_bit(i))
  140. #define unreserve(m, i) (map_entry(m, i) &= ~gpio_bit(i))
  141. #define DECLARE_RESERVED_MAP(m, c) static unsigned short reserved_##m##_map[c]
  142. DECLARE_RESERVED_MAP(gpio, GPIO_BANK_NUM);
  143. DECLARE_RESERVED_MAP(peri, DIV_ROUND_UP(MAX_RESOURCES, GPIO_BANKSIZE));
  144. DECLARE_RESERVED_MAP(gpio_irq, GPIO_BANK_NUM);
  145. inline int check_gpio(unsigned gpio)
  146. {
  147. #if defined(CONFIG_BF54x)
  148. if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
  149. || gpio == GPIO_PH14 || gpio == GPIO_PH15
  150. || gpio == GPIO_PJ14 || gpio == GPIO_PJ15)
  151. return -EINVAL;
  152. #endif
  153. if (gpio >= MAX_BLACKFIN_GPIOS)
  154. return -EINVAL;
  155. return 0;
  156. }
  157. static void port_setup(unsigned gpio, unsigned short usage)
  158. {
  159. #if defined(BF538_FAMILY)
  160. /*
  161. * BF538/9 Port C,D and E are special.
  162. * Inverted PORT_FER polarity on CDE and no PORF_FER on F
  163. * Regular PORT F GPIOs are handled here, CDE are exclusively
  164. * managed by GPIOLIB
  165. */
  166. if (gpio < MAX_BLACKFIN_GPIOS || gpio >= MAX_RESOURCES)
  167. return;
  168. gpio -= MAX_BLACKFIN_GPIOS;
  169. if (usage == GPIO_USAGE)
  170. *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
  171. else
  172. *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  173. SSYNC();
  174. return;
  175. #endif
  176. if (check_gpio(gpio))
  177. return;
  178. #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  179. if (usage == GPIO_USAGE)
  180. *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  181. else
  182. *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
  183. SSYNC();
  184. #elif defined(CONFIG_BF54x)
  185. if (usage == GPIO_USAGE)
  186. gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
  187. else
  188. gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
  189. SSYNC();
  190. #endif
  191. }
  192. #ifdef BF537_FAMILY
  193. static struct {
  194. unsigned short res;
  195. unsigned short offset;
  196. } port_mux_lut[] = {
  197. {.res = P_PPI0_D13, .offset = 11},
  198. {.res = P_PPI0_D14, .offset = 11},
  199. {.res = P_PPI0_D15, .offset = 11},
  200. {.res = P_SPORT1_TFS, .offset = 11},
  201. {.res = P_SPORT1_TSCLK, .offset = 11},
  202. {.res = P_SPORT1_DTPRI, .offset = 11},
  203. {.res = P_PPI0_D10, .offset = 10},
  204. {.res = P_PPI0_D11, .offset = 10},
  205. {.res = P_PPI0_D12, .offset = 10},
  206. {.res = P_SPORT1_RSCLK, .offset = 10},
  207. {.res = P_SPORT1_RFS, .offset = 10},
  208. {.res = P_SPORT1_DRPRI, .offset = 10},
  209. {.res = P_PPI0_D8, .offset = 9},
  210. {.res = P_PPI0_D9, .offset = 9},
  211. {.res = P_SPORT1_DRSEC, .offset = 9},
  212. {.res = P_SPORT1_DTSEC, .offset = 9},
  213. {.res = P_TMR2, .offset = 8},
  214. {.res = P_PPI0_FS3, .offset = 8},
  215. {.res = P_TMR3, .offset = 7},
  216. {.res = P_SPI0_SSEL4, .offset = 7},
  217. {.res = P_TMR4, .offset = 6},
  218. {.res = P_SPI0_SSEL5, .offset = 6},
  219. {.res = P_TMR5, .offset = 5},
  220. {.res = P_SPI0_SSEL6, .offset = 5},
  221. {.res = P_UART1_RX, .offset = 4},
  222. {.res = P_UART1_TX, .offset = 4},
  223. {.res = P_TMR6, .offset = 4},
  224. {.res = P_TMR7, .offset = 4},
  225. {.res = P_UART0_RX, .offset = 3},
  226. {.res = P_UART0_TX, .offset = 3},
  227. {.res = P_DMAR0, .offset = 3},
  228. {.res = P_DMAR1, .offset = 3},
  229. {.res = P_SPORT0_DTSEC, .offset = 1},
  230. {.res = P_SPORT0_DRSEC, .offset = 1},
  231. {.res = P_CAN0_RX, .offset = 1},
  232. {.res = P_CAN0_TX, .offset = 1},
  233. {.res = P_SPI0_SSEL7, .offset = 1},
  234. {.res = P_SPORT0_TFS, .offset = 0},
  235. {.res = P_SPORT0_DTPRI, .offset = 0},
  236. {.res = P_SPI0_SSEL2, .offset = 0},
  237. {.res = P_SPI0_SSEL3, .offset = 0},
  238. };
  239. static void portmux_setup(unsigned short per)
  240. {
  241. u16 y, offset, muxreg;
  242. u16 function = P_FUNCT2MUX(per);
  243. for (y = 0; y < ARRAY_SIZE(port_mux_lut); y++) {
  244. if (port_mux_lut[y].res == per) {
  245. /* SET PORTMUX REG */
  246. offset = port_mux_lut[y].offset;
  247. muxreg = bfin_read_PORT_MUX();
  248. if (offset != 1)
  249. muxreg &= ~(1 << offset);
  250. else
  251. muxreg &= ~(3 << 1);
  252. muxreg |= (function << offset);
  253. bfin_write_PORT_MUX(muxreg);
  254. }
  255. }
  256. }
  257. #elif defined(CONFIG_BF54x)
  258. inline void portmux_setup(unsigned short per)
  259. {
  260. u32 pmux;
  261. u16 ident = P_IDENT(per);
  262. u16 function = P_FUNCT2MUX(per);
  263. pmux = gpio_array[gpio_bank(ident)]->port_mux;
  264. pmux &= ~(0x3 << (2 * gpio_sub_n(ident)));
  265. pmux |= (function & 0x3) << (2 * gpio_sub_n(ident));
  266. gpio_array[gpio_bank(ident)]->port_mux = pmux;
  267. }
  268. inline u16 get_portmux(unsigned short per)
  269. {
  270. u32 pmux;
  271. u16 ident = P_IDENT(per);
  272. pmux = gpio_array[gpio_bank(ident)]->port_mux;
  273. return (pmux >> (2 * gpio_sub_n(ident)) & 0x3);
  274. }
  275. #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
  276. inline void portmux_setup(unsigned short per)
  277. {
  278. u16 pmux, ident = P_IDENT(per), function = P_FUNCT2MUX(per);
  279. u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
  280. pmux = *port_mux[gpio_bank(ident)];
  281. pmux &= ~(3 << offset);
  282. pmux |= (function & 3) << offset;
  283. *port_mux[gpio_bank(ident)] = pmux;
  284. SSYNC();
  285. }
  286. #else
  287. # define portmux_setup(...) do { } while (0)
  288. #endif
  289. #ifndef CONFIG_BF54x
  290. /***********************************************************
  291. *
  292. * FUNCTIONS: Blackfin General Purpose Ports Access Functions
  293. *
  294. * INPUTS/OUTPUTS:
  295. * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
  296. *
  297. *
  298. * DESCRIPTION: These functions abstract direct register access
  299. * to Blackfin processor General Purpose
  300. * Ports Regsiters
  301. *
  302. * CAUTION: These functions do not belong to the GPIO Driver API
  303. *************************************************************
  304. * MODIFICATION HISTORY :
  305. **************************************************************/
  306. /* Set a specific bit */
  307. #define SET_GPIO(name) \
  308. void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
  309. { \
  310. unsigned long flags; \
  311. local_irq_save_hw(flags); \
  312. if (arg) \
  313. gpio_array[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
  314. else \
  315. gpio_array[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
  316. AWA_DUMMY_READ(name); \
  317. local_irq_restore_hw(flags); \
  318. } \
  319. EXPORT_SYMBOL(set_gpio_ ## name);
  320. SET_GPIO(dir) /* set_gpio_dir() */
  321. SET_GPIO(inen) /* set_gpio_inen() */
  322. SET_GPIO(polar) /* set_gpio_polar() */
  323. SET_GPIO(edge) /* set_gpio_edge() */
  324. SET_GPIO(both) /* set_gpio_both() */
  325. #define SET_GPIO_SC(name) \
  326. void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
  327. { \
  328. unsigned long flags; \
  329. if (ANOMALY_05000311 || ANOMALY_05000323) \
  330. local_irq_save_hw(flags); \
  331. if (arg) \
  332. gpio_array[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
  333. else \
  334. gpio_array[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
  335. if (ANOMALY_05000311 || ANOMALY_05000323) { \
  336. AWA_DUMMY_READ(name); \
  337. local_irq_restore_hw(flags); \
  338. } \
  339. } \
  340. EXPORT_SYMBOL(set_gpio_ ## name);
  341. SET_GPIO_SC(maska)
  342. SET_GPIO_SC(maskb)
  343. SET_GPIO_SC(data)
  344. void set_gpio_toggle(unsigned gpio)
  345. {
  346. unsigned long flags;
  347. if (ANOMALY_05000311 || ANOMALY_05000323)
  348. local_irq_save_hw(flags);
  349. gpio_array[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
  350. if (ANOMALY_05000311 || ANOMALY_05000323) {
  351. AWA_DUMMY_READ(toggle);
  352. local_irq_restore_hw(flags);
  353. }
  354. }
  355. EXPORT_SYMBOL(set_gpio_toggle);
  356. /*Set current PORT date (16-bit word)*/
  357. #define SET_GPIO_P(name) \
  358. void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
  359. { \
  360. unsigned long flags; \
  361. if (ANOMALY_05000311 || ANOMALY_05000323) \
  362. local_irq_save_hw(flags); \
  363. gpio_array[gpio_bank(gpio)]->name = arg; \
  364. if (ANOMALY_05000311 || ANOMALY_05000323) { \
  365. AWA_DUMMY_READ(name); \
  366. local_irq_restore_hw(flags); \
  367. } \
  368. } \
  369. EXPORT_SYMBOL(set_gpiop_ ## name);
  370. SET_GPIO_P(data)
  371. SET_GPIO_P(dir)
  372. SET_GPIO_P(inen)
  373. SET_GPIO_P(polar)
  374. SET_GPIO_P(edge)
  375. SET_GPIO_P(both)
  376. SET_GPIO_P(maska)
  377. SET_GPIO_P(maskb)
  378. /* Get a specific bit */
  379. #define GET_GPIO(name) \
  380. unsigned short get_gpio_ ## name(unsigned gpio) \
  381. { \
  382. unsigned long flags; \
  383. unsigned short ret; \
  384. if (ANOMALY_05000311 || ANOMALY_05000323) \
  385. local_irq_save_hw(flags); \
  386. ret = 0x01 & (gpio_array[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
  387. if (ANOMALY_05000311 || ANOMALY_05000323) { \
  388. AWA_DUMMY_READ(name); \
  389. local_irq_restore_hw(flags); \
  390. } \
  391. return ret; \
  392. } \
  393. EXPORT_SYMBOL(get_gpio_ ## name);
  394. GET_GPIO(data)
  395. GET_GPIO(dir)
  396. GET_GPIO(inen)
  397. GET_GPIO(polar)
  398. GET_GPIO(edge)
  399. GET_GPIO(both)
  400. GET_GPIO(maska)
  401. GET_GPIO(maskb)
  402. /*Get current PORT date (16-bit word)*/
  403. #define GET_GPIO_P(name) \
  404. unsigned short get_gpiop_ ## name(unsigned gpio) \
  405. { \
  406. unsigned long flags; \
  407. unsigned short ret; \
  408. if (ANOMALY_05000311 || ANOMALY_05000323) \
  409. local_irq_save_hw(flags); \
  410. ret = (gpio_array[gpio_bank(gpio)]->name); \
  411. if (ANOMALY_05000311 || ANOMALY_05000323) { \
  412. AWA_DUMMY_READ(name); \
  413. local_irq_restore_hw(flags); \
  414. } \
  415. return ret; \
  416. } \
  417. EXPORT_SYMBOL(get_gpiop_ ## name);
  418. GET_GPIO_P(data)
  419. GET_GPIO_P(dir)
  420. GET_GPIO_P(inen)
  421. GET_GPIO_P(polar)
  422. GET_GPIO_P(edge)
  423. GET_GPIO_P(both)
  424. GET_GPIO_P(maska)
  425. GET_GPIO_P(maskb)
  426. #ifdef CONFIG_PM
  427. DECLARE_RESERVED_MAP(wakeup, GPIO_BANK_NUM);
  428. static const unsigned int sic_iwr_irqs[] = {
  429. #if defined(BF533_FAMILY)
  430. IRQ_PROG_INTB
  431. #elif defined(BF537_FAMILY)
  432. IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX
  433. #elif defined(BF538_FAMILY)
  434. IRQ_PORTF_INTB
  435. #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
  436. IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB
  437. #elif defined(BF561_FAMILY)
  438. IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB
  439. #else
  440. # error no SIC_IWR defined
  441. #endif
  442. };
  443. /***********************************************************
  444. *
  445. * FUNCTIONS: Blackfin PM Setup API
  446. *
  447. * INPUTS/OUTPUTS:
  448. * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
  449. * type -
  450. * PM_WAKE_RISING
  451. * PM_WAKE_FALLING
  452. * PM_WAKE_HIGH
  453. * PM_WAKE_LOW
  454. * PM_WAKE_BOTH_EDGES
  455. *
  456. * DESCRIPTION: Blackfin PM Driver API
  457. *
  458. * CAUTION:
  459. *************************************************************
  460. * MODIFICATION HISTORY :
  461. **************************************************************/
  462. int gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl)
  463. {
  464. unsigned long flags;
  465. if (check_gpio(gpio) < 0)
  466. return -EINVAL;
  467. local_irq_save_hw(flags);
  468. if (ctrl)
  469. reserve(wakeup, gpio);
  470. else
  471. unreserve(wakeup, gpio);
  472. set_gpio_maskb(gpio, ctrl);
  473. local_irq_restore_hw(flags);
  474. return 0;
  475. }
  476. int bfin_pm_standby_ctrl(unsigned ctrl)
  477. {
  478. u16 bank, mask, i;
  479. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  480. mask = map_entry(wakeup, i);
  481. bank = gpio_bank(i);
  482. if (mask)
  483. bfin_internal_set_wake(sic_iwr_irqs[bank], ctrl);
  484. }
  485. return 0;
  486. }
  487. void bfin_gpio_pm_hibernate_suspend(void)
  488. {
  489. int i, bank;
  490. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  491. bank = gpio_bank(i);
  492. #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  493. gpio_bank_saved[bank].fer = *port_fer[bank];
  494. #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
  495. gpio_bank_saved[bank].mux = *port_mux[bank];
  496. #else
  497. if (bank == 0)
  498. gpio_bank_saved[bank].mux = bfin_read_PORT_MUX();
  499. #endif
  500. #endif
  501. gpio_bank_saved[bank].data = gpio_array[bank]->data;
  502. gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
  503. gpio_bank_saved[bank].polar = gpio_array[bank]->polar;
  504. gpio_bank_saved[bank].dir = gpio_array[bank]->dir;
  505. gpio_bank_saved[bank].edge = gpio_array[bank]->edge;
  506. gpio_bank_saved[bank].both = gpio_array[bank]->both;
  507. gpio_bank_saved[bank].maska = gpio_array[bank]->maska;
  508. }
  509. AWA_DUMMY_READ(maska);
  510. }
  511. void bfin_gpio_pm_hibernate_restore(void)
  512. {
  513. int i, bank;
  514. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  515. bank = gpio_bank(i);
  516. #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  517. #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
  518. *port_mux[bank] = gpio_bank_saved[bank].mux;
  519. #else
  520. if (bank == 0)
  521. bfin_write_PORT_MUX(gpio_bank_saved[bank].mux);
  522. #endif
  523. *port_fer[bank] = gpio_bank_saved[bank].fer;
  524. #endif
  525. gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
  526. gpio_array[bank]->data_set = gpio_bank_saved[bank].data
  527. & gpio_bank_saved[bank].dir;
  528. gpio_array[bank]->dir = gpio_bank_saved[bank].dir;
  529. gpio_array[bank]->polar = gpio_bank_saved[bank].polar;
  530. gpio_array[bank]->edge = gpio_bank_saved[bank].edge;
  531. gpio_array[bank]->both = gpio_bank_saved[bank].both;
  532. gpio_array[bank]->maska = gpio_bank_saved[bank].maska;
  533. }
  534. AWA_DUMMY_READ(maska);
  535. }
  536. #endif
  537. #else /* CONFIG_BF54x */
  538. #ifdef CONFIG_PM
  539. int bfin_pm_standby_ctrl(unsigned ctrl)
  540. {
  541. return 0;
  542. }
  543. void bfin_gpio_pm_hibernate_suspend(void)
  544. {
  545. int i, bank;
  546. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  547. bank = gpio_bank(i);
  548. gpio_bank_saved[bank].fer = gpio_array[bank]->port_fer;
  549. gpio_bank_saved[bank].mux = gpio_array[bank]->port_mux;
  550. gpio_bank_saved[bank].data = gpio_array[bank]->data;
  551. gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
  552. gpio_bank_saved[bank].dir = gpio_array[bank]->dir_set;
  553. }
  554. }
  555. void bfin_gpio_pm_hibernate_restore(void)
  556. {
  557. int i, bank;
  558. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  559. bank = gpio_bank(i);
  560. gpio_array[bank]->port_mux = gpio_bank_saved[bank].mux;
  561. gpio_array[bank]->port_fer = gpio_bank_saved[bank].fer;
  562. gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
  563. gpio_array[bank]->dir_set = gpio_bank_saved[bank].dir;
  564. gpio_array[bank]->data_set = gpio_bank_saved[bank].data
  565. | gpio_bank_saved[bank].dir;
  566. }
  567. }
  568. #endif
  569. unsigned short get_gpio_dir(unsigned gpio)
  570. {
  571. return (0x01 & (gpio_array[gpio_bank(gpio)]->dir_clear >> gpio_sub_n(gpio)));
  572. }
  573. EXPORT_SYMBOL(get_gpio_dir);
  574. #endif /* CONFIG_BF54x */
  575. /***********************************************************
  576. *
  577. * FUNCTIONS: Blackfin Peripheral Resource Allocation
  578. * and PortMux Setup
  579. *
  580. * INPUTS/OUTPUTS:
  581. * per Peripheral Identifier
  582. * label String
  583. *
  584. * DESCRIPTION: Blackfin Peripheral Resource Allocation and Setup API
  585. *
  586. * CAUTION:
  587. *************************************************************
  588. * MODIFICATION HISTORY :
  589. **************************************************************/
  590. int peripheral_request(unsigned short per, const char *label)
  591. {
  592. unsigned long flags;
  593. unsigned short ident = P_IDENT(per);
  594. /*
  595. * Don't cares are pins with only one dedicated function
  596. */
  597. if (per & P_DONTCARE)
  598. return 0;
  599. if (!(per & P_DEFINED))
  600. return -ENODEV;
  601. BUG_ON(ident >= MAX_RESOURCES);
  602. local_irq_save_hw(flags);
  603. /* If a pin can be muxed as either GPIO or peripheral, make
  604. * sure it is not already a GPIO pin when we request it.
  605. */
  606. if (unlikely(!check_gpio(ident) && is_reserved(gpio, ident, 1))) {
  607. if (system_state == SYSTEM_BOOTING)
  608. dump_stack();
  609. printk(KERN_ERR
  610. "%s: Peripheral %d is already reserved as GPIO by %s !\n",
  611. __func__, ident, get_label(ident));
  612. local_irq_restore_hw(flags);
  613. return -EBUSY;
  614. }
  615. if (unlikely(is_reserved(peri, ident, 1))) {
  616. /*
  617. * Pin functions like AMC address strobes my
  618. * be requested and used by several drivers
  619. */
  620. #ifdef CONFIG_BF54x
  621. if (!((per & P_MAYSHARE) && get_portmux(per) == P_FUNCT2MUX(per))) {
  622. #else
  623. if (!(per & P_MAYSHARE)) {
  624. #endif
  625. /*
  626. * Allow that the identical pin function can
  627. * be requested from the same driver twice
  628. */
  629. if (cmp_label(ident, label) == 0)
  630. goto anyway;
  631. if (system_state == SYSTEM_BOOTING)
  632. dump_stack();
  633. printk(KERN_ERR
  634. "%s: Peripheral %d function %d is already reserved by %s !\n",
  635. __func__, ident, P_FUNCT2MUX(per), get_label(ident));
  636. local_irq_restore_hw(flags);
  637. return -EBUSY;
  638. }
  639. }
  640. anyway:
  641. reserve(peri, ident);
  642. portmux_setup(per);
  643. port_setup(ident, PERIPHERAL_USAGE);
  644. local_irq_restore_hw(flags);
  645. set_label(ident, label);
  646. return 0;
  647. }
  648. EXPORT_SYMBOL(peripheral_request);
  649. int peripheral_request_list(const unsigned short per[], const char *label)
  650. {
  651. u16 cnt;
  652. int ret;
  653. for (cnt = 0; per[cnt] != 0; cnt++) {
  654. ret = peripheral_request(per[cnt], label);
  655. if (ret < 0) {
  656. for ( ; cnt > 0; cnt--)
  657. peripheral_free(per[cnt - 1]);
  658. return ret;
  659. }
  660. }
  661. return 0;
  662. }
  663. EXPORT_SYMBOL(peripheral_request_list);
  664. void peripheral_free(unsigned short per)
  665. {
  666. unsigned long flags;
  667. unsigned short ident = P_IDENT(per);
  668. if (per & P_DONTCARE)
  669. return;
  670. if (!(per & P_DEFINED))
  671. return;
  672. local_irq_save_hw(flags);
  673. if (unlikely(!is_reserved(peri, ident, 0))) {
  674. local_irq_restore_hw(flags);
  675. return;
  676. }
  677. if (!(per & P_MAYSHARE))
  678. port_setup(ident, GPIO_USAGE);
  679. unreserve(peri, ident);
  680. set_label(ident, "free");
  681. local_irq_restore_hw(flags);
  682. }
  683. EXPORT_SYMBOL(peripheral_free);
  684. void peripheral_free_list(const unsigned short per[])
  685. {
  686. u16 cnt;
  687. for (cnt = 0; per[cnt] != 0; cnt++)
  688. peripheral_free(per[cnt]);
  689. }
  690. EXPORT_SYMBOL(peripheral_free_list);
  691. /***********************************************************
  692. *
  693. * FUNCTIONS: Blackfin GPIO Driver
  694. *
  695. * INPUTS/OUTPUTS:
  696. * gpio PIO Number between 0 and MAX_BLACKFIN_GPIOS
  697. * label String
  698. *
  699. * DESCRIPTION: Blackfin GPIO Driver API
  700. *
  701. * CAUTION:
  702. *************************************************************
  703. * MODIFICATION HISTORY :
  704. **************************************************************/
  705. int bfin_gpio_request(unsigned gpio, const char *label)
  706. {
  707. unsigned long flags;
  708. if (check_gpio(gpio) < 0)
  709. return -EINVAL;
  710. local_irq_save_hw(flags);
  711. /*
  712. * Allow that the identical GPIO can
  713. * be requested from the same driver twice
  714. * Do nothing and return -
  715. */
  716. if (cmp_label(gpio, label) == 0) {
  717. local_irq_restore_hw(flags);
  718. return 0;
  719. }
  720. if (unlikely(is_reserved(gpio, gpio, 1))) {
  721. if (system_state == SYSTEM_BOOTING)
  722. dump_stack();
  723. printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
  724. gpio, get_label(gpio));
  725. local_irq_restore_hw(flags);
  726. return -EBUSY;
  727. }
  728. if (unlikely(is_reserved(peri, gpio, 1))) {
  729. if (system_state == SYSTEM_BOOTING)
  730. dump_stack();
  731. printk(KERN_ERR
  732. "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
  733. gpio, get_label(gpio));
  734. local_irq_restore_hw(flags);
  735. return -EBUSY;
  736. }
  737. if (unlikely(is_reserved(gpio_irq, gpio, 1))) {
  738. printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved as gpio-irq!"
  739. " (Documentation/blackfin/bfin-gpio-notes.txt)\n", gpio);
  740. }
  741. #ifndef CONFIG_BF54x
  742. else { /* Reset POLAR setting when acquiring a gpio for the first time */
  743. set_gpio_polar(gpio, 0);
  744. }
  745. #endif
  746. reserve(gpio, gpio);
  747. set_label(gpio, label);
  748. local_irq_restore_hw(flags);
  749. port_setup(gpio, GPIO_USAGE);
  750. return 0;
  751. }
  752. EXPORT_SYMBOL(bfin_gpio_request);
  753. void bfin_gpio_free(unsigned gpio)
  754. {
  755. unsigned long flags;
  756. if (check_gpio(gpio) < 0)
  757. return;
  758. might_sleep();
  759. local_irq_save_hw(flags);
  760. if (unlikely(!is_reserved(gpio, gpio, 0))) {
  761. if (system_state == SYSTEM_BOOTING)
  762. dump_stack();
  763. gpio_error(gpio);
  764. local_irq_restore_hw(flags);
  765. return;
  766. }
  767. unreserve(gpio, gpio);
  768. set_label(gpio, "free");
  769. local_irq_restore_hw(flags);
  770. }
  771. EXPORT_SYMBOL(bfin_gpio_free);
  772. #ifdef BFIN_SPECIAL_GPIO_BANKS
  773. DECLARE_RESERVED_MAP(special_gpio, gpio_bank(MAX_RESOURCES));
  774. int bfin_special_gpio_request(unsigned gpio, const char *label)
  775. {
  776. unsigned long flags;
  777. local_irq_save_hw(flags);
  778. /*
  779. * Allow that the identical GPIO can
  780. * be requested from the same driver twice
  781. * Do nothing and return -
  782. */
  783. if (cmp_label(gpio, label) == 0) {
  784. local_irq_restore_hw(flags);
  785. return 0;
  786. }
  787. if (unlikely(is_reserved(special_gpio, gpio, 1))) {
  788. local_irq_restore_hw(flags);
  789. printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
  790. gpio, get_label(gpio));
  791. return -EBUSY;
  792. }
  793. if (unlikely(is_reserved(peri, gpio, 1))) {
  794. local_irq_restore_hw(flags);
  795. printk(KERN_ERR
  796. "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
  797. gpio, get_label(gpio));
  798. return -EBUSY;
  799. }
  800. reserve(special_gpio, gpio);
  801. reserve(peri, gpio);
  802. set_label(gpio, label);
  803. local_irq_restore_hw(flags);
  804. port_setup(gpio, GPIO_USAGE);
  805. return 0;
  806. }
  807. EXPORT_SYMBOL(bfin_special_gpio_request);
  808. void bfin_special_gpio_free(unsigned gpio)
  809. {
  810. unsigned long flags;
  811. might_sleep();
  812. local_irq_save_hw(flags);
  813. if (unlikely(!is_reserved(special_gpio, gpio, 0))) {
  814. gpio_error(gpio);
  815. local_irq_restore_hw(flags);
  816. return;
  817. }
  818. unreserve(special_gpio, gpio);
  819. unreserve(peri, gpio);
  820. set_label(gpio, "free");
  821. local_irq_restore_hw(flags);
  822. }
  823. EXPORT_SYMBOL(bfin_special_gpio_free);
  824. #endif
  825. int bfin_gpio_irq_request(unsigned gpio, const char *label)
  826. {
  827. unsigned long flags;
  828. if (check_gpio(gpio) < 0)
  829. return -EINVAL;
  830. local_irq_save_hw(flags);
  831. if (unlikely(is_reserved(peri, gpio, 1))) {
  832. if (system_state == SYSTEM_BOOTING)
  833. dump_stack();
  834. printk(KERN_ERR
  835. "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
  836. gpio, get_label(gpio));
  837. local_irq_restore_hw(flags);
  838. return -EBUSY;
  839. }
  840. if (unlikely(is_reserved(gpio, gpio, 1)))
  841. printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved by %s! "
  842. "(Documentation/blackfin/bfin-gpio-notes.txt)\n",
  843. gpio, get_label(gpio));
  844. reserve(gpio_irq, gpio);
  845. set_label(gpio, label);
  846. local_irq_restore_hw(flags);
  847. port_setup(gpio, GPIO_USAGE);
  848. return 0;
  849. }
  850. void bfin_gpio_irq_free(unsigned gpio)
  851. {
  852. unsigned long flags;
  853. if (check_gpio(gpio) < 0)
  854. return;
  855. local_irq_save_hw(flags);
  856. if (unlikely(!is_reserved(gpio_irq, gpio, 0))) {
  857. if (system_state == SYSTEM_BOOTING)
  858. dump_stack();
  859. gpio_error(gpio);
  860. local_irq_restore_hw(flags);
  861. return;
  862. }
  863. unreserve(gpio_irq, gpio);
  864. set_label(gpio, "free");
  865. local_irq_restore_hw(flags);
  866. }
  867. static inline void __bfin_gpio_direction_input(unsigned gpio)
  868. {
  869. #ifdef CONFIG_BF54x
  870. gpio_array[gpio_bank(gpio)]->dir_clear = gpio_bit(gpio);
  871. #else
  872. gpio_array[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
  873. #endif
  874. gpio_array[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
  875. }
  876. int bfin_gpio_direction_input(unsigned gpio)
  877. {
  878. unsigned long flags;
  879. if (unlikely(!is_reserved(gpio, gpio, 0))) {
  880. gpio_error(gpio);
  881. return -EINVAL;
  882. }
  883. local_irq_save_hw(flags);
  884. __bfin_gpio_direction_input(gpio);
  885. AWA_DUMMY_READ(inen);
  886. local_irq_restore_hw(flags);
  887. return 0;
  888. }
  889. EXPORT_SYMBOL(bfin_gpio_direction_input);
  890. void bfin_gpio_irq_prepare(unsigned gpio)
  891. {
  892. #ifdef CONFIG_BF54x
  893. unsigned long flags;
  894. #endif
  895. port_setup(gpio, GPIO_USAGE);
  896. #ifdef CONFIG_BF54x
  897. local_irq_save_hw(flags);
  898. __bfin_gpio_direction_input(gpio);
  899. local_irq_restore_hw(flags);
  900. #endif
  901. }
  902. void bfin_gpio_set_value(unsigned gpio, int arg)
  903. {
  904. if (arg)
  905. gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
  906. else
  907. gpio_array[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
  908. }
  909. EXPORT_SYMBOL(bfin_gpio_set_value);
  910. int bfin_gpio_direction_output(unsigned gpio, int value)
  911. {
  912. unsigned long flags;
  913. if (unlikely(!is_reserved(gpio, gpio, 0))) {
  914. gpio_error(gpio);
  915. return -EINVAL;
  916. }
  917. local_irq_save_hw(flags);
  918. gpio_array[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
  919. gpio_set_value(gpio, value);
  920. #ifdef CONFIG_BF54x
  921. gpio_array[gpio_bank(gpio)]->dir_set = gpio_bit(gpio);
  922. #else
  923. gpio_array[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
  924. #endif
  925. AWA_DUMMY_READ(dir);
  926. local_irq_restore_hw(flags);
  927. return 0;
  928. }
  929. EXPORT_SYMBOL(bfin_gpio_direction_output);
  930. int bfin_gpio_get_value(unsigned gpio)
  931. {
  932. #ifdef CONFIG_BF54x
  933. return (1 & (gpio_array[gpio_bank(gpio)]->data >> gpio_sub_n(gpio)));
  934. #else
  935. unsigned long flags;
  936. if (unlikely(get_gpio_edge(gpio))) {
  937. int ret;
  938. local_irq_save_hw(flags);
  939. set_gpio_edge(gpio, 0);
  940. ret = get_gpio_data(gpio);
  941. set_gpio_edge(gpio, 1);
  942. local_irq_restore_hw(flags);
  943. return ret;
  944. } else
  945. return get_gpio_data(gpio);
  946. #endif
  947. }
  948. EXPORT_SYMBOL(bfin_gpio_get_value);
  949. /* If we are booting from SPI and our board lacks a strong enough pull up,
  950. * the core can reset and execute the bootrom faster than the resistor can
  951. * pull the signal logically high. To work around this (common) error in
  952. * board design, we explicitly set the pin back to GPIO mode, force /CS
  953. * high, and wait for the electrons to do their thing.
  954. *
  955. * This function only makes sense to be called from reset code, but it
  956. * lives here as we need to force all the GPIO states w/out going through
  957. * BUG() checks and such.
  958. */
  959. void bfin_reset_boot_spi_cs(unsigned short pin)
  960. {
  961. unsigned short gpio = P_IDENT(pin);
  962. port_setup(gpio, GPIO_USAGE);
  963. gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
  964. AWA_DUMMY_READ(data_set);
  965. udelay(1);
  966. }
  967. #if defined(CONFIG_PROC_FS)
  968. static int gpio_proc_read(char *buf, char **start, off_t offset,
  969. int len, int *unused_i, void *unused_v)
  970. {
  971. int c, irq, gpio, outlen = 0;
  972. for (c = 0; c < MAX_RESOURCES; c++) {
  973. irq = is_reserved(gpio_irq, c, 1);
  974. gpio = is_reserved(gpio, c, 1);
  975. if (!check_gpio(c) && (gpio || irq))
  976. len = sprintf(buf, "GPIO_%d: \t%s%s \t\tGPIO %s\n", c,
  977. get_label(c), (gpio && irq) ? " *" : "",
  978. get_gpio_dir(c) ? "OUTPUT" : "INPUT");
  979. else if (is_reserved(peri, c, 1))
  980. len = sprintf(buf, "GPIO_%d: \t%s \t\tPeripheral\n", c, get_label(c));
  981. else
  982. continue;
  983. buf += len;
  984. outlen += len;
  985. }
  986. return outlen;
  987. }
  988. static __init int gpio_register_proc(void)
  989. {
  990. struct proc_dir_entry *proc_gpio;
  991. proc_gpio = create_proc_entry("gpio", S_IRUGO, NULL);
  992. if (proc_gpio)
  993. proc_gpio->read_proc = gpio_proc_read;
  994. return proc_gpio != NULL;
  995. }
  996. __initcall(gpio_register_proc);
  997. #endif
  998. #ifdef CONFIG_GPIOLIB
  999. static int bfin_gpiolib_direction_input(struct gpio_chip *chip, unsigned gpio)
  1000. {
  1001. return bfin_gpio_direction_input(gpio);
  1002. }
  1003. static int bfin_gpiolib_direction_output(struct gpio_chip *chip, unsigned gpio, int level)
  1004. {
  1005. return bfin_gpio_direction_output(gpio, level);
  1006. }
  1007. static int bfin_gpiolib_get_value(struct gpio_chip *chip, unsigned gpio)
  1008. {
  1009. return bfin_gpio_get_value(gpio);
  1010. }
  1011. static void bfin_gpiolib_set_value(struct gpio_chip *chip, unsigned gpio, int value)
  1012. {
  1013. return bfin_gpio_set_value(gpio, value);
  1014. }
  1015. static int bfin_gpiolib_gpio_request(struct gpio_chip *chip, unsigned gpio)
  1016. {
  1017. return bfin_gpio_request(gpio, chip->label);
  1018. }
  1019. static void bfin_gpiolib_gpio_free(struct gpio_chip *chip, unsigned gpio)
  1020. {
  1021. return bfin_gpio_free(gpio);
  1022. }
  1023. static int bfin_gpiolib_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
  1024. {
  1025. return gpio + GPIO_IRQ_BASE;
  1026. }
  1027. static struct gpio_chip bfin_chip = {
  1028. .label = "BFIN-GPIO",
  1029. .direction_input = bfin_gpiolib_direction_input,
  1030. .get = bfin_gpiolib_get_value,
  1031. .direction_output = bfin_gpiolib_direction_output,
  1032. .set = bfin_gpiolib_set_value,
  1033. .request = bfin_gpiolib_gpio_request,
  1034. .free = bfin_gpiolib_gpio_free,
  1035. .to_irq = bfin_gpiolib_gpio_to_irq,
  1036. .base = 0,
  1037. .ngpio = MAX_BLACKFIN_GPIOS,
  1038. };
  1039. static int __init bfin_gpiolib_setup(void)
  1040. {
  1041. return gpiochip_add(&bfin_chip);
  1042. }
  1043. arch_initcall(bfin_gpiolib_setup);
  1044. #endif