omap-pm.h 14 KB

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  1. /*
  2. * omap-pm.h - OMAP power management interface
  3. *
  4. * Copyright (C) 2008-2010 Texas Instruments, Inc.
  5. * Copyright (C) 2008-2010 Nokia Corporation
  6. * Paul Walmsley
  7. *
  8. * Interface developed by (in alphabetical order): Karthik Dasu, Jouni
  9. * Högander, Tony Lindgren, Rajendra Nayak, Sakari Poussa,
  10. * Veeramanikandan Raju, Anand Sawant, Igor Stoppa, Paul Walmsley,
  11. * Richard Woodruff
  12. */
  13. #ifndef ASM_ARM_ARCH_OMAP_OMAP_PM_H
  14. #define ASM_ARM_ARCH_OMAP_OMAP_PM_H
  15. #include <linux/device.h>
  16. #include <linux/cpufreq.h>
  17. #include <linux/clk.h>
  18. #include "powerdomain.h"
  19. /**
  20. * struct omap_opp - clock frequency-to-OPP ID table for DSP, MPU
  21. * @rate: target clock rate
  22. * @opp_id: OPP ID
  23. * @min_vdd: minimum VDD1 voltage (in millivolts) for this OPP
  24. *
  25. * Operating performance point data. Can vary by OMAP chip and board.
  26. */
  27. struct omap_opp {
  28. unsigned long rate;
  29. u8 opp_id;
  30. u16 min_vdd;
  31. };
  32. extern struct omap_opp *mpu_opps;
  33. extern struct omap_opp *dsp_opps;
  34. extern struct omap_opp *l3_opps;
  35. /*
  36. * agent_id values for use with omap_pm_set_min_bus_tput():
  37. *
  38. * OCP_INITIATOR_AGENT is only valid for devices that can act as
  39. * initiators -- it represents the device's L3 interconnect
  40. * connection. OCP_TARGET_AGENT represents the device's L4
  41. * interconnect connection.
  42. */
  43. #define OCP_TARGET_AGENT 1
  44. #define OCP_INITIATOR_AGENT 2
  45. /**
  46. * omap_pm_if_early_init - OMAP PM init code called before clock fw init
  47. * @mpu_opp_table: array ptr to struct omap_opp for MPU
  48. * @dsp_opp_table: array ptr to struct omap_opp for DSP
  49. * @l3_opp_table : array ptr to struct omap_opp for CORE
  50. *
  51. * Initialize anything that must be configured before the clock
  52. * framework starts. The "_if_" is to avoid name collisions with the
  53. * PM idle-loop code.
  54. */
  55. int __init omap_pm_if_early_init(struct omap_opp *mpu_opp_table,
  56. struct omap_opp *dsp_opp_table,
  57. struct omap_opp *l3_opp_table);
  58. /**
  59. * omap_pm_if_init - OMAP PM init code called after clock fw init
  60. *
  61. * The main initialization code. OPP tables are passed in here. The
  62. * "_if_" is to avoid name collisions with the PM idle-loop code.
  63. */
  64. int __init omap_pm_if_init(void);
  65. /**
  66. * omap_pm_if_exit - OMAP PM exit code
  67. *
  68. * Exit code; currently unused. The "_if_" is to avoid name
  69. * collisions with the PM idle-loop code.
  70. */
  71. void omap_pm_if_exit(void);
  72. /*
  73. * Device-driver-originated constraints (via board-*.c files, platform_data)
  74. */
  75. /**
  76. * omap_pm_set_max_mpu_wakeup_lat - set the maximum MPU wakeup latency
  77. * @dev: struct device * requesting the constraint
  78. * @t: maximum MPU wakeup latency in microseconds
  79. *
  80. * Request that the maximum interrupt latency for the MPU to be no
  81. * greater than @t microseconds. "Interrupt latency" in this case is
  82. * defined as the elapsed time from the occurrence of a hardware or
  83. * timer interrupt to the time when the device driver's interrupt
  84. * service routine has been entered by the MPU.
  85. *
  86. * It is intended that underlying PM code will use this information to
  87. * determine what power state to put the MPU powerdomain into, and
  88. * possibly the CORE powerdomain as well, since interrupt handling
  89. * code currently runs from SDRAM. Advanced PM or board*.c code may
  90. * also configure interrupt controller priorities, OCP bus priorities,
  91. * CPU speed(s), etc.
  92. *
  93. * This function will not affect device wakeup latency, e.g., time
  94. * elapsed from when a device driver enables a hardware device with
  95. * clk_enable(), to when the device is ready for register access or
  96. * other use. To control this device wakeup latency, use
  97. * omap_pm_set_max_dev_wakeup_lat()
  98. *
  99. * Multiple calls to omap_pm_set_max_mpu_wakeup_lat() will replace the
  100. * previous t value. To remove the latency target for the MPU, call
  101. * with t = -1.
  102. *
  103. * XXX This constraint will be deprecated soon in favor of the more
  104. * general omap_pm_set_max_dev_wakeup_lat()
  105. *
  106. * Returns -EINVAL for an invalid argument, -ERANGE if the constraint
  107. * is not satisfiable, or 0 upon success.
  108. */
  109. int omap_pm_set_max_mpu_wakeup_lat(struct device *dev, long t);
  110. /**
  111. * omap_pm_set_min_bus_tput - set minimum bus throughput needed by device
  112. * @dev: struct device * requesting the constraint
  113. * @tbus_id: interconnect to operate on (OCP_{INITIATOR,TARGET}_AGENT)
  114. * @r: minimum throughput (in KiB/s)
  115. *
  116. * Request that the minimum data throughput on the OCP interconnect
  117. * attached to device @dev interconnect agent @tbus_id be no less
  118. * than @r KiB/s.
  119. *
  120. * It is expected that the OMAP PM or bus code will use this
  121. * information to set the interconnect clock to run at the lowest
  122. * possible speed that satisfies all current system users. The PM or
  123. * bus code will adjust the estimate based on its model of the bus, so
  124. * device driver authors should attempt to specify an accurate
  125. * quantity for their device use case, and let the PM or bus code
  126. * overestimate the numbers as necessary to handle request/response
  127. * latency, other competing users on the system, etc. On OMAP2/3, if
  128. * a driver requests a minimum L4 interconnect speed constraint, the
  129. * code will also need to add an minimum L3 interconnect speed
  130. * constraint,
  131. *
  132. * Multiple calls to omap_pm_set_min_bus_tput() will replace the
  133. * previous rate value for this device. To remove the interconnect
  134. * throughput restriction for this device, call with r = 0.
  135. *
  136. * Returns -EINVAL for an invalid argument, -ERANGE if the constraint
  137. * is not satisfiable, or 0 upon success.
  138. */
  139. int omap_pm_set_min_bus_tput(struct device *dev, u8 agent_id, unsigned long r);
  140. /**
  141. * omap_pm_set_max_dev_wakeup_lat - set the maximum device enable latency
  142. * @req_dev: struct device * requesting the constraint, or NULL if none
  143. * @dev: struct device * to set the constraint one
  144. * @t: maximum device wakeup latency in microseconds
  145. *
  146. * Request that the maximum amount of time necessary for a device @dev
  147. * to become accessible after its clocks are enabled should be no
  148. * greater than @t microseconds. Specifically, this represents the
  149. * time from when a device driver enables device clocks with
  150. * clk_enable(), to when the register reads and writes on the device
  151. * will succeed. This function should be called before clk_disable()
  152. * is called, since the power state transition decision may be made
  153. * during clk_disable().
  154. *
  155. * It is intended that underlying PM code will use this information to
  156. * determine what power state to put the powerdomain enclosing this
  157. * device into.
  158. *
  159. * Multiple calls to omap_pm_set_max_dev_wakeup_lat() will replace the
  160. * previous wakeup latency values for this device. To remove the
  161. * wakeup latency restriction for this device, call with t = -1.
  162. *
  163. * Returns -EINVAL for an invalid argument, -ERANGE if the constraint
  164. * is not satisfiable, or 0 upon success.
  165. */
  166. int omap_pm_set_max_dev_wakeup_lat(struct device *req_dev, struct device *dev,
  167. long t);
  168. /**
  169. * omap_pm_set_max_sdma_lat - set the maximum system DMA transfer start latency
  170. * @dev: struct device *
  171. * @t: maximum DMA transfer start latency in microseconds
  172. *
  173. * Request that the maximum system DMA transfer start latency for this
  174. * device 'dev' should be no greater than 't' microseconds. "DMA
  175. * transfer start latency" here is defined as the elapsed time from
  176. * when a device (e.g., McBSP) requests that a system DMA transfer
  177. * start or continue, to the time at which data starts to flow into
  178. * that device from the system DMA controller.
  179. *
  180. * It is intended that underlying PM code will use this information to
  181. * determine what power state to put the CORE powerdomain into.
  182. *
  183. * Since system DMA transfers may not involve the MPU, this function
  184. * will not affect MPU wakeup latency. Use set_max_cpu_lat() to do
  185. * so. Similarly, this function will not affect device wakeup latency
  186. * -- use set_max_dev_wakeup_lat() to affect that.
  187. *
  188. * Multiple calls to set_max_sdma_lat() will replace the previous t
  189. * value for this device. To remove the maximum DMA latency for this
  190. * device, call with t = -1.
  191. *
  192. * Returns -EINVAL for an invalid argument, -ERANGE if the constraint
  193. * is not satisfiable, or 0 upon success.
  194. */
  195. int omap_pm_set_max_sdma_lat(struct device *dev, long t);
  196. /**
  197. * omap_pm_set_min_clk_rate - set minimum clock rate requested by @dev
  198. * @dev: struct device * requesting the constraint
  199. * @clk: struct clk * to set the minimum rate constraint on
  200. * @r: minimum rate in Hz
  201. *
  202. * Request that the minimum clock rate on the device @dev's clk @clk
  203. * be no less than @r Hz.
  204. *
  205. * It is expected that the OMAP PM code will use this information to
  206. * find an OPP or clock setting that will satisfy this clock rate
  207. * constraint, along with any other applicable system constraints on
  208. * the clock rate or corresponding voltage, etc.
  209. *
  210. * omap_pm_set_min_clk_rate() differs from the clock code's
  211. * clk_set_rate() in that it considers other constraints before taking
  212. * any hardware action, and may change a system OPP rather than just a
  213. * clock rate. clk_set_rate() is intended to be a low-level
  214. * interface.
  215. *
  216. * omap_pm_set_min_clk_rate() is easily open to abuse. A better API
  217. * would be something like "omap_pm_set_min_dev_performance()";
  218. * however, there is no easily-generalizable concept of performance
  219. * that applies to all devices. Only a device (and possibly the
  220. * device subsystem) has both the subsystem-specific knowledge, and
  221. * the hardware IP block-specific knowledge, to translate a constraint
  222. * on "touchscreen sampling accuracy" or "number of pixels or polygons
  223. * rendered per second" to a clock rate. This translation can be
  224. * dependent on the hardware IP block's revision, or firmware version,
  225. * and the driver is the only code on the system that has this
  226. * information and can know how to translate that into a clock rate.
  227. *
  228. * The intended use-case for this function is for userspace or other
  229. * kernel code to communicate a particular performance requirement to
  230. * a subsystem; then for the subsystem to communicate that requirement
  231. * to something that is meaningful to the device driver; then for the
  232. * device driver to convert that requirement to a clock rate, and to
  233. * then call omap_pm_set_min_clk_rate().
  234. *
  235. * Users of this function (such as device drivers) should not simply
  236. * call this function with some high clock rate to ensure "high
  237. * performance." Rather, the device driver should take a performance
  238. * constraint from its subsystem, such as "render at least X polygons
  239. * per second," and use some formula or table to convert that into a
  240. * clock rate constraint given the hardware type and hardware
  241. * revision. Device drivers or subsystems should not assume that they
  242. * know how to make a power/performance tradeoff - some device use
  243. * cases may tolerate a lower-fidelity device function for lower power
  244. * consumption; others may demand a higher-fidelity device function,
  245. * no matter what the power consumption.
  246. *
  247. * Multiple calls to omap_pm_set_min_clk_rate() will replace the
  248. * previous rate value for the device @dev. To remove the minimum clock
  249. * rate constraint for the device, call with r = 0.
  250. *
  251. * Returns -EINVAL for an invalid argument, -ERANGE if the constraint
  252. * is not satisfiable, or 0 upon success.
  253. */
  254. int omap_pm_set_min_clk_rate(struct device *dev, struct clk *c, long r);
  255. /*
  256. * DSP Bridge-specific constraints
  257. */
  258. /**
  259. * omap_pm_dsp_get_opp_table - get OPP->DSP clock frequency table
  260. *
  261. * Intended for use by DSPBridge. Returns an array of OPP->DSP clock
  262. * frequency entries. The final item in the array should have .rate =
  263. * .opp_id = 0.
  264. */
  265. const struct omap_opp *omap_pm_dsp_get_opp_table(void);
  266. /**
  267. * omap_pm_dsp_set_min_opp - receive desired OPP target ID from DSP Bridge
  268. * @opp_id: target DSP OPP ID
  269. *
  270. * Set a minimum OPP ID for the DSP. This is intended to be called
  271. * only from the DSP Bridge MPU-side driver. Unfortunately, the only
  272. * information that code receives from the DSP/BIOS load estimator is the
  273. * target OPP ID; hence, this interface. No return value.
  274. */
  275. void omap_pm_dsp_set_min_opp(u8 opp_id);
  276. /**
  277. * omap_pm_dsp_get_opp - report the current DSP OPP ID
  278. *
  279. * Report the current OPP for the DSP. Since on OMAP3, the DSP and
  280. * MPU share a single voltage domain, the OPP ID returned back may
  281. * represent a higher DSP speed than the OPP requested via
  282. * omap_pm_dsp_set_min_opp().
  283. *
  284. * Returns the current VDD1 OPP ID, or 0 upon error.
  285. */
  286. u8 omap_pm_dsp_get_opp(void);
  287. /*
  288. * CPUFreq-originated constraint
  289. *
  290. * In the future, this should be handled by custom OPP clocktype
  291. * functions.
  292. */
  293. /**
  294. * omap_pm_cpu_get_freq_table - return a cpufreq_frequency_table array ptr
  295. *
  296. * Provide a frequency table usable by CPUFreq for the current chip/board.
  297. * Returns a pointer to a struct cpufreq_frequency_table array or NULL
  298. * upon error.
  299. */
  300. struct cpufreq_frequency_table **omap_pm_cpu_get_freq_table(void);
  301. /**
  302. * omap_pm_cpu_set_freq - set the current minimum MPU frequency
  303. * @f: MPU frequency in Hz
  304. *
  305. * Set the current minimum CPU frequency. The actual CPU frequency
  306. * used could end up higher if the DSP requested a higher OPP.
  307. * Intended to be called by plat-omap/cpu_omap.c:omap_target(). No
  308. * return value.
  309. */
  310. void omap_pm_cpu_set_freq(unsigned long f);
  311. /**
  312. * omap_pm_cpu_get_freq - report the current CPU frequency
  313. *
  314. * Returns the current MPU frequency, or 0 upon error.
  315. */
  316. unsigned long omap_pm_cpu_get_freq(void);
  317. /*
  318. * Device context loss tracking
  319. */
  320. /**
  321. * omap_pm_get_dev_context_loss_count - return count of times dev has lost ctx
  322. * @dev: struct device *
  323. *
  324. * This function returns the number of times that the device @dev has
  325. * lost its internal context. This generally occurs on a powerdomain
  326. * transition to OFF. Drivers use this as an optimization to avoid restoring
  327. * context if the device hasn't lost it. To use, drivers should initially
  328. * call this in their context save functions and store the result. Early in
  329. * the driver's context restore function, the driver should call this function
  330. * again, and compare the result to the stored counter. If they differ, the
  331. * driver must restore device context. If the number of context losses
  332. * exceeds the maximum positive integer, the function will wrap to 0 and
  333. * continue counting. Returns the number of context losses for this device,
  334. * or -EINVAL upon error.
  335. */
  336. int omap_pm_get_dev_context_loss_count(struct device *dev);
  337. #endif