commsup.c 36 KB

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  1. /*
  2. * Adaptec AAC series RAID controller driver
  3. * (c) Copyright 2001 Red Hat Inc. <alan@redhat.com>
  4. *
  5. * based on the old aacraid driver that is..
  6. * Adaptec aacraid device driver for Linux.
  7. *
  8. * Copyright (c) 2000 Adaptec, Inc. (aacraid@adaptec.com)
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2, or (at your option)
  13. * any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; see the file COPYING. If not, write to
  22. * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  23. *
  24. * Module Name:
  25. * commsup.c
  26. *
  27. * Abstract: Contain all routines that are required for FSA host/adapter
  28. * communication.
  29. *
  30. */
  31. #include <linux/kernel.h>
  32. #include <linux/init.h>
  33. #include <linux/types.h>
  34. #include <linux/sched.h>
  35. #include <linux/pci.h>
  36. #include <linux/spinlock.h>
  37. #include <linux/slab.h>
  38. #include <linux/completion.h>
  39. #include <linux/blkdev.h>
  40. #include <scsi/scsi_host.h>
  41. #include <scsi/scsi_device.h>
  42. #include <asm/semaphore.h>
  43. #include "aacraid.h"
  44. /**
  45. * fib_map_alloc - allocate the fib objects
  46. * @dev: Adapter to allocate for
  47. *
  48. * Allocate and map the shared PCI space for the FIB blocks used to
  49. * talk to the Adaptec firmware.
  50. */
  51. static int fib_map_alloc(struct aac_dev *dev)
  52. {
  53. dprintk((KERN_INFO
  54. "allocate hardware fibs pci_alloc_consistent(%p, %d * (%d + %d), %p)\n",
  55. dev->pdev, dev->max_fib_size, dev->scsi_host_ptr->can_queue,
  56. AAC_NUM_MGT_FIB, &dev->hw_fib_pa));
  57. if((dev->hw_fib_va = pci_alloc_consistent(dev->pdev, dev->max_fib_size
  58. * (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB),
  59. &dev->hw_fib_pa))==NULL)
  60. return -ENOMEM;
  61. return 0;
  62. }
  63. /**
  64. * fib_map_free - free the fib objects
  65. * @dev: Adapter to free
  66. *
  67. * Free the PCI mappings and the memory allocated for FIB blocks
  68. * on this adapter.
  69. */
  70. void fib_map_free(struct aac_dev *dev)
  71. {
  72. pci_free_consistent(dev->pdev, dev->max_fib_size * (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB), dev->hw_fib_va, dev->hw_fib_pa);
  73. }
  74. /**
  75. * fib_setup - setup the fibs
  76. * @dev: Adapter to set up
  77. *
  78. * Allocate the PCI space for the fibs, map it and then intialise the
  79. * fib area, the unmapped fib data and also the free list
  80. */
  81. int fib_setup(struct aac_dev * dev)
  82. {
  83. struct fib *fibptr;
  84. struct hw_fib *hw_fib_va;
  85. dma_addr_t hw_fib_pa;
  86. int i;
  87. while (((i = fib_map_alloc(dev)) == -ENOMEM)
  88. && (dev->scsi_host_ptr->can_queue > (64 - AAC_NUM_MGT_FIB))) {
  89. dev->init->MaxIoCommands = cpu_to_le32((dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB) >> 1);
  90. dev->scsi_host_ptr->can_queue = le32_to_cpu(dev->init->MaxIoCommands) - AAC_NUM_MGT_FIB;
  91. }
  92. if (i<0)
  93. return -ENOMEM;
  94. hw_fib_va = dev->hw_fib_va;
  95. hw_fib_pa = dev->hw_fib_pa;
  96. memset(hw_fib_va, 0, dev->max_fib_size * (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB));
  97. /*
  98. * Initialise the fibs
  99. */
  100. for (i = 0, fibptr = &dev->fibs[i]; i < (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB); i++, fibptr++)
  101. {
  102. fibptr->dev = dev;
  103. fibptr->hw_fib = hw_fib_va;
  104. fibptr->data = (void *) fibptr->hw_fib->data;
  105. fibptr->next = fibptr+1; /* Forward chain the fibs */
  106. init_MUTEX_LOCKED(&fibptr->event_wait);
  107. spin_lock_init(&fibptr->event_lock);
  108. hw_fib_va->header.XferState = cpu_to_le32(0xffffffff);
  109. hw_fib_va->header.SenderSize = cpu_to_le16(dev->max_fib_size);
  110. fibptr->hw_fib_pa = hw_fib_pa;
  111. hw_fib_va = (struct hw_fib *)((unsigned char *)hw_fib_va + dev->max_fib_size);
  112. hw_fib_pa = hw_fib_pa + dev->max_fib_size;
  113. }
  114. /*
  115. * Add the fib chain to the free list
  116. */
  117. dev->fibs[dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB - 1].next = NULL;
  118. /*
  119. * Enable this to debug out of queue space
  120. */
  121. dev->free_fib = &dev->fibs[0];
  122. return 0;
  123. }
  124. /**
  125. * fib_alloc - allocate a fib
  126. * @dev: Adapter to allocate the fib for
  127. *
  128. * Allocate a fib from the adapter fib pool. If the pool is empty we
  129. * return NULL.
  130. */
  131. struct fib * fib_alloc(struct aac_dev *dev)
  132. {
  133. struct fib * fibptr;
  134. unsigned long flags;
  135. spin_lock_irqsave(&dev->fib_lock, flags);
  136. fibptr = dev->free_fib;
  137. if(!fibptr){
  138. spin_unlock_irqrestore(&dev->fib_lock, flags);
  139. return fibptr;
  140. }
  141. dev->free_fib = fibptr->next;
  142. spin_unlock_irqrestore(&dev->fib_lock, flags);
  143. /*
  144. * Set the proper node type code and node byte size
  145. */
  146. fibptr->type = FSAFS_NTC_FIB_CONTEXT;
  147. fibptr->size = sizeof(struct fib);
  148. /*
  149. * Null out fields that depend on being zero at the start of
  150. * each I/O
  151. */
  152. fibptr->hw_fib->header.XferState = 0;
  153. fibptr->callback = NULL;
  154. fibptr->callback_data = NULL;
  155. return fibptr;
  156. }
  157. /**
  158. * fib_free - free a fib
  159. * @fibptr: fib to free up
  160. *
  161. * Frees up a fib and places it on the appropriate queue
  162. * (either free or timed out)
  163. */
  164. void fib_free(struct fib * fibptr)
  165. {
  166. unsigned long flags;
  167. spin_lock_irqsave(&fibptr->dev->fib_lock, flags);
  168. if (fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT) {
  169. aac_config.fib_timeouts++;
  170. fibptr->next = fibptr->dev->timeout_fib;
  171. fibptr->dev->timeout_fib = fibptr;
  172. } else {
  173. if (fibptr->hw_fib->header.XferState != 0) {
  174. printk(KERN_WARNING "fib_free, XferState != 0, fibptr = 0x%p, XferState = 0x%x\n",
  175. (void*)fibptr,
  176. le32_to_cpu(fibptr->hw_fib->header.XferState));
  177. }
  178. fibptr->next = fibptr->dev->free_fib;
  179. fibptr->dev->free_fib = fibptr;
  180. }
  181. spin_unlock_irqrestore(&fibptr->dev->fib_lock, flags);
  182. }
  183. /**
  184. * fib_init - initialise a fib
  185. * @fibptr: The fib to initialize
  186. *
  187. * Set up the generic fib fields ready for use
  188. */
  189. void fib_init(struct fib *fibptr)
  190. {
  191. struct hw_fib *hw_fib = fibptr->hw_fib;
  192. hw_fib->header.StructType = FIB_MAGIC;
  193. hw_fib->header.Size = cpu_to_le16(fibptr->dev->max_fib_size);
  194. hw_fib->header.XferState = cpu_to_le32(HostOwned | FibInitialized | FibEmpty | FastResponseCapable);
  195. hw_fib->header.SenderFibAddress = cpu_to_le32(fibptr->hw_fib_pa);
  196. hw_fib->header.ReceiverFibAddress = cpu_to_le32(fibptr->hw_fib_pa);
  197. hw_fib->header.SenderSize = cpu_to_le16(fibptr->dev->max_fib_size);
  198. }
  199. /**
  200. * fib_deallocate - deallocate a fib
  201. * @fibptr: fib to deallocate
  202. *
  203. * Will deallocate and return to the free pool the FIB pointed to by the
  204. * caller.
  205. */
  206. static void fib_dealloc(struct fib * fibptr)
  207. {
  208. struct hw_fib *hw_fib = fibptr->hw_fib;
  209. if(hw_fib->header.StructType != FIB_MAGIC)
  210. BUG();
  211. hw_fib->header.XferState = 0;
  212. }
  213. /*
  214. * Commuication primitives define and support the queuing method we use to
  215. * support host to adapter commuication. All queue accesses happen through
  216. * these routines and are the only routines which have a knowledge of the
  217. * how these queues are implemented.
  218. */
  219. /**
  220. * aac_get_entry - get a queue entry
  221. * @dev: Adapter
  222. * @qid: Queue Number
  223. * @entry: Entry return
  224. * @index: Index return
  225. * @nonotify: notification control
  226. *
  227. * With a priority the routine returns a queue entry if the queue has free entries. If the queue
  228. * is full(no free entries) than no entry is returned and the function returns 0 otherwise 1 is
  229. * returned.
  230. */
  231. static int aac_get_entry (struct aac_dev * dev, u32 qid, struct aac_entry **entry, u32 * index, unsigned long *nonotify)
  232. {
  233. struct aac_queue * q;
  234. unsigned long idx;
  235. /*
  236. * All of the queues wrap when they reach the end, so we check
  237. * to see if they have reached the end and if they have we just
  238. * set the index back to zero. This is a wrap. You could or off
  239. * the high bits in all updates but this is a bit faster I think.
  240. */
  241. q = &dev->queues->queue[qid];
  242. idx = *index = le32_to_cpu(*(q->headers.producer));
  243. /* Interrupt Moderation, only interrupt for first two entries */
  244. if (idx != le32_to_cpu(*(q->headers.consumer))) {
  245. if (--idx == 0) {
  246. if (qid == AdapHighCmdQueue)
  247. idx = ADAP_HIGH_CMD_ENTRIES;
  248. else if (qid == AdapNormCmdQueue)
  249. idx = ADAP_NORM_CMD_ENTRIES;
  250. else if (qid == AdapHighRespQueue)
  251. idx = ADAP_HIGH_RESP_ENTRIES;
  252. else if (qid == AdapNormRespQueue)
  253. idx = ADAP_NORM_RESP_ENTRIES;
  254. }
  255. if (idx != le32_to_cpu(*(q->headers.consumer)))
  256. *nonotify = 1;
  257. }
  258. if (qid == AdapHighCmdQueue) {
  259. if (*index >= ADAP_HIGH_CMD_ENTRIES)
  260. *index = 0;
  261. } else if (qid == AdapNormCmdQueue) {
  262. if (*index >= ADAP_NORM_CMD_ENTRIES)
  263. *index = 0; /* Wrap to front of the Producer Queue. */
  264. }
  265. else if (qid == AdapHighRespQueue)
  266. {
  267. if (*index >= ADAP_HIGH_RESP_ENTRIES)
  268. *index = 0;
  269. }
  270. else if (qid == AdapNormRespQueue)
  271. {
  272. if (*index >= ADAP_NORM_RESP_ENTRIES)
  273. *index = 0; /* Wrap to front of the Producer Queue. */
  274. }
  275. else {
  276. printk("aacraid: invalid qid\n");
  277. BUG();
  278. }
  279. if ((*index + 1) == le32_to_cpu(*(q->headers.consumer))) { /* Queue is full */
  280. printk(KERN_WARNING "Queue %d full, %u outstanding.\n",
  281. qid, q->numpending);
  282. return 0;
  283. } else {
  284. *entry = q->base + *index;
  285. return 1;
  286. }
  287. }
  288. /**
  289. * aac_queue_get - get the next free QE
  290. * @dev: Adapter
  291. * @index: Returned index
  292. * @priority: Priority of fib
  293. * @fib: Fib to associate with the queue entry
  294. * @wait: Wait if queue full
  295. * @fibptr: Driver fib object to go with fib
  296. * @nonotify: Don't notify the adapter
  297. *
  298. * Gets the next free QE off the requested priorty adapter command
  299. * queue and associates the Fib with the QE. The QE represented by
  300. * index is ready to insert on the queue when this routine returns
  301. * success.
  302. */
  303. static int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw_fib, int wait, struct fib * fibptr, unsigned long *nonotify)
  304. {
  305. struct aac_entry * entry = NULL;
  306. int map = 0;
  307. struct aac_queue * q = &dev->queues->queue[qid];
  308. spin_lock_irqsave(q->lock, q->SavedIrql);
  309. if (qid == AdapHighCmdQueue || qid == AdapNormCmdQueue)
  310. {
  311. /* if no entries wait for some if caller wants to */
  312. while (!aac_get_entry(dev, qid, &entry, index, nonotify))
  313. {
  314. printk(KERN_ERR "GetEntries failed\n");
  315. }
  316. /*
  317. * Setup queue entry with a command, status and fib mapped
  318. */
  319. entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size));
  320. map = 1;
  321. }
  322. else if (qid == AdapHighRespQueue || qid == AdapNormRespQueue)
  323. {
  324. while(!aac_get_entry(dev, qid, &entry, index, nonotify))
  325. {
  326. /* if no entries wait for some if caller wants to */
  327. }
  328. /*
  329. * Setup queue entry with command, status and fib mapped
  330. */
  331. entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size));
  332. entry->addr = hw_fib->header.SenderFibAddress;
  333. /* Restore adapters pointer to the FIB */
  334. hw_fib->header.ReceiverFibAddress = hw_fib->header.SenderFibAddress; /* Let the adapter now where to find its data */
  335. map = 0;
  336. }
  337. /*
  338. * If MapFib is true than we need to map the Fib and put pointers
  339. * in the queue entry.
  340. */
  341. if (map)
  342. entry->addr = cpu_to_le32(fibptr->hw_fib_pa);
  343. return 0;
  344. }
  345. /**
  346. * aac_insert_entry - insert a queue entry
  347. * @dev: Adapter
  348. * @index: Index of entry to insert
  349. * @qid: Queue number
  350. * @nonotify: Suppress adapter notification
  351. *
  352. * Gets the next free QE off the requested priorty adapter command
  353. * queue and associates the Fib with the QE. The QE represented by
  354. * index is ready to insert on the queue when this routine returns
  355. * success.
  356. */
  357. static int aac_insert_entry(struct aac_dev * dev, u32 index, u32 qid, unsigned long nonotify)
  358. {
  359. struct aac_queue * q = &dev->queues->queue[qid];
  360. if(q == NULL)
  361. BUG();
  362. *(q->headers.producer) = cpu_to_le32(index + 1);
  363. spin_unlock_irqrestore(q->lock, q->SavedIrql);
  364. if (qid == AdapHighCmdQueue ||
  365. qid == AdapNormCmdQueue ||
  366. qid == AdapHighRespQueue ||
  367. qid == AdapNormRespQueue)
  368. {
  369. if (!nonotify)
  370. aac_adapter_notify(dev, qid);
  371. }
  372. else
  373. printk("Suprise insert!\n");
  374. return 0;
  375. }
  376. /*
  377. * Define the highest level of host to adapter communication routines.
  378. * These routines will support host to adapter FS commuication. These
  379. * routines have no knowledge of the commuication method used. This level
  380. * sends and receives FIBs. This level has no knowledge of how these FIBs
  381. * get passed back and forth.
  382. */
  383. /**
  384. * fib_send - send a fib to the adapter
  385. * @command: Command to send
  386. * @fibptr: The fib
  387. * @size: Size of fib data area
  388. * @priority: Priority of Fib
  389. * @wait: Async/sync select
  390. * @reply: True if a reply is wanted
  391. * @callback: Called with reply
  392. * @callback_data: Passed to callback
  393. *
  394. * Sends the requested FIB to the adapter and optionally will wait for a
  395. * response FIB. If the caller does not wish to wait for a response than
  396. * an event to wait on must be supplied. This event will be set when a
  397. * response FIB is received from the adapter.
  398. */
  399. int fib_send(u16 command, struct fib * fibptr, unsigned long size, int priority, int wait, int reply, fib_callback callback, void * callback_data)
  400. {
  401. u32 index;
  402. u32 qid;
  403. struct aac_dev * dev = fibptr->dev;
  404. unsigned long nointr = 0;
  405. struct hw_fib * hw_fib = fibptr->hw_fib;
  406. struct aac_queue * q;
  407. unsigned long flags = 0;
  408. if (!(hw_fib->header.XferState & cpu_to_le32(HostOwned)))
  409. return -EBUSY;
  410. /*
  411. * There are 5 cases with the wait and reponse requested flags.
  412. * The only invalid cases are if the caller requests to wait and
  413. * does not request a response and if the caller does not want a
  414. * response and the Fib is not allocated from pool. If a response
  415. * is not requesed the Fib will just be deallocaed by the DPC
  416. * routine when the response comes back from the adapter. No
  417. * further processing will be done besides deleting the Fib. We
  418. * will have a debug mode where the adapter can notify the host
  419. * it had a problem and the host can log that fact.
  420. */
  421. if (wait && !reply) {
  422. return -EINVAL;
  423. } else if (!wait && reply) {
  424. hw_fib->header.XferState |= cpu_to_le32(Async | ResponseExpected);
  425. FIB_COUNTER_INCREMENT(aac_config.AsyncSent);
  426. } else if (!wait && !reply) {
  427. hw_fib->header.XferState |= cpu_to_le32(NoResponseExpected);
  428. FIB_COUNTER_INCREMENT(aac_config.NoResponseSent);
  429. } else if (wait && reply) {
  430. hw_fib->header.XferState |= cpu_to_le32(ResponseExpected);
  431. FIB_COUNTER_INCREMENT(aac_config.NormalSent);
  432. }
  433. /*
  434. * Map the fib into 32bits by using the fib number
  435. */
  436. hw_fib->header.SenderFibAddress = cpu_to_le32(((u32)(fibptr-dev->fibs)) << 1);
  437. hw_fib->header.SenderData = (u32)(fibptr - dev->fibs);
  438. /*
  439. * Set FIB state to indicate where it came from and if we want a
  440. * response from the adapter. Also load the command from the
  441. * caller.
  442. *
  443. * Map the hw fib pointer as a 32bit value
  444. */
  445. hw_fib->header.Command = cpu_to_le16(command);
  446. hw_fib->header.XferState |= cpu_to_le32(SentFromHost);
  447. fibptr->hw_fib->header.Flags = 0; /* 0 the flags field - internal only*/
  448. /*
  449. * Set the size of the Fib we want to send to the adapter
  450. */
  451. hw_fib->header.Size = cpu_to_le16(sizeof(struct aac_fibhdr) + size);
  452. if (le16_to_cpu(hw_fib->header.Size) > le16_to_cpu(hw_fib->header.SenderSize)) {
  453. return -EMSGSIZE;
  454. }
  455. /*
  456. * Get a queue entry connect the FIB to it and send an notify
  457. * the adapter a command is ready.
  458. */
  459. if (priority == FsaHigh) {
  460. hw_fib->header.XferState |= cpu_to_le32(HighPriority);
  461. qid = AdapHighCmdQueue;
  462. } else {
  463. hw_fib->header.XferState |= cpu_to_le32(NormalPriority);
  464. qid = AdapNormCmdQueue;
  465. }
  466. q = &dev->queues->queue[qid];
  467. if(wait)
  468. spin_lock_irqsave(&fibptr->event_lock, flags);
  469. if(aac_queue_get( dev, &index, qid, hw_fib, 1, fibptr, &nointr)<0)
  470. return -EWOULDBLOCK;
  471. dprintk((KERN_DEBUG "fib_send: inserting a queue entry at index %d.\n",index));
  472. dprintk((KERN_DEBUG "Fib contents:.\n"));
  473. dprintk((KERN_DEBUG " Command = %d.\n", hw_fib->header.Command));
  474. dprintk((KERN_DEBUG " XferState = %x.\n", hw_fib->header.XferState));
  475. dprintk((KERN_DEBUG " hw_fib va being sent=%p\n",fibptr->hw_fib));
  476. dprintk((KERN_DEBUG " hw_fib pa being sent=%lx\n",(ulong)fibptr->hw_fib_pa));
  477. dprintk((KERN_DEBUG " fib being sent=%p\n",fibptr));
  478. /*
  479. * Fill in the Callback and CallbackContext if we are not
  480. * going to wait.
  481. */
  482. if (!wait) {
  483. fibptr->callback = callback;
  484. fibptr->callback_data = callback_data;
  485. }
  486. FIB_COUNTER_INCREMENT(aac_config.FibsSent);
  487. list_add_tail(&fibptr->queue, &q->pendingq);
  488. q->numpending++;
  489. fibptr->done = 0;
  490. fibptr->flags = 0;
  491. if(aac_insert_entry(dev, index, qid, (nointr & aac_config.irq_mod)) < 0)
  492. return -EWOULDBLOCK;
  493. /*
  494. * If the caller wanted us to wait for response wait now.
  495. */
  496. if (wait) {
  497. spin_unlock_irqrestore(&fibptr->event_lock, flags);
  498. down(&fibptr->event_wait);
  499. if(fibptr->done == 0)
  500. BUG();
  501. if((fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT)){
  502. return -ETIMEDOUT;
  503. } else {
  504. return 0;
  505. }
  506. }
  507. /*
  508. * If the user does not want a response than return success otherwise
  509. * return pending
  510. */
  511. if (reply)
  512. return -EINPROGRESS;
  513. else
  514. return 0;
  515. }
  516. /**
  517. * aac_consumer_get - get the top of the queue
  518. * @dev: Adapter
  519. * @q: Queue
  520. * @entry: Return entry
  521. *
  522. * Will return a pointer to the entry on the top of the queue requested that
  523. * we are a consumer of, and return the address of the queue entry. It does
  524. * not change the state of the queue.
  525. */
  526. int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry)
  527. {
  528. u32 index;
  529. int status;
  530. if (le32_to_cpu(*q->headers.producer) == le32_to_cpu(*q->headers.consumer)) {
  531. status = 0;
  532. } else {
  533. /*
  534. * The consumer index must be wrapped if we have reached
  535. * the end of the queue, else we just use the entry
  536. * pointed to by the header index
  537. */
  538. if (le32_to_cpu(*q->headers.consumer) >= q->entries)
  539. index = 0;
  540. else
  541. index = le32_to_cpu(*q->headers.consumer);
  542. *entry = q->base + index;
  543. status = 1;
  544. }
  545. return(status);
  546. }
  547. /**
  548. * aac_consumer_free - free consumer entry
  549. * @dev: Adapter
  550. * @q: Queue
  551. * @qid: Queue ident
  552. *
  553. * Frees up the current top of the queue we are a consumer of. If the
  554. * queue was full notify the producer that the queue is no longer full.
  555. */
  556. void aac_consumer_free(struct aac_dev * dev, struct aac_queue *q, u32 qid)
  557. {
  558. int wasfull = 0;
  559. u32 notify;
  560. if ((le32_to_cpu(*q->headers.producer)+1) == le32_to_cpu(*q->headers.consumer))
  561. wasfull = 1;
  562. if (le32_to_cpu(*q->headers.consumer) >= q->entries)
  563. *q->headers.consumer = cpu_to_le32(1);
  564. else
  565. *q->headers.consumer = cpu_to_le32(le32_to_cpu(*q->headers.consumer)+1);
  566. if (wasfull) {
  567. switch (qid) {
  568. case HostNormCmdQueue:
  569. notify = HostNormCmdNotFull;
  570. break;
  571. case HostHighCmdQueue:
  572. notify = HostHighCmdNotFull;
  573. break;
  574. case HostNormRespQueue:
  575. notify = HostNormRespNotFull;
  576. break;
  577. case HostHighRespQueue:
  578. notify = HostHighRespNotFull;
  579. break;
  580. default:
  581. BUG();
  582. return;
  583. }
  584. aac_adapter_notify(dev, notify);
  585. }
  586. }
  587. /**
  588. * fib_adapter_complete - complete adapter issued fib
  589. * @fibptr: fib to complete
  590. * @size: size of fib
  591. *
  592. * Will do all necessary work to complete a FIB that was sent from
  593. * the adapter.
  594. */
  595. int fib_adapter_complete(struct fib * fibptr, unsigned short size)
  596. {
  597. struct hw_fib * hw_fib = fibptr->hw_fib;
  598. struct aac_dev * dev = fibptr->dev;
  599. unsigned long nointr = 0;
  600. if (hw_fib->header.XferState == 0)
  601. return 0;
  602. /*
  603. * If we plan to do anything check the structure type first.
  604. */
  605. if ( hw_fib->header.StructType != FIB_MAGIC ) {
  606. return -EINVAL;
  607. }
  608. /*
  609. * This block handles the case where the adapter had sent us a
  610. * command and we have finished processing the command. We
  611. * call completeFib when we are done processing the command
  612. * and want to send a response back to the adapter. This will
  613. * send the completed cdb to the adapter.
  614. */
  615. if (hw_fib->header.XferState & cpu_to_le32(SentFromAdapter)) {
  616. hw_fib->header.XferState |= cpu_to_le32(HostProcessed);
  617. if (hw_fib->header.XferState & cpu_to_le32(HighPriority)) {
  618. u32 index;
  619. if (size)
  620. {
  621. size += sizeof(struct aac_fibhdr);
  622. if (size > le16_to_cpu(hw_fib->header.SenderSize))
  623. return -EMSGSIZE;
  624. hw_fib->header.Size = cpu_to_le16(size);
  625. }
  626. if(aac_queue_get(dev, &index, AdapHighRespQueue, hw_fib, 1, NULL, &nointr) < 0) {
  627. return -EWOULDBLOCK;
  628. }
  629. if (aac_insert_entry(dev, index, AdapHighRespQueue, (nointr & (int)aac_config.irq_mod)) != 0) {
  630. }
  631. } else if (hw_fib->header.XferState &
  632. cpu_to_le32(NormalPriority)) {
  633. u32 index;
  634. if (size) {
  635. size += sizeof(struct aac_fibhdr);
  636. if (size > le16_to_cpu(hw_fib->header.SenderSize))
  637. return -EMSGSIZE;
  638. hw_fib->header.Size = cpu_to_le16(size);
  639. }
  640. if (aac_queue_get(dev, &index, AdapNormRespQueue, hw_fib, 1, NULL, &nointr) < 0)
  641. return -EWOULDBLOCK;
  642. if (aac_insert_entry(dev, index, AdapNormRespQueue, (nointr & (int)aac_config.irq_mod)) != 0)
  643. {
  644. }
  645. }
  646. }
  647. else
  648. {
  649. printk(KERN_WARNING "fib_adapter_complete: Unknown xferstate detected.\n");
  650. BUG();
  651. }
  652. return 0;
  653. }
  654. /**
  655. * fib_complete - fib completion handler
  656. * @fib: FIB to complete
  657. *
  658. * Will do all necessary work to complete a FIB.
  659. */
  660. int fib_complete(struct fib * fibptr)
  661. {
  662. struct hw_fib * hw_fib = fibptr->hw_fib;
  663. /*
  664. * Check for a fib which has already been completed
  665. */
  666. if (hw_fib->header.XferState == 0)
  667. return 0;
  668. /*
  669. * If we plan to do anything check the structure type first.
  670. */
  671. if (hw_fib->header.StructType != FIB_MAGIC)
  672. return -EINVAL;
  673. /*
  674. * This block completes a cdb which orginated on the host and we
  675. * just need to deallocate the cdb or reinit it. At this point the
  676. * command is complete that we had sent to the adapter and this
  677. * cdb could be reused.
  678. */
  679. if((hw_fib->header.XferState & cpu_to_le32(SentFromHost)) &&
  680. (hw_fib->header.XferState & cpu_to_le32(AdapterProcessed)))
  681. {
  682. fib_dealloc(fibptr);
  683. }
  684. else if(hw_fib->header.XferState & cpu_to_le32(SentFromHost))
  685. {
  686. /*
  687. * This handles the case when the host has aborted the I/O
  688. * to the adapter because the adapter is not responding
  689. */
  690. fib_dealloc(fibptr);
  691. } else if(hw_fib->header.XferState & cpu_to_le32(HostOwned)) {
  692. fib_dealloc(fibptr);
  693. } else {
  694. BUG();
  695. }
  696. return 0;
  697. }
  698. /**
  699. * aac_printf - handle printf from firmware
  700. * @dev: Adapter
  701. * @val: Message info
  702. *
  703. * Print a message passed to us by the controller firmware on the
  704. * Adaptec board
  705. */
  706. void aac_printf(struct aac_dev *dev, u32 val)
  707. {
  708. char *cp = dev->printfbuf;
  709. if (dev->printf_enabled)
  710. {
  711. int length = val & 0xffff;
  712. int level = (val >> 16) & 0xffff;
  713. /*
  714. * The size of the printfbuf is set in port.c
  715. * There is no variable or define for it
  716. */
  717. if (length > 255)
  718. length = 255;
  719. if (cp[length] != 0)
  720. cp[length] = 0;
  721. if (level == LOG_AAC_HIGH_ERROR)
  722. printk(KERN_WARNING "aacraid:%s", cp);
  723. else
  724. printk(KERN_INFO "aacraid:%s", cp);
  725. }
  726. memset(cp, 0, 256);
  727. }
  728. /**
  729. * aac_handle_aif - Handle a message from the firmware
  730. * @dev: Which adapter this fib is from
  731. * @fibptr: Pointer to fibptr from adapter
  732. *
  733. * This routine handles a driver notify fib from the adapter and
  734. * dispatches it to the appropriate routine for handling.
  735. */
  736. static void aac_handle_aif(struct aac_dev * dev, struct fib * fibptr)
  737. {
  738. struct hw_fib * hw_fib = fibptr->hw_fib;
  739. struct aac_aifcmd * aifcmd = (struct aac_aifcmd *)hw_fib->data;
  740. int busy;
  741. u32 container;
  742. struct scsi_device *device;
  743. enum {
  744. NOTHING,
  745. DELETE,
  746. ADD,
  747. CHANGE
  748. } device_config_needed;
  749. /* Sniff for container changes */
  750. if (!dev)
  751. return;
  752. container = (u32)-1;
  753. /*
  754. * We have set this up to try and minimize the number of
  755. * re-configures that take place. As a result of this when
  756. * certain AIF's come in we will set a flag waiting for another
  757. * type of AIF before setting the re-config flag.
  758. */
  759. switch (le32_to_cpu(aifcmd->command)) {
  760. case AifCmdDriverNotify:
  761. switch (le32_to_cpu(((u32 *)aifcmd->data)[0])) {
  762. /*
  763. * Morph or Expand complete
  764. */
  765. case AifDenMorphComplete:
  766. case AifDenVolumeExtendComplete:
  767. container = le32_to_cpu(((u32 *)aifcmd->data)[1]);
  768. if (container >= dev->maximum_num_containers)
  769. break;
  770. /*
  771. * Find the Scsi_Device associated with the SCSI
  772. * address. Make sure we have the right array, and if
  773. * so set the flag to initiate a new re-config once we
  774. * see an AifEnConfigChange AIF come through.
  775. */
  776. if ((dev != NULL) && (dev->scsi_host_ptr != NULL)) {
  777. device = scsi_device_lookup(dev->scsi_host_ptr,
  778. CONTAINER_TO_CHANNEL(container),
  779. CONTAINER_TO_ID(container),
  780. CONTAINER_TO_LUN(container));
  781. if (device) {
  782. dev->fsa_dev[container].config_needed = CHANGE;
  783. dev->fsa_dev[container].config_waiting_on = AifEnConfigChange;
  784. scsi_device_put(device);
  785. }
  786. }
  787. }
  788. /*
  789. * If we are waiting on something and this happens to be
  790. * that thing then set the re-configure flag.
  791. */
  792. if (container != (u32)-1) {
  793. if (container >= dev->maximum_num_containers)
  794. break;
  795. if (dev->fsa_dev[container].config_waiting_on ==
  796. le32_to_cpu(*(u32 *)aifcmd->data))
  797. dev->fsa_dev[container].config_waiting_on = 0;
  798. } else for (container = 0;
  799. container < dev->maximum_num_containers; ++container) {
  800. if (dev->fsa_dev[container].config_waiting_on ==
  801. le32_to_cpu(*(u32 *)aifcmd->data))
  802. dev->fsa_dev[container].config_waiting_on = 0;
  803. }
  804. break;
  805. case AifCmdEventNotify:
  806. switch (le32_to_cpu(((u32 *)aifcmd->data)[0])) {
  807. /*
  808. * Add an Array.
  809. */
  810. case AifEnAddContainer:
  811. container = le32_to_cpu(((u32 *)aifcmd->data)[1]);
  812. if (container >= dev->maximum_num_containers)
  813. break;
  814. dev->fsa_dev[container].config_needed = ADD;
  815. dev->fsa_dev[container].config_waiting_on =
  816. AifEnConfigChange;
  817. break;
  818. /*
  819. * Delete an Array.
  820. */
  821. case AifEnDeleteContainer:
  822. container = le32_to_cpu(((u32 *)aifcmd->data)[1]);
  823. if (container >= dev->maximum_num_containers)
  824. break;
  825. dev->fsa_dev[container].config_needed = DELETE;
  826. dev->fsa_dev[container].config_waiting_on =
  827. AifEnConfigChange;
  828. break;
  829. /*
  830. * Container change detected. If we currently are not
  831. * waiting on something else, setup to wait on a Config Change.
  832. */
  833. case AifEnContainerChange:
  834. container = le32_to_cpu(((u32 *)aifcmd->data)[1]);
  835. if (container >= dev->maximum_num_containers)
  836. break;
  837. if (dev->fsa_dev[container].config_waiting_on)
  838. break;
  839. dev->fsa_dev[container].config_needed = CHANGE;
  840. dev->fsa_dev[container].config_waiting_on =
  841. AifEnConfigChange;
  842. break;
  843. case AifEnConfigChange:
  844. break;
  845. }
  846. /*
  847. * If we are waiting on something and this happens to be
  848. * that thing then set the re-configure flag.
  849. */
  850. if (container != (u32)-1) {
  851. if (container >= dev->maximum_num_containers)
  852. break;
  853. if (dev->fsa_dev[container].config_waiting_on ==
  854. le32_to_cpu(*(u32 *)aifcmd->data))
  855. dev->fsa_dev[container].config_waiting_on = 0;
  856. } else for (container = 0;
  857. container < dev->maximum_num_containers; ++container) {
  858. if (dev->fsa_dev[container].config_waiting_on ==
  859. le32_to_cpu(*(u32 *)aifcmd->data))
  860. dev->fsa_dev[container].config_waiting_on = 0;
  861. }
  862. break;
  863. case AifCmdJobProgress:
  864. /*
  865. * These are job progress AIF's. When a Clear is being
  866. * done on a container it is initially created then hidden from
  867. * the OS. When the clear completes we don't get a config
  868. * change so we monitor the job status complete on a clear then
  869. * wait for a container change.
  870. */
  871. if ((((u32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero))
  872. && ((((u32 *)aifcmd->data)[6] == ((u32 *)aifcmd->data)[5])
  873. || (((u32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsSuccess)))) {
  874. for (container = 0;
  875. container < dev->maximum_num_containers;
  876. ++container) {
  877. /*
  878. * Stomp on all config sequencing for all
  879. * containers?
  880. */
  881. dev->fsa_dev[container].config_waiting_on =
  882. AifEnContainerChange;
  883. dev->fsa_dev[container].config_needed = ADD;
  884. }
  885. }
  886. if ((((u32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero))
  887. && (((u32 *)aifcmd->data)[6] == 0)
  888. && (((u32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsRunning))) {
  889. for (container = 0;
  890. container < dev->maximum_num_containers;
  891. ++container) {
  892. /*
  893. * Stomp on all config sequencing for all
  894. * containers?
  895. */
  896. dev->fsa_dev[container].config_waiting_on =
  897. AifEnContainerChange;
  898. dev->fsa_dev[container].config_needed = DELETE;
  899. }
  900. }
  901. break;
  902. }
  903. device_config_needed = NOTHING;
  904. for (container = 0; container < dev->maximum_num_containers;
  905. ++container) {
  906. if ((dev->fsa_dev[container].config_waiting_on == 0)
  907. && (dev->fsa_dev[container].config_needed != NOTHING)) {
  908. device_config_needed =
  909. dev->fsa_dev[container].config_needed;
  910. dev->fsa_dev[container].config_needed = NOTHING;
  911. break;
  912. }
  913. }
  914. if (device_config_needed == NOTHING)
  915. return;
  916. /*
  917. * If we decided that a re-configuration needs to be done,
  918. * schedule it here on the way out the door, please close the door
  919. * behind you.
  920. */
  921. busy = 0;
  922. /*
  923. * Find the Scsi_Device associated with the SCSI address,
  924. * and mark it as changed, invalidating the cache. This deals
  925. * with changes to existing device IDs.
  926. */
  927. if (!dev || !dev->scsi_host_ptr)
  928. return;
  929. /*
  930. * force reload of disk info via probe_container
  931. */
  932. if ((device_config_needed == CHANGE)
  933. && (dev->fsa_dev[container].valid == 1))
  934. dev->fsa_dev[container].valid = 2;
  935. if ((device_config_needed == CHANGE) ||
  936. (device_config_needed == ADD))
  937. probe_container(dev, container);
  938. device = scsi_device_lookup(dev->scsi_host_ptr,
  939. CONTAINER_TO_CHANNEL(container),
  940. CONTAINER_TO_ID(container),
  941. CONTAINER_TO_LUN(container));
  942. if (device) {
  943. switch (device_config_needed) {
  944. case DELETE:
  945. scsi_remove_device(device);
  946. break;
  947. case CHANGE:
  948. if (!dev->fsa_dev[container].valid) {
  949. scsi_remove_device(device);
  950. break;
  951. }
  952. scsi_rescan_device(&device->sdev_gendev);
  953. default:
  954. break;
  955. }
  956. scsi_device_put(device);
  957. }
  958. if (device_config_needed == ADD) {
  959. scsi_add_device(dev->scsi_host_ptr,
  960. CONTAINER_TO_CHANNEL(container),
  961. CONTAINER_TO_ID(container),
  962. CONTAINER_TO_LUN(container));
  963. }
  964. }
  965. /**
  966. * aac_command_thread - command processing thread
  967. * @dev: Adapter to monitor
  968. *
  969. * Waits on the commandready event in it's queue. When the event gets set
  970. * it will pull FIBs off it's queue. It will continue to pull FIBs off
  971. * until the queue is empty. When the queue is empty it will wait for
  972. * more FIBs.
  973. */
  974. int aac_command_thread(struct aac_dev * dev)
  975. {
  976. struct hw_fib *hw_fib, *hw_newfib;
  977. struct fib *fib, *newfib;
  978. struct aac_fib_context *fibctx;
  979. unsigned long flags;
  980. DECLARE_WAITQUEUE(wait, current);
  981. /*
  982. * We can only have one thread per adapter for AIF's.
  983. */
  984. if (dev->aif_thread)
  985. return -EINVAL;
  986. /*
  987. * Set up the name that will appear in 'ps'
  988. * stored in task_struct.comm[16].
  989. */
  990. daemonize("aacraid");
  991. allow_signal(SIGKILL);
  992. /*
  993. * Let the DPC know it has a place to send the AIF's to.
  994. */
  995. dev->aif_thread = 1;
  996. add_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait);
  997. set_current_state(TASK_INTERRUPTIBLE);
  998. dprintk ((KERN_INFO "aac_command_thread start\n"));
  999. while(1)
  1000. {
  1001. spin_lock_irqsave(dev->queues->queue[HostNormCmdQueue].lock, flags);
  1002. while(!list_empty(&(dev->queues->queue[HostNormCmdQueue].cmdq))) {
  1003. struct list_head *entry;
  1004. struct aac_aifcmd * aifcmd;
  1005. set_current_state(TASK_RUNNING);
  1006. entry = dev->queues->queue[HostNormCmdQueue].cmdq.next;
  1007. list_del(entry);
  1008. spin_unlock_irqrestore(dev->queues->queue[HostNormCmdQueue].lock, flags);
  1009. fib = list_entry(entry, struct fib, fiblink);
  1010. /*
  1011. * We will process the FIB here or pass it to a
  1012. * worker thread that is TBD. We Really can't
  1013. * do anything at this point since we don't have
  1014. * anything defined for this thread to do.
  1015. */
  1016. hw_fib = fib->hw_fib;
  1017. memset(fib, 0, sizeof(struct fib));
  1018. fib->type = FSAFS_NTC_FIB_CONTEXT;
  1019. fib->size = sizeof( struct fib );
  1020. fib->hw_fib = hw_fib;
  1021. fib->data = hw_fib->data;
  1022. fib->dev = dev;
  1023. /*
  1024. * We only handle AifRequest fibs from the adapter.
  1025. */
  1026. aifcmd = (struct aac_aifcmd *) hw_fib->data;
  1027. if (aifcmd->command == cpu_to_le32(AifCmdDriverNotify)) {
  1028. /* Handle Driver Notify Events */
  1029. aac_handle_aif(dev, fib);
  1030. *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK);
  1031. fib_adapter_complete(fib, (u16)sizeof(u32));
  1032. } else {
  1033. struct list_head *entry;
  1034. /* The u32 here is important and intended. We are using
  1035. 32bit wrapping time to fit the adapter field */
  1036. u32 time_now, time_last;
  1037. unsigned long flagv;
  1038. unsigned num;
  1039. struct hw_fib ** hw_fib_pool, ** hw_fib_p;
  1040. struct fib ** fib_pool, ** fib_p;
  1041. /* Sniff events */
  1042. if ((aifcmd->command ==
  1043. cpu_to_le32(AifCmdEventNotify)) ||
  1044. (aifcmd->command ==
  1045. cpu_to_le32(AifCmdJobProgress))) {
  1046. aac_handle_aif(dev, fib);
  1047. }
  1048. time_now = jiffies/HZ;
  1049. /*
  1050. * Warning: no sleep allowed while
  1051. * holding spinlock. We take the estimate
  1052. * and pre-allocate a set of fibs outside the
  1053. * lock.
  1054. */
  1055. num = le32_to_cpu(dev->init->AdapterFibsSize)
  1056. / sizeof(struct hw_fib); /* some extra */
  1057. spin_lock_irqsave(&dev->fib_lock, flagv);
  1058. entry = dev->fib_list.next;
  1059. while (entry != &dev->fib_list) {
  1060. entry = entry->next;
  1061. ++num;
  1062. }
  1063. spin_unlock_irqrestore(&dev->fib_lock, flagv);
  1064. hw_fib_pool = NULL;
  1065. fib_pool = NULL;
  1066. if (num
  1067. && ((hw_fib_pool = kmalloc(sizeof(struct hw_fib *) * num, GFP_KERNEL)))
  1068. && ((fib_pool = kmalloc(sizeof(struct fib *) * num, GFP_KERNEL)))) {
  1069. hw_fib_p = hw_fib_pool;
  1070. fib_p = fib_pool;
  1071. while (hw_fib_p < &hw_fib_pool[num]) {
  1072. if (!(*(hw_fib_p++) = kmalloc(sizeof(struct hw_fib), GFP_KERNEL))) {
  1073. --hw_fib_p;
  1074. break;
  1075. }
  1076. if (!(*(fib_p++) = kmalloc(sizeof(struct fib), GFP_KERNEL))) {
  1077. kfree(*(--hw_fib_p));
  1078. break;
  1079. }
  1080. }
  1081. if ((num = hw_fib_p - hw_fib_pool) == 0) {
  1082. kfree(fib_pool);
  1083. fib_pool = NULL;
  1084. kfree(hw_fib_pool);
  1085. hw_fib_pool = NULL;
  1086. }
  1087. } else if (hw_fib_pool) {
  1088. kfree(hw_fib_pool);
  1089. hw_fib_pool = NULL;
  1090. }
  1091. spin_lock_irqsave(&dev->fib_lock, flagv);
  1092. entry = dev->fib_list.next;
  1093. /*
  1094. * For each Context that is on the
  1095. * fibctxList, make a copy of the
  1096. * fib, and then set the event to wake up the
  1097. * thread that is waiting for it.
  1098. */
  1099. hw_fib_p = hw_fib_pool;
  1100. fib_p = fib_pool;
  1101. while (entry != &dev->fib_list) {
  1102. /*
  1103. * Extract the fibctx
  1104. */
  1105. fibctx = list_entry(entry, struct aac_fib_context, next);
  1106. /*
  1107. * Check if the queue is getting
  1108. * backlogged
  1109. */
  1110. if (fibctx->count > 20)
  1111. {
  1112. /*
  1113. * It's *not* jiffies folks,
  1114. * but jiffies / HZ so do not
  1115. * panic ...
  1116. */
  1117. time_last = fibctx->jiffies;
  1118. /*
  1119. * Has it been > 2 minutes
  1120. * since the last read off
  1121. * the queue?
  1122. */
  1123. if ((time_now - time_last) > 120) {
  1124. entry = entry->next;
  1125. aac_close_fib_context(dev, fibctx);
  1126. continue;
  1127. }
  1128. }
  1129. /*
  1130. * Warning: no sleep allowed while
  1131. * holding spinlock
  1132. */
  1133. if (hw_fib_p < &hw_fib_pool[num]) {
  1134. hw_newfib = *hw_fib_p;
  1135. *(hw_fib_p++) = NULL;
  1136. newfib = *fib_p;
  1137. *(fib_p++) = NULL;
  1138. /*
  1139. * Make the copy of the FIB
  1140. */
  1141. memcpy(hw_newfib, hw_fib, sizeof(struct hw_fib));
  1142. memcpy(newfib, fib, sizeof(struct fib));
  1143. newfib->hw_fib = hw_newfib;
  1144. /*
  1145. * Put the FIB onto the
  1146. * fibctx's fibs
  1147. */
  1148. list_add_tail(&newfib->fiblink, &fibctx->fib_list);
  1149. fibctx->count++;
  1150. /*
  1151. * Set the event to wake up the
  1152. * thread that is waiting.
  1153. */
  1154. up(&fibctx->wait_sem);
  1155. } else {
  1156. printk(KERN_WARNING "aifd: didn't allocate NewFib.\n");
  1157. }
  1158. entry = entry->next;
  1159. }
  1160. /*
  1161. * Set the status of this FIB
  1162. */
  1163. *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK);
  1164. fib_adapter_complete(fib, sizeof(u32));
  1165. spin_unlock_irqrestore(&dev->fib_lock, flagv);
  1166. /* Free up the remaining resources */
  1167. hw_fib_p = hw_fib_pool;
  1168. fib_p = fib_pool;
  1169. while (hw_fib_p < &hw_fib_pool[num]) {
  1170. if (*hw_fib_p)
  1171. kfree(*hw_fib_p);
  1172. if (*fib_p)
  1173. kfree(*fib_p);
  1174. ++fib_p;
  1175. ++hw_fib_p;
  1176. }
  1177. if (hw_fib_pool)
  1178. kfree(hw_fib_pool);
  1179. if (fib_pool)
  1180. kfree(fib_pool);
  1181. }
  1182. kfree(fib);
  1183. spin_lock_irqsave(dev->queues->queue[HostNormCmdQueue].lock, flags);
  1184. }
  1185. /*
  1186. * There are no more AIF's
  1187. */
  1188. spin_unlock_irqrestore(dev->queues->queue[HostNormCmdQueue].lock, flags);
  1189. schedule();
  1190. if(signal_pending(current))
  1191. break;
  1192. set_current_state(TASK_INTERRUPTIBLE);
  1193. }
  1194. if (dev->queues)
  1195. remove_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait);
  1196. dev->aif_thread = 0;
  1197. complete_and_exit(&dev->aif_completion, 0);
  1198. return 0;
  1199. }