head.S 5.0 KB

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  1. /*****************************************************************************/
  2. /*
  3. * head.S -- common startup code for ColdFire CPUs.
  4. *
  5. * (C) Copyright 1999-2006, Greg Ungerer <gerg@snapgear.com>.
  6. */
  7. /*****************************************************************************/
  8. #include <linux/config.h>
  9. #include <linux/sys.h>
  10. #include <linux/linkage.h>
  11. #include <asm/asm-offsets.h>
  12. #include <asm/coldfire.h>
  13. #include <asm/mcfcache.h>
  14. #include <asm/mcfsim.h>
  15. /*****************************************************************************/
  16. /*
  17. * If we don't have a fixed memory size, then lets build in code
  18. * to auto detect the DRAM size. Obviously this is the prefered
  19. * method, and should work for most boards. It won't work for those
  20. * that do not have their RAM starting at address 0, and it only
  21. * works on SDRAM (not boards fitted with SRAM).
  22. */
  23. #if CONFIG_RAMSIZE != 0
  24. .macro GET_MEM_SIZE
  25. movel #CONFIG_RAMSIZE,%d0 /* hard coded memory size */
  26. .endm
  27. #elif defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \
  28. defined(CONFIG_M5249) || defined(CONFIG_M527x) || \
  29. defined(CONFIG_M528x) || defined(CONFIG_M5307) || \
  30. defined(CONFIG_M5407)
  31. /*
  32. * Not all these devices have exactly the same DRAM controller,
  33. * but the DCMR register is virtually identical - give or take
  34. * a couple of bits. The only exception is the 5272 devices, their
  35. * DRAM controller is quite different.
  36. */
  37. .macro GET_MEM_SIZE
  38. movel MCF_MBAR+MCFSIM_DMR0,%d0 /* get mask for 1st bank */
  39. btst #0,%d0 /* check if region enabled */
  40. beq 1f
  41. andl #0xfffc0000,%d0
  42. beq 1f
  43. addl #0x00040000,%d0 /* convert mask to size */
  44. 1:
  45. movel MCF_MBAR+MCFSIM_DMR1,%d1 /* get mask for 2nd bank */
  46. btst #0,%d1 /* check if region enabled */
  47. beq 2f
  48. andl #0xfffc0000, %d1
  49. beq 2f
  50. addl #0x00040000,%d1
  51. addl %d1,%d0 /* total mem size in d0 */
  52. 2:
  53. .endm
  54. #elif defined(CONFIG_M5272)
  55. .macro GET_MEM_SIZE
  56. movel MCF_MBAR+MCFSIM_CSOR7,%d0 /* get SDRAM address mask */
  57. andil #0xfffff000,%d0 /* mask out chip select options */
  58. negl %d0 /* negate bits */
  59. .endm
  60. #else
  61. #error "ERROR: I don't know how to probe your boards memory size?"
  62. #endif
  63. /*****************************************************************************/
  64. /*
  65. * Boards and platforms can do specific early hardware setup if
  66. * they need to. Most don't need this, define away if not required.
  67. */
  68. #ifndef PLATFORM_SETUP
  69. #define PLATFORM_SETUP
  70. #endif
  71. /*****************************************************************************/
  72. .global _start
  73. .global _rambase
  74. .global _ramvec
  75. .global _ramstart
  76. .global _ramend
  77. /*****************************************************************************/
  78. .data
  79. /*
  80. * During startup we store away the RAM setup. These are not in the
  81. * bss, since their values are determined and written before the bss
  82. * has been cleared.
  83. */
  84. _rambase:
  85. .long 0
  86. _ramvec:
  87. .long 0
  88. _ramstart:
  89. .long 0
  90. _ramend:
  91. .long 0
  92. /*****************************************************************************/
  93. .text
  94. /*
  95. * This is the codes first entry point. This is where it all
  96. * begins...
  97. */
  98. _start:
  99. nop /* filler */
  100. movew #0x2700, %sr /* no interrupts */
  101. /*
  102. * Do any platform or board specific setup now. Most boards
  103. * don't need anything. Those exceptions are define this in
  104. * their board specific includes.
  105. */
  106. PLATFORM_SETUP
  107. /*
  108. * Create basic memory configuration. Set VBR accordingly,
  109. * and size memory.
  110. */
  111. movel #CONFIG_VECTORBASE,%a7
  112. movec %a7,%VBR /* set vectors addr */
  113. movel %a7,_ramvec
  114. movel #CONFIG_RAMBASE,%a7 /* mark the base of RAM */
  115. movel %a7,_rambase
  116. GET_MEM_SIZE /* macro code determines size */
  117. addl %a7,%d0
  118. movel %d0,_ramend /* set end ram addr */
  119. /*
  120. * Now that we know what the memory is, lets enable cache
  121. * and get things moving. This is Coldfire CPU specific.
  122. */
  123. CACHE_ENABLE /* enable CPU cache */
  124. #ifdef CONFIG_ROMFS_FS
  125. /*
  126. * Move ROM filesystem above bss :-)
  127. */
  128. lea _sbss,%a0 /* get start of bss */
  129. lea _ebss,%a1 /* set up destination */
  130. movel %a0,%a2 /* copy of bss start */
  131. movel 8(%a0),%d0 /* get size of ROMFS */
  132. addql #8,%d0 /* allow for rounding */
  133. andl #0xfffffffc, %d0 /* whole words */
  134. addl %d0,%a0 /* copy from end */
  135. addl %d0,%a1 /* copy from end */
  136. movel %a1,_ramstart /* set start of ram */
  137. _copy_romfs:
  138. movel -(%a0),%d0 /* copy dword */
  139. movel %d0,-(%a1)
  140. cmpl %a0,%a2 /* check if at end */
  141. bne _copy_romfs
  142. #else /* CONFIG_ROMFS_FS */
  143. lea _ebss,%a1
  144. movel %a1,_ramstart
  145. #endif /* CONFIG_ROMFS_FS */
  146. /*
  147. * Zero out the bss region.
  148. */
  149. lea _sbss,%a0 /* get start of bss */
  150. lea _ebss,%a1 /* get end of bss */
  151. clrl %d0 /* set value */
  152. _clear_bss:
  153. movel %d0,(%a0)+ /* clear each word */
  154. cmpl %a0,%a1 /* check if at end */
  155. bne _clear_bss
  156. /*
  157. * Load the current task pointer and stack.
  158. */
  159. lea init_thread_union,%a0
  160. lea THREAD_SIZE(%a0),%sp
  161. /*
  162. * Assember start up done, start code proper.
  163. */
  164. jsr start_kernel /* start Linux kernel */
  165. _exit:
  166. jmp _exit /* should never get here */
  167. /*****************************************************************************/