f71882fg.c 55 KB

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  1. /***************************************************************************
  2. * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> *
  3. * Copyright (C) 2007,2008 by Hans de Goede <hdegoede@redhat.com> *
  4. * *
  5. * This program is free software; you can redistribute it and/or modify *
  6. * it under the terms of the GNU General Public License as published by *
  7. * the Free Software Foundation; either version 2 of the License, or *
  8. * (at your option) any later version. *
  9. * *
  10. * This program is distributed in the hope that it will be useful, *
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  13. * GNU General Public License for more details. *
  14. * *
  15. * You should have received a copy of the GNU General Public License *
  16. * along with this program; if not, write to the *
  17. * Free Software Foundation, Inc., *
  18. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
  19. ***************************************************************************/
  20. #include <linux/module.h>
  21. #include <linux/init.h>
  22. #include <linux/slab.h>
  23. #include <linux/jiffies.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/hwmon.h>
  26. #include <linux/hwmon-sysfs.h>
  27. #include <linux/err.h>
  28. #include <linux/mutex.h>
  29. #include <linux/io.h>
  30. #define DRVNAME "f71882fg"
  31. #define SIO_F71882FG_LD_HWM 0x04 /* Hardware monitor logical device */
  32. #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
  33. #define SIO_LOCK_KEY 0xAA /* Key to diasble Super-I/O */
  34. #define SIO_REG_LDSEL 0x07 /* Logical device select */
  35. #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
  36. #define SIO_REG_DEVREV 0x22 /* Device revision */
  37. #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
  38. #define SIO_REG_ENABLE 0x30 /* Logical device enable */
  39. #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
  40. #define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
  41. #define SIO_F71862_ID 0x0601 /* Chipset ID */
  42. #define SIO_F71882_ID 0x0541 /* Chipset ID */
  43. #define REGION_LENGTH 8
  44. #define ADDR_REG_OFFSET 5
  45. #define DATA_REG_OFFSET 6
  46. #define F71882FG_REG_PECI 0x0A
  47. #define F71882FG_REG_IN_STATUS 0x12 /* f71882fg only */
  48. #define F71882FG_REG_IN_BEEP 0x13 /* f71882fg only */
  49. #define F71882FG_REG_IN(nr) (0x20 + (nr))
  50. #define F71882FG_REG_IN1_HIGH 0x32 /* f71882fg only */
  51. #define F71882FG_REG_FAN(nr) (0xA0 + (16 * (nr)))
  52. #define F71882FG_REG_FAN_TARGET(nr) (0xA2 + (16 * (nr)))
  53. #define F71882FG_REG_FAN_FULL_SPEED(nr) (0xA4 + (16 * (nr)))
  54. #define F71882FG_REG_FAN_STATUS 0x92
  55. #define F71882FG_REG_FAN_BEEP 0x93
  56. #define F71882FG_REG_TEMP(nr) (0x70 + 2 * (nr))
  57. #define F71882FG_REG_TEMP_OVT(nr) (0x80 + 2 * (nr))
  58. #define F71882FG_REG_TEMP_HIGH(nr) (0x81 + 2 * (nr))
  59. #define F71882FG_REG_TEMP_STATUS 0x62
  60. #define F71882FG_REG_TEMP_BEEP 0x63
  61. #define F71882FG_REG_TEMP_HYST(nr) (0x6C + (nr))
  62. #define F71882FG_REG_TEMP_TYPE 0x6B
  63. #define F71882FG_REG_TEMP_DIODE_OPEN 0x6F
  64. #define F71882FG_REG_PWM(nr) (0xA3 + (16 * (nr)))
  65. #define F71882FG_REG_PWM_TYPE 0x94
  66. #define F71882FG_REG_PWM_ENABLE 0x96
  67. #define F71882FG_REG_FAN_HYST(nr) (0x98 + (nr))
  68. #define F71882FG_REG_POINT_PWM(pwm, point) (0xAA + (point) + (16 * (pwm)))
  69. #define F71882FG_REG_POINT_TEMP(pwm, point) (0xA6 + (point) + (16 * (pwm)))
  70. #define F71882FG_REG_POINT_MAPPING(nr) (0xAF + 16 * (nr))
  71. #define F71882FG_REG_START 0x01
  72. #define FAN_MIN_DETECT 366 /* Lowest detectable fanspeed */
  73. static unsigned short force_id;
  74. module_param(force_id, ushort, 0);
  75. MODULE_PARM_DESC(force_id, "Override the detected device ID");
  76. static int fan_mode[4] = { 0, 0, 0, 0 };
  77. module_param_array(fan_mode, int, NULL, 0644);
  78. MODULE_PARM_DESC(fan_mode, "List of fan control modes (f71882fg only) "
  79. "(0=don't change, 1=pwm, 2=rpm)\n"
  80. "Note: this needs a write to pwm#_enable to take effect");
  81. enum chips { f71862fg, f71882fg };
  82. static const char *f71882fg_names[] = {
  83. "f71862fg",
  84. "f71882fg",
  85. };
  86. static struct platform_device *f71882fg_pdev;
  87. /* Super-I/O Function prototypes */
  88. static inline int superio_inb(int base, int reg);
  89. static inline int superio_inw(int base, int reg);
  90. static inline void superio_enter(int base);
  91. static inline void superio_select(int base, int ld);
  92. static inline void superio_exit(int base);
  93. struct f71882fg_sio_data {
  94. enum chips type;
  95. };
  96. struct f71882fg_data {
  97. unsigned short addr;
  98. enum chips type;
  99. struct device *hwmon_dev;
  100. struct mutex update_lock;
  101. char valid; /* !=0 if following fields are valid */
  102. unsigned long last_updated; /* In jiffies */
  103. unsigned long last_limits; /* In jiffies */
  104. /* Register Values */
  105. u8 in[9];
  106. u8 in1_max;
  107. u8 in_status;
  108. u8 in_beep;
  109. u16 fan[4];
  110. u16 fan_target[4];
  111. u16 fan_full_speed[4];
  112. u8 fan_status;
  113. u8 fan_beep;
  114. /* Note: all models have only 3 temperature channels, but on some
  115. they are addressed as 0-2 and on others as 1-3, so for coding
  116. convenience we reserve space for 4 channels */
  117. u8 temp[4];
  118. u8 temp_ovt[4];
  119. u8 temp_high[4];
  120. u8 temp_hyst[2]; /* 2 hysts stored per reg */
  121. u8 temp_type[4];
  122. u8 temp_status;
  123. u8 temp_beep;
  124. u8 temp_diode_open;
  125. u8 pwm[4];
  126. u8 pwm_enable;
  127. u8 pwm_auto_point_hyst[2];
  128. u8 pwm_auto_point_mapping[4];
  129. u8 pwm_auto_point_pwm[4][5];
  130. u8 pwm_auto_point_temp[4][4];
  131. };
  132. /* Sysfs in */
  133. static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
  134. char *buf);
  135. static ssize_t show_in_max(struct device *dev, struct device_attribute
  136. *devattr, char *buf);
  137. static ssize_t store_in_max(struct device *dev, struct device_attribute
  138. *devattr, const char *buf, size_t count);
  139. static ssize_t show_in_beep(struct device *dev, struct device_attribute
  140. *devattr, char *buf);
  141. static ssize_t store_in_beep(struct device *dev, struct device_attribute
  142. *devattr, const char *buf, size_t count);
  143. static ssize_t show_in_alarm(struct device *dev, struct device_attribute
  144. *devattr, char *buf);
  145. /* Sysfs Fan */
  146. static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
  147. char *buf);
  148. static ssize_t show_fan_full_speed(struct device *dev,
  149. struct device_attribute *devattr, char *buf);
  150. static ssize_t store_fan_full_speed(struct device *dev,
  151. struct device_attribute *devattr, const char *buf, size_t count);
  152. static ssize_t show_fan_beep(struct device *dev, struct device_attribute
  153. *devattr, char *buf);
  154. static ssize_t store_fan_beep(struct device *dev, struct device_attribute
  155. *devattr, const char *buf, size_t count);
  156. static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
  157. *devattr, char *buf);
  158. /* Sysfs Temp */
  159. static ssize_t show_temp(struct device *dev, struct device_attribute
  160. *devattr, char *buf);
  161. static ssize_t show_temp_max(struct device *dev, struct device_attribute
  162. *devattr, char *buf);
  163. static ssize_t store_temp_max(struct device *dev, struct device_attribute
  164. *devattr, const char *buf, size_t count);
  165. static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute
  166. *devattr, char *buf);
  167. static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute
  168. *devattr, const char *buf, size_t count);
  169. static ssize_t show_temp_crit(struct device *dev, struct device_attribute
  170. *devattr, char *buf);
  171. static ssize_t store_temp_crit(struct device *dev, struct device_attribute
  172. *devattr, const char *buf, size_t count);
  173. static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute
  174. *devattr, char *buf);
  175. static ssize_t show_temp_type(struct device *dev, struct device_attribute
  176. *devattr, char *buf);
  177. static ssize_t show_temp_beep(struct device *dev, struct device_attribute
  178. *devattr, char *buf);
  179. static ssize_t store_temp_beep(struct device *dev, struct device_attribute
  180. *devattr, const char *buf, size_t count);
  181. static ssize_t show_temp_alarm(struct device *dev, struct device_attribute
  182. *devattr, char *buf);
  183. static ssize_t show_temp_fault(struct device *dev, struct device_attribute
  184. *devattr, char *buf);
  185. /* PWM and Auto point control */
  186. static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr,
  187. char *buf);
  188. static ssize_t store_pwm(struct device *dev, struct device_attribute *devattr,
  189. const char *buf, size_t count);
  190. static ssize_t show_pwm_enable(struct device *dev,
  191. struct device_attribute *devattr, char *buf);
  192. static ssize_t store_pwm_enable(struct device *dev,
  193. struct device_attribute *devattr, const char *buf, size_t count);
  194. static ssize_t show_pwm_interpolate(struct device *dev,
  195. struct device_attribute *devattr, char *buf);
  196. static ssize_t store_pwm_interpolate(struct device *dev,
  197. struct device_attribute *devattr, const char *buf, size_t count);
  198. static ssize_t show_pwm_auto_point_channel(struct device *dev,
  199. struct device_attribute *devattr, char *buf);
  200. static ssize_t store_pwm_auto_point_channel(struct device *dev,
  201. struct device_attribute *devattr, const char *buf, size_t count);
  202. static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev,
  203. struct device_attribute *devattr, char *buf);
  204. static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev,
  205. struct device_attribute *devattr, const char *buf, size_t count);
  206. static ssize_t show_pwm_auto_point_pwm(struct device *dev,
  207. struct device_attribute *devattr, char *buf);
  208. static ssize_t store_pwm_auto_point_pwm(struct device *dev,
  209. struct device_attribute *devattr, const char *buf, size_t count);
  210. static ssize_t show_pwm_auto_point_temp(struct device *dev,
  211. struct device_attribute *devattr, char *buf);
  212. static ssize_t store_pwm_auto_point_temp(struct device *dev,
  213. struct device_attribute *devattr, const char *buf, size_t count);
  214. /* Sysfs misc */
  215. static ssize_t show_name(struct device *dev, struct device_attribute *devattr,
  216. char *buf);
  217. static int __devinit f71882fg_probe(struct platform_device * pdev);
  218. static int f71882fg_remove(struct platform_device *pdev);
  219. static struct platform_driver f71882fg_driver = {
  220. .driver = {
  221. .owner = THIS_MODULE,
  222. .name = DRVNAME,
  223. },
  224. .probe = f71882fg_probe,
  225. .remove = __devexit_p(f71882fg_remove),
  226. };
  227. static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
  228. static struct sensor_device_attribute_2 f718x2fg_in_temp_attr[] = {
  229. SENSOR_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0),
  230. SENSOR_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 0, 1),
  231. SENSOR_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 0, 2),
  232. SENSOR_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 0, 3),
  233. SENSOR_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 0, 4),
  234. SENSOR_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 0, 5),
  235. SENSOR_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 0, 6),
  236. SENSOR_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 0, 7),
  237. SENSOR_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 0, 8),
  238. SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 1),
  239. SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
  240. store_temp_max, 0, 1),
  241. SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  242. store_temp_max_hyst, 0, 1),
  243. SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  244. store_temp_crit, 0, 1),
  245. SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  246. 0, 1),
  247. SENSOR_ATTR_2(temp1_type, S_IRUGO, show_temp_type, NULL, 0, 1),
  248. SENSOR_ATTR_2(temp1_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  249. store_temp_beep, 0, 1),
  250. SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
  251. SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
  252. SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 2),
  253. SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
  254. store_temp_max, 0, 2),
  255. SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  256. store_temp_max_hyst, 0, 2),
  257. SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  258. store_temp_crit, 0, 2),
  259. SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  260. 0, 2),
  261. SENSOR_ATTR_2(temp2_type, S_IRUGO, show_temp_type, NULL, 0, 2),
  262. SENSOR_ATTR_2(temp2_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  263. store_temp_beep, 0, 2),
  264. SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
  265. SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
  266. SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 3),
  267. SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
  268. store_temp_max, 0, 3),
  269. SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  270. store_temp_max_hyst, 0, 3),
  271. SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  272. store_temp_crit, 0, 3),
  273. SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  274. 0, 3),
  275. SENSOR_ATTR_2(temp3_type, S_IRUGO, show_temp_type, NULL, 0, 3),
  276. SENSOR_ATTR_2(temp3_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  277. store_temp_beep, 0, 3),
  278. SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 3),
  279. SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 3),
  280. };
  281. static struct sensor_device_attribute_2 f71882fg_in_temp_attr[] = {
  282. SENSOR_ATTR_2(in1_max, S_IRUGO|S_IWUSR, show_in_max, store_in_max,
  283. 0, 1),
  284. SENSOR_ATTR_2(in1_beep, S_IRUGO|S_IWUSR, show_in_beep, store_in_beep,
  285. 0, 1),
  286. SENSOR_ATTR_2(in1_alarm, S_IRUGO, show_in_alarm, NULL, 0, 1),
  287. };
  288. static struct sensor_device_attribute_2 f718x2fg_fan_attr[] = {
  289. SENSOR_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0),
  290. SENSOR_ATTR_2(fan1_full_speed, S_IRUGO|S_IWUSR,
  291. show_fan_full_speed,
  292. store_fan_full_speed, 0, 0),
  293. SENSOR_ATTR_2(fan1_beep, S_IRUGO|S_IWUSR, show_fan_beep,
  294. store_fan_beep, 0, 0),
  295. SENSOR_ATTR_2(fan1_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 0),
  296. SENSOR_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 0, 1),
  297. SENSOR_ATTR_2(fan2_full_speed, S_IRUGO|S_IWUSR,
  298. show_fan_full_speed,
  299. store_fan_full_speed, 0, 1),
  300. SENSOR_ATTR_2(fan2_beep, S_IRUGO|S_IWUSR, show_fan_beep,
  301. store_fan_beep, 0, 1),
  302. SENSOR_ATTR_2(fan2_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 1),
  303. SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2),
  304. SENSOR_ATTR_2(fan3_full_speed, S_IRUGO|S_IWUSR,
  305. show_fan_full_speed,
  306. store_fan_full_speed, 0, 2),
  307. SENSOR_ATTR_2(fan3_beep, S_IRUGO|S_IWUSR, show_fan_beep,
  308. store_fan_beep, 0, 2),
  309. SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2),
  310. SENSOR_ATTR_2(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 0),
  311. SENSOR_ATTR_2(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  312. store_pwm_enable, 0, 0),
  313. SENSOR_ATTR_2(pwm1_interpolate, S_IRUGO|S_IWUSR,
  314. show_pwm_interpolate, store_pwm_interpolate, 0, 0),
  315. SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
  316. show_pwm_auto_point_channel,
  317. store_pwm_auto_point_channel, 0, 0),
  318. SENSOR_ATTR_2(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 1),
  319. SENSOR_ATTR_2(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  320. store_pwm_enable, 0, 1),
  321. SENSOR_ATTR_2(pwm2_interpolate, S_IRUGO|S_IWUSR,
  322. show_pwm_interpolate, store_pwm_interpolate, 0, 1),
  323. SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
  324. show_pwm_auto_point_channel,
  325. store_pwm_auto_point_channel, 0, 1),
  326. SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 2),
  327. SENSOR_ATTR_2(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  328. store_pwm_enable, 0, 2),
  329. SENSOR_ATTR_2(pwm3_interpolate, S_IRUGO|S_IWUSR,
  330. show_pwm_interpolate, store_pwm_interpolate, 0, 2),
  331. SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
  332. show_pwm_auto_point_channel,
  333. store_pwm_auto_point_channel, 0, 2),
  334. };
  335. static struct sensor_device_attribute_2 f71862fg_fan_attr[] = {
  336. SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
  337. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  338. 1, 0),
  339. SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
  340. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  341. 4, 0),
  342. SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
  343. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  344. 0, 0),
  345. SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
  346. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  347. 3, 0),
  348. SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  349. show_pwm_auto_point_temp_hyst,
  350. store_pwm_auto_point_temp_hyst,
  351. 0, 0),
  352. SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
  353. show_pwm_auto_point_temp_hyst, NULL, 3, 0),
  354. SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
  355. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  356. 1, 1),
  357. SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
  358. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  359. 4, 1),
  360. SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
  361. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  362. 0, 1),
  363. SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
  364. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  365. 3, 1),
  366. SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  367. show_pwm_auto_point_temp_hyst,
  368. store_pwm_auto_point_temp_hyst,
  369. 0, 1),
  370. SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
  371. show_pwm_auto_point_temp_hyst, NULL, 3, 1),
  372. };
  373. static struct sensor_device_attribute_2 f71882fg_fan_attr[] = {
  374. SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
  375. SENSOR_ATTR_2(fan4_full_speed, S_IRUGO|S_IWUSR,
  376. show_fan_full_speed,
  377. store_fan_full_speed, 0, 3),
  378. SENSOR_ATTR_2(fan4_beep, S_IRUGO|S_IWUSR, show_fan_beep,
  379. store_fan_beep, 0, 3),
  380. SENSOR_ATTR_2(fan4_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 3),
  381. SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
  382. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  383. 0, 0),
  384. SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
  385. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  386. 1, 0),
  387. SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR,
  388. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  389. 2, 0),
  390. SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO|S_IWUSR,
  391. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  392. 3, 0),
  393. SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IRUGO|S_IWUSR,
  394. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  395. 4, 0),
  396. SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
  397. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  398. 0, 0),
  399. SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
  400. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  401. 1, 0),
  402. SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IRUGO|S_IWUSR,
  403. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  404. 2, 0),
  405. SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IRUGO|S_IWUSR,
  406. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  407. 3, 0),
  408. SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  409. show_pwm_auto_point_temp_hyst,
  410. store_pwm_auto_point_temp_hyst,
  411. 0, 0),
  412. SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
  413. show_pwm_auto_point_temp_hyst, NULL, 1, 0),
  414. SENSOR_ATTR_2(pwm1_auto_point3_temp_hyst, S_IRUGO,
  415. show_pwm_auto_point_temp_hyst, NULL, 2, 0),
  416. SENSOR_ATTR_2(pwm1_auto_point4_temp_hyst, S_IRUGO,
  417. show_pwm_auto_point_temp_hyst, NULL, 3, 0),
  418. SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
  419. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  420. 0, 1),
  421. SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
  422. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  423. 1, 1),
  424. SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR,
  425. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  426. 2, 1),
  427. SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO|S_IWUSR,
  428. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  429. 3, 1),
  430. SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IRUGO|S_IWUSR,
  431. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  432. 4, 1),
  433. SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
  434. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  435. 0, 1),
  436. SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
  437. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  438. 1, 1),
  439. SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IRUGO|S_IWUSR,
  440. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  441. 2, 1),
  442. SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IRUGO|S_IWUSR,
  443. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  444. 3, 1),
  445. SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  446. show_pwm_auto_point_temp_hyst,
  447. store_pwm_auto_point_temp_hyst,
  448. 0, 1),
  449. SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
  450. show_pwm_auto_point_temp_hyst, NULL, 1, 1),
  451. SENSOR_ATTR_2(pwm2_auto_point3_temp_hyst, S_IRUGO,
  452. show_pwm_auto_point_temp_hyst, NULL, 2, 1),
  453. SENSOR_ATTR_2(pwm2_auto_point4_temp_hyst, S_IRUGO,
  454. show_pwm_auto_point_temp_hyst, NULL, 3, 1),
  455. SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
  456. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  457. 0, 2),
  458. SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
  459. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  460. 1, 2),
  461. SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR,
  462. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  463. 2, 2),
  464. SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO|S_IWUSR,
  465. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  466. 3, 2),
  467. SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IRUGO|S_IWUSR,
  468. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  469. 4, 2),
  470. SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
  471. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  472. 0, 2),
  473. SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
  474. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  475. 1, 2),
  476. SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IRUGO|S_IWUSR,
  477. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  478. 2, 2),
  479. SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IRUGO|S_IWUSR,
  480. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  481. 3, 2),
  482. SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  483. show_pwm_auto_point_temp_hyst,
  484. store_pwm_auto_point_temp_hyst,
  485. 0, 2),
  486. SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
  487. show_pwm_auto_point_temp_hyst, NULL, 1, 2),
  488. SENSOR_ATTR_2(pwm3_auto_point3_temp_hyst, S_IRUGO,
  489. show_pwm_auto_point_temp_hyst, NULL, 2, 2),
  490. SENSOR_ATTR_2(pwm3_auto_point4_temp_hyst, S_IRUGO,
  491. show_pwm_auto_point_temp_hyst, NULL, 3, 2),
  492. SENSOR_ATTR_2(pwm4, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 3),
  493. SENSOR_ATTR_2(pwm4_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  494. store_pwm_enable, 0, 3),
  495. SENSOR_ATTR_2(pwm4_interpolate, S_IRUGO|S_IWUSR,
  496. show_pwm_interpolate, store_pwm_interpolate, 0, 3),
  497. SENSOR_ATTR_2(pwm4_auto_channels_temp, S_IRUGO|S_IWUSR,
  498. show_pwm_auto_point_channel,
  499. store_pwm_auto_point_channel, 0, 3),
  500. SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IRUGO|S_IWUSR,
  501. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  502. 0, 3),
  503. SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IRUGO|S_IWUSR,
  504. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  505. 1, 3),
  506. SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IRUGO|S_IWUSR,
  507. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  508. 2, 3),
  509. SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IRUGO|S_IWUSR,
  510. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  511. 3, 3),
  512. SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IRUGO|S_IWUSR,
  513. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  514. 4, 3),
  515. SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IRUGO|S_IWUSR,
  516. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  517. 0, 3),
  518. SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IRUGO|S_IWUSR,
  519. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  520. 1, 3),
  521. SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IRUGO|S_IWUSR,
  522. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  523. 2, 3),
  524. SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IRUGO|S_IWUSR,
  525. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  526. 3, 3),
  527. SENSOR_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  528. show_pwm_auto_point_temp_hyst,
  529. store_pwm_auto_point_temp_hyst,
  530. 0, 3),
  531. SENSOR_ATTR_2(pwm4_auto_point2_temp_hyst, S_IRUGO,
  532. show_pwm_auto_point_temp_hyst, NULL, 1, 3),
  533. SENSOR_ATTR_2(pwm4_auto_point3_temp_hyst, S_IRUGO,
  534. show_pwm_auto_point_temp_hyst, NULL, 2, 3),
  535. SENSOR_ATTR_2(pwm4_auto_point4_temp_hyst, S_IRUGO,
  536. show_pwm_auto_point_temp_hyst, NULL, 3, 3),
  537. };
  538. /* Super I/O functions */
  539. static inline int superio_inb(int base, int reg)
  540. {
  541. outb(reg, base);
  542. return inb(base + 1);
  543. }
  544. static int superio_inw(int base, int reg)
  545. {
  546. int val;
  547. outb(reg++, base);
  548. val = inb(base + 1) << 8;
  549. outb(reg, base);
  550. val |= inb(base + 1);
  551. return val;
  552. }
  553. static inline void superio_enter(int base)
  554. {
  555. /* according to the datasheet the key must be send twice! */
  556. outb( SIO_UNLOCK_KEY, base);
  557. outb( SIO_UNLOCK_KEY, base);
  558. }
  559. static inline void superio_select( int base, int ld)
  560. {
  561. outb(SIO_REG_LDSEL, base);
  562. outb(ld, base + 1);
  563. }
  564. static inline void superio_exit(int base)
  565. {
  566. outb(SIO_LOCK_KEY, base);
  567. }
  568. static inline u16 fan_from_reg(u16 reg)
  569. {
  570. return reg ? (1500000 / reg) : 0;
  571. }
  572. static inline u16 fan_to_reg(u16 fan)
  573. {
  574. return fan ? (1500000 / fan) : 0;
  575. }
  576. static u8 f71882fg_read8(struct f71882fg_data *data, u8 reg)
  577. {
  578. u8 val;
  579. outb(reg, data->addr + ADDR_REG_OFFSET);
  580. val = inb(data->addr + DATA_REG_OFFSET);
  581. return val;
  582. }
  583. static u16 f71882fg_read16(struct f71882fg_data *data, u8 reg)
  584. {
  585. u16 val;
  586. outb(reg++, data->addr + ADDR_REG_OFFSET);
  587. val = inb(data->addr + DATA_REG_OFFSET) << 8;
  588. outb(reg, data->addr + ADDR_REG_OFFSET);
  589. val |= inb(data->addr + DATA_REG_OFFSET);
  590. return val;
  591. }
  592. static void f71882fg_write8(struct f71882fg_data *data, u8 reg, u8 val)
  593. {
  594. outb(reg, data->addr + ADDR_REG_OFFSET);
  595. outb(val, data->addr + DATA_REG_OFFSET);
  596. }
  597. static void f71882fg_write16(struct f71882fg_data *data, u8 reg, u16 val)
  598. {
  599. outb(reg++, data->addr + ADDR_REG_OFFSET);
  600. outb(val >> 8, data->addr + DATA_REG_OFFSET);
  601. outb(reg, data->addr + ADDR_REG_OFFSET);
  602. outb(val & 255, data->addr + DATA_REG_OFFSET);
  603. }
  604. static struct f71882fg_data *f71882fg_update_device(struct device *dev)
  605. {
  606. struct f71882fg_data *data = dev_get_drvdata(dev);
  607. int nr, reg, reg2;
  608. int nr_fans = (data->type == f71862fg) ? 3 : 4;
  609. mutex_lock(&data->update_lock);
  610. /* Update once every 60 seconds */
  611. if ( time_after(jiffies, data->last_limits + 60 * HZ ) ||
  612. !data->valid) {
  613. if (data->type == f71882fg) {
  614. data->in1_max =
  615. f71882fg_read8(data, F71882FG_REG_IN1_HIGH);
  616. data->in_beep =
  617. f71882fg_read8(data, F71882FG_REG_IN_BEEP);
  618. }
  619. /* Get High & boundary temps*/
  620. for (nr = 1; nr < 4; nr++) {
  621. data->temp_ovt[nr] = f71882fg_read8(data,
  622. F71882FG_REG_TEMP_OVT(nr));
  623. data->temp_high[nr] = f71882fg_read8(data,
  624. F71882FG_REG_TEMP_HIGH(nr));
  625. }
  626. /* hyst */
  627. data->temp_hyst[0] =
  628. f71882fg_read8(data, F71882FG_REG_TEMP_HYST(0));
  629. data->temp_hyst[1] =
  630. f71882fg_read8(data, F71882FG_REG_TEMP_HYST(1));
  631. /* Have to hardcode type, because temp1 is special */
  632. reg = f71882fg_read8(data, F71882FG_REG_TEMP_TYPE);
  633. reg2 = f71882fg_read8(data, F71882FG_REG_PECI);
  634. if ((reg2 & 0x03) == 0x01)
  635. data->temp_type[1] = 6 /* PECI */;
  636. else if ((reg2 & 0x03) == 0x02)
  637. data->temp_type[1] = 5 /* AMDSI */;
  638. else
  639. data->temp_type[1] = (reg & 0x02) ? 2 : 4;
  640. data->temp_type[2] = (reg & 0x04) ? 2 : 4;
  641. data->temp_type[3] = (reg & 0x08) ? 2 : 4;
  642. data->temp_beep = f71882fg_read8(data, F71882FG_REG_TEMP_BEEP);
  643. data->fan_beep = f71882fg_read8(data, F71882FG_REG_FAN_BEEP);
  644. data->pwm_enable = f71882fg_read8(data,
  645. F71882FG_REG_PWM_ENABLE);
  646. data->pwm_auto_point_hyst[0] =
  647. f71882fg_read8(data, F71882FG_REG_FAN_HYST(0));
  648. data->pwm_auto_point_hyst[1] =
  649. f71882fg_read8(data, F71882FG_REG_FAN_HYST(1));
  650. for (nr = 0; nr < nr_fans; nr++) {
  651. data->pwm_auto_point_mapping[nr] =
  652. f71882fg_read8(data,
  653. F71882FG_REG_POINT_MAPPING(nr));
  654. if (data->type == f71882fg) {
  655. int point;
  656. for (point = 0; point < 5; point++) {
  657. data->pwm_auto_point_pwm[nr][point] =
  658. f71882fg_read8(data,
  659. F71882FG_REG_POINT_PWM
  660. (nr, point));
  661. }
  662. for (point = 0; point < 4; point++) {
  663. data->pwm_auto_point_temp[nr][point] =
  664. f71882fg_read8(data,
  665. F71882FG_REG_POINT_TEMP
  666. (nr, point));
  667. }
  668. } else {
  669. data->pwm_auto_point_pwm[nr][1] =
  670. f71882fg_read8(data,
  671. F71882FG_REG_POINT_PWM
  672. (nr, 1));
  673. data->pwm_auto_point_pwm[nr][4] =
  674. f71882fg_read8(data,
  675. F71882FG_REG_POINT_PWM
  676. (nr, 4));
  677. data->pwm_auto_point_temp[nr][0] =
  678. f71882fg_read8(data,
  679. F71882FG_REG_POINT_TEMP
  680. (nr, 0));
  681. data->pwm_auto_point_temp[nr][3] =
  682. f71882fg_read8(data,
  683. F71882FG_REG_POINT_TEMP
  684. (nr, 3));
  685. }
  686. }
  687. data->last_limits = jiffies;
  688. }
  689. /* Update every second */
  690. if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
  691. data->temp_status = f71882fg_read8(data,
  692. F71882FG_REG_TEMP_STATUS);
  693. data->temp_diode_open = f71882fg_read8(data,
  694. F71882FG_REG_TEMP_DIODE_OPEN);
  695. for (nr = 1; nr < 4; nr++)
  696. data->temp[nr] = f71882fg_read8(data,
  697. F71882FG_REG_TEMP(nr));
  698. data->fan_status = f71882fg_read8(data,
  699. F71882FG_REG_FAN_STATUS);
  700. for (nr = 0; nr < nr_fans; nr++) {
  701. data->fan[nr] = f71882fg_read16(data,
  702. F71882FG_REG_FAN(nr));
  703. data->fan_target[nr] =
  704. f71882fg_read16(data, F71882FG_REG_FAN_TARGET(nr));
  705. data->fan_full_speed[nr] =
  706. f71882fg_read16(data,
  707. F71882FG_REG_FAN_FULL_SPEED(nr));
  708. data->pwm[nr] =
  709. f71882fg_read8(data, F71882FG_REG_PWM(nr));
  710. }
  711. if (data->type == f71882fg)
  712. data->in_status = f71882fg_read8(data,
  713. F71882FG_REG_IN_STATUS);
  714. for (nr = 0; nr < 9; nr++)
  715. data->in[nr] = f71882fg_read8(data,
  716. F71882FG_REG_IN(nr));
  717. data->last_updated = jiffies;
  718. data->valid = 1;
  719. }
  720. mutex_unlock(&data->update_lock);
  721. return data;
  722. }
  723. /* Sysfs Interface */
  724. static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
  725. char *buf)
  726. {
  727. struct f71882fg_data *data = f71882fg_update_device(dev);
  728. int nr = to_sensor_dev_attr_2(devattr)->index;
  729. int speed = fan_from_reg(data->fan[nr]);
  730. if (speed == FAN_MIN_DETECT)
  731. speed = 0;
  732. return sprintf(buf, "%d\n", speed);
  733. }
  734. static ssize_t show_fan_full_speed(struct device *dev,
  735. struct device_attribute *devattr, char *buf)
  736. {
  737. struct f71882fg_data *data = f71882fg_update_device(dev);
  738. int nr = to_sensor_dev_attr_2(devattr)->index;
  739. int speed = fan_from_reg(data->fan_full_speed[nr]);
  740. return sprintf(buf, "%d\n", speed);
  741. }
  742. static ssize_t store_fan_full_speed(struct device *dev,
  743. struct device_attribute *devattr,
  744. const char *buf, size_t count)
  745. {
  746. struct f71882fg_data *data = dev_get_drvdata(dev);
  747. int nr = to_sensor_dev_attr_2(devattr)->index;
  748. long val = simple_strtol(buf, NULL, 10);
  749. val = SENSORS_LIMIT(val, 23, 1500000);
  750. val = fan_to_reg(val);
  751. mutex_lock(&data->update_lock);
  752. data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
  753. if (data->pwm_enable & (1 << (2 * nr)))
  754. /* PWM mode */
  755. count = -EINVAL;
  756. else {
  757. /* RPM mode */
  758. f71882fg_write16(data, F71882FG_REG_FAN_FULL_SPEED(nr), val);
  759. data->fan_full_speed[nr] = val;
  760. }
  761. mutex_unlock(&data->update_lock);
  762. return count;
  763. }
  764. static ssize_t show_fan_beep(struct device *dev, struct device_attribute
  765. *devattr, char *buf)
  766. {
  767. struct f71882fg_data *data = f71882fg_update_device(dev);
  768. int nr = to_sensor_dev_attr_2(devattr)->index;
  769. if (data->fan_beep & (1 << nr))
  770. return sprintf(buf, "1\n");
  771. else
  772. return sprintf(buf, "0\n");
  773. }
  774. static ssize_t store_fan_beep(struct device *dev, struct device_attribute
  775. *devattr, const char *buf, size_t count)
  776. {
  777. struct f71882fg_data *data = dev_get_drvdata(dev);
  778. int nr = to_sensor_dev_attr_2(devattr)->index;
  779. unsigned long val = simple_strtoul(buf, NULL, 10);
  780. mutex_lock(&data->update_lock);
  781. data->fan_beep = f71882fg_read8(data, F71882FG_REG_FAN_BEEP);
  782. if (val)
  783. data->fan_beep |= 1 << nr;
  784. else
  785. data->fan_beep &= ~(1 << nr);
  786. f71882fg_write8(data, F71882FG_REG_FAN_BEEP, data->fan_beep);
  787. mutex_unlock(&data->update_lock);
  788. return count;
  789. }
  790. static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
  791. *devattr, char *buf)
  792. {
  793. struct f71882fg_data *data = f71882fg_update_device(dev);
  794. int nr = to_sensor_dev_attr_2(devattr)->index;
  795. if (data->fan_status & (1 << nr))
  796. return sprintf(buf, "1\n");
  797. else
  798. return sprintf(buf, "0\n");
  799. }
  800. static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
  801. char *buf)
  802. {
  803. struct f71882fg_data *data = f71882fg_update_device(dev);
  804. int nr = to_sensor_dev_attr_2(devattr)->index;
  805. return sprintf(buf, "%d\n", data->in[nr] * 8);
  806. }
  807. static ssize_t show_in_max(struct device *dev, struct device_attribute
  808. *devattr, char *buf)
  809. {
  810. struct f71882fg_data *data = f71882fg_update_device(dev);
  811. return sprintf(buf, "%d\n", data->in1_max * 8);
  812. }
  813. static ssize_t store_in_max(struct device *dev, struct device_attribute
  814. *devattr, const char *buf, size_t count)
  815. {
  816. struct f71882fg_data *data = dev_get_drvdata(dev);
  817. long val = simple_strtol(buf, NULL, 10) / 8;
  818. val = SENSORS_LIMIT(val, 0, 255);
  819. mutex_lock(&data->update_lock);
  820. f71882fg_write8(data, F71882FG_REG_IN1_HIGH, val);
  821. data->in1_max = val;
  822. mutex_unlock(&data->update_lock);
  823. return count;
  824. }
  825. static ssize_t show_in_beep(struct device *dev, struct device_attribute
  826. *devattr, char *buf)
  827. {
  828. struct f71882fg_data *data = f71882fg_update_device(dev);
  829. int nr = to_sensor_dev_attr_2(devattr)->index;
  830. if (data->in_beep & (1 << nr))
  831. return sprintf(buf, "1\n");
  832. else
  833. return sprintf(buf, "0\n");
  834. }
  835. static ssize_t store_in_beep(struct device *dev, struct device_attribute
  836. *devattr, const char *buf, size_t count)
  837. {
  838. struct f71882fg_data *data = dev_get_drvdata(dev);
  839. int nr = to_sensor_dev_attr_2(devattr)->index;
  840. unsigned long val = simple_strtoul(buf, NULL, 10);
  841. mutex_lock(&data->update_lock);
  842. data->in_beep = f71882fg_read8(data, F71882FG_REG_IN_BEEP);
  843. if (val)
  844. data->in_beep |= 1 << nr;
  845. else
  846. data->in_beep &= ~(1 << nr);
  847. f71882fg_write8(data, F71882FG_REG_IN_BEEP, data->in_beep);
  848. mutex_unlock(&data->update_lock);
  849. return count;
  850. }
  851. static ssize_t show_in_alarm(struct device *dev, struct device_attribute
  852. *devattr, char *buf)
  853. {
  854. struct f71882fg_data *data = f71882fg_update_device(dev);
  855. int nr = to_sensor_dev_attr_2(devattr)->index;
  856. if (data->in_status & (1 << nr))
  857. return sprintf(buf, "1\n");
  858. else
  859. return sprintf(buf, "0\n");
  860. }
  861. static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
  862. char *buf)
  863. {
  864. struct f71882fg_data *data = f71882fg_update_device(dev);
  865. int nr = to_sensor_dev_attr_2(devattr)->index;
  866. return sprintf(buf, "%d\n", data->temp[nr] * 1000);
  867. }
  868. static ssize_t show_temp_max(struct device *dev, struct device_attribute
  869. *devattr, char *buf)
  870. {
  871. struct f71882fg_data *data = f71882fg_update_device(dev);
  872. int nr = to_sensor_dev_attr_2(devattr)->index;
  873. return sprintf(buf, "%d\n", data->temp_high[nr] * 1000);
  874. }
  875. static ssize_t store_temp_max(struct device *dev, struct device_attribute
  876. *devattr, const char *buf, size_t count)
  877. {
  878. struct f71882fg_data *data = dev_get_drvdata(dev);
  879. int nr = to_sensor_dev_attr_2(devattr)->index;
  880. long val = simple_strtol(buf, NULL, 10) / 1000;
  881. val = SENSORS_LIMIT(val, 0, 255);
  882. mutex_lock(&data->update_lock);
  883. f71882fg_write8(data, F71882FG_REG_TEMP_HIGH(nr), val);
  884. data->temp_high[nr] = val;
  885. mutex_unlock(&data->update_lock);
  886. return count;
  887. }
  888. static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute
  889. *devattr, char *buf)
  890. {
  891. struct f71882fg_data *data = f71882fg_update_device(dev);
  892. int nr = to_sensor_dev_attr_2(devattr)->index;
  893. int temp_max_hyst;
  894. mutex_lock(&data->update_lock);
  895. if (nr & 1)
  896. temp_max_hyst = data->temp_hyst[nr / 2] >> 4;
  897. else
  898. temp_max_hyst = data->temp_hyst[nr / 2] & 0x0f;
  899. temp_max_hyst = (data->temp_high[nr] - temp_max_hyst) * 1000;
  900. mutex_unlock(&data->update_lock);
  901. return sprintf(buf, "%d\n", temp_max_hyst);
  902. }
  903. static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute
  904. *devattr, const char *buf, size_t count)
  905. {
  906. struct f71882fg_data *data = dev_get_drvdata(dev);
  907. int nr = to_sensor_dev_attr_2(devattr)->index;
  908. long val = simple_strtol(buf, NULL, 10) / 1000;
  909. ssize_t ret = count;
  910. u8 reg;
  911. mutex_lock(&data->update_lock);
  912. /* convert abs to relative and check */
  913. data->temp_high[nr] = f71882fg_read8(data, F71882FG_REG_TEMP_HIGH(nr));
  914. val = SENSORS_LIMIT(val, data->temp_high[nr] - 15,
  915. data->temp_high[nr]);
  916. val = data->temp_high[nr] - val;
  917. /* convert value to register contents */
  918. reg = f71882fg_read8(data, F71882FG_REG_TEMP_HYST(nr / 2));
  919. if (nr & 1)
  920. reg = (reg & 0x0f) | (val << 4);
  921. else
  922. reg = (reg & 0xf0) | val;
  923. f71882fg_write8(data, F71882FG_REG_TEMP_HYST(nr / 2), reg);
  924. data->temp_hyst[nr / 2] = reg;
  925. mutex_unlock(&data->update_lock);
  926. return ret;
  927. }
  928. static ssize_t show_temp_crit(struct device *dev, struct device_attribute
  929. *devattr, char *buf)
  930. {
  931. struct f71882fg_data *data = f71882fg_update_device(dev);
  932. int nr = to_sensor_dev_attr_2(devattr)->index;
  933. return sprintf(buf, "%d\n", data->temp_ovt[nr] * 1000);
  934. }
  935. static ssize_t store_temp_crit(struct device *dev, struct device_attribute
  936. *devattr, const char *buf, size_t count)
  937. {
  938. struct f71882fg_data *data = dev_get_drvdata(dev);
  939. int nr = to_sensor_dev_attr_2(devattr)->index;
  940. long val = simple_strtol(buf, NULL, 10) / 1000;
  941. val = SENSORS_LIMIT(val, 0, 255);
  942. mutex_lock(&data->update_lock);
  943. f71882fg_write8(data, F71882FG_REG_TEMP_OVT(nr), val);
  944. data->temp_ovt[nr] = val;
  945. mutex_unlock(&data->update_lock);
  946. return count;
  947. }
  948. static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute
  949. *devattr, char *buf)
  950. {
  951. struct f71882fg_data *data = f71882fg_update_device(dev);
  952. int nr = to_sensor_dev_attr_2(devattr)->index;
  953. int temp_crit_hyst;
  954. mutex_lock(&data->update_lock);
  955. if (nr & 1)
  956. temp_crit_hyst = data->temp_hyst[nr / 2] >> 4;
  957. else
  958. temp_crit_hyst = data->temp_hyst[nr / 2] & 0x0f;
  959. temp_crit_hyst = (data->temp_ovt[nr] - temp_crit_hyst) * 1000;
  960. mutex_unlock(&data->update_lock);
  961. return sprintf(buf, "%d\n", temp_crit_hyst);
  962. }
  963. static ssize_t show_temp_type(struct device *dev, struct device_attribute
  964. *devattr, char *buf)
  965. {
  966. struct f71882fg_data *data = f71882fg_update_device(dev);
  967. int nr = to_sensor_dev_attr_2(devattr)->index;
  968. return sprintf(buf, "%d\n", data->temp_type[nr]);
  969. }
  970. static ssize_t show_temp_beep(struct device *dev, struct device_attribute
  971. *devattr, char *buf)
  972. {
  973. struct f71882fg_data *data = f71882fg_update_device(dev);
  974. int nr = to_sensor_dev_attr_2(devattr)->index;
  975. if (data->temp_beep & (1 << nr))
  976. return sprintf(buf, "1\n");
  977. else
  978. return sprintf(buf, "0\n");
  979. }
  980. static ssize_t store_temp_beep(struct device *dev, struct device_attribute
  981. *devattr, const char *buf, size_t count)
  982. {
  983. struct f71882fg_data *data = dev_get_drvdata(dev);
  984. int nr = to_sensor_dev_attr_2(devattr)->index;
  985. unsigned long val = simple_strtoul(buf, NULL, 10);
  986. mutex_lock(&data->update_lock);
  987. data->temp_beep = f71882fg_read8(data, F71882FG_REG_TEMP_BEEP);
  988. if (val)
  989. data->temp_beep |= 1 << nr;
  990. else
  991. data->temp_beep &= ~(1 << nr);
  992. f71882fg_write8(data, F71882FG_REG_TEMP_BEEP, data->temp_beep);
  993. mutex_unlock(&data->update_lock);
  994. return count;
  995. }
  996. static ssize_t show_temp_alarm(struct device *dev, struct device_attribute
  997. *devattr, char *buf)
  998. {
  999. struct f71882fg_data *data = f71882fg_update_device(dev);
  1000. int nr = to_sensor_dev_attr_2(devattr)->index;
  1001. if (data->temp_status & (1 << nr))
  1002. return sprintf(buf, "1\n");
  1003. else
  1004. return sprintf(buf, "0\n");
  1005. }
  1006. static ssize_t show_temp_fault(struct device *dev, struct device_attribute
  1007. *devattr, char *buf)
  1008. {
  1009. struct f71882fg_data *data = f71882fg_update_device(dev);
  1010. int nr = to_sensor_dev_attr_2(devattr)->index;
  1011. if (data->temp_diode_open & (1 << nr))
  1012. return sprintf(buf, "1\n");
  1013. else
  1014. return sprintf(buf, "0\n");
  1015. }
  1016. static ssize_t show_pwm(struct device *dev,
  1017. struct device_attribute *devattr, char *buf)
  1018. {
  1019. struct f71882fg_data *data = f71882fg_update_device(dev);
  1020. int val, nr = to_sensor_dev_attr_2(devattr)->index;
  1021. mutex_lock(&data->update_lock);
  1022. if (data->pwm_enable & (1 << (2 * nr)))
  1023. /* PWM mode */
  1024. val = data->pwm[nr];
  1025. else {
  1026. /* RPM mode */
  1027. val = 255 * fan_from_reg(data->fan_target[nr])
  1028. / fan_from_reg(data->fan_full_speed[nr]);
  1029. }
  1030. mutex_unlock(&data->update_lock);
  1031. return sprintf(buf, "%d\n", val);
  1032. }
  1033. static ssize_t store_pwm(struct device *dev,
  1034. struct device_attribute *devattr, const char *buf,
  1035. size_t count)
  1036. {
  1037. struct f71882fg_data *data = dev_get_drvdata(dev);
  1038. int nr = to_sensor_dev_attr_2(devattr)->index;
  1039. long val = simple_strtol(buf, NULL, 10);
  1040. val = SENSORS_LIMIT(val, 0, 255);
  1041. mutex_lock(&data->update_lock);
  1042. data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
  1043. if (data->pwm_enable & (1 << (2 * nr))) {
  1044. /* PWM mode */
  1045. f71882fg_write8(data, F71882FG_REG_PWM(nr), val);
  1046. data->pwm[nr] = val;
  1047. } else {
  1048. /* RPM mode */
  1049. int target, full_speed;
  1050. full_speed = f71882fg_read16(data,
  1051. F71882FG_REG_FAN_FULL_SPEED(nr));
  1052. target = fan_to_reg(val * fan_from_reg(full_speed) / 255);
  1053. f71882fg_write16(data, F71882FG_REG_FAN_TARGET(nr), target);
  1054. data->fan_target[nr] = target;
  1055. data->fan_full_speed[nr] = full_speed;
  1056. }
  1057. mutex_unlock(&data->update_lock);
  1058. return count;
  1059. }
  1060. static ssize_t show_pwm_enable(struct device *dev,
  1061. struct device_attribute *devattr, char *buf)
  1062. {
  1063. int result;
  1064. struct f71882fg_data *data = f71882fg_update_device(dev);
  1065. int nr = to_sensor_dev_attr_2(devattr)->index;
  1066. if (data->pwm_enable & (2 << (2 * nr)))
  1067. result = 1;
  1068. else
  1069. result = 2;
  1070. return sprintf(buf, "%d\n", result);
  1071. }
  1072. static ssize_t store_pwm_enable(struct device *dev, struct device_attribute
  1073. *devattr, const char *buf, size_t count)
  1074. {
  1075. struct f71882fg_data *data = dev_get_drvdata(dev);
  1076. int nr = to_sensor_dev_attr_2(devattr)->index;
  1077. long val = simple_strtol(buf, NULL, 10);
  1078. if (val < 1 || val > 2)
  1079. return -EINVAL;
  1080. mutex_lock(&data->update_lock);
  1081. data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
  1082. switch (val) {
  1083. case 1:
  1084. data->pwm_enable |= 2 << (2 * nr);
  1085. break; /* Manual */
  1086. case 2:
  1087. data->pwm_enable &= ~(2 << (2 * nr));
  1088. break; /* Temperature ctrl */
  1089. }
  1090. if (data->type == f71882fg) {
  1091. switch (fan_mode[nr]) {
  1092. case 1:
  1093. data->pwm_enable |= 1 << (2 * nr);
  1094. break; /* Duty cycle mode */
  1095. case 2:
  1096. data->pwm_enable &= ~(1 << (2 * nr));
  1097. break; /* RPM mode */
  1098. }
  1099. }
  1100. f71882fg_write8(data, F71882FG_REG_PWM_ENABLE, data->pwm_enable);
  1101. mutex_unlock(&data->update_lock);
  1102. return count;
  1103. }
  1104. static ssize_t show_pwm_auto_point_pwm(struct device *dev,
  1105. struct device_attribute *devattr,
  1106. char *buf)
  1107. {
  1108. int result;
  1109. struct f71882fg_data *data = f71882fg_update_device(dev);
  1110. int pwm = to_sensor_dev_attr_2(devattr)->index;
  1111. int point = to_sensor_dev_attr_2(devattr)->nr;
  1112. mutex_lock(&data->update_lock);
  1113. if (data->pwm_enable & (1 << (2 * pwm))) {
  1114. /* PWM mode */
  1115. result = data->pwm_auto_point_pwm[pwm][point];
  1116. } else {
  1117. /* RPM mode */
  1118. result = 32 * 255 / (32 + data->pwm_auto_point_pwm[pwm][point]);
  1119. }
  1120. mutex_unlock(&data->update_lock);
  1121. return sprintf(buf, "%d\n", result);
  1122. }
  1123. static ssize_t store_pwm_auto_point_pwm(struct device *dev,
  1124. struct device_attribute *devattr,
  1125. const char *buf, size_t count)
  1126. {
  1127. struct f71882fg_data *data = dev_get_drvdata(dev);
  1128. int pwm = to_sensor_dev_attr_2(devattr)->index;
  1129. int point = to_sensor_dev_attr_2(devattr)->nr;
  1130. long val = simple_strtol(buf, NULL, 10);
  1131. val = SENSORS_LIMIT(val, 0, 255);
  1132. mutex_lock(&data->update_lock);
  1133. data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
  1134. if (data->pwm_enable & (1 << (2 * pwm))) {
  1135. /* PWM mode */
  1136. } else {
  1137. /* RPM mode */
  1138. if (val < 29) /* Prevent negative numbers */
  1139. val = 255;
  1140. else
  1141. val = (255 - val) * 32 / val;
  1142. }
  1143. f71882fg_write8(data, F71882FG_REG_POINT_PWM(pwm, point), val);
  1144. data->pwm_auto_point_pwm[pwm][point] = val;
  1145. mutex_unlock(&data->update_lock);
  1146. return count;
  1147. }
  1148. static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev,
  1149. struct device_attribute *devattr,
  1150. char *buf)
  1151. {
  1152. int result = 0;
  1153. struct f71882fg_data *data = f71882fg_update_device(dev);
  1154. int nr = to_sensor_dev_attr_2(devattr)->index;
  1155. int point = to_sensor_dev_attr_2(devattr)->nr;
  1156. mutex_lock(&data->update_lock);
  1157. if (nr & 1)
  1158. result = data->pwm_auto_point_hyst[nr / 2] >> 4;
  1159. else
  1160. result = data->pwm_auto_point_hyst[nr / 2] & 0x0f;
  1161. result = 1000 * (data->pwm_auto_point_temp[nr][point] - result);
  1162. mutex_unlock(&data->update_lock);
  1163. return sprintf(buf, "%d\n", result);
  1164. }
  1165. static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev,
  1166. struct device_attribute *devattr,
  1167. const char *buf, size_t count)
  1168. {
  1169. struct f71882fg_data *data = dev_get_drvdata(dev);
  1170. int nr = to_sensor_dev_attr_2(devattr)->index;
  1171. int point = to_sensor_dev_attr_2(devattr)->nr;
  1172. long val = simple_strtol(buf, NULL, 10) / 1000;
  1173. u8 reg;
  1174. mutex_lock(&data->update_lock);
  1175. data->pwm_auto_point_temp[nr][point] =
  1176. f71882fg_read8(data, F71882FG_REG_POINT_TEMP(nr, point));
  1177. val = SENSORS_LIMIT(val, data->pwm_auto_point_temp[nr][point] - 15,
  1178. data->pwm_auto_point_temp[nr][point]);
  1179. val = data->pwm_auto_point_temp[nr][point] - val;
  1180. reg = f71882fg_read8(data, F71882FG_REG_FAN_HYST(nr / 2));
  1181. if (nr & 1)
  1182. reg = (reg & 0x0f) | (val << 4);
  1183. else
  1184. reg = (reg & 0xf0) | val;
  1185. f71882fg_write8(data, F71882FG_REG_FAN_HYST(nr / 2), reg);
  1186. data->pwm_auto_point_hyst[nr / 2] = reg;
  1187. mutex_unlock(&data->update_lock);
  1188. return count;
  1189. }
  1190. static ssize_t show_pwm_interpolate(struct device *dev,
  1191. struct device_attribute *devattr, char *buf)
  1192. {
  1193. int result;
  1194. struct f71882fg_data *data = f71882fg_update_device(dev);
  1195. int nr = to_sensor_dev_attr_2(devattr)->index;
  1196. result = (data->pwm_auto_point_mapping[nr] >> 4) & 1;
  1197. return sprintf(buf, "%d\n", result);
  1198. }
  1199. static ssize_t store_pwm_interpolate(struct device *dev,
  1200. struct device_attribute *devattr,
  1201. const char *buf, size_t count)
  1202. {
  1203. struct f71882fg_data *data = dev_get_drvdata(dev);
  1204. int nr = to_sensor_dev_attr_2(devattr)->index;
  1205. unsigned long val = simple_strtoul(buf, NULL, 10);
  1206. mutex_lock(&data->update_lock);
  1207. data->pwm_auto_point_mapping[nr] =
  1208. f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
  1209. if (val)
  1210. val = data->pwm_auto_point_mapping[nr] | (1 << 4);
  1211. else
  1212. val = data->pwm_auto_point_mapping[nr] & (~(1 << 4));
  1213. f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
  1214. data->pwm_auto_point_mapping[nr] = val;
  1215. mutex_unlock(&data->update_lock);
  1216. return count;
  1217. }
  1218. static ssize_t show_pwm_auto_point_channel(struct device *dev,
  1219. struct device_attribute *devattr,
  1220. char *buf)
  1221. {
  1222. int result;
  1223. struct f71882fg_data *data = f71882fg_update_device(dev);
  1224. int nr = to_sensor_dev_attr_2(devattr)->index;
  1225. result = 1 << ((data->pwm_auto_point_mapping[nr] & 3) - 1);
  1226. return sprintf(buf, "%d\n", result);
  1227. }
  1228. static ssize_t store_pwm_auto_point_channel(struct device *dev,
  1229. struct device_attribute *devattr,
  1230. const char *buf, size_t count)
  1231. {
  1232. struct f71882fg_data *data = dev_get_drvdata(dev);
  1233. int nr = to_sensor_dev_attr_2(devattr)->index;
  1234. long val = simple_strtol(buf, NULL, 10);
  1235. switch (val) {
  1236. case 1:
  1237. val = 1;
  1238. break;
  1239. case 2:
  1240. val = 2;
  1241. break;
  1242. case 4:
  1243. val = 3;
  1244. break;
  1245. default:
  1246. return -EINVAL;
  1247. }
  1248. mutex_lock(&data->update_lock);
  1249. data->pwm_auto_point_mapping[nr] =
  1250. f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
  1251. val = (data->pwm_auto_point_mapping[nr] & 0xfc) | val;
  1252. f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
  1253. data->pwm_auto_point_mapping[nr] = val;
  1254. mutex_unlock(&data->update_lock);
  1255. return count;
  1256. }
  1257. static ssize_t show_pwm_auto_point_temp(struct device *dev,
  1258. struct device_attribute *devattr,
  1259. char *buf)
  1260. {
  1261. int result;
  1262. struct f71882fg_data *data = f71882fg_update_device(dev);
  1263. int pwm = to_sensor_dev_attr_2(devattr)->index;
  1264. int point = to_sensor_dev_attr_2(devattr)->nr;
  1265. result = data->pwm_auto_point_temp[pwm][point];
  1266. return sprintf(buf, "%d\n", 1000 * result);
  1267. }
  1268. static ssize_t store_pwm_auto_point_temp(struct device *dev,
  1269. struct device_attribute *devattr,
  1270. const char *buf, size_t count)
  1271. {
  1272. struct f71882fg_data *data = dev_get_drvdata(dev);
  1273. int pwm = to_sensor_dev_attr_2(devattr)->index;
  1274. int point = to_sensor_dev_attr_2(devattr)->nr;
  1275. long val = simple_strtol(buf, NULL, 10) / 1000;
  1276. val = SENSORS_LIMIT(val, 0, 255);
  1277. mutex_lock(&data->update_lock);
  1278. f71882fg_write8(data, F71882FG_REG_POINT_TEMP(pwm, point), val);
  1279. data->pwm_auto_point_temp[pwm][point] = val;
  1280. mutex_unlock(&data->update_lock);
  1281. return count;
  1282. }
  1283. static ssize_t show_name(struct device *dev, struct device_attribute *devattr,
  1284. char *buf)
  1285. {
  1286. struct f71882fg_data *data = dev_get_drvdata(dev);
  1287. return sprintf(buf, "%s\n", f71882fg_names[data->type]);
  1288. }
  1289. static int __devinit f71882fg_create_sysfs_files(struct platform_device *pdev,
  1290. struct sensor_device_attribute_2 *attr, int count)
  1291. {
  1292. int err, i;
  1293. for (i = 0; i < count; i++) {
  1294. err = device_create_file(&pdev->dev, &attr[i].dev_attr);
  1295. if (err)
  1296. return err;
  1297. }
  1298. return 0;
  1299. }
  1300. static int __devinit f71882fg_probe(struct platform_device *pdev)
  1301. {
  1302. struct f71882fg_data *data;
  1303. struct f71882fg_sio_data *sio_data = pdev->dev.platform_data;
  1304. int err;
  1305. u8 start_reg;
  1306. data = kzalloc(sizeof(struct f71882fg_data), GFP_KERNEL);
  1307. if (!data)
  1308. return -ENOMEM;
  1309. data->addr = platform_get_resource(pdev, IORESOURCE_IO, 0)->start;
  1310. data->type = sio_data->type;
  1311. mutex_init(&data->update_lock);
  1312. platform_set_drvdata(pdev, data);
  1313. start_reg = f71882fg_read8(data, F71882FG_REG_START);
  1314. if (start_reg & 0x04) {
  1315. dev_warn(&pdev->dev, "Hardware monitor is powered down\n");
  1316. err = -ENODEV;
  1317. goto exit_free;
  1318. }
  1319. if (!(start_reg & 0x03)) {
  1320. dev_warn(&pdev->dev, "Hardware monitoring not activated\n");
  1321. err = -ENODEV;
  1322. goto exit_free;
  1323. }
  1324. /* If it is a 71862 and the fan / pwm part is enabled sanity check
  1325. the pwm settings */
  1326. if (data->type == f71862fg && (start_reg & 0x02)) {
  1327. u8 reg = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
  1328. if ((reg & 0x15) != 0x15) {
  1329. dev_err(&pdev->dev,
  1330. "Invalid (reserved) pwm settings: 0x%02x\n",
  1331. (unsigned int)reg);
  1332. err = -ENODEV;
  1333. goto exit_free;
  1334. }
  1335. }
  1336. /* Register sysfs interface files */
  1337. err = device_create_file(&pdev->dev, &dev_attr_name);
  1338. if (err)
  1339. goto exit_unregister_sysfs;
  1340. if (start_reg & 0x01) {
  1341. err = f71882fg_create_sysfs_files(pdev, f718x2fg_in_temp_attr,
  1342. ARRAY_SIZE(f718x2fg_in_temp_attr));
  1343. if (err)
  1344. goto exit_unregister_sysfs;
  1345. if (data->type == f71882fg) {
  1346. err = f71882fg_create_sysfs_files(pdev,
  1347. f71882fg_in_temp_attr,
  1348. ARRAY_SIZE(f71882fg_in_temp_attr));
  1349. if (err)
  1350. goto exit_unregister_sysfs;
  1351. }
  1352. }
  1353. if (start_reg & 0x02) {
  1354. err = f71882fg_create_sysfs_files(pdev, f718x2fg_fan_attr,
  1355. ARRAY_SIZE(f718x2fg_fan_attr));
  1356. if (err)
  1357. goto exit_unregister_sysfs;
  1358. if (data->type == f71862fg) {
  1359. err = f71882fg_create_sysfs_files(pdev,
  1360. f71862fg_fan_attr,
  1361. ARRAY_SIZE(f71862fg_fan_attr));
  1362. } else {
  1363. err = f71882fg_create_sysfs_files(pdev,
  1364. f71882fg_fan_attr,
  1365. ARRAY_SIZE(f71882fg_fan_attr));
  1366. }
  1367. if (err)
  1368. goto exit_unregister_sysfs;
  1369. }
  1370. data->hwmon_dev = hwmon_device_register(&pdev->dev);
  1371. if (IS_ERR(data->hwmon_dev)) {
  1372. err = PTR_ERR(data->hwmon_dev);
  1373. data->hwmon_dev = NULL;
  1374. goto exit_unregister_sysfs;
  1375. }
  1376. return 0;
  1377. exit_unregister_sysfs:
  1378. f71882fg_remove(pdev); /* Will unregister the sysfs files for us */
  1379. return err; /* f71882fg_remove() also frees our data */
  1380. exit_free:
  1381. kfree(data);
  1382. return err;
  1383. }
  1384. static int f71882fg_remove(struct platform_device *pdev)
  1385. {
  1386. int i;
  1387. struct f71882fg_data *data = platform_get_drvdata(pdev);
  1388. platform_set_drvdata(pdev, NULL);
  1389. if (data->hwmon_dev)
  1390. hwmon_device_unregister(data->hwmon_dev);
  1391. device_remove_file(&pdev->dev, &dev_attr_name);
  1392. for (i = 0; i < ARRAY_SIZE(f718x2fg_in_temp_attr); i++)
  1393. device_remove_file(&pdev->dev,
  1394. &f718x2fg_in_temp_attr[i].dev_attr);
  1395. for (i = 0; i < ARRAY_SIZE(f71882fg_in_temp_attr); i++)
  1396. device_remove_file(&pdev->dev,
  1397. &f71882fg_in_temp_attr[i].dev_attr);
  1398. for (i = 0; i < ARRAY_SIZE(f718x2fg_fan_attr); i++)
  1399. device_remove_file(&pdev->dev, &f718x2fg_fan_attr[i].dev_attr);
  1400. for (i = 0; i < ARRAY_SIZE(f71862fg_fan_attr); i++)
  1401. device_remove_file(&pdev->dev, &f71862fg_fan_attr[i].dev_attr);
  1402. for (i = 0; i < ARRAY_SIZE(f71882fg_fan_attr); i++)
  1403. device_remove_file(&pdev->dev, &f71882fg_fan_attr[i].dev_attr);
  1404. kfree(data);
  1405. return 0;
  1406. }
  1407. static int __init f71882fg_find(int sioaddr, unsigned short *address,
  1408. struct f71882fg_sio_data *sio_data)
  1409. {
  1410. int err = -ENODEV;
  1411. u16 devid;
  1412. superio_enter(sioaddr);
  1413. devid = superio_inw(sioaddr, SIO_REG_MANID);
  1414. if (devid != SIO_FINTEK_ID) {
  1415. printk(KERN_INFO DRVNAME ": Not a Fintek device\n");
  1416. goto exit;
  1417. }
  1418. devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
  1419. switch (devid) {
  1420. case SIO_F71862_ID:
  1421. sio_data->type = f71862fg;
  1422. break;
  1423. case SIO_F71882_ID:
  1424. sio_data->type = f71882fg;
  1425. break;
  1426. default:
  1427. printk(KERN_INFO DRVNAME ": Unsupported Fintek device\n");
  1428. goto exit;
  1429. }
  1430. superio_select(sioaddr, SIO_F71882FG_LD_HWM);
  1431. if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
  1432. printk(KERN_WARNING DRVNAME ": Device not activated\n");
  1433. goto exit;
  1434. }
  1435. *address = superio_inw(sioaddr, SIO_REG_ADDR);
  1436. if (*address == 0)
  1437. {
  1438. printk(KERN_WARNING DRVNAME ": Base address not set\n");
  1439. goto exit;
  1440. }
  1441. *address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */
  1442. err = 0;
  1443. printk(KERN_INFO DRVNAME ": Found %s chip at %#x, revision %d\n",
  1444. f71882fg_names[sio_data->type], (unsigned int)*address,
  1445. (int)superio_inb(sioaddr, SIO_REG_DEVREV));
  1446. exit:
  1447. superio_exit(sioaddr);
  1448. return err;
  1449. }
  1450. static int __init f71882fg_device_add(unsigned short address,
  1451. const struct f71882fg_sio_data *sio_data)
  1452. {
  1453. struct resource res = {
  1454. .start = address,
  1455. .end = address + REGION_LENGTH - 1,
  1456. .flags = IORESOURCE_IO,
  1457. };
  1458. int err;
  1459. f71882fg_pdev = platform_device_alloc(DRVNAME, address);
  1460. if (!f71882fg_pdev)
  1461. return -ENOMEM;
  1462. res.name = f71882fg_pdev->name;
  1463. err = platform_device_add_resources(f71882fg_pdev, &res, 1);
  1464. if (err) {
  1465. printk(KERN_ERR DRVNAME ": Device resource addition failed\n");
  1466. goto exit_device_put;
  1467. }
  1468. err = platform_device_add_data(f71882fg_pdev, sio_data,
  1469. sizeof(struct f71882fg_sio_data));
  1470. if (err) {
  1471. printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
  1472. goto exit_device_put;
  1473. }
  1474. err = platform_device_add(f71882fg_pdev);
  1475. if (err) {
  1476. printk(KERN_ERR DRVNAME ": Device addition failed\n");
  1477. goto exit_device_put;
  1478. }
  1479. return 0;
  1480. exit_device_put:
  1481. platform_device_put(f71882fg_pdev);
  1482. return err;
  1483. }
  1484. static int __init f71882fg_init(void)
  1485. {
  1486. int err = -ENODEV;
  1487. unsigned short address;
  1488. struct f71882fg_sio_data sio_data;
  1489. memset(&sio_data, 0, sizeof(sio_data));
  1490. if (f71882fg_find(0x2e, &address, &sio_data) &&
  1491. f71882fg_find(0x4e, &address, &sio_data))
  1492. goto exit;
  1493. err = platform_driver_register(&f71882fg_driver);
  1494. if (err)
  1495. goto exit;
  1496. err = f71882fg_device_add(address, &sio_data);
  1497. if (err)
  1498. goto exit_driver;
  1499. return 0;
  1500. exit_driver:
  1501. platform_driver_unregister(&f71882fg_driver);
  1502. exit:
  1503. return err;
  1504. }
  1505. static void __exit f71882fg_exit(void)
  1506. {
  1507. platform_device_unregister(f71882fg_pdev);
  1508. platform_driver_unregister(&f71882fg_driver);
  1509. }
  1510. MODULE_DESCRIPTION("F71882FG Hardware Monitoring Driver");
  1511. MODULE_AUTHOR("Hans Edgington, Hans de Goede (hdegoede@redhat.com)");
  1512. MODULE_LICENSE("GPL");
  1513. module_init(f71882fg_init);
  1514. module_exit(f71882fg_exit);