hpsa.c 109 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952
  1. /*
  2. * Disk Array driver for HP Smart Array SAS controllers
  3. * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12. * NON INFRINGEMENT. See the GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. *
  18. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/types.h>
  24. #include <linux/pci.h>
  25. #include <linux/kernel.h>
  26. #include <linux/slab.h>
  27. #include <linux/delay.h>
  28. #include <linux/fs.h>
  29. #include <linux/timer.h>
  30. #include <linux/seq_file.h>
  31. #include <linux/init.h>
  32. #include <linux/spinlock.h>
  33. #include <linux/smp_lock.h>
  34. #include <linux/compat.h>
  35. #include <linux/blktrace_api.h>
  36. #include <linux/uaccess.h>
  37. #include <linux/io.h>
  38. #include <linux/dma-mapping.h>
  39. #include <linux/completion.h>
  40. #include <linux/moduleparam.h>
  41. #include <scsi/scsi.h>
  42. #include <scsi/scsi_cmnd.h>
  43. #include <scsi/scsi_device.h>
  44. #include <scsi/scsi_host.h>
  45. #include <scsi/scsi_tcq.h>
  46. #include <linux/cciss_ioctl.h>
  47. #include <linux/string.h>
  48. #include <linux/bitmap.h>
  49. #include <asm/atomic.h>
  50. #include <linux/kthread.h>
  51. #include "hpsa_cmd.h"
  52. #include "hpsa.h"
  53. /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  54. #define HPSA_DRIVER_VERSION "2.0.2-1"
  55. #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  56. /* How long to wait (in milliseconds) for board to go into simple mode */
  57. #define MAX_CONFIG_WAIT 30000
  58. #define MAX_IOCTL_CONFIG_WAIT 1000
  59. /*define how many times we will try a command because of bus resets */
  60. #define MAX_CMD_RETRIES 3
  61. /* Embedded module documentation macros - see modules.h */
  62. MODULE_AUTHOR("Hewlett-Packard Company");
  63. MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  64. HPSA_DRIVER_VERSION);
  65. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  66. MODULE_VERSION(HPSA_DRIVER_VERSION);
  67. MODULE_LICENSE("GPL");
  68. static int hpsa_allow_any;
  69. module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  70. MODULE_PARM_DESC(hpsa_allow_any,
  71. "Allow hpsa driver to access unknown HP Smart Array hardware");
  72. /* define the PCI info for the cards we can control */
  73. static const struct pci_device_id hpsa_pci_device_id[] = {
  74. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  75. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  76. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  77. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  78. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  79. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3250},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3251},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3252},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3253},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3254},
  87. #define PCI_DEVICE_ID_HP_CISSF 0x333f
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x333F},
  89. {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  90. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  91. {PCI_VENDOR_ID_COMPAQ, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  92. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  93. {0,}
  94. };
  95. MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
  96. /* board_id = Subsystem Device ID & Vendor ID
  97. * product = Marketing Name for the board
  98. * access = Address of the struct of function pointers
  99. */
  100. static struct board_type products[] = {
  101. {0x3241103C, "Smart Array P212", &SA5_access},
  102. {0x3243103C, "Smart Array P410", &SA5_access},
  103. {0x3245103C, "Smart Array P410i", &SA5_access},
  104. {0x3247103C, "Smart Array P411", &SA5_access},
  105. {0x3249103C, "Smart Array P812", &SA5_access},
  106. {0x324a103C, "Smart Array P712m", &SA5_access},
  107. {0x324b103C, "Smart Array P711m", &SA5_access},
  108. {0x3233103C, "StorageWorks P1210m", &SA5_access},
  109. {0x333F103C, "StorageWorks P1210m", &SA5_access},
  110. {0x3250103C, "Smart Array", &SA5_access},
  111. {0x3250113C, "Smart Array", &SA5_access},
  112. {0x3250123C, "Smart Array", &SA5_access},
  113. {0x3250133C, "Smart Array", &SA5_access},
  114. {0x3250143C, "Smart Array", &SA5_access},
  115. {0xFFFF103C, "Unknown Smart Array", &SA5_access},
  116. };
  117. static int number_of_controllers;
  118. static irqreturn_t do_hpsa_intr(int irq, void *dev_id);
  119. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
  120. static void start_io(struct ctlr_info *h);
  121. #ifdef CONFIG_COMPAT
  122. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
  123. #endif
  124. static void cmd_free(struct ctlr_info *h, struct CommandList *c);
  125. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
  126. static struct CommandList *cmd_alloc(struct ctlr_info *h);
  127. static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
  128. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  129. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  130. int cmd_type);
  131. static int hpsa_scsi_queue_command(struct scsi_cmnd *cmd,
  132. void (*done)(struct scsi_cmnd *));
  133. static void hpsa_scan_start(struct Scsi_Host *);
  134. static int hpsa_scan_finished(struct Scsi_Host *sh,
  135. unsigned long elapsed_time);
  136. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  137. int qdepth, int reason);
  138. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
  139. static int hpsa_slave_alloc(struct scsi_device *sdev);
  140. static void hpsa_slave_destroy(struct scsi_device *sdev);
  141. static ssize_t raid_level_show(struct device *dev,
  142. struct device_attribute *attr, char *buf);
  143. static ssize_t lunid_show(struct device *dev,
  144. struct device_attribute *attr, char *buf);
  145. static ssize_t unique_id_show(struct device *dev,
  146. struct device_attribute *attr, char *buf);
  147. static ssize_t host_show_firmware_revision(struct device *dev,
  148. struct device_attribute *attr, char *buf);
  149. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
  150. static ssize_t host_store_rescan(struct device *dev,
  151. struct device_attribute *attr, const char *buf, size_t count);
  152. static int check_for_unit_attention(struct ctlr_info *h,
  153. struct CommandList *c);
  154. static void check_ioctl_unit_attention(struct ctlr_info *h,
  155. struct CommandList *c);
  156. /* performant mode helper functions */
  157. static void calc_bucket_map(int *bucket, int num_buckets,
  158. int nsgs, int *bucket_map);
  159. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
  160. static inline u32 next_command(struct ctlr_info *h);
  161. static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
  162. static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
  163. static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
  164. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  165. static DEVICE_ATTR(firmware_revision, S_IRUGO,
  166. host_show_firmware_revision, NULL);
  167. static struct device_attribute *hpsa_sdev_attrs[] = {
  168. &dev_attr_raid_level,
  169. &dev_attr_lunid,
  170. &dev_attr_unique_id,
  171. NULL,
  172. };
  173. static struct device_attribute *hpsa_shost_attrs[] = {
  174. &dev_attr_rescan,
  175. &dev_attr_firmware_revision,
  176. NULL,
  177. };
  178. static struct scsi_host_template hpsa_driver_template = {
  179. .module = THIS_MODULE,
  180. .name = "hpsa",
  181. .proc_name = "hpsa",
  182. .queuecommand = hpsa_scsi_queue_command,
  183. .scan_start = hpsa_scan_start,
  184. .scan_finished = hpsa_scan_finished,
  185. .change_queue_depth = hpsa_change_queue_depth,
  186. .this_id = -1,
  187. .use_clustering = ENABLE_CLUSTERING,
  188. .eh_device_reset_handler = hpsa_eh_device_reset_handler,
  189. .ioctl = hpsa_ioctl,
  190. .slave_alloc = hpsa_slave_alloc,
  191. .slave_destroy = hpsa_slave_destroy,
  192. #ifdef CONFIG_COMPAT
  193. .compat_ioctl = hpsa_compat_ioctl,
  194. #endif
  195. .sdev_attrs = hpsa_sdev_attrs,
  196. .shost_attrs = hpsa_shost_attrs,
  197. };
  198. static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
  199. {
  200. unsigned long *priv = shost_priv(sdev->host);
  201. return (struct ctlr_info *) *priv;
  202. }
  203. static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
  204. {
  205. unsigned long *priv = shost_priv(sh);
  206. return (struct ctlr_info *) *priv;
  207. }
  208. static int check_for_unit_attention(struct ctlr_info *h,
  209. struct CommandList *c)
  210. {
  211. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  212. return 0;
  213. switch (c->err_info->SenseInfo[12]) {
  214. case STATE_CHANGED:
  215. dev_warn(&h->pdev->dev, "hpsa%d: a state change "
  216. "detected, command retried\n", h->ctlr);
  217. break;
  218. case LUN_FAILED:
  219. dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
  220. "detected, action required\n", h->ctlr);
  221. break;
  222. case REPORT_LUNS_CHANGED:
  223. dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
  224. "changed, action required\n", h->ctlr);
  225. /*
  226. * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
  227. */
  228. break;
  229. case POWER_OR_RESET:
  230. dev_warn(&h->pdev->dev, "hpsa%d: a power on "
  231. "or device reset detected\n", h->ctlr);
  232. break;
  233. case UNIT_ATTENTION_CLEARED:
  234. dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
  235. "cleared by another initiator\n", h->ctlr);
  236. break;
  237. default:
  238. dev_warn(&h->pdev->dev, "hpsa%d: unknown "
  239. "unit attention detected\n", h->ctlr);
  240. break;
  241. }
  242. return 1;
  243. }
  244. static ssize_t host_store_rescan(struct device *dev,
  245. struct device_attribute *attr,
  246. const char *buf, size_t count)
  247. {
  248. struct ctlr_info *h;
  249. struct Scsi_Host *shost = class_to_shost(dev);
  250. h = shost_to_hba(shost);
  251. hpsa_scan_start(h->scsi_host);
  252. return count;
  253. }
  254. static ssize_t host_show_firmware_revision(struct device *dev,
  255. struct device_attribute *attr, char *buf)
  256. {
  257. struct ctlr_info *h;
  258. struct Scsi_Host *shost = class_to_shost(dev);
  259. unsigned char *fwrev;
  260. h = shost_to_hba(shost);
  261. if (!h->hba_inquiry_data)
  262. return 0;
  263. fwrev = &h->hba_inquiry_data[32];
  264. return snprintf(buf, 20, "%c%c%c%c\n",
  265. fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
  266. }
  267. /* Enqueuing and dequeuing functions for cmdlists. */
  268. static inline void addQ(struct hlist_head *list, struct CommandList *c)
  269. {
  270. hlist_add_head(&c->list, list);
  271. }
  272. static inline u32 next_command(struct ctlr_info *h)
  273. {
  274. u32 a;
  275. if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
  276. return h->access.command_completed(h);
  277. if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
  278. a = *(h->reply_pool_head); /* Next cmd in ring buffer */
  279. (h->reply_pool_head)++;
  280. h->commands_outstanding--;
  281. } else {
  282. a = FIFO_EMPTY;
  283. }
  284. /* Check for wraparound */
  285. if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
  286. h->reply_pool_head = h->reply_pool;
  287. h->reply_pool_wraparound ^= 1;
  288. }
  289. return a;
  290. }
  291. /* set_performant_mode: Modify the tag for cciss performant
  292. * set bit 0 for pull model, bits 3-1 for block fetch
  293. * register number
  294. */
  295. static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
  296. {
  297. if (likely(h->transMethod == CFGTBL_Trans_Performant))
  298. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  299. }
  300. static void enqueue_cmd_and_start_io(struct ctlr_info *h,
  301. struct CommandList *c)
  302. {
  303. unsigned long flags;
  304. set_performant_mode(h, c);
  305. spin_lock_irqsave(&h->lock, flags);
  306. addQ(&h->reqQ, c);
  307. h->Qdepth++;
  308. start_io(h);
  309. spin_unlock_irqrestore(&h->lock, flags);
  310. }
  311. static inline void removeQ(struct CommandList *c)
  312. {
  313. if (WARN_ON(hlist_unhashed(&c->list)))
  314. return;
  315. hlist_del_init(&c->list);
  316. }
  317. static inline int is_hba_lunid(unsigned char scsi3addr[])
  318. {
  319. return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
  320. }
  321. static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
  322. {
  323. return (scsi3addr[3] & 0xC0) == 0x40;
  324. }
  325. static inline int is_scsi_rev_5(struct ctlr_info *h)
  326. {
  327. if (!h->hba_inquiry_data)
  328. return 0;
  329. if ((h->hba_inquiry_data[2] & 0x07) == 5)
  330. return 1;
  331. return 0;
  332. }
  333. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  334. "UNKNOWN"
  335. };
  336. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
  337. static ssize_t raid_level_show(struct device *dev,
  338. struct device_attribute *attr, char *buf)
  339. {
  340. ssize_t l = 0;
  341. unsigned char rlevel;
  342. struct ctlr_info *h;
  343. struct scsi_device *sdev;
  344. struct hpsa_scsi_dev_t *hdev;
  345. unsigned long flags;
  346. sdev = to_scsi_device(dev);
  347. h = sdev_to_hba(sdev);
  348. spin_lock_irqsave(&h->lock, flags);
  349. hdev = sdev->hostdata;
  350. if (!hdev) {
  351. spin_unlock_irqrestore(&h->lock, flags);
  352. return -ENODEV;
  353. }
  354. /* Is this even a logical drive? */
  355. if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
  356. spin_unlock_irqrestore(&h->lock, flags);
  357. l = snprintf(buf, PAGE_SIZE, "N/A\n");
  358. return l;
  359. }
  360. rlevel = hdev->raid_level;
  361. spin_unlock_irqrestore(&h->lock, flags);
  362. if (rlevel > RAID_UNKNOWN)
  363. rlevel = RAID_UNKNOWN;
  364. l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
  365. return l;
  366. }
  367. static ssize_t lunid_show(struct device *dev,
  368. struct device_attribute *attr, char *buf)
  369. {
  370. struct ctlr_info *h;
  371. struct scsi_device *sdev;
  372. struct hpsa_scsi_dev_t *hdev;
  373. unsigned long flags;
  374. unsigned char lunid[8];
  375. sdev = to_scsi_device(dev);
  376. h = sdev_to_hba(sdev);
  377. spin_lock_irqsave(&h->lock, flags);
  378. hdev = sdev->hostdata;
  379. if (!hdev) {
  380. spin_unlock_irqrestore(&h->lock, flags);
  381. return -ENODEV;
  382. }
  383. memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
  384. spin_unlock_irqrestore(&h->lock, flags);
  385. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  386. lunid[0], lunid[1], lunid[2], lunid[3],
  387. lunid[4], lunid[5], lunid[6], lunid[7]);
  388. }
  389. static ssize_t unique_id_show(struct device *dev,
  390. struct device_attribute *attr, char *buf)
  391. {
  392. struct ctlr_info *h;
  393. struct scsi_device *sdev;
  394. struct hpsa_scsi_dev_t *hdev;
  395. unsigned long flags;
  396. unsigned char sn[16];
  397. sdev = to_scsi_device(dev);
  398. h = sdev_to_hba(sdev);
  399. spin_lock_irqsave(&h->lock, flags);
  400. hdev = sdev->hostdata;
  401. if (!hdev) {
  402. spin_unlock_irqrestore(&h->lock, flags);
  403. return -ENODEV;
  404. }
  405. memcpy(sn, hdev->device_id, sizeof(sn));
  406. spin_unlock_irqrestore(&h->lock, flags);
  407. return snprintf(buf, 16 * 2 + 2,
  408. "%02X%02X%02X%02X%02X%02X%02X%02X"
  409. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  410. sn[0], sn[1], sn[2], sn[3],
  411. sn[4], sn[5], sn[6], sn[7],
  412. sn[8], sn[9], sn[10], sn[11],
  413. sn[12], sn[13], sn[14], sn[15]);
  414. }
  415. static int hpsa_find_target_lun(struct ctlr_info *h,
  416. unsigned char scsi3addr[], int bus, int *target, int *lun)
  417. {
  418. /* finds an unused bus, target, lun for a new physical device
  419. * assumes h->devlock is held
  420. */
  421. int i, found = 0;
  422. DECLARE_BITMAP(lun_taken, HPSA_MAX_SCSI_DEVS_PER_HBA);
  423. memset(&lun_taken[0], 0, HPSA_MAX_SCSI_DEVS_PER_HBA >> 3);
  424. for (i = 0; i < h->ndevices; i++) {
  425. if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
  426. set_bit(h->dev[i]->target, lun_taken);
  427. }
  428. for (i = 0; i < HPSA_MAX_SCSI_DEVS_PER_HBA; i++) {
  429. if (!test_bit(i, lun_taken)) {
  430. /* *bus = 1; */
  431. *target = i;
  432. *lun = 0;
  433. found = 1;
  434. break;
  435. }
  436. }
  437. return !found;
  438. }
  439. /* Add an entry into h->dev[] array. */
  440. static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
  441. struct hpsa_scsi_dev_t *device,
  442. struct hpsa_scsi_dev_t *added[], int *nadded)
  443. {
  444. /* assumes h->devlock is held */
  445. int n = h->ndevices;
  446. int i;
  447. unsigned char addr1[8], addr2[8];
  448. struct hpsa_scsi_dev_t *sd;
  449. if (n >= HPSA_MAX_SCSI_DEVS_PER_HBA) {
  450. dev_err(&h->pdev->dev, "too many devices, some will be "
  451. "inaccessible.\n");
  452. return -1;
  453. }
  454. /* physical devices do not have lun or target assigned until now. */
  455. if (device->lun != -1)
  456. /* Logical device, lun is already assigned. */
  457. goto lun_assigned;
  458. /* If this device a non-zero lun of a multi-lun device
  459. * byte 4 of the 8-byte LUN addr will contain the logical
  460. * unit no, zero otherise.
  461. */
  462. if (device->scsi3addr[4] == 0) {
  463. /* This is not a non-zero lun of a multi-lun device */
  464. if (hpsa_find_target_lun(h, device->scsi3addr,
  465. device->bus, &device->target, &device->lun) != 0)
  466. return -1;
  467. goto lun_assigned;
  468. }
  469. /* This is a non-zero lun of a multi-lun device.
  470. * Search through our list and find the device which
  471. * has the same 8 byte LUN address, excepting byte 4.
  472. * Assign the same bus and target for this new LUN.
  473. * Use the logical unit number from the firmware.
  474. */
  475. memcpy(addr1, device->scsi3addr, 8);
  476. addr1[4] = 0;
  477. for (i = 0; i < n; i++) {
  478. sd = h->dev[i];
  479. memcpy(addr2, sd->scsi3addr, 8);
  480. addr2[4] = 0;
  481. /* differ only in byte 4? */
  482. if (memcmp(addr1, addr2, 8) == 0) {
  483. device->bus = sd->bus;
  484. device->target = sd->target;
  485. device->lun = device->scsi3addr[4];
  486. break;
  487. }
  488. }
  489. if (device->lun == -1) {
  490. dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
  491. " suspect firmware bug or unsupported hardware "
  492. "configuration.\n");
  493. return -1;
  494. }
  495. lun_assigned:
  496. h->dev[n] = device;
  497. h->ndevices++;
  498. added[*nadded] = device;
  499. (*nadded)++;
  500. /* initially, (before registering with scsi layer) we don't
  501. * know our hostno and we don't want to print anything first
  502. * time anyway (the scsi layer's inquiries will show that info)
  503. */
  504. /* if (hostno != -1) */
  505. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
  506. scsi_device_type(device->devtype), hostno,
  507. device->bus, device->target, device->lun);
  508. return 0;
  509. }
  510. /* Replace an entry from h->dev[] array. */
  511. static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
  512. int entry, struct hpsa_scsi_dev_t *new_entry,
  513. struct hpsa_scsi_dev_t *added[], int *nadded,
  514. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  515. {
  516. /* assumes h->devlock is held */
  517. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  518. removed[*nremoved] = h->dev[entry];
  519. (*nremoved)++;
  520. h->dev[entry] = new_entry;
  521. added[*nadded] = new_entry;
  522. (*nadded)++;
  523. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
  524. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  525. new_entry->target, new_entry->lun);
  526. }
  527. /* Remove an entry from h->dev[] array. */
  528. static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
  529. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  530. {
  531. /* assumes h->devlock is held */
  532. int i;
  533. struct hpsa_scsi_dev_t *sd;
  534. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  535. sd = h->dev[entry];
  536. removed[*nremoved] = h->dev[entry];
  537. (*nremoved)++;
  538. for (i = entry; i < h->ndevices-1; i++)
  539. h->dev[i] = h->dev[i+1];
  540. h->ndevices--;
  541. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
  542. scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
  543. sd->lun);
  544. }
  545. #define SCSI3ADDR_EQ(a, b) ( \
  546. (a)[7] == (b)[7] && \
  547. (a)[6] == (b)[6] && \
  548. (a)[5] == (b)[5] && \
  549. (a)[4] == (b)[4] && \
  550. (a)[3] == (b)[3] && \
  551. (a)[2] == (b)[2] && \
  552. (a)[1] == (b)[1] && \
  553. (a)[0] == (b)[0])
  554. static void fixup_botched_add(struct ctlr_info *h,
  555. struct hpsa_scsi_dev_t *added)
  556. {
  557. /* called when scsi_add_device fails in order to re-adjust
  558. * h->dev[] to match the mid layer's view.
  559. */
  560. unsigned long flags;
  561. int i, j;
  562. spin_lock_irqsave(&h->lock, flags);
  563. for (i = 0; i < h->ndevices; i++) {
  564. if (h->dev[i] == added) {
  565. for (j = i; j < h->ndevices-1; j++)
  566. h->dev[j] = h->dev[j+1];
  567. h->ndevices--;
  568. break;
  569. }
  570. }
  571. spin_unlock_irqrestore(&h->lock, flags);
  572. kfree(added);
  573. }
  574. static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
  575. struct hpsa_scsi_dev_t *dev2)
  576. {
  577. if ((is_logical_dev_addr_mode(dev1->scsi3addr) ||
  578. (dev1->lun != -1 && dev2->lun != -1)) &&
  579. dev1->devtype != 0x0C)
  580. return (memcmp(dev1, dev2, sizeof(*dev1)) == 0);
  581. /* we compare everything except lun and target as these
  582. * are not yet assigned. Compare parts likely
  583. * to differ first
  584. */
  585. if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
  586. sizeof(dev1->scsi3addr)) != 0)
  587. return 0;
  588. if (memcmp(dev1->device_id, dev2->device_id,
  589. sizeof(dev1->device_id)) != 0)
  590. return 0;
  591. if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
  592. return 0;
  593. if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
  594. return 0;
  595. if (memcmp(dev1->revision, dev2->revision, sizeof(dev1->revision)) != 0)
  596. return 0;
  597. if (dev1->devtype != dev2->devtype)
  598. return 0;
  599. if (dev1->raid_level != dev2->raid_level)
  600. return 0;
  601. if (dev1->bus != dev2->bus)
  602. return 0;
  603. return 1;
  604. }
  605. /* Find needle in haystack. If exact match found, return DEVICE_SAME,
  606. * and return needle location in *index. If scsi3addr matches, but not
  607. * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
  608. * location in *index. If needle not found, return DEVICE_NOT_FOUND.
  609. */
  610. static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
  611. struct hpsa_scsi_dev_t *haystack[], int haystack_size,
  612. int *index)
  613. {
  614. int i;
  615. #define DEVICE_NOT_FOUND 0
  616. #define DEVICE_CHANGED 1
  617. #define DEVICE_SAME 2
  618. for (i = 0; i < haystack_size; i++) {
  619. if (haystack[i] == NULL) /* previously removed. */
  620. continue;
  621. if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
  622. *index = i;
  623. if (device_is_the_same(needle, haystack[i]))
  624. return DEVICE_SAME;
  625. else
  626. return DEVICE_CHANGED;
  627. }
  628. }
  629. *index = -1;
  630. return DEVICE_NOT_FOUND;
  631. }
  632. static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
  633. struct hpsa_scsi_dev_t *sd[], int nsds)
  634. {
  635. /* sd contains scsi3 addresses and devtypes, and inquiry
  636. * data. This function takes what's in sd to be the current
  637. * reality and updates h->dev[] to reflect that reality.
  638. */
  639. int i, entry, device_change, changes = 0;
  640. struct hpsa_scsi_dev_t *csd;
  641. unsigned long flags;
  642. struct hpsa_scsi_dev_t **added, **removed;
  643. int nadded, nremoved;
  644. struct Scsi_Host *sh = NULL;
  645. added = kzalloc(sizeof(*added) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  646. GFP_KERNEL);
  647. removed = kzalloc(sizeof(*removed) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  648. GFP_KERNEL);
  649. if (!added || !removed) {
  650. dev_warn(&h->pdev->dev, "out of memory in "
  651. "adjust_hpsa_scsi_table\n");
  652. goto free_and_out;
  653. }
  654. spin_lock_irqsave(&h->devlock, flags);
  655. /* find any devices in h->dev[] that are not in
  656. * sd[] and remove them from h->dev[], and for any
  657. * devices which have changed, remove the old device
  658. * info and add the new device info.
  659. */
  660. i = 0;
  661. nremoved = 0;
  662. nadded = 0;
  663. while (i < h->ndevices) {
  664. csd = h->dev[i];
  665. device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
  666. if (device_change == DEVICE_NOT_FOUND) {
  667. changes++;
  668. hpsa_scsi_remove_entry(h, hostno, i,
  669. removed, &nremoved);
  670. continue; /* remove ^^^, hence i not incremented */
  671. } else if (device_change == DEVICE_CHANGED) {
  672. changes++;
  673. hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
  674. added, &nadded, removed, &nremoved);
  675. /* Set it to NULL to prevent it from being freed
  676. * at the bottom of hpsa_update_scsi_devices()
  677. */
  678. sd[entry] = NULL;
  679. }
  680. i++;
  681. }
  682. /* Now, make sure every device listed in sd[] is also
  683. * listed in h->dev[], adding them if they aren't found
  684. */
  685. for (i = 0; i < nsds; i++) {
  686. if (!sd[i]) /* if already added above. */
  687. continue;
  688. device_change = hpsa_scsi_find_entry(sd[i], h->dev,
  689. h->ndevices, &entry);
  690. if (device_change == DEVICE_NOT_FOUND) {
  691. changes++;
  692. if (hpsa_scsi_add_entry(h, hostno, sd[i],
  693. added, &nadded) != 0)
  694. break;
  695. sd[i] = NULL; /* prevent from being freed later. */
  696. } else if (device_change == DEVICE_CHANGED) {
  697. /* should never happen... */
  698. changes++;
  699. dev_warn(&h->pdev->dev,
  700. "device unexpectedly changed.\n");
  701. /* but if it does happen, we just ignore that device */
  702. }
  703. }
  704. spin_unlock_irqrestore(&h->devlock, flags);
  705. /* Don't notify scsi mid layer of any changes the first time through
  706. * (or if there are no changes) scsi_scan_host will do it later the
  707. * first time through.
  708. */
  709. if (hostno == -1 || !changes)
  710. goto free_and_out;
  711. sh = h->scsi_host;
  712. /* Notify scsi mid layer of any removed devices */
  713. for (i = 0; i < nremoved; i++) {
  714. struct scsi_device *sdev =
  715. scsi_device_lookup(sh, removed[i]->bus,
  716. removed[i]->target, removed[i]->lun);
  717. if (sdev != NULL) {
  718. scsi_remove_device(sdev);
  719. scsi_device_put(sdev);
  720. } else {
  721. /* We don't expect to get here.
  722. * future cmds to this device will get selection
  723. * timeout as if the device was gone.
  724. */
  725. dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
  726. " for removal.", hostno, removed[i]->bus,
  727. removed[i]->target, removed[i]->lun);
  728. }
  729. kfree(removed[i]);
  730. removed[i] = NULL;
  731. }
  732. /* Notify scsi mid layer of any added devices */
  733. for (i = 0; i < nadded; i++) {
  734. if (scsi_add_device(sh, added[i]->bus,
  735. added[i]->target, added[i]->lun) == 0)
  736. continue;
  737. dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
  738. "device not added.\n", hostno, added[i]->bus,
  739. added[i]->target, added[i]->lun);
  740. /* now we have to remove it from h->dev,
  741. * since it didn't get added to scsi mid layer
  742. */
  743. fixup_botched_add(h, added[i]);
  744. }
  745. free_and_out:
  746. kfree(added);
  747. kfree(removed);
  748. }
  749. /*
  750. * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
  751. * Assume's h->devlock is held.
  752. */
  753. static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
  754. int bus, int target, int lun)
  755. {
  756. int i;
  757. struct hpsa_scsi_dev_t *sd;
  758. for (i = 0; i < h->ndevices; i++) {
  759. sd = h->dev[i];
  760. if (sd->bus == bus && sd->target == target && sd->lun == lun)
  761. return sd;
  762. }
  763. return NULL;
  764. }
  765. /* link sdev->hostdata to our per-device structure. */
  766. static int hpsa_slave_alloc(struct scsi_device *sdev)
  767. {
  768. struct hpsa_scsi_dev_t *sd;
  769. unsigned long flags;
  770. struct ctlr_info *h;
  771. h = sdev_to_hba(sdev);
  772. spin_lock_irqsave(&h->devlock, flags);
  773. sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
  774. sdev_id(sdev), sdev->lun);
  775. if (sd != NULL)
  776. sdev->hostdata = sd;
  777. spin_unlock_irqrestore(&h->devlock, flags);
  778. return 0;
  779. }
  780. static void hpsa_slave_destroy(struct scsi_device *sdev)
  781. {
  782. /* nothing to do. */
  783. }
  784. static void hpsa_scsi_setup(struct ctlr_info *h)
  785. {
  786. h->ndevices = 0;
  787. h->scsi_host = NULL;
  788. spin_lock_init(&h->devlock);
  789. }
  790. static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
  791. {
  792. int i;
  793. if (!h->cmd_sg_list)
  794. return;
  795. for (i = 0; i < h->nr_cmds; i++) {
  796. kfree(h->cmd_sg_list[i]);
  797. h->cmd_sg_list[i] = NULL;
  798. }
  799. kfree(h->cmd_sg_list);
  800. h->cmd_sg_list = NULL;
  801. }
  802. static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
  803. {
  804. int i;
  805. if (h->chainsize <= 0)
  806. return 0;
  807. h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
  808. GFP_KERNEL);
  809. if (!h->cmd_sg_list)
  810. return -ENOMEM;
  811. for (i = 0; i < h->nr_cmds; i++) {
  812. h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
  813. h->chainsize, GFP_KERNEL);
  814. if (!h->cmd_sg_list[i])
  815. goto clean;
  816. }
  817. return 0;
  818. clean:
  819. hpsa_free_sg_chain_blocks(h);
  820. return -ENOMEM;
  821. }
  822. static void hpsa_map_sg_chain_block(struct ctlr_info *h,
  823. struct CommandList *c)
  824. {
  825. struct SGDescriptor *chain_sg, *chain_block;
  826. u64 temp64;
  827. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  828. chain_block = h->cmd_sg_list[c->cmdindex];
  829. chain_sg->Ext = HPSA_SG_CHAIN;
  830. chain_sg->Len = sizeof(*chain_sg) *
  831. (c->Header.SGTotal - h->max_cmd_sg_entries);
  832. temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
  833. PCI_DMA_TODEVICE);
  834. chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
  835. chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
  836. }
  837. static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
  838. struct CommandList *c)
  839. {
  840. struct SGDescriptor *chain_sg;
  841. union u64bit temp64;
  842. if (c->Header.SGTotal <= h->max_cmd_sg_entries)
  843. return;
  844. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  845. temp64.val32.lower = chain_sg->Addr.lower;
  846. temp64.val32.upper = chain_sg->Addr.upper;
  847. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  848. }
  849. static void complete_scsi_command(struct CommandList *cp,
  850. int timeout, u32 tag)
  851. {
  852. struct scsi_cmnd *cmd;
  853. struct ctlr_info *h;
  854. struct ErrorInfo *ei;
  855. unsigned char sense_key;
  856. unsigned char asc; /* additional sense code */
  857. unsigned char ascq; /* additional sense code qualifier */
  858. ei = cp->err_info;
  859. cmd = (struct scsi_cmnd *) cp->scsi_cmd;
  860. h = cp->h;
  861. scsi_dma_unmap(cmd); /* undo the DMA mappings */
  862. if (cp->Header.SGTotal > h->max_cmd_sg_entries)
  863. hpsa_unmap_sg_chain_block(h, cp);
  864. cmd->result = (DID_OK << 16); /* host byte */
  865. cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
  866. cmd->result |= ei->ScsiStatus;
  867. /* copy the sense data whether we need to or not. */
  868. memcpy(cmd->sense_buffer, ei->SenseInfo,
  869. ei->SenseLen > SCSI_SENSE_BUFFERSIZE ?
  870. SCSI_SENSE_BUFFERSIZE :
  871. ei->SenseLen);
  872. scsi_set_resid(cmd, ei->ResidualCnt);
  873. if (ei->CommandStatus == 0) {
  874. cmd->scsi_done(cmd);
  875. cmd_free(h, cp);
  876. return;
  877. }
  878. /* an error has occurred */
  879. switch (ei->CommandStatus) {
  880. case CMD_TARGET_STATUS:
  881. if (ei->ScsiStatus) {
  882. /* Get sense key */
  883. sense_key = 0xf & ei->SenseInfo[2];
  884. /* Get additional sense code */
  885. asc = ei->SenseInfo[12];
  886. /* Get addition sense code qualifier */
  887. ascq = ei->SenseInfo[13];
  888. }
  889. if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
  890. if (check_for_unit_attention(h, cp)) {
  891. cmd->result = DID_SOFT_ERROR << 16;
  892. break;
  893. }
  894. if (sense_key == ILLEGAL_REQUEST) {
  895. /*
  896. * SCSI REPORT_LUNS is commonly unsupported on
  897. * Smart Array. Suppress noisy complaint.
  898. */
  899. if (cp->Request.CDB[0] == REPORT_LUNS)
  900. break;
  901. /* If ASC/ASCQ indicate Logical Unit
  902. * Not Supported condition,
  903. */
  904. if ((asc == 0x25) && (ascq == 0x0)) {
  905. dev_warn(&h->pdev->dev, "cp %p "
  906. "has check condition\n", cp);
  907. break;
  908. }
  909. }
  910. if (sense_key == NOT_READY) {
  911. /* If Sense is Not Ready, Logical Unit
  912. * Not ready, Manual Intervention
  913. * required
  914. */
  915. if ((asc == 0x04) && (ascq == 0x03)) {
  916. dev_warn(&h->pdev->dev, "cp %p "
  917. "has check condition: unit "
  918. "not ready, manual "
  919. "intervention required\n", cp);
  920. break;
  921. }
  922. }
  923. if (sense_key == ABORTED_COMMAND) {
  924. /* Aborted command is retryable */
  925. dev_warn(&h->pdev->dev, "cp %p "
  926. "has check condition: aborted command: "
  927. "ASC: 0x%x, ASCQ: 0x%x\n",
  928. cp, asc, ascq);
  929. cmd->result = DID_SOFT_ERROR << 16;
  930. break;
  931. }
  932. /* Must be some other type of check condition */
  933. dev_warn(&h->pdev->dev, "cp %p has check condition: "
  934. "unknown type: "
  935. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  936. "Returning result: 0x%x, "
  937. "cmd=[%02x %02x %02x %02x %02x "
  938. "%02x %02x %02x %02x %02x %02x "
  939. "%02x %02x %02x %02x %02x]\n",
  940. cp, sense_key, asc, ascq,
  941. cmd->result,
  942. cmd->cmnd[0], cmd->cmnd[1],
  943. cmd->cmnd[2], cmd->cmnd[3],
  944. cmd->cmnd[4], cmd->cmnd[5],
  945. cmd->cmnd[6], cmd->cmnd[7],
  946. cmd->cmnd[8], cmd->cmnd[9],
  947. cmd->cmnd[10], cmd->cmnd[11],
  948. cmd->cmnd[12], cmd->cmnd[13],
  949. cmd->cmnd[14], cmd->cmnd[15]);
  950. break;
  951. }
  952. /* Problem was not a check condition
  953. * Pass it up to the upper layers...
  954. */
  955. if (ei->ScsiStatus) {
  956. dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
  957. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  958. "Returning result: 0x%x\n",
  959. cp, ei->ScsiStatus,
  960. sense_key, asc, ascq,
  961. cmd->result);
  962. } else { /* scsi status is zero??? How??? */
  963. dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
  964. "Returning no connection.\n", cp),
  965. /* Ordinarily, this case should never happen,
  966. * but there is a bug in some released firmware
  967. * revisions that allows it to happen if, for
  968. * example, a 4100 backplane loses power and
  969. * the tape drive is in it. We assume that
  970. * it's a fatal error of some kind because we
  971. * can't show that it wasn't. We will make it
  972. * look like selection timeout since that is
  973. * the most common reason for this to occur,
  974. * and it's severe enough.
  975. */
  976. cmd->result = DID_NO_CONNECT << 16;
  977. }
  978. break;
  979. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  980. break;
  981. case CMD_DATA_OVERRUN:
  982. dev_warn(&h->pdev->dev, "cp %p has"
  983. " completed with data overrun "
  984. "reported\n", cp);
  985. break;
  986. case CMD_INVALID: {
  987. /* print_bytes(cp, sizeof(*cp), 1, 0);
  988. print_cmd(cp); */
  989. /* We get CMD_INVALID if you address a non-existent device
  990. * instead of a selection timeout (no response). You will
  991. * see this if you yank out a drive, then try to access it.
  992. * This is kind of a shame because it means that any other
  993. * CMD_INVALID (e.g. driver bug) will get interpreted as a
  994. * missing target. */
  995. cmd->result = DID_NO_CONNECT << 16;
  996. }
  997. break;
  998. case CMD_PROTOCOL_ERR:
  999. dev_warn(&h->pdev->dev, "cp %p has "
  1000. "protocol error \n", cp);
  1001. break;
  1002. case CMD_HARDWARE_ERR:
  1003. cmd->result = DID_ERROR << 16;
  1004. dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
  1005. break;
  1006. case CMD_CONNECTION_LOST:
  1007. cmd->result = DID_ERROR << 16;
  1008. dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
  1009. break;
  1010. case CMD_ABORTED:
  1011. cmd->result = DID_ABORT << 16;
  1012. dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
  1013. cp, ei->ScsiStatus);
  1014. break;
  1015. case CMD_ABORT_FAILED:
  1016. cmd->result = DID_ERROR << 16;
  1017. dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
  1018. break;
  1019. case CMD_UNSOLICITED_ABORT:
  1020. cmd->result = DID_RESET << 16;
  1021. dev_warn(&h->pdev->dev, "cp %p aborted do to an unsolicited "
  1022. "abort\n", cp);
  1023. break;
  1024. case CMD_TIMEOUT:
  1025. cmd->result = DID_TIME_OUT << 16;
  1026. dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
  1027. break;
  1028. default:
  1029. cmd->result = DID_ERROR << 16;
  1030. dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
  1031. cp, ei->CommandStatus);
  1032. }
  1033. cmd->scsi_done(cmd);
  1034. cmd_free(h, cp);
  1035. }
  1036. static int hpsa_scsi_detect(struct ctlr_info *h)
  1037. {
  1038. struct Scsi_Host *sh;
  1039. int error;
  1040. sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
  1041. if (sh == NULL)
  1042. goto fail;
  1043. sh->io_port = 0;
  1044. sh->n_io_port = 0;
  1045. sh->this_id = -1;
  1046. sh->max_channel = 3;
  1047. sh->max_cmd_len = MAX_COMMAND_SIZE;
  1048. sh->max_lun = HPSA_MAX_LUN;
  1049. sh->max_id = HPSA_MAX_LUN;
  1050. sh->can_queue = h->nr_cmds;
  1051. sh->cmd_per_lun = h->nr_cmds;
  1052. sh->sg_tablesize = h->maxsgentries;
  1053. h->scsi_host = sh;
  1054. sh->hostdata[0] = (unsigned long) h;
  1055. sh->irq = h->intr[PERF_MODE_INT];
  1056. sh->unique_id = sh->irq;
  1057. error = scsi_add_host(sh, &h->pdev->dev);
  1058. if (error)
  1059. goto fail_host_put;
  1060. scsi_scan_host(sh);
  1061. return 0;
  1062. fail_host_put:
  1063. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
  1064. " failed for controller %d\n", h->ctlr);
  1065. scsi_host_put(sh);
  1066. return error;
  1067. fail:
  1068. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
  1069. " failed for controller %d\n", h->ctlr);
  1070. return -ENOMEM;
  1071. }
  1072. static void hpsa_pci_unmap(struct pci_dev *pdev,
  1073. struct CommandList *c, int sg_used, int data_direction)
  1074. {
  1075. int i;
  1076. union u64bit addr64;
  1077. for (i = 0; i < sg_used; i++) {
  1078. addr64.val32.lower = c->SG[i].Addr.lower;
  1079. addr64.val32.upper = c->SG[i].Addr.upper;
  1080. pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
  1081. data_direction);
  1082. }
  1083. }
  1084. static void hpsa_map_one(struct pci_dev *pdev,
  1085. struct CommandList *cp,
  1086. unsigned char *buf,
  1087. size_t buflen,
  1088. int data_direction)
  1089. {
  1090. u64 addr64;
  1091. if (buflen == 0 || data_direction == PCI_DMA_NONE) {
  1092. cp->Header.SGList = 0;
  1093. cp->Header.SGTotal = 0;
  1094. return;
  1095. }
  1096. addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
  1097. cp->SG[0].Addr.lower =
  1098. (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
  1099. cp->SG[0].Addr.upper =
  1100. (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
  1101. cp->SG[0].Len = buflen;
  1102. cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
  1103. cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
  1104. }
  1105. static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
  1106. struct CommandList *c)
  1107. {
  1108. DECLARE_COMPLETION_ONSTACK(wait);
  1109. c->waiting = &wait;
  1110. enqueue_cmd_and_start_io(h, c);
  1111. wait_for_completion(&wait);
  1112. }
  1113. static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
  1114. struct CommandList *c, int data_direction)
  1115. {
  1116. int retry_count = 0;
  1117. do {
  1118. memset(c->err_info, 0, sizeof(c->err_info));
  1119. hpsa_scsi_do_simple_cmd_core(h, c);
  1120. retry_count++;
  1121. } while (check_for_unit_attention(h, c) && retry_count <= 3);
  1122. hpsa_pci_unmap(h->pdev, c, 1, data_direction);
  1123. }
  1124. static void hpsa_scsi_interpret_error(struct CommandList *cp)
  1125. {
  1126. struct ErrorInfo *ei;
  1127. struct device *d = &cp->h->pdev->dev;
  1128. ei = cp->err_info;
  1129. switch (ei->CommandStatus) {
  1130. case CMD_TARGET_STATUS:
  1131. dev_warn(d, "cmd %p has completed with errors\n", cp);
  1132. dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
  1133. ei->ScsiStatus);
  1134. if (ei->ScsiStatus == 0)
  1135. dev_warn(d, "SCSI status is abnormally zero. "
  1136. "(probably indicates selection timeout "
  1137. "reported incorrectly due to a known "
  1138. "firmware bug, circa July, 2001.)\n");
  1139. break;
  1140. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1141. dev_info(d, "UNDERRUN\n");
  1142. break;
  1143. case CMD_DATA_OVERRUN:
  1144. dev_warn(d, "cp %p has completed with data overrun\n", cp);
  1145. break;
  1146. case CMD_INVALID: {
  1147. /* controller unfortunately reports SCSI passthru's
  1148. * to non-existent targets as invalid commands.
  1149. */
  1150. dev_warn(d, "cp %p is reported invalid (probably means "
  1151. "target device no longer present)\n", cp);
  1152. /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
  1153. print_cmd(cp); */
  1154. }
  1155. break;
  1156. case CMD_PROTOCOL_ERR:
  1157. dev_warn(d, "cp %p has protocol error \n", cp);
  1158. break;
  1159. case CMD_HARDWARE_ERR:
  1160. /* cmd->result = DID_ERROR << 16; */
  1161. dev_warn(d, "cp %p had hardware error\n", cp);
  1162. break;
  1163. case CMD_CONNECTION_LOST:
  1164. dev_warn(d, "cp %p had connection lost\n", cp);
  1165. break;
  1166. case CMD_ABORTED:
  1167. dev_warn(d, "cp %p was aborted\n", cp);
  1168. break;
  1169. case CMD_ABORT_FAILED:
  1170. dev_warn(d, "cp %p reports abort failed\n", cp);
  1171. break;
  1172. case CMD_UNSOLICITED_ABORT:
  1173. dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
  1174. break;
  1175. case CMD_TIMEOUT:
  1176. dev_warn(d, "cp %p timed out\n", cp);
  1177. break;
  1178. default:
  1179. dev_warn(d, "cp %p returned unknown status %x\n", cp,
  1180. ei->CommandStatus);
  1181. }
  1182. }
  1183. static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
  1184. unsigned char page, unsigned char *buf,
  1185. unsigned char bufsize)
  1186. {
  1187. int rc = IO_OK;
  1188. struct CommandList *c;
  1189. struct ErrorInfo *ei;
  1190. c = cmd_special_alloc(h);
  1191. if (c == NULL) { /* trouble... */
  1192. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1193. return -ENOMEM;
  1194. }
  1195. fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
  1196. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1197. ei = c->err_info;
  1198. if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1199. hpsa_scsi_interpret_error(c);
  1200. rc = -1;
  1201. }
  1202. cmd_special_free(h, c);
  1203. return rc;
  1204. }
  1205. static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
  1206. {
  1207. int rc = IO_OK;
  1208. struct CommandList *c;
  1209. struct ErrorInfo *ei;
  1210. c = cmd_special_alloc(h);
  1211. if (c == NULL) { /* trouble... */
  1212. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1213. return -ENOMEM;
  1214. }
  1215. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
  1216. hpsa_scsi_do_simple_cmd_core(h, c);
  1217. /* no unmap needed here because no data xfer. */
  1218. ei = c->err_info;
  1219. if (ei->CommandStatus != 0) {
  1220. hpsa_scsi_interpret_error(c);
  1221. rc = -1;
  1222. }
  1223. cmd_special_free(h, c);
  1224. return rc;
  1225. }
  1226. static void hpsa_get_raid_level(struct ctlr_info *h,
  1227. unsigned char *scsi3addr, unsigned char *raid_level)
  1228. {
  1229. int rc;
  1230. unsigned char *buf;
  1231. *raid_level = RAID_UNKNOWN;
  1232. buf = kzalloc(64, GFP_KERNEL);
  1233. if (!buf)
  1234. return;
  1235. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
  1236. if (rc == 0)
  1237. *raid_level = buf[8];
  1238. if (*raid_level > RAID_UNKNOWN)
  1239. *raid_level = RAID_UNKNOWN;
  1240. kfree(buf);
  1241. return;
  1242. }
  1243. /* Get the device id from inquiry page 0x83 */
  1244. static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
  1245. unsigned char *device_id, int buflen)
  1246. {
  1247. int rc;
  1248. unsigned char *buf;
  1249. if (buflen > 16)
  1250. buflen = 16;
  1251. buf = kzalloc(64, GFP_KERNEL);
  1252. if (!buf)
  1253. return -1;
  1254. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
  1255. if (rc == 0)
  1256. memcpy(device_id, &buf[8], buflen);
  1257. kfree(buf);
  1258. return rc != 0;
  1259. }
  1260. static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
  1261. struct ReportLUNdata *buf, int bufsize,
  1262. int extended_response)
  1263. {
  1264. int rc = IO_OK;
  1265. struct CommandList *c;
  1266. unsigned char scsi3addr[8];
  1267. struct ErrorInfo *ei;
  1268. c = cmd_special_alloc(h);
  1269. if (c == NULL) { /* trouble... */
  1270. dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1271. return -1;
  1272. }
  1273. /* address the controller */
  1274. memset(scsi3addr, 0, sizeof(scsi3addr));
  1275. fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
  1276. buf, bufsize, 0, scsi3addr, TYPE_CMD);
  1277. if (extended_response)
  1278. c->Request.CDB[1] = extended_response;
  1279. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1280. ei = c->err_info;
  1281. if (ei->CommandStatus != 0 &&
  1282. ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1283. hpsa_scsi_interpret_error(c);
  1284. rc = -1;
  1285. }
  1286. cmd_special_free(h, c);
  1287. return rc;
  1288. }
  1289. static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
  1290. struct ReportLUNdata *buf,
  1291. int bufsize, int extended_response)
  1292. {
  1293. return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
  1294. }
  1295. static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
  1296. struct ReportLUNdata *buf, int bufsize)
  1297. {
  1298. return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
  1299. }
  1300. static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
  1301. int bus, int target, int lun)
  1302. {
  1303. device->bus = bus;
  1304. device->target = target;
  1305. device->lun = lun;
  1306. }
  1307. static int hpsa_update_device_info(struct ctlr_info *h,
  1308. unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device)
  1309. {
  1310. #define OBDR_TAPE_INQ_SIZE 49
  1311. unsigned char *inq_buff;
  1312. inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1313. if (!inq_buff)
  1314. goto bail_out;
  1315. /* Do an inquiry to the device to see what it is. */
  1316. if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
  1317. (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
  1318. /* Inquiry failed (msg printed already) */
  1319. dev_err(&h->pdev->dev,
  1320. "hpsa_update_device_info: inquiry failed\n");
  1321. goto bail_out;
  1322. }
  1323. this_device->devtype = (inq_buff[0] & 0x1f);
  1324. memcpy(this_device->scsi3addr, scsi3addr, 8);
  1325. memcpy(this_device->vendor, &inq_buff[8],
  1326. sizeof(this_device->vendor));
  1327. memcpy(this_device->model, &inq_buff[16],
  1328. sizeof(this_device->model));
  1329. memcpy(this_device->revision, &inq_buff[32],
  1330. sizeof(this_device->revision));
  1331. memset(this_device->device_id, 0,
  1332. sizeof(this_device->device_id));
  1333. hpsa_get_device_id(h, scsi3addr, this_device->device_id,
  1334. sizeof(this_device->device_id));
  1335. if (this_device->devtype == TYPE_DISK &&
  1336. is_logical_dev_addr_mode(scsi3addr))
  1337. hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
  1338. else
  1339. this_device->raid_level = RAID_UNKNOWN;
  1340. kfree(inq_buff);
  1341. return 0;
  1342. bail_out:
  1343. kfree(inq_buff);
  1344. return 1;
  1345. }
  1346. static unsigned char *msa2xxx_model[] = {
  1347. "MSA2012",
  1348. "MSA2024",
  1349. "MSA2312",
  1350. "MSA2324",
  1351. NULL,
  1352. };
  1353. static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
  1354. {
  1355. int i;
  1356. for (i = 0; msa2xxx_model[i]; i++)
  1357. if (strncmp(device->model, msa2xxx_model[i],
  1358. strlen(msa2xxx_model[i])) == 0)
  1359. return 1;
  1360. return 0;
  1361. }
  1362. /* Helper function to assign bus, target, lun mapping of devices.
  1363. * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
  1364. * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
  1365. * Logical drive target and lun are assigned at this time, but
  1366. * physical device lun and target assignment are deferred (assigned
  1367. * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
  1368. */
  1369. static void figure_bus_target_lun(struct ctlr_info *h,
  1370. u8 *lunaddrbytes, int *bus, int *target, int *lun,
  1371. struct hpsa_scsi_dev_t *device)
  1372. {
  1373. u32 lunid;
  1374. if (is_logical_dev_addr_mode(lunaddrbytes)) {
  1375. /* logical device */
  1376. if (unlikely(is_scsi_rev_5(h))) {
  1377. /* p1210m, logical drives lun assignments
  1378. * match SCSI REPORT LUNS data.
  1379. */
  1380. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1381. *bus = 0;
  1382. *target = 0;
  1383. *lun = (lunid & 0x3fff) + 1;
  1384. } else {
  1385. /* not p1210m... */
  1386. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1387. if (is_msa2xxx(h, device)) {
  1388. /* msa2xxx way, put logicals on bus 1
  1389. * and match target/lun numbers box
  1390. * reports.
  1391. */
  1392. *bus = 1;
  1393. *target = (lunid >> 16) & 0x3fff;
  1394. *lun = lunid & 0x00ff;
  1395. } else {
  1396. /* Traditional smart array way. */
  1397. *bus = 0;
  1398. *lun = 0;
  1399. *target = lunid & 0x3fff;
  1400. }
  1401. }
  1402. } else {
  1403. /* physical device */
  1404. if (is_hba_lunid(lunaddrbytes))
  1405. if (unlikely(is_scsi_rev_5(h))) {
  1406. *bus = 0; /* put p1210m ctlr at 0,0,0 */
  1407. *target = 0;
  1408. *lun = 0;
  1409. return;
  1410. } else
  1411. *bus = 3; /* traditional smartarray */
  1412. else
  1413. *bus = 2; /* physical disk */
  1414. *target = -1;
  1415. *lun = -1; /* we will fill these in later. */
  1416. }
  1417. }
  1418. /*
  1419. * If there is no lun 0 on a target, linux won't find any devices.
  1420. * For the MSA2xxx boxes, we have to manually detect the enclosure
  1421. * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
  1422. * it for some reason. *tmpdevice is the target we're adding,
  1423. * this_device is a pointer into the current element of currentsd[]
  1424. * that we're building up in update_scsi_devices(), below.
  1425. * lunzerobits is a bitmap that tracks which targets already have a
  1426. * lun 0 assigned.
  1427. * Returns 1 if an enclosure was added, 0 if not.
  1428. */
  1429. static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
  1430. struct hpsa_scsi_dev_t *tmpdevice,
  1431. struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
  1432. int bus, int target, int lun, unsigned long lunzerobits[],
  1433. int *nmsa2xxx_enclosures)
  1434. {
  1435. unsigned char scsi3addr[8];
  1436. if (test_bit(target, lunzerobits))
  1437. return 0; /* There is already a lun 0 on this target. */
  1438. if (!is_logical_dev_addr_mode(lunaddrbytes))
  1439. return 0; /* It's the logical targets that may lack lun 0. */
  1440. if (!is_msa2xxx(h, tmpdevice))
  1441. return 0; /* It's only the MSA2xxx that have this problem. */
  1442. if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
  1443. return 0;
  1444. if (is_hba_lunid(scsi3addr))
  1445. return 0; /* Don't add the RAID controller here. */
  1446. if (is_scsi_rev_5(h))
  1447. return 0; /* p1210m doesn't need to do this. */
  1448. #define MAX_MSA2XXX_ENCLOSURES 32
  1449. if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
  1450. dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
  1451. "enclosures exceeded. Check your hardware "
  1452. "configuration.");
  1453. return 0;
  1454. }
  1455. memset(scsi3addr, 0, 8);
  1456. scsi3addr[3] = target;
  1457. if (hpsa_update_device_info(h, scsi3addr, this_device))
  1458. return 0;
  1459. (*nmsa2xxx_enclosures)++;
  1460. hpsa_set_bus_target_lun(this_device, bus, target, 0);
  1461. set_bit(target, lunzerobits);
  1462. return 1;
  1463. }
  1464. /*
  1465. * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
  1466. * logdev. The number of luns in physdev and logdev are returned in
  1467. * *nphysicals and *nlogicals, respectively.
  1468. * Returns 0 on success, -1 otherwise.
  1469. */
  1470. static int hpsa_gather_lun_info(struct ctlr_info *h,
  1471. int reportlunsize,
  1472. struct ReportLUNdata *physdev, u32 *nphysicals,
  1473. struct ReportLUNdata *logdev, u32 *nlogicals)
  1474. {
  1475. if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
  1476. dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
  1477. return -1;
  1478. }
  1479. *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
  1480. if (*nphysicals > HPSA_MAX_PHYS_LUN) {
  1481. dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
  1482. " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1483. *nphysicals - HPSA_MAX_PHYS_LUN);
  1484. *nphysicals = HPSA_MAX_PHYS_LUN;
  1485. }
  1486. if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
  1487. dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
  1488. return -1;
  1489. }
  1490. *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
  1491. /* Reject Logicals in excess of our max capability. */
  1492. if (*nlogicals > HPSA_MAX_LUN) {
  1493. dev_warn(&h->pdev->dev,
  1494. "maximum logical LUNs (%d) exceeded. "
  1495. "%d LUNs ignored.\n", HPSA_MAX_LUN,
  1496. *nlogicals - HPSA_MAX_LUN);
  1497. *nlogicals = HPSA_MAX_LUN;
  1498. }
  1499. if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
  1500. dev_warn(&h->pdev->dev,
  1501. "maximum logical + physical LUNs (%d) exceeded. "
  1502. "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1503. *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
  1504. *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
  1505. }
  1506. return 0;
  1507. }
  1508. u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
  1509. int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
  1510. struct ReportLUNdata *logdev_list)
  1511. {
  1512. /* Helper function, figure out where the LUN ID info is coming from
  1513. * given index i, lists of physical and logical devices, where in
  1514. * the list the raid controller is supposed to appear (first or last)
  1515. */
  1516. int logicals_start = nphysicals + (raid_ctlr_position == 0);
  1517. int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
  1518. if (i == raid_ctlr_position)
  1519. return RAID_CTLR_LUNID;
  1520. if (i < logicals_start)
  1521. return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
  1522. if (i < last_device)
  1523. return &logdev_list->LUN[i - nphysicals -
  1524. (raid_ctlr_position == 0)][0];
  1525. BUG();
  1526. return NULL;
  1527. }
  1528. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
  1529. {
  1530. /* the idea here is we could get notified
  1531. * that some devices have changed, so we do a report
  1532. * physical luns and report logical luns cmd, and adjust
  1533. * our list of devices accordingly.
  1534. *
  1535. * The scsi3addr's of devices won't change so long as the
  1536. * adapter is not reset. That means we can rescan and
  1537. * tell which devices we already know about, vs. new
  1538. * devices, vs. disappearing devices.
  1539. */
  1540. struct ReportLUNdata *physdev_list = NULL;
  1541. struct ReportLUNdata *logdev_list = NULL;
  1542. unsigned char *inq_buff = NULL;
  1543. u32 nphysicals = 0;
  1544. u32 nlogicals = 0;
  1545. u32 ndev_allocated = 0;
  1546. struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
  1547. int ncurrent = 0;
  1548. int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
  1549. int i, nmsa2xxx_enclosures, ndevs_to_allocate;
  1550. int bus, target, lun;
  1551. int raid_ctlr_position;
  1552. DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
  1553. currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  1554. GFP_KERNEL);
  1555. physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1556. logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1557. inq_buff = kmalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1558. tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
  1559. if (!currentsd || !physdev_list || !logdev_list ||
  1560. !inq_buff || !tmpdevice) {
  1561. dev_err(&h->pdev->dev, "out of memory\n");
  1562. goto out;
  1563. }
  1564. memset(lunzerobits, 0, sizeof(lunzerobits));
  1565. if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
  1566. logdev_list, &nlogicals))
  1567. goto out;
  1568. /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
  1569. * but each of them 4 times through different paths. The plus 1
  1570. * is for the RAID controller.
  1571. */
  1572. ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
  1573. /* Allocate the per device structures */
  1574. for (i = 0; i < ndevs_to_allocate; i++) {
  1575. currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
  1576. if (!currentsd[i]) {
  1577. dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
  1578. __FILE__, __LINE__);
  1579. goto out;
  1580. }
  1581. ndev_allocated++;
  1582. }
  1583. if (unlikely(is_scsi_rev_5(h)))
  1584. raid_ctlr_position = 0;
  1585. else
  1586. raid_ctlr_position = nphysicals + nlogicals;
  1587. /* adjust our table of devices */
  1588. nmsa2xxx_enclosures = 0;
  1589. for (i = 0; i < nphysicals + nlogicals + 1; i++) {
  1590. u8 *lunaddrbytes;
  1591. /* Figure out where the LUN ID info is coming from */
  1592. lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
  1593. i, nphysicals, nlogicals, physdev_list, logdev_list);
  1594. /* skip masked physical devices. */
  1595. if (lunaddrbytes[3] & 0xC0 &&
  1596. i < nphysicals + (raid_ctlr_position == 0))
  1597. continue;
  1598. /* Get device type, vendor, model, device id */
  1599. if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice))
  1600. continue; /* skip it if we can't talk to it. */
  1601. figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
  1602. tmpdevice);
  1603. this_device = currentsd[ncurrent];
  1604. /*
  1605. * For the msa2xxx boxes, we have to insert a LUN 0 which
  1606. * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
  1607. * is nonetheless an enclosure device there. We have to
  1608. * present that otherwise linux won't find anything if
  1609. * there is no lun 0.
  1610. */
  1611. if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
  1612. lunaddrbytes, bus, target, lun, lunzerobits,
  1613. &nmsa2xxx_enclosures)) {
  1614. ncurrent++;
  1615. this_device = currentsd[ncurrent];
  1616. }
  1617. *this_device = *tmpdevice;
  1618. hpsa_set_bus_target_lun(this_device, bus, target, lun);
  1619. switch (this_device->devtype) {
  1620. case TYPE_ROM: {
  1621. /* We don't *really* support actual CD-ROM devices,
  1622. * just "One Button Disaster Recovery" tape drive
  1623. * which temporarily pretends to be a CD-ROM drive.
  1624. * So we check that the device is really an OBDR tape
  1625. * device by checking for "$DR-10" in bytes 43-48 of
  1626. * the inquiry data.
  1627. */
  1628. char obdr_sig[7];
  1629. #define OBDR_TAPE_SIG "$DR-10"
  1630. strncpy(obdr_sig, &inq_buff[43], 6);
  1631. obdr_sig[6] = '\0';
  1632. if (strncmp(obdr_sig, OBDR_TAPE_SIG, 6) != 0)
  1633. /* Not OBDR device, ignore it. */
  1634. break;
  1635. }
  1636. ncurrent++;
  1637. break;
  1638. case TYPE_DISK:
  1639. if (i < nphysicals)
  1640. break;
  1641. ncurrent++;
  1642. break;
  1643. case TYPE_TAPE:
  1644. case TYPE_MEDIUM_CHANGER:
  1645. ncurrent++;
  1646. break;
  1647. case TYPE_RAID:
  1648. /* Only present the Smartarray HBA as a RAID controller.
  1649. * If it's a RAID controller other than the HBA itself
  1650. * (an external RAID controller, MSA500 or similar)
  1651. * don't present it.
  1652. */
  1653. if (!is_hba_lunid(lunaddrbytes))
  1654. break;
  1655. ncurrent++;
  1656. break;
  1657. default:
  1658. break;
  1659. }
  1660. if (ncurrent >= HPSA_MAX_SCSI_DEVS_PER_HBA)
  1661. break;
  1662. }
  1663. adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
  1664. out:
  1665. kfree(tmpdevice);
  1666. for (i = 0; i < ndev_allocated; i++)
  1667. kfree(currentsd[i]);
  1668. kfree(currentsd);
  1669. kfree(inq_buff);
  1670. kfree(physdev_list);
  1671. kfree(logdev_list);
  1672. }
  1673. /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
  1674. * dma mapping and fills in the scatter gather entries of the
  1675. * hpsa command, cp.
  1676. */
  1677. static int hpsa_scatter_gather(struct ctlr_info *h,
  1678. struct CommandList *cp,
  1679. struct scsi_cmnd *cmd)
  1680. {
  1681. unsigned int len;
  1682. struct scatterlist *sg;
  1683. u64 addr64;
  1684. int use_sg, i, sg_index, chained;
  1685. struct SGDescriptor *curr_sg;
  1686. BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
  1687. use_sg = scsi_dma_map(cmd);
  1688. if (use_sg < 0)
  1689. return use_sg;
  1690. if (!use_sg)
  1691. goto sglist_finished;
  1692. curr_sg = cp->SG;
  1693. chained = 0;
  1694. sg_index = 0;
  1695. scsi_for_each_sg(cmd, sg, use_sg, i) {
  1696. if (i == h->max_cmd_sg_entries - 1 &&
  1697. use_sg > h->max_cmd_sg_entries) {
  1698. chained = 1;
  1699. curr_sg = h->cmd_sg_list[cp->cmdindex];
  1700. sg_index = 0;
  1701. }
  1702. addr64 = (u64) sg_dma_address(sg);
  1703. len = sg_dma_len(sg);
  1704. curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
  1705. curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
  1706. curr_sg->Len = len;
  1707. curr_sg->Ext = 0; /* we are not chaining */
  1708. curr_sg++;
  1709. }
  1710. if (use_sg + chained > h->maxSG)
  1711. h->maxSG = use_sg + chained;
  1712. if (chained) {
  1713. cp->Header.SGList = h->max_cmd_sg_entries;
  1714. cp->Header.SGTotal = (u16) (use_sg + 1);
  1715. hpsa_map_sg_chain_block(h, cp);
  1716. return 0;
  1717. }
  1718. sglist_finished:
  1719. cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
  1720. cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
  1721. return 0;
  1722. }
  1723. static int hpsa_scsi_queue_command(struct scsi_cmnd *cmd,
  1724. void (*done)(struct scsi_cmnd *))
  1725. {
  1726. struct ctlr_info *h;
  1727. struct hpsa_scsi_dev_t *dev;
  1728. unsigned char scsi3addr[8];
  1729. struct CommandList *c;
  1730. unsigned long flags;
  1731. /* Get the ptr to our adapter structure out of cmd->host. */
  1732. h = sdev_to_hba(cmd->device);
  1733. dev = cmd->device->hostdata;
  1734. if (!dev) {
  1735. cmd->result = DID_NO_CONNECT << 16;
  1736. done(cmd);
  1737. return 0;
  1738. }
  1739. memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
  1740. /* Need a lock as this is being allocated from the pool */
  1741. spin_lock_irqsave(&h->lock, flags);
  1742. c = cmd_alloc(h);
  1743. spin_unlock_irqrestore(&h->lock, flags);
  1744. if (c == NULL) { /* trouble... */
  1745. dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
  1746. return SCSI_MLQUEUE_HOST_BUSY;
  1747. }
  1748. /* Fill in the command list header */
  1749. cmd->scsi_done = done; /* save this for use by completion code */
  1750. /* save c in case we have to abort it */
  1751. cmd->host_scribble = (unsigned char *) c;
  1752. c->cmd_type = CMD_SCSI;
  1753. c->scsi_cmd = cmd;
  1754. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1755. memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
  1756. c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
  1757. c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
  1758. /* Fill in the request block... */
  1759. c->Request.Timeout = 0;
  1760. memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
  1761. BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
  1762. c->Request.CDBLen = cmd->cmd_len;
  1763. memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
  1764. c->Request.Type.Type = TYPE_CMD;
  1765. c->Request.Type.Attribute = ATTR_SIMPLE;
  1766. switch (cmd->sc_data_direction) {
  1767. case DMA_TO_DEVICE:
  1768. c->Request.Type.Direction = XFER_WRITE;
  1769. break;
  1770. case DMA_FROM_DEVICE:
  1771. c->Request.Type.Direction = XFER_READ;
  1772. break;
  1773. case DMA_NONE:
  1774. c->Request.Type.Direction = XFER_NONE;
  1775. break;
  1776. case DMA_BIDIRECTIONAL:
  1777. /* This can happen if a buggy application does a scsi passthru
  1778. * and sets both inlen and outlen to non-zero. ( see
  1779. * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
  1780. */
  1781. c->Request.Type.Direction = XFER_RSVD;
  1782. /* This is technically wrong, and hpsa controllers should
  1783. * reject it with CMD_INVALID, which is the most correct
  1784. * response, but non-fibre backends appear to let it
  1785. * slide by, and give the same results as if this field
  1786. * were set correctly. Either way is acceptable for
  1787. * our purposes here.
  1788. */
  1789. break;
  1790. default:
  1791. dev_err(&h->pdev->dev, "unknown data direction: %d\n",
  1792. cmd->sc_data_direction);
  1793. BUG();
  1794. break;
  1795. }
  1796. if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
  1797. cmd_free(h, c);
  1798. return SCSI_MLQUEUE_HOST_BUSY;
  1799. }
  1800. enqueue_cmd_and_start_io(h, c);
  1801. /* the cmd'll come back via intr handler in complete_scsi_command() */
  1802. return 0;
  1803. }
  1804. static void hpsa_scan_start(struct Scsi_Host *sh)
  1805. {
  1806. struct ctlr_info *h = shost_to_hba(sh);
  1807. unsigned long flags;
  1808. /* wait until any scan already in progress is finished. */
  1809. while (1) {
  1810. spin_lock_irqsave(&h->scan_lock, flags);
  1811. if (h->scan_finished)
  1812. break;
  1813. spin_unlock_irqrestore(&h->scan_lock, flags);
  1814. wait_event(h->scan_wait_queue, h->scan_finished);
  1815. /* Note: We don't need to worry about a race between this
  1816. * thread and driver unload because the midlayer will
  1817. * have incremented the reference count, so unload won't
  1818. * happen if we're in here.
  1819. */
  1820. }
  1821. h->scan_finished = 0; /* mark scan as in progress */
  1822. spin_unlock_irqrestore(&h->scan_lock, flags);
  1823. hpsa_update_scsi_devices(h, h->scsi_host->host_no);
  1824. spin_lock_irqsave(&h->scan_lock, flags);
  1825. h->scan_finished = 1; /* mark scan as finished. */
  1826. wake_up_all(&h->scan_wait_queue);
  1827. spin_unlock_irqrestore(&h->scan_lock, flags);
  1828. }
  1829. static int hpsa_scan_finished(struct Scsi_Host *sh,
  1830. unsigned long elapsed_time)
  1831. {
  1832. struct ctlr_info *h = shost_to_hba(sh);
  1833. unsigned long flags;
  1834. int finished;
  1835. spin_lock_irqsave(&h->scan_lock, flags);
  1836. finished = h->scan_finished;
  1837. spin_unlock_irqrestore(&h->scan_lock, flags);
  1838. return finished;
  1839. }
  1840. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  1841. int qdepth, int reason)
  1842. {
  1843. struct ctlr_info *h = sdev_to_hba(sdev);
  1844. if (reason != SCSI_QDEPTH_DEFAULT)
  1845. return -ENOTSUPP;
  1846. if (qdepth < 1)
  1847. qdepth = 1;
  1848. else
  1849. if (qdepth > h->nr_cmds)
  1850. qdepth = h->nr_cmds;
  1851. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  1852. return sdev->queue_depth;
  1853. }
  1854. static void hpsa_unregister_scsi(struct ctlr_info *h)
  1855. {
  1856. /* we are being forcibly unloaded, and may not refuse. */
  1857. scsi_remove_host(h->scsi_host);
  1858. scsi_host_put(h->scsi_host);
  1859. h->scsi_host = NULL;
  1860. }
  1861. static int hpsa_register_scsi(struct ctlr_info *h)
  1862. {
  1863. int rc;
  1864. rc = hpsa_scsi_detect(h);
  1865. if (rc != 0)
  1866. dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
  1867. " hpsa_scsi_detect(), rc is %d\n", rc);
  1868. return rc;
  1869. }
  1870. static int wait_for_device_to_become_ready(struct ctlr_info *h,
  1871. unsigned char lunaddr[])
  1872. {
  1873. int rc = 0;
  1874. int count = 0;
  1875. int waittime = 1; /* seconds */
  1876. struct CommandList *c;
  1877. c = cmd_special_alloc(h);
  1878. if (!c) {
  1879. dev_warn(&h->pdev->dev, "out of memory in "
  1880. "wait_for_device_to_become_ready.\n");
  1881. return IO_ERROR;
  1882. }
  1883. /* Send test unit ready until device ready, or give up. */
  1884. while (count < HPSA_TUR_RETRY_LIMIT) {
  1885. /* Wait for a bit. do this first, because if we send
  1886. * the TUR right away, the reset will just abort it.
  1887. */
  1888. msleep(1000 * waittime);
  1889. count++;
  1890. /* Increase wait time with each try, up to a point. */
  1891. if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
  1892. waittime = waittime * 2;
  1893. /* Send the Test Unit Ready */
  1894. fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
  1895. hpsa_scsi_do_simple_cmd_core(h, c);
  1896. /* no unmap needed here because no data xfer. */
  1897. if (c->err_info->CommandStatus == CMD_SUCCESS)
  1898. break;
  1899. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  1900. c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
  1901. (c->err_info->SenseInfo[2] == NO_SENSE ||
  1902. c->err_info->SenseInfo[2] == UNIT_ATTENTION))
  1903. break;
  1904. dev_warn(&h->pdev->dev, "waiting %d secs "
  1905. "for device to become ready.\n", waittime);
  1906. rc = 1; /* device not ready. */
  1907. }
  1908. if (rc)
  1909. dev_warn(&h->pdev->dev, "giving up on device.\n");
  1910. else
  1911. dev_warn(&h->pdev->dev, "device is ready.\n");
  1912. cmd_special_free(h, c);
  1913. return rc;
  1914. }
  1915. /* Need at least one of these error handlers to keep ../scsi/hosts.c from
  1916. * complaining. Doing a host- or bus-reset can't do anything good here.
  1917. */
  1918. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
  1919. {
  1920. int rc;
  1921. struct ctlr_info *h;
  1922. struct hpsa_scsi_dev_t *dev;
  1923. /* find the controller to which the command to be aborted was sent */
  1924. h = sdev_to_hba(scsicmd->device);
  1925. if (h == NULL) /* paranoia */
  1926. return FAILED;
  1927. dev = scsicmd->device->hostdata;
  1928. if (!dev) {
  1929. dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
  1930. "device lookup failed.\n");
  1931. return FAILED;
  1932. }
  1933. dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
  1934. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  1935. /* send a reset to the SCSI LUN which the command was sent to */
  1936. rc = hpsa_send_reset(h, dev->scsi3addr);
  1937. if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
  1938. return SUCCESS;
  1939. dev_warn(&h->pdev->dev, "resetting device failed.\n");
  1940. return FAILED;
  1941. }
  1942. /*
  1943. * For operations that cannot sleep, a command block is allocated at init,
  1944. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  1945. * which ones are free or in use. Lock must be held when calling this.
  1946. * cmd_free() is the complement.
  1947. */
  1948. static struct CommandList *cmd_alloc(struct ctlr_info *h)
  1949. {
  1950. struct CommandList *c;
  1951. int i;
  1952. union u64bit temp64;
  1953. dma_addr_t cmd_dma_handle, err_dma_handle;
  1954. do {
  1955. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  1956. if (i == h->nr_cmds)
  1957. return NULL;
  1958. } while (test_and_set_bit
  1959. (i & (BITS_PER_LONG - 1),
  1960. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  1961. c = h->cmd_pool + i;
  1962. memset(c, 0, sizeof(*c));
  1963. cmd_dma_handle = h->cmd_pool_dhandle
  1964. + i * sizeof(*c);
  1965. c->err_info = h->errinfo_pool + i;
  1966. memset(c->err_info, 0, sizeof(*c->err_info));
  1967. err_dma_handle = h->errinfo_pool_dhandle
  1968. + i * sizeof(*c->err_info);
  1969. h->nr_allocs++;
  1970. c->cmdindex = i;
  1971. INIT_HLIST_NODE(&c->list);
  1972. c->busaddr = (u32) cmd_dma_handle;
  1973. temp64.val = (u64) err_dma_handle;
  1974. c->ErrDesc.Addr.lower = temp64.val32.lower;
  1975. c->ErrDesc.Addr.upper = temp64.val32.upper;
  1976. c->ErrDesc.Len = sizeof(*c->err_info);
  1977. c->h = h;
  1978. return c;
  1979. }
  1980. /* For operations that can wait for kmalloc to possibly sleep,
  1981. * this routine can be called. Lock need not be held to call
  1982. * cmd_special_alloc. cmd_special_free() is the complement.
  1983. */
  1984. static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
  1985. {
  1986. struct CommandList *c;
  1987. union u64bit temp64;
  1988. dma_addr_t cmd_dma_handle, err_dma_handle;
  1989. c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
  1990. if (c == NULL)
  1991. return NULL;
  1992. memset(c, 0, sizeof(*c));
  1993. c->cmdindex = -1;
  1994. c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
  1995. &err_dma_handle);
  1996. if (c->err_info == NULL) {
  1997. pci_free_consistent(h->pdev,
  1998. sizeof(*c), c, cmd_dma_handle);
  1999. return NULL;
  2000. }
  2001. memset(c->err_info, 0, sizeof(*c->err_info));
  2002. INIT_HLIST_NODE(&c->list);
  2003. c->busaddr = (u32) cmd_dma_handle;
  2004. temp64.val = (u64) err_dma_handle;
  2005. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2006. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2007. c->ErrDesc.Len = sizeof(*c->err_info);
  2008. c->h = h;
  2009. return c;
  2010. }
  2011. static void cmd_free(struct ctlr_info *h, struct CommandList *c)
  2012. {
  2013. int i;
  2014. i = c - h->cmd_pool;
  2015. clear_bit(i & (BITS_PER_LONG - 1),
  2016. h->cmd_pool_bits + (i / BITS_PER_LONG));
  2017. h->nr_frees++;
  2018. }
  2019. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
  2020. {
  2021. union u64bit temp64;
  2022. temp64.val32.lower = c->ErrDesc.Addr.lower;
  2023. temp64.val32.upper = c->ErrDesc.Addr.upper;
  2024. pci_free_consistent(h->pdev, sizeof(*c->err_info),
  2025. c->err_info, (dma_addr_t) temp64.val);
  2026. pci_free_consistent(h->pdev, sizeof(*c),
  2027. c, (dma_addr_t) c->busaddr);
  2028. }
  2029. #ifdef CONFIG_COMPAT
  2030. static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
  2031. {
  2032. IOCTL32_Command_struct __user *arg32 =
  2033. (IOCTL32_Command_struct __user *) arg;
  2034. IOCTL_Command_struct arg64;
  2035. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  2036. int err;
  2037. u32 cp;
  2038. err = 0;
  2039. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2040. sizeof(arg64.LUN_info));
  2041. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2042. sizeof(arg64.Request));
  2043. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2044. sizeof(arg64.error_info));
  2045. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2046. err |= get_user(cp, &arg32->buf);
  2047. arg64.buf = compat_ptr(cp);
  2048. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2049. if (err)
  2050. return -EFAULT;
  2051. err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
  2052. if (err)
  2053. return err;
  2054. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2055. sizeof(arg32->error_info));
  2056. if (err)
  2057. return -EFAULT;
  2058. return err;
  2059. }
  2060. static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
  2061. int cmd, void *arg)
  2062. {
  2063. BIG_IOCTL32_Command_struct __user *arg32 =
  2064. (BIG_IOCTL32_Command_struct __user *) arg;
  2065. BIG_IOCTL_Command_struct arg64;
  2066. BIG_IOCTL_Command_struct __user *p =
  2067. compat_alloc_user_space(sizeof(arg64));
  2068. int err;
  2069. u32 cp;
  2070. err = 0;
  2071. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2072. sizeof(arg64.LUN_info));
  2073. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2074. sizeof(arg64.Request));
  2075. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2076. sizeof(arg64.error_info));
  2077. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2078. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  2079. err |= get_user(cp, &arg32->buf);
  2080. arg64.buf = compat_ptr(cp);
  2081. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2082. if (err)
  2083. return -EFAULT;
  2084. err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
  2085. if (err)
  2086. return err;
  2087. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2088. sizeof(arg32->error_info));
  2089. if (err)
  2090. return -EFAULT;
  2091. return err;
  2092. }
  2093. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2094. {
  2095. switch (cmd) {
  2096. case CCISS_GETPCIINFO:
  2097. case CCISS_GETINTINFO:
  2098. case CCISS_SETINTINFO:
  2099. case CCISS_GETNODENAME:
  2100. case CCISS_SETNODENAME:
  2101. case CCISS_GETHEARTBEAT:
  2102. case CCISS_GETBUSTYPES:
  2103. case CCISS_GETFIRMVER:
  2104. case CCISS_GETDRIVVER:
  2105. case CCISS_REVALIDVOLS:
  2106. case CCISS_DEREGDISK:
  2107. case CCISS_REGNEWDISK:
  2108. case CCISS_REGNEWD:
  2109. case CCISS_RESCANDISK:
  2110. case CCISS_GETLUNINFO:
  2111. return hpsa_ioctl(dev, cmd, arg);
  2112. case CCISS_PASSTHRU32:
  2113. return hpsa_ioctl32_passthru(dev, cmd, arg);
  2114. case CCISS_BIG_PASSTHRU32:
  2115. return hpsa_ioctl32_big_passthru(dev, cmd, arg);
  2116. default:
  2117. return -ENOIOCTLCMD;
  2118. }
  2119. }
  2120. #endif
  2121. static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
  2122. {
  2123. struct hpsa_pci_info pciinfo;
  2124. if (!argp)
  2125. return -EINVAL;
  2126. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  2127. pciinfo.bus = h->pdev->bus->number;
  2128. pciinfo.dev_fn = h->pdev->devfn;
  2129. pciinfo.board_id = h->board_id;
  2130. if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
  2131. return -EFAULT;
  2132. return 0;
  2133. }
  2134. static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
  2135. {
  2136. DriverVer_type DriverVer;
  2137. unsigned char vmaj, vmin, vsubmin;
  2138. int rc;
  2139. rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
  2140. &vmaj, &vmin, &vsubmin);
  2141. if (rc != 3) {
  2142. dev_info(&h->pdev->dev, "driver version string '%s' "
  2143. "unrecognized.", HPSA_DRIVER_VERSION);
  2144. vmaj = 0;
  2145. vmin = 0;
  2146. vsubmin = 0;
  2147. }
  2148. DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
  2149. if (!argp)
  2150. return -EINVAL;
  2151. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  2152. return -EFAULT;
  2153. return 0;
  2154. }
  2155. static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2156. {
  2157. IOCTL_Command_struct iocommand;
  2158. struct CommandList *c;
  2159. char *buff = NULL;
  2160. union u64bit temp64;
  2161. if (!argp)
  2162. return -EINVAL;
  2163. if (!capable(CAP_SYS_RAWIO))
  2164. return -EPERM;
  2165. if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
  2166. return -EFAULT;
  2167. if ((iocommand.buf_size < 1) &&
  2168. (iocommand.Request.Type.Direction != XFER_NONE)) {
  2169. return -EINVAL;
  2170. }
  2171. if (iocommand.buf_size > 0) {
  2172. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  2173. if (buff == NULL)
  2174. return -EFAULT;
  2175. }
  2176. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  2177. /* Copy the data into the buffer we created */
  2178. if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
  2179. kfree(buff);
  2180. return -EFAULT;
  2181. }
  2182. } else
  2183. memset(buff, 0, iocommand.buf_size);
  2184. c = cmd_special_alloc(h);
  2185. if (c == NULL) {
  2186. kfree(buff);
  2187. return -ENOMEM;
  2188. }
  2189. /* Fill in the command type */
  2190. c->cmd_type = CMD_IOCTL_PEND;
  2191. /* Fill in Command Header */
  2192. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2193. if (iocommand.buf_size > 0) { /* buffer to fill */
  2194. c->Header.SGList = 1;
  2195. c->Header.SGTotal = 1;
  2196. } else { /* no buffers to fill */
  2197. c->Header.SGList = 0;
  2198. c->Header.SGTotal = 0;
  2199. }
  2200. memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
  2201. /* use the kernel address the cmd block for tag */
  2202. c->Header.Tag.lower = c->busaddr;
  2203. /* Fill in Request block */
  2204. memcpy(&c->Request, &iocommand.Request,
  2205. sizeof(c->Request));
  2206. /* Fill in the scatter gather information */
  2207. if (iocommand.buf_size > 0) {
  2208. temp64.val = pci_map_single(h->pdev, buff,
  2209. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  2210. c->SG[0].Addr.lower = temp64.val32.lower;
  2211. c->SG[0].Addr.upper = temp64.val32.upper;
  2212. c->SG[0].Len = iocommand.buf_size;
  2213. c->SG[0].Ext = 0; /* we are not chaining*/
  2214. }
  2215. hpsa_scsi_do_simple_cmd_core(h, c);
  2216. hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
  2217. check_ioctl_unit_attention(h, c);
  2218. /* Copy the error information out */
  2219. memcpy(&iocommand.error_info, c->err_info,
  2220. sizeof(iocommand.error_info));
  2221. if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
  2222. kfree(buff);
  2223. cmd_special_free(h, c);
  2224. return -EFAULT;
  2225. }
  2226. if (iocommand.Request.Type.Direction == XFER_READ) {
  2227. /* Copy the data out of the buffer we created */
  2228. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  2229. kfree(buff);
  2230. cmd_special_free(h, c);
  2231. return -EFAULT;
  2232. }
  2233. }
  2234. kfree(buff);
  2235. cmd_special_free(h, c);
  2236. return 0;
  2237. }
  2238. static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2239. {
  2240. BIG_IOCTL_Command_struct *ioc;
  2241. struct CommandList *c;
  2242. unsigned char **buff = NULL;
  2243. int *buff_size = NULL;
  2244. union u64bit temp64;
  2245. BYTE sg_used = 0;
  2246. int status = 0;
  2247. int i;
  2248. u32 left;
  2249. u32 sz;
  2250. BYTE __user *data_ptr;
  2251. if (!argp)
  2252. return -EINVAL;
  2253. if (!capable(CAP_SYS_RAWIO))
  2254. return -EPERM;
  2255. ioc = (BIG_IOCTL_Command_struct *)
  2256. kmalloc(sizeof(*ioc), GFP_KERNEL);
  2257. if (!ioc) {
  2258. status = -ENOMEM;
  2259. goto cleanup1;
  2260. }
  2261. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  2262. status = -EFAULT;
  2263. goto cleanup1;
  2264. }
  2265. if ((ioc->buf_size < 1) &&
  2266. (ioc->Request.Type.Direction != XFER_NONE)) {
  2267. status = -EINVAL;
  2268. goto cleanup1;
  2269. }
  2270. /* Check kmalloc limits using all SGs */
  2271. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  2272. status = -EINVAL;
  2273. goto cleanup1;
  2274. }
  2275. if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
  2276. status = -EINVAL;
  2277. goto cleanup1;
  2278. }
  2279. buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
  2280. if (!buff) {
  2281. status = -ENOMEM;
  2282. goto cleanup1;
  2283. }
  2284. buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
  2285. if (!buff_size) {
  2286. status = -ENOMEM;
  2287. goto cleanup1;
  2288. }
  2289. left = ioc->buf_size;
  2290. data_ptr = ioc->buf;
  2291. while (left) {
  2292. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  2293. buff_size[sg_used] = sz;
  2294. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  2295. if (buff[sg_used] == NULL) {
  2296. status = -ENOMEM;
  2297. goto cleanup1;
  2298. }
  2299. if (ioc->Request.Type.Direction == XFER_WRITE) {
  2300. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  2301. status = -ENOMEM;
  2302. goto cleanup1;
  2303. }
  2304. } else
  2305. memset(buff[sg_used], 0, sz);
  2306. left -= sz;
  2307. data_ptr += sz;
  2308. sg_used++;
  2309. }
  2310. c = cmd_special_alloc(h);
  2311. if (c == NULL) {
  2312. status = -ENOMEM;
  2313. goto cleanup1;
  2314. }
  2315. c->cmd_type = CMD_IOCTL_PEND;
  2316. c->Header.ReplyQueue = 0;
  2317. if (ioc->buf_size > 0) {
  2318. c->Header.SGList = sg_used;
  2319. c->Header.SGTotal = sg_used;
  2320. } else {
  2321. c->Header.SGList = 0;
  2322. c->Header.SGTotal = 0;
  2323. }
  2324. memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
  2325. c->Header.Tag.lower = c->busaddr;
  2326. memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
  2327. if (ioc->buf_size > 0) {
  2328. int i;
  2329. for (i = 0; i < sg_used; i++) {
  2330. temp64.val = pci_map_single(h->pdev, buff[i],
  2331. buff_size[i], PCI_DMA_BIDIRECTIONAL);
  2332. c->SG[i].Addr.lower = temp64.val32.lower;
  2333. c->SG[i].Addr.upper = temp64.val32.upper;
  2334. c->SG[i].Len = buff_size[i];
  2335. /* we are not chaining */
  2336. c->SG[i].Ext = 0;
  2337. }
  2338. }
  2339. hpsa_scsi_do_simple_cmd_core(h, c);
  2340. hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
  2341. check_ioctl_unit_attention(h, c);
  2342. /* Copy the error information out */
  2343. memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
  2344. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  2345. cmd_special_free(h, c);
  2346. status = -EFAULT;
  2347. goto cleanup1;
  2348. }
  2349. if (ioc->Request.Type.Direction == XFER_READ) {
  2350. /* Copy the data out of the buffer we created */
  2351. BYTE __user *ptr = ioc->buf;
  2352. for (i = 0; i < sg_used; i++) {
  2353. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  2354. cmd_special_free(h, c);
  2355. status = -EFAULT;
  2356. goto cleanup1;
  2357. }
  2358. ptr += buff_size[i];
  2359. }
  2360. }
  2361. cmd_special_free(h, c);
  2362. status = 0;
  2363. cleanup1:
  2364. if (buff) {
  2365. for (i = 0; i < sg_used; i++)
  2366. kfree(buff[i]);
  2367. kfree(buff);
  2368. }
  2369. kfree(buff_size);
  2370. kfree(ioc);
  2371. return status;
  2372. }
  2373. static void check_ioctl_unit_attention(struct ctlr_info *h,
  2374. struct CommandList *c)
  2375. {
  2376. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2377. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  2378. (void) check_for_unit_attention(h, c);
  2379. }
  2380. /*
  2381. * ioctl
  2382. */
  2383. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2384. {
  2385. struct ctlr_info *h;
  2386. void __user *argp = (void __user *)arg;
  2387. h = sdev_to_hba(dev);
  2388. switch (cmd) {
  2389. case CCISS_DEREGDISK:
  2390. case CCISS_REGNEWDISK:
  2391. case CCISS_REGNEWD:
  2392. hpsa_scan_start(h->scsi_host);
  2393. return 0;
  2394. case CCISS_GETPCIINFO:
  2395. return hpsa_getpciinfo_ioctl(h, argp);
  2396. case CCISS_GETDRIVVER:
  2397. return hpsa_getdrivver_ioctl(h, argp);
  2398. case CCISS_PASSTHRU:
  2399. return hpsa_passthru_ioctl(h, argp);
  2400. case CCISS_BIG_PASSTHRU:
  2401. return hpsa_big_passthru_ioctl(h, argp);
  2402. default:
  2403. return -ENOTTY;
  2404. }
  2405. }
  2406. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  2407. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  2408. int cmd_type)
  2409. {
  2410. int pci_dir = XFER_NONE;
  2411. c->cmd_type = CMD_IOCTL_PEND;
  2412. c->Header.ReplyQueue = 0;
  2413. if (buff != NULL && size > 0) {
  2414. c->Header.SGList = 1;
  2415. c->Header.SGTotal = 1;
  2416. } else {
  2417. c->Header.SGList = 0;
  2418. c->Header.SGTotal = 0;
  2419. }
  2420. c->Header.Tag.lower = c->busaddr;
  2421. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2422. c->Request.Type.Type = cmd_type;
  2423. if (cmd_type == TYPE_CMD) {
  2424. switch (cmd) {
  2425. case HPSA_INQUIRY:
  2426. /* are we trying to read a vital product page */
  2427. if (page_code != 0) {
  2428. c->Request.CDB[1] = 0x01;
  2429. c->Request.CDB[2] = page_code;
  2430. }
  2431. c->Request.CDBLen = 6;
  2432. c->Request.Type.Attribute = ATTR_SIMPLE;
  2433. c->Request.Type.Direction = XFER_READ;
  2434. c->Request.Timeout = 0;
  2435. c->Request.CDB[0] = HPSA_INQUIRY;
  2436. c->Request.CDB[4] = size & 0xFF;
  2437. break;
  2438. case HPSA_REPORT_LOG:
  2439. case HPSA_REPORT_PHYS:
  2440. /* Talking to controller so It's a physical command
  2441. mode = 00 target = 0. Nothing to write.
  2442. */
  2443. c->Request.CDBLen = 12;
  2444. c->Request.Type.Attribute = ATTR_SIMPLE;
  2445. c->Request.Type.Direction = XFER_READ;
  2446. c->Request.Timeout = 0;
  2447. c->Request.CDB[0] = cmd;
  2448. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2449. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2450. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2451. c->Request.CDB[9] = size & 0xFF;
  2452. break;
  2453. case HPSA_CACHE_FLUSH:
  2454. c->Request.CDBLen = 12;
  2455. c->Request.Type.Attribute = ATTR_SIMPLE;
  2456. c->Request.Type.Direction = XFER_WRITE;
  2457. c->Request.Timeout = 0;
  2458. c->Request.CDB[0] = BMIC_WRITE;
  2459. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2460. break;
  2461. case TEST_UNIT_READY:
  2462. c->Request.CDBLen = 6;
  2463. c->Request.Type.Attribute = ATTR_SIMPLE;
  2464. c->Request.Type.Direction = XFER_NONE;
  2465. c->Request.Timeout = 0;
  2466. break;
  2467. default:
  2468. dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
  2469. BUG();
  2470. return;
  2471. }
  2472. } else if (cmd_type == TYPE_MSG) {
  2473. switch (cmd) {
  2474. case HPSA_DEVICE_RESET_MSG:
  2475. c->Request.CDBLen = 16;
  2476. c->Request.Type.Type = 1; /* It is a MSG not a CMD */
  2477. c->Request.Type.Attribute = ATTR_SIMPLE;
  2478. c->Request.Type.Direction = XFER_NONE;
  2479. c->Request.Timeout = 0; /* Don't time out */
  2480. c->Request.CDB[0] = 0x01; /* RESET_MSG is 0x01 */
  2481. c->Request.CDB[1] = 0x03; /* Reset target above */
  2482. /* If bytes 4-7 are zero, it means reset the */
  2483. /* LunID device */
  2484. c->Request.CDB[4] = 0x00;
  2485. c->Request.CDB[5] = 0x00;
  2486. c->Request.CDB[6] = 0x00;
  2487. c->Request.CDB[7] = 0x00;
  2488. break;
  2489. default:
  2490. dev_warn(&h->pdev->dev, "unknown message type %d\n",
  2491. cmd);
  2492. BUG();
  2493. }
  2494. } else {
  2495. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2496. BUG();
  2497. }
  2498. switch (c->Request.Type.Direction) {
  2499. case XFER_READ:
  2500. pci_dir = PCI_DMA_FROMDEVICE;
  2501. break;
  2502. case XFER_WRITE:
  2503. pci_dir = PCI_DMA_TODEVICE;
  2504. break;
  2505. case XFER_NONE:
  2506. pci_dir = PCI_DMA_NONE;
  2507. break;
  2508. default:
  2509. pci_dir = PCI_DMA_BIDIRECTIONAL;
  2510. }
  2511. hpsa_map_one(h->pdev, c, buff, size, pci_dir);
  2512. return;
  2513. }
  2514. /*
  2515. * Map (physical) PCI mem into (virtual) kernel space
  2516. */
  2517. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2518. {
  2519. ulong page_base = ((ulong) base) & PAGE_MASK;
  2520. ulong page_offs = ((ulong) base) - page_base;
  2521. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2522. return page_remapped ? (page_remapped + page_offs) : NULL;
  2523. }
  2524. /* Takes cmds off the submission queue and sends them to the hardware,
  2525. * then puts them on the queue of cmds waiting for completion.
  2526. */
  2527. static void start_io(struct ctlr_info *h)
  2528. {
  2529. struct CommandList *c;
  2530. while (!hlist_empty(&h->reqQ)) {
  2531. c = hlist_entry(h->reqQ.first, struct CommandList, list);
  2532. /* can't do anything if fifo is full */
  2533. if ((h->access.fifo_full(h))) {
  2534. dev_warn(&h->pdev->dev, "fifo full\n");
  2535. break;
  2536. }
  2537. /* Get the first entry from the Request Q */
  2538. removeQ(c);
  2539. h->Qdepth--;
  2540. /* Tell the controller execute command */
  2541. h->access.submit_command(h, c);
  2542. /* Put job onto the completed Q */
  2543. addQ(&h->cmpQ, c);
  2544. }
  2545. }
  2546. static inline unsigned long get_next_completion(struct ctlr_info *h)
  2547. {
  2548. return h->access.command_completed(h);
  2549. }
  2550. static inline bool interrupt_pending(struct ctlr_info *h)
  2551. {
  2552. return h->access.intr_pending(h);
  2553. }
  2554. static inline long interrupt_not_for_us(struct ctlr_info *h)
  2555. {
  2556. return !(h->msi_vector || h->msix_vector) &&
  2557. ((h->access.intr_pending(h) == 0) ||
  2558. (h->interrupts_enabled == 0));
  2559. }
  2560. static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
  2561. u32 raw_tag)
  2562. {
  2563. if (unlikely(tag_index >= h->nr_cmds)) {
  2564. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  2565. return 1;
  2566. }
  2567. return 0;
  2568. }
  2569. static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
  2570. {
  2571. removeQ(c);
  2572. if (likely(c->cmd_type == CMD_SCSI))
  2573. complete_scsi_command(c, 0, raw_tag);
  2574. else if (c->cmd_type == CMD_IOCTL_PEND)
  2575. complete(c->waiting);
  2576. }
  2577. static inline u32 hpsa_tag_contains_index(u32 tag)
  2578. {
  2579. #define DIRECT_LOOKUP_BIT 0x10
  2580. return tag & DIRECT_LOOKUP_BIT;
  2581. }
  2582. static inline u32 hpsa_tag_to_index(u32 tag)
  2583. {
  2584. #define DIRECT_LOOKUP_SHIFT 5
  2585. return tag >> DIRECT_LOOKUP_SHIFT;
  2586. }
  2587. static inline u32 hpsa_tag_discard_error_bits(u32 tag)
  2588. {
  2589. #define HPSA_ERROR_BITS 0x03
  2590. return tag & ~HPSA_ERROR_BITS;
  2591. }
  2592. /* process completion of an indexed ("direct lookup") command */
  2593. static inline u32 process_indexed_cmd(struct ctlr_info *h,
  2594. u32 raw_tag)
  2595. {
  2596. u32 tag_index;
  2597. struct CommandList *c;
  2598. tag_index = hpsa_tag_to_index(raw_tag);
  2599. if (bad_tag(h, tag_index, raw_tag))
  2600. return next_command(h);
  2601. c = h->cmd_pool + tag_index;
  2602. finish_cmd(c, raw_tag);
  2603. return next_command(h);
  2604. }
  2605. /* process completion of a non-indexed command */
  2606. static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
  2607. u32 raw_tag)
  2608. {
  2609. u32 tag;
  2610. struct CommandList *c = NULL;
  2611. struct hlist_node *tmp;
  2612. tag = hpsa_tag_discard_error_bits(raw_tag);
  2613. hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
  2614. if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
  2615. finish_cmd(c, raw_tag);
  2616. return next_command(h);
  2617. }
  2618. }
  2619. bad_tag(h, h->nr_cmds + 1, raw_tag);
  2620. return next_command(h);
  2621. }
  2622. static irqreturn_t do_hpsa_intr(int irq, void *dev_id)
  2623. {
  2624. struct ctlr_info *h = dev_id;
  2625. unsigned long flags;
  2626. u32 raw_tag;
  2627. if (interrupt_not_for_us(h))
  2628. return IRQ_NONE;
  2629. spin_lock_irqsave(&h->lock, flags);
  2630. raw_tag = get_next_completion(h);
  2631. while (raw_tag != FIFO_EMPTY) {
  2632. if (hpsa_tag_contains_index(raw_tag))
  2633. raw_tag = process_indexed_cmd(h, raw_tag);
  2634. else
  2635. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2636. }
  2637. spin_unlock_irqrestore(&h->lock, flags);
  2638. return IRQ_HANDLED;
  2639. }
  2640. /* Send a message CDB to the firmware. */
  2641. static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
  2642. unsigned char type)
  2643. {
  2644. struct Command {
  2645. struct CommandListHeader CommandHeader;
  2646. struct RequestBlock Request;
  2647. struct ErrDescriptor ErrorDescriptor;
  2648. };
  2649. struct Command *cmd;
  2650. static const size_t cmd_sz = sizeof(*cmd) +
  2651. sizeof(cmd->ErrorDescriptor);
  2652. dma_addr_t paddr64;
  2653. uint32_t paddr32, tag;
  2654. void __iomem *vaddr;
  2655. int i, err;
  2656. vaddr = pci_ioremap_bar(pdev, 0);
  2657. if (vaddr == NULL)
  2658. return -ENOMEM;
  2659. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  2660. * CCISS commands, so they must be allocated from the lower 4GiB of
  2661. * memory.
  2662. */
  2663. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  2664. if (err) {
  2665. iounmap(vaddr);
  2666. return -ENOMEM;
  2667. }
  2668. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  2669. if (cmd == NULL) {
  2670. iounmap(vaddr);
  2671. return -ENOMEM;
  2672. }
  2673. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  2674. * although there's no guarantee, we assume that the address is at
  2675. * least 4-byte aligned (most likely, it's page-aligned).
  2676. */
  2677. paddr32 = paddr64;
  2678. cmd->CommandHeader.ReplyQueue = 0;
  2679. cmd->CommandHeader.SGList = 0;
  2680. cmd->CommandHeader.SGTotal = 0;
  2681. cmd->CommandHeader.Tag.lower = paddr32;
  2682. cmd->CommandHeader.Tag.upper = 0;
  2683. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  2684. cmd->Request.CDBLen = 16;
  2685. cmd->Request.Type.Type = TYPE_MSG;
  2686. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  2687. cmd->Request.Type.Direction = XFER_NONE;
  2688. cmd->Request.Timeout = 0; /* Don't time out */
  2689. cmd->Request.CDB[0] = opcode;
  2690. cmd->Request.CDB[1] = type;
  2691. memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
  2692. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
  2693. cmd->ErrorDescriptor.Addr.upper = 0;
  2694. cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
  2695. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  2696. for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
  2697. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  2698. if (hpsa_tag_discard_error_bits(tag) == paddr32)
  2699. break;
  2700. msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
  2701. }
  2702. iounmap(vaddr);
  2703. /* we leak the DMA buffer here ... no choice since the controller could
  2704. * still complete the command.
  2705. */
  2706. if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
  2707. dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
  2708. opcode, type);
  2709. return -ETIMEDOUT;
  2710. }
  2711. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  2712. if (tag & HPSA_ERROR_BIT) {
  2713. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  2714. opcode, type);
  2715. return -EIO;
  2716. }
  2717. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  2718. opcode, type);
  2719. return 0;
  2720. }
  2721. #define hpsa_soft_reset_controller(p) hpsa_message(p, 1, 0)
  2722. #define hpsa_noop(p) hpsa_message(p, 3, 0)
  2723. static __devinit int hpsa_reset_msi(struct pci_dev *pdev)
  2724. {
  2725. /* the #defines are stolen from drivers/pci/msi.h. */
  2726. #define msi_control_reg(base) (base + PCI_MSI_FLAGS)
  2727. #define PCI_MSIX_FLAGS_ENABLE (1 << 15)
  2728. int pos;
  2729. u16 control = 0;
  2730. pos = pci_find_capability(pdev, PCI_CAP_ID_MSI);
  2731. if (pos) {
  2732. pci_read_config_word(pdev, msi_control_reg(pos), &control);
  2733. if (control & PCI_MSI_FLAGS_ENABLE) {
  2734. dev_info(&pdev->dev, "resetting MSI\n");
  2735. pci_write_config_word(pdev, msi_control_reg(pos),
  2736. control & ~PCI_MSI_FLAGS_ENABLE);
  2737. }
  2738. }
  2739. pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
  2740. if (pos) {
  2741. pci_read_config_word(pdev, msi_control_reg(pos), &control);
  2742. if (control & PCI_MSIX_FLAGS_ENABLE) {
  2743. dev_info(&pdev->dev, "resetting MSI-X\n");
  2744. pci_write_config_word(pdev, msi_control_reg(pos),
  2745. control & ~PCI_MSIX_FLAGS_ENABLE);
  2746. }
  2747. }
  2748. return 0;
  2749. }
  2750. /* This does a hard reset of the controller using PCI power management
  2751. * states.
  2752. */
  2753. static __devinit int hpsa_hard_reset_controller(struct pci_dev *pdev)
  2754. {
  2755. u16 pmcsr, saved_config_space[32];
  2756. int i, pos;
  2757. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  2758. /* This is very nearly the same thing as
  2759. *
  2760. * pci_save_state(pci_dev);
  2761. * pci_set_power_state(pci_dev, PCI_D3hot);
  2762. * pci_set_power_state(pci_dev, PCI_D0);
  2763. * pci_restore_state(pci_dev);
  2764. *
  2765. * but we can't use these nice canned kernel routines on
  2766. * kexec, because they also check the MSI/MSI-X state in PCI
  2767. * configuration space and do the wrong thing when it is
  2768. * set/cleared. Also, the pci_save/restore_state functions
  2769. * violate the ordering requirements for restoring the
  2770. * configuration space from the CCISS document (see the
  2771. * comment below). So we roll our own ....
  2772. */
  2773. for (i = 0; i < 32; i++)
  2774. pci_read_config_word(pdev, 2*i, &saved_config_space[i]);
  2775. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  2776. if (pos == 0) {
  2777. dev_err(&pdev->dev,
  2778. "hpsa_reset_controller: PCI PM not supported\n");
  2779. return -ENODEV;
  2780. }
  2781. /* Quoting from the Open CISS Specification: "The Power
  2782. * Management Control/Status Register (CSR) controls the power
  2783. * state of the device. The normal operating state is D0,
  2784. * CSR=00h. The software off state is D3, CSR=03h. To reset
  2785. * the controller, place the interface device in D3 then to
  2786. * D0, this causes a secondary PCI reset which will reset the
  2787. * controller."
  2788. */
  2789. /* enter the D3hot power management state */
  2790. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  2791. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2792. pmcsr |= PCI_D3hot;
  2793. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2794. msleep(500);
  2795. /* enter the D0 power management state */
  2796. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2797. pmcsr |= PCI_D0;
  2798. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2799. msleep(500);
  2800. /* Restore the PCI configuration space. The Open CISS
  2801. * Specification says, "Restore the PCI Configuration
  2802. * Registers, offsets 00h through 60h. It is important to
  2803. * restore the command register, 16-bits at offset 04h,
  2804. * last. Do not restore the configuration status register,
  2805. * 16-bits at offset 06h." Note that the offset is 2*i.
  2806. */
  2807. for (i = 0; i < 32; i++) {
  2808. if (i == 2 || i == 3)
  2809. continue;
  2810. pci_write_config_word(pdev, 2*i, saved_config_space[i]);
  2811. }
  2812. wmb();
  2813. pci_write_config_word(pdev, 4, saved_config_space[2]);
  2814. return 0;
  2815. }
  2816. /*
  2817. * We cannot read the structure directly, for portability we must use
  2818. * the io functions.
  2819. * This is for debug only.
  2820. */
  2821. static void print_cfg_table(struct device *dev, struct CfgTable *tb)
  2822. {
  2823. #ifdef HPSA_DEBUG
  2824. int i;
  2825. char temp_name[17];
  2826. dev_info(dev, "Controller Configuration information\n");
  2827. dev_info(dev, "------------------------------------\n");
  2828. for (i = 0; i < 4; i++)
  2829. temp_name[i] = readb(&(tb->Signature[i]));
  2830. temp_name[4] = '\0';
  2831. dev_info(dev, " Signature = %s\n", temp_name);
  2832. dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
  2833. dev_info(dev, " Transport methods supported = 0x%x\n",
  2834. readl(&(tb->TransportSupport)));
  2835. dev_info(dev, " Transport methods active = 0x%x\n",
  2836. readl(&(tb->TransportActive)));
  2837. dev_info(dev, " Requested transport Method = 0x%x\n",
  2838. readl(&(tb->HostWrite.TransportRequest)));
  2839. dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
  2840. readl(&(tb->HostWrite.CoalIntDelay)));
  2841. dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
  2842. readl(&(tb->HostWrite.CoalIntCount)));
  2843. dev_info(dev, " Max outstanding commands = 0x%d\n",
  2844. readl(&(tb->CmdsOutMax)));
  2845. dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
  2846. for (i = 0; i < 16; i++)
  2847. temp_name[i] = readb(&(tb->ServerName[i]));
  2848. temp_name[16] = '\0';
  2849. dev_info(dev, " Server Name = %s\n", temp_name);
  2850. dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
  2851. readl(&(tb->HeartBeat)));
  2852. #endif /* HPSA_DEBUG */
  2853. }
  2854. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  2855. {
  2856. int i, offset, mem_type, bar_type;
  2857. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  2858. return 0;
  2859. offset = 0;
  2860. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  2861. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  2862. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  2863. offset += 4;
  2864. else {
  2865. mem_type = pci_resource_flags(pdev, i) &
  2866. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  2867. switch (mem_type) {
  2868. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  2869. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  2870. offset += 4; /* 32 bit */
  2871. break;
  2872. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  2873. offset += 8;
  2874. break;
  2875. default: /* reserved in PCI 2.2 */
  2876. dev_warn(&pdev->dev,
  2877. "base address is invalid\n");
  2878. return -1;
  2879. break;
  2880. }
  2881. }
  2882. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  2883. return i + 1;
  2884. }
  2885. return -1;
  2886. }
  2887. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  2888. * controllers that are capable. If not, we use IO-APIC mode.
  2889. */
  2890. static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
  2891. {
  2892. #ifdef CONFIG_PCI_MSI
  2893. int err;
  2894. struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
  2895. {0, 2}, {0, 3}
  2896. };
  2897. /* Some boards advertise MSI but don't really support it */
  2898. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  2899. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  2900. goto default_int_mode;
  2901. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  2902. dev_info(&h->pdev->dev, "MSIX\n");
  2903. err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
  2904. if (!err) {
  2905. h->intr[0] = hpsa_msix_entries[0].vector;
  2906. h->intr[1] = hpsa_msix_entries[1].vector;
  2907. h->intr[2] = hpsa_msix_entries[2].vector;
  2908. h->intr[3] = hpsa_msix_entries[3].vector;
  2909. h->msix_vector = 1;
  2910. return;
  2911. }
  2912. if (err > 0) {
  2913. dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
  2914. "available\n", err);
  2915. goto default_int_mode;
  2916. } else {
  2917. dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
  2918. err);
  2919. goto default_int_mode;
  2920. }
  2921. }
  2922. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  2923. dev_info(&h->pdev->dev, "MSI\n");
  2924. if (!pci_enable_msi(h->pdev))
  2925. h->msi_vector = 1;
  2926. else
  2927. dev_warn(&h->pdev->dev, "MSI init failed\n");
  2928. }
  2929. default_int_mode:
  2930. #endif /* CONFIG_PCI_MSI */
  2931. /* if we get here we're going to use the default interrupt mode */
  2932. h->intr[PERF_MODE_INT] = h->pdev->irq;
  2933. }
  2934. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  2935. {
  2936. int i;
  2937. u32 subsystem_vendor_id, subsystem_device_id;
  2938. subsystem_vendor_id = pdev->subsystem_vendor;
  2939. subsystem_device_id = pdev->subsystem_device;
  2940. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  2941. subsystem_vendor_id;
  2942. for (i = 0; i < ARRAY_SIZE(products); i++)
  2943. if (*board_id == products[i].board_id)
  2944. return i;
  2945. if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
  2946. subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
  2947. !hpsa_allow_any) {
  2948. dev_warn(&pdev->dev, "unrecognized board ID: "
  2949. "0x%08x, ignoring.\n", *board_id);
  2950. return -ENODEV;
  2951. }
  2952. return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
  2953. }
  2954. static inline bool hpsa_board_disabled(struct pci_dev *pdev)
  2955. {
  2956. u16 command;
  2957. (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
  2958. return ((command & PCI_COMMAND_MEMORY) == 0);
  2959. }
  2960. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  2961. unsigned long *memory_bar)
  2962. {
  2963. int i;
  2964. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  2965. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  2966. /* addressing mode bits already removed */
  2967. *memory_bar = pci_resource_start(pdev, i);
  2968. dev_dbg(&pdev->dev, "memory BAR = %lx\n",
  2969. *memory_bar);
  2970. return 0;
  2971. }
  2972. dev_warn(&pdev->dev, "no memory BAR found\n");
  2973. return -ENODEV;
  2974. }
  2975. static int __devinit hpsa_wait_for_board_ready(struct ctlr_info *h)
  2976. {
  2977. int i;
  2978. u32 scratchpad;
  2979. for (i = 0; i < HPSA_BOARD_READY_ITERATIONS; i++) {
  2980. scratchpad = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
  2981. if (scratchpad == HPSA_FIRMWARE_READY)
  2982. return 0;
  2983. msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
  2984. }
  2985. dev_warn(&h->pdev->dev, "board not ready, timed out.\n");
  2986. return -ENODEV;
  2987. }
  2988. static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
  2989. {
  2990. u64 cfg_offset;
  2991. u32 cfg_base_addr;
  2992. u64 cfg_base_addr_index;
  2993. u32 trans_offset;
  2994. /* get the address index number */
  2995. cfg_base_addr = readl(h->vaddr + SA5_CTCFG_OFFSET);
  2996. cfg_base_addr &= (u32) 0x0000ffff;
  2997. cfg_base_addr_index = find_PCI_BAR_index(h->pdev, cfg_base_addr);
  2998. if (cfg_base_addr_index == -1) {
  2999. dev_warn(&h->pdev->dev, "cannot find cfg_base_addr_index\n");
  3000. return -ENODEV;
  3001. }
  3002. cfg_offset = readl(h->vaddr + SA5_CTMEM_OFFSET);
  3003. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3004. cfg_base_addr_index) + cfg_offset,
  3005. sizeof(h->cfgtable));
  3006. if (!h->cfgtable)
  3007. return -ENOMEM;
  3008. /* Find performant mode table. */
  3009. trans_offset = readl(&(h->cfgtable->TransMethodOffset));
  3010. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3011. cfg_base_addr_index)+cfg_offset+trans_offset,
  3012. sizeof(*h->transtable));
  3013. if (!h->transtable)
  3014. return -ENOMEM;
  3015. return 0;
  3016. }
  3017. /* Interrogate the hardware for some limits:
  3018. * max commands, max SG elements without chaining, and with chaining,
  3019. * SG chain block size, etc.
  3020. */
  3021. static void __devinit hpsa_find_board_params(struct ctlr_info *h)
  3022. {
  3023. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3024. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3025. h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
  3026. /*
  3027. * Limit in-command s/g elements to 32 save dma'able memory.
  3028. * Howvever spec says if 0, use 31
  3029. */
  3030. h->max_cmd_sg_entries = 31;
  3031. if (h->maxsgentries > 512) {
  3032. h->max_cmd_sg_entries = 32;
  3033. h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
  3034. h->maxsgentries--; /* save one for chain pointer */
  3035. } else {
  3036. h->maxsgentries = 31; /* default to traditional values */
  3037. h->chainsize = 0;
  3038. }
  3039. }
  3040. static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
  3041. {
  3042. if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
  3043. (readb(&h->cfgtable->Signature[1]) != 'I') ||
  3044. (readb(&h->cfgtable->Signature[2]) != 'S') ||
  3045. (readb(&h->cfgtable->Signature[3]) != 'S')) {
  3046. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3047. return false;
  3048. }
  3049. return true;
  3050. }
  3051. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3052. static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
  3053. {
  3054. #ifdef CONFIG_X86
  3055. u32 prefetch;
  3056. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3057. prefetch |= 0x100;
  3058. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3059. #endif
  3060. }
  3061. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3062. * in a prefetch beyond physical memory.
  3063. */
  3064. static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
  3065. {
  3066. u32 dma_prefetch;
  3067. if (h->board_id != 0x3225103C)
  3068. return;
  3069. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3070. dma_prefetch |= 0x8000;
  3071. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3072. }
  3073. static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
  3074. {
  3075. int i;
  3076. /* under certain very rare conditions, this can take awhile.
  3077. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3078. * as we enter this code.)
  3079. */
  3080. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3081. if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
  3082. break;
  3083. /* delay and try again */
  3084. msleep(10);
  3085. }
  3086. }
  3087. static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
  3088. {
  3089. u32 trans_support;
  3090. trans_support = readl(&(h->cfgtable->TransportSupport));
  3091. if (!(trans_support & SIMPLE_MODE))
  3092. return -ENOTSUPP;
  3093. h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
  3094. /* Update the field, and then ring the doorbell */
  3095. writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
  3096. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3097. hpsa_wait_for_mode_change_ack(h);
  3098. print_cfg_table(&h->pdev->dev, h->cfgtable);
  3099. if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
  3100. dev_warn(&h->pdev->dev,
  3101. "unable to get board into simple mode\n");
  3102. return -ENODEV;
  3103. }
  3104. return 0;
  3105. }
  3106. static int __devinit hpsa_pci_init(struct ctlr_info *h)
  3107. {
  3108. int prod_index, err;
  3109. prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
  3110. if (prod_index < 0)
  3111. return -ENODEV;
  3112. h->product_name = products[prod_index].product_name;
  3113. h->access = *(products[prod_index].access);
  3114. if (hpsa_board_disabled(h->pdev)) {
  3115. dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
  3116. return -ENODEV;
  3117. }
  3118. err = pci_enable_device(h->pdev);
  3119. if (err) {
  3120. dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
  3121. return err;
  3122. }
  3123. err = pci_request_regions(h->pdev, "hpsa");
  3124. if (err) {
  3125. dev_err(&h->pdev->dev,
  3126. "cannot obtain PCI resources, aborting\n");
  3127. return err;
  3128. }
  3129. hpsa_interrupt_mode(h);
  3130. err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
  3131. if (err)
  3132. goto err_out_free_res;
  3133. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3134. if (!h->vaddr) {
  3135. err = -ENOMEM;
  3136. goto err_out_free_res;
  3137. }
  3138. err = hpsa_wait_for_board_ready(h);
  3139. if (err)
  3140. goto err_out_free_res;
  3141. err = hpsa_find_cfgtables(h);
  3142. if (err)
  3143. goto err_out_free_res;
  3144. hpsa_find_board_params(h);
  3145. if (!hpsa_CISS_signature_present(h)) {
  3146. err = -ENODEV;
  3147. goto err_out_free_res;
  3148. }
  3149. hpsa_enable_scsi_prefetch(h);
  3150. hpsa_p600_dma_prefetch_quirk(h);
  3151. err = hpsa_enter_simple_mode(h);
  3152. if (err)
  3153. goto err_out_free_res;
  3154. return 0;
  3155. err_out_free_res:
  3156. if (h->transtable)
  3157. iounmap(h->transtable);
  3158. if (h->cfgtable)
  3159. iounmap(h->cfgtable);
  3160. if (h->vaddr)
  3161. iounmap(h->vaddr);
  3162. /*
  3163. * Deliberately omit pci_disable_device(): it does something nasty to
  3164. * Smart Array controllers that pci_enable_device does not undo
  3165. */
  3166. pci_release_regions(h->pdev);
  3167. return err;
  3168. }
  3169. static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
  3170. {
  3171. int rc;
  3172. #define HBA_INQUIRY_BYTE_COUNT 64
  3173. h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
  3174. if (!h->hba_inquiry_data)
  3175. return;
  3176. rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
  3177. h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
  3178. if (rc != 0) {
  3179. kfree(h->hba_inquiry_data);
  3180. h->hba_inquiry_data = NULL;
  3181. }
  3182. }
  3183. static int __devinit hpsa_init_one(struct pci_dev *pdev,
  3184. const struct pci_device_id *ent)
  3185. {
  3186. int i, rc;
  3187. int dac;
  3188. struct ctlr_info *h;
  3189. if (number_of_controllers == 0)
  3190. printk(KERN_INFO DRIVER_NAME "\n");
  3191. if (reset_devices) {
  3192. /* Reset the controller with a PCI power-cycle */
  3193. if (hpsa_hard_reset_controller(pdev) || hpsa_reset_msi(pdev))
  3194. return -ENODEV;
  3195. /* Some devices (notably the HP Smart Array 5i Controller)
  3196. need a little pause here */
  3197. msleep(HPSA_POST_RESET_PAUSE_MSECS);
  3198. /* Now try to get the controller to respond to a no-op */
  3199. for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
  3200. if (hpsa_noop(pdev) == 0)
  3201. break;
  3202. else
  3203. dev_warn(&pdev->dev, "no-op failed%s\n",
  3204. (i < 11 ? "; re-trying" : ""));
  3205. }
  3206. }
  3207. /* Command structures must be aligned on a 32-byte boundary because
  3208. * the 5 lower bits of the address are used by the hardware. and by
  3209. * the driver. See comments in hpsa.h for more info.
  3210. */
  3211. #define COMMANDLIST_ALIGNMENT 32
  3212. BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
  3213. h = kzalloc(sizeof(*h), GFP_KERNEL);
  3214. if (!h)
  3215. return -ENOMEM;
  3216. h->pdev = pdev;
  3217. h->busy_initializing = 1;
  3218. INIT_HLIST_HEAD(&h->cmpQ);
  3219. INIT_HLIST_HEAD(&h->reqQ);
  3220. rc = hpsa_pci_init(h);
  3221. if (rc != 0)
  3222. goto clean1;
  3223. sprintf(h->devname, "hpsa%d", number_of_controllers);
  3224. h->ctlr = number_of_controllers;
  3225. number_of_controllers++;
  3226. /* configure PCI DMA stuff */
  3227. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  3228. if (rc == 0) {
  3229. dac = 1;
  3230. } else {
  3231. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3232. if (rc == 0) {
  3233. dac = 0;
  3234. } else {
  3235. dev_err(&pdev->dev, "no suitable DMA available\n");
  3236. goto clean1;
  3237. }
  3238. }
  3239. /* make sure the board interrupts are off */
  3240. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3241. rc = request_irq(h->intr[PERF_MODE_INT], do_hpsa_intr,
  3242. IRQF_DISABLED, h->devname, h);
  3243. if (rc) {
  3244. dev_err(&pdev->dev, "unable to get irq %d for %s\n",
  3245. h->intr[PERF_MODE_INT], h->devname);
  3246. goto clean2;
  3247. }
  3248. dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
  3249. h->devname, pdev->device,
  3250. h->intr[PERF_MODE_INT], dac ? "" : " not");
  3251. h->cmd_pool_bits =
  3252. kmalloc(((h->nr_cmds + BITS_PER_LONG -
  3253. 1) / BITS_PER_LONG) * sizeof(unsigned long), GFP_KERNEL);
  3254. h->cmd_pool = pci_alloc_consistent(h->pdev,
  3255. h->nr_cmds * sizeof(*h->cmd_pool),
  3256. &(h->cmd_pool_dhandle));
  3257. h->errinfo_pool = pci_alloc_consistent(h->pdev,
  3258. h->nr_cmds * sizeof(*h->errinfo_pool),
  3259. &(h->errinfo_pool_dhandle));
  3260. if ((h->cmd_pool_bits == NULL)
  3261. || (h->cmd_pool == NULL)
  3262. || (h->errinfo_pool == NULL)) {
  3263. dev_err(&pdev->dev, "out of memory");
  3264. rc = -ENOMEM;
  3265. goto clean4;
  3266. }
  3267. if (hpsa_allocate_sg_chain_blocks(h))
  3268. goto clean4;
  3269. spin_lock_init(&h->lock);
  3270. spin_lock_init(&h->scan_lock);
  3271. init_waitqueue_head(&h->scan_wait_queue);
  3272. h->scan_finished = 1; /* no scan currently in progress */
  3273. pci_set_drvdata(pdev, h);
  3274. memset(h->cmd_pool_bits, 0,
  3275. ((h->nr_cmds + BITS_PER_LONG -
  3276. 1) / BITS_PER_LONG) * sizeof(unsigned long));
  3277. hpsa_scsi_setup(h);
  3278. /* Turn the interrupts on so we can service requests */
  3279. h->access.set_intr_mask(h, HPSA_INTR_ON);
  3280. hpsa_put_ctlr_into_performant_mode(h);
  3281. hpsa_hba_inquiry(h);
  3282. hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
  3283. h->busy_initializing = 0;
  3284. return 1;
  3285. clean4:
  3286. hpsa_free_sg_chain_blocks(h);
  3287. kfree(h->cmd_pool_bits);
  3288. if (h->cmd_pool)
  3289. pci_free_consistent(h->pdev,
  3290. h->nr_cmds * sizeof(struct CommandList),
  3291. h->cmd_pool, h->cmd_pool_dhandle);
  3292. if (h->errinfo_pool)
  3293. pci_free_consistent(h->pdev,
  3294. h->nr_cmds * sizeof(struct ErrorInfo),
  3295. h->errinfo_pool,
  3296. h->errinfo_pool_dhandle);
  3297. free_irq(h->intr[PERF_MODE_INT], h);
  3298. clean2:
  3299. clean1:
  3300. h->busy_initializing = 0;
  3301. kfree(h);
  3302. return rc;
  3303. }
  3304. static void hpsa_flush_cache(struct ctlr_info *h)
  3305. {
  3306. char *flush_buf;
  3307. struct CommandList *c;
  3308. flush_buf = kzalloc(4, GFP_KERNEL);
  3309. if (!flush_buf)
  3310. return;
  3311. c = cmd_special_alloc(h);
  3312. if (!c) {
  3313. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  3314. goto out_of_memory;
  3315. }
  3316. fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
  3317. RAID_CTLR_LUNID, TYPE_CMD);
  3318. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
  3319. if (c->err_info->CommandStatus != 0)
  3320. dev_warn(&h->pdev->dev,
  3321. "error flushing cache on controller\n");
  3322. cmd_special_free(h, c);
  3323. out_of_memory:
  3324. kfree(flush_buf);
  3325. }
  3326. static void hpsa_shutdown(struct pci_dev *pdev)
  3327. {
  3328. struct ctlr_info *h;
  3329. h = pci_get_drvdata(pdev);
  3330. /* Turn board interrupts off and send the flush cache command
  3331. * sendcmd will turn off interrupt, and send the flush...
  3332. * To write all data in the battery backed cache to disks
  3333. */
  3334. hpsa_flush_cache(h);
  3335. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3336. free_irq(h->intr[PERF_MODE_INT], h);
  3337. #ifdef CONFIG_PCI_MSI
  3338. if (h->msix_vector)
  3339. pci_disable_msix(h->pdev);
  3340. else if (h->msi_vector)
  3341. pci_disable_msi(h->pdev);
  3342. #endif /* CONFIG_PCI_MSI */
  3343. }
  3344. static void __devexit hpsa_remove_one(struct pci_dev *pdev)
  3345. {
  3346. struct ctlr_info *h;
  3347. if (pci_get_drvdata(pdev) == NULL) {
  3348. dev_err(&pdev->dev, "unable to remove device \n");
  3349. return;
  3350. }
  3351. h = pci_get_drvdata(pdev);
  3352. hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
  3353. hpsa_shutdown(pdev);
  3354. iounmap(h->vaddr);
  3355. iounmap(h->transtable);
  3356. iounmap(h->cfgtable);
  3357. hpsa_free_sg_chain_blocks(h);
  3358. pci_free_consistent(h->pdev,
  3359. h->nr_cmds * sizeof(struct CommandList),
  3360. h->cmd_pool, h->cmd_pool_dhandle);
  3361. pci_free_consistent(h->pdev,
  3362. h->nr_cmds * sizeof(struct ErrorInfo),
  3363. h->errinfo_pool, h->errinfo_pool_dhandle);
  3364. pci_free_consistent(h->pdev, h->reply_pool_size,
  3365. h->reply_pool, h->reply_pool_dhandle);
  3366. kfree(h->cmd_pool_bits);
  3367. kfree(h->blockFetchTable);
  3368. kfree(h->hba_inquiry_data);
  3369. /*
  3370. * Deliberately omit pci_disable_device(): it does something nasty to
  3371. * Smart Array controllers that pci_enable_device does not undo
  3372. */
  3373. pci_release_regions(pdev);
  3374. pci_set_drvdata(pdev, NULL);
  3375. kfree(h);
  3376. }
  3377. static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
  3378. __attribute__((unused)) pm_message_t state)
  3379. {
  3380. return -ENOSYS;
  3381. }
  3382. static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
  3383. {
  3384. return -ENOSYS;
  3385. }
  3386. static struct pci_driver hpsa_pci_driver = {
  3387. .name = "hpsa",
  3388. .probe = hpsa_init_one,
  3389. .remove = __devexit_p(hpsa_remove_one),
  3390. .id_table = hpsa_pci_device_id, /* id_table */
  3391. .shutdown = hpsa_shutdown,
  3392. .suspend = hpsa_suspend,
  3393. .resume = hpsa_resume,
  3394. };
  3395. /* Fill in bucket_map[], given nsgs (the max number of
  3396. * scatter gather elements supported) and bucket[],
  3397. * which is an array of 8 integers. The bucket[] array
  3398. * contains 8 different DMA transfer sizes (in 16
  3399. * byte increments) which the controller uses to fetch
  3400. * commands. This function fills in bucket_map[], which
  3401. * maps a given number of scatter gather elements to one of
  3402. * the 8 DMA transfer sizes. The point of it is to allow the
  3403. * controller to only do as much DMA as needed to fetch the
  3404. * command, with the DMA transfer size encoded in the lower
  3405. * bits of the command address.
  3406. */
  3407. static void calc_bucket_map(int bucket[], int num_buckets,
  3408. int nsgs, int *bucket_map)
  3409. {
  3410. int i, j, b, size;
  3411. /* even a command with 0 SGs requires 4 blocks */
  3412. #define MINIMUM_TRANSFER_BLOCKS 4
  3413. #define NUM_BUCKETS 8
  3414. /* Note, bucket_map must have nsgs+1 entries. */
  3415. for (i = 0; i <= nsgs; i++) {
  3416. /* Compute size of a command with i SG entries */
  3417. size = i + MINIMUM_TRANSFER_BLOCKS;
  3418. b = num_buckets; /* Assume the biggest bucket */
  3419. /* Find the bucket that is just big enough */
  3420. for (j = 0; j < 8; j++) {
  3421. if (bucket[j] >= size) {
  3422. b = j;
  3423. break;
  3424. }
  3425. }
  3426. /* for a command with i SG entries, use bucket b. */
  3427. bucket_map[i] = b;
  3428. }
  3429. }
  3430. static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h)
  3431. {
  3432. int i;
  3433. unsigned long register_value;
  3434. /* This is a bit complicated. There are 8 registers on
  3435. * the controller which we write to to tell it 8 different
  3436. * sizes of commands which there may be. It's a way of
  3437. * reducing the DMA done to fetch each command. Encoded into
  3438. * each command's tag are 3 bits which communicate to the controller
  3439. * which of the eight sizes that command fits within. The size of
  3440. * each command depends on how many scatter gather entries there are.
  3441. * Each SG entry requires 16 bytes. The eight registers are programmed
  3442. * with the number of 16-byte blocks a command of that size requires.
  3443. * The smallest command possible requires 5 such 16 byte blocks.
  3444. * the largest command possible requires MAXSGENTRIES + 4 16-byte
  3445. * blocks. Note, this only extends to the SG entries contained
  3446. * within the command block, and does not extend to chained blocks
  3447. * of SG elements. bft[] contains the eight values we write to
  3448. * the registers. They are not evenly distributed, but have more
  3449. * sizes for small commands, and fewer sizes for larger commands.
  3450. */
  3451. int bft[8] = {5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
  3452. BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
  3453. /* 5 = 1 s/g entry or 4k
  3454. * 6 = 2 s/g entry or 8k
  3455. * 8 = 4 s/g entry or 16k
  3456. * 10 = 6 s/g entry or 24k
  3457. */
  3458. h->reply_pool_wraparound = 1; /* spec: init to 1 */
  3459. /* Controller spec: zero out this buffer. */
  3460. memset(h->reply_pool, 0, h->reply_pool_size);
  3461. h->reply_pool_head = h->reply_pool;
  3462. bft[7] = h->max_sg_entries + 4;
  3463. calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable);
  3464. for (i = 0; i < 8; i++)
  3465. writel(bft[i], &h->transtable->BlockFetch[i]);
  3466. /* size of controller ring buffer */
  3467. writel(h->max_commands, &h->transtable->RepQSize);
  3468. writel(1, &h->transtable->RepQCount);
  3469. writel(0, &h->transtable->RepQCtrAddrLow32);
  3470. writel(0, &h->transtable->RepQCtrAddrHigh32);
  3471. writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
  3472. writel(0, &h->transtable->RepQAddr0High32);
  3473. writel(CFGTBL_Trans_Performant,
  3474. &(h->cfgtable->HostWrite.TransportRequest));
  3475. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3476. hpsa_wait_for_mode_change_ack(h);
  3477. register_value = readl(&(h->cfgtable->TransportActive));
  3478. if (!(register_value & CFGTBL_Trans_Performant)) {
  3479. dev_warn(&h->pdev->dev, "unable to get board into"
  3480. " performant mode\n");
  3481. return;
  3482. }
  3483. }
  3484. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
  3485. {
  3486. u32 trans_support;
  3487. trans_support = readl(&(h->cfgtable->TransportSupport));
  3488. if (!(trans_support & PERFORMANT_MODE))
  3489. return;
  3490. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3491. h->max_sg_entries = 32;
  3492. /* Performant mode ring buffer and supporting data structures */
  3493. h->reply_pool_size = h->max_commands * sizeof(u64);
  3494. h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
  3495. &(h->reply_pool_dhandle));
  3496. /* Need a block fetch table for performant mode */
  3497. h->blockFetchTable = kmalloc(((h->max_sg_entries+1) *
  3498. sizeof(u32)), GFP_KERNEL);
  3499. if ((h->reply_pool == NULL)
  3500. || (h->blockFetchTable == NULL))
  3501. goto clean_up;
  3502. hpsa_enter_performant_mode(h);
  3503. /* Change the access methods to the performant access methods */
  3504. h->access = SA5_performant_access;
  3505. h->transMethod = CFGTBL_Trans_Performant;
  3506. return;
  3507. clean_up:
  3508. if (h->reply_pool)
  3509. pci_free_consistent(h->pdev, h->reply_pool_size,
  3510. h->reply_pool, h->reply_pool_dhandle);
  3511. kfree(h->blockFetchTable);
  3512. }
  3513. /*
  3514. * This is it. Register the PCI driver information for the cards we control
  3515. * the OS will call our registered routines when it finds one of our cards.
  3516. */
  3517. static int __init hpsa_init(void)
  3518. {
  3519. return pci_register_driver(&hpsa_pci_driver);
  3520. }
  3521. static void __exit hpsa_cleanup(void)
  3522. {
  3523. pci_unregister_driver(&hpsa_pci_driver);
  3524. }
  3525. module_init(hpsa_init);
  3526. module_exit(hpsa_cleanup);