mach-imx6q.c 5.8 KB

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  1. /*
  2. * Copyright 2011 Freescale Semiconductor, Inc.
  3. * Copyright 2011 Linaro Ltd.
  4. *
  5. * The code contained herein is licensed under the GNU General Public
  6. * License. You may obtain a copy of the GNU General Public License
  7. * Version 2 or later at the following locations:
  8. *
  9. * http://www.opensource.org/licenses/gpl-license.html
  10. * http://www.gnu.org/copyleft/gpl.html
  11. */
  12. #include <linux/clk.h>
  13. #include <linux/clkdev.h>
  14. #include <linux/delay.h>
  15. #include <linux/export.h>
  16. #include <linux/init.h>
  17. #include <linux/io.h>
  18. #include <linux/irq.h>
  19. #include <linux/of.h>
  20. #include <linux/of_address.h>
  21. #include <linux/of_irq.h>
  22. #include <linux/of_platform.h>
  23. #include <linux/phy.h>
  24. #include <linux/regmap.h>
  25. #include <linux/micrel_phy.h>
  26. #include <linux/mfd/syscon.h>
  27. #include <asm/smp_twd.h>
  28. #include <asm/hardware/cache-l2x0.h>
  29. #include <asm/hardware/gic.h>
  30. #include <asm/mach/arch.h>
  31. #include <asm/mach/map.h>
  32. #include <asm/mach/time.h>
  33. #include <asm/system_misc.h>
  34. #include "common.h"
  35. #include "cpuidle.h"
  36. #include "hardware.h"
  37. #define IMX6Q_ANALOG_DIGPROG 0x260
  38. static int imx6q_revision(void)
  39. {
  40. struct device_node *np;
  41. void __iomem *base;
  42. static u32 rev;
  43. if (!rev) {
  44. np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop");
  45. if (!np)
  46. return IMX_CHIP_REVISION_UNKNOWN;
  47. base = of_iomap(np, 0);
  48. if (!base) {
  49. of_node_put(np);
  50. return IMX_CHIP_REVISION_UNKNOWN;
  51. }
  52. rev = readl_relaxed(base + IMX6Q_ANALOG_DIGPROG);
  53. iounmap(base);
  54. of_node_put(np);
  55. }
  56. switch (rev & 0xff) {
  57. case 0:
  58. return IMX_CHIP_REVISION_1_0;
  59. case 1:
  60. return IMX_CHIP_REVISION_1_1;
  61. case 2:
  62. return IMX_CHIP_REVISION_1_2;
  63. default:
  64. return IMX_CHIP_REVISION_UNKNOWN;
  65. }
  66. }
  67. void imx6q_restart(char mode, const char *cmd)
  68. {
  69. struct device_node *np;
  70. void __iomem *wdog_base;
  71. np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-wdt");
  72. wdog_base = of_iomap(np, 0);
  73. if (!wdog_base)
  74. goto soft;
  75. imx_src_prepare_restart();
  76. /* enable wdog */
  77. writew_relaxed(1 << 2, wdog_base);
  78. /* write twice to ensure the request will not get ignored */
  79. writew_relaxed(1 << 2, wdog_base);
  80. /* wait for reset to assert ... */
  81. mdelay(500);
  82. pr_err("Watchdog reset failed to assert reset\n");
  83. /* delay to allow the serial port to show the message */
  84. mdelay(50);
  85. soft:
  86. /* we'll take a jump through zero as a poor second */
  87. soft_restart(0);
  88. }
  89. /* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
  90. static int ksz9021rn_phy_fixup(struct phy_device *phydev)
  91. {
  92. if (IS_BUILTIN(CONFIG_PHYLIB)) {
  93. /* min rx data delay */
  94. phy_write(phydev, 0x0b, 0x8105);
  95. phy_write(phydev, 0x0c, 0x0000);
  96. /* max rx/tx clock delay, min rx/tx control delay */
  97. phy_write(phydev, 0x0b, 0x8104);
  98. phy_write(phydev, 0x0c, 0xf0f0);
  99. phy_write(phydev, 0x0b, 0x104);
  100. }
  101. return 0;
  102. }
  103. static void __init imx6q_sabrelite_cko1_setup(void)
  104. {
  105. struct clk *cko1_sel, *ahb, *cko1;
  106. unsigned long rate;
  107. cko1_sel = clk_get_sys(NULL, "cko1_sel");
  108. ahb = clk_get_sys(NULL, "ahb");
  109. cko1 = clk_get_sys(NULL, "cko1");
  110. if (IS_ERR(cko1_sel) || IS_ERR(ahb) || IS_ERR(cko1)) {
  111. pr_err("cko1 setup failed!\n");
  112. goto put_clk;
  113. }
  114. clk_set_parent(cko1_sel, ahb);
  115. rate = clk_round_rate(cko1, 16000000);
  116. clk_set_rate(cko1, rate);
  117. put_clk:
  118. if (!IS_ERR(cko1_sel))
  119. clk_put(cko1_sel);
  120. if (!IS_ERR(ahb))
  121. clk_put(ahb);
  122. if (!IS_ERR(cko1))
  123. clk_put(cko1);
  124. }
  125. static void __init imx6q_sabrelite_init(void)
  126. {
  127. if (IS_BUILTIN(CONFIG_PHYLIB))
  128. phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
  129. ksz9021rn_phy_fixup);
  130. imx6q_sabrelite_cko1_setup();
  131. }
  132. static void __init imx6q_1588_init(void)
  133. {
  134. struct regmap *gpr;
  135. gpr = syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr");
  136. if (!IS_ERR(gpr))
  137. regmap_update_bits(gpr, 0x4, 1 << 21, 1 << 21);
  138. else
  139. pr_err("failed to find fsl,imx6q-iomux-gpr regmap\n");
  140. }
  141. static void __init imx6q_usb_init(void)
  142. {
  143. struct regmap *anatop;
  144. #define HW_ANADIG_USB1_CHRG_DETECT 0x000001b0
  145. #define HW_ANADIG_USB2_CHRG_DETECT 0x00000210
  146. #define BM_ANADIG_USB_CHRG_DETECT_EN_B 0x00100000
  147. #define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B 0x00080000
  148. anatop = syscon_regmap_lookup_by_compatible("fsl,imx6q-anatop");
  149. if (!IS_ERR(anatop)) {
  150. /*
  151. * The external charger detector needs to be disabled,
  152. * or the signal at DP will be poor
  153. */
  154. regmap_write(anatop, HW_ANADIG_USB1_CHRG_DETECT,
  155. BM_ANADIG_USB_CHRG_DETECT_EN_B
  156. | BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
  157. regmap_write(anatop, HW_ANADIG_USB2_CHRG_DETECT,
  158. BM_ANADIG_USB_CHRG_DETECT_EN_B |
  159. BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
  160. } else {
  161. pr_warn("failed to find fsl,imx6q-anatop regmap\n");
  162. }
  163. }
  164. static void __init imx6q_init_machine(void)
  165. {
  166. if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
  167. imx6q_sabrelite_init();
  168. of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
  169. imx6q_pm_init();
  170. imx6q_usb_init();
  171. imx6q_1588_init();
  172. }
  173. static void __init imx6q_init_late(void)
  174. {
  175. imx6q_cpuidle_init();
  176. }
  177. static void __init imx6q_map_io(void)
  178. {
  179. debug_ll_io_init();
  180. imx_scu_map_io();
  181. }
  182. static const struct of_device_id imx6q_irq_match[] __initconst = {
  183. { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
  184. { /* sentinel */ }
  185. };
  186. static void __init imx6q_init_irq(void)
  187. {
  188. l2x0_of_init(0, ~0UL);
  189. imx_src_init();
  190. imx_gpc_init();
  191. of_irq_init(imx6q_irq_match);
  192. }
  193. static void __init imx6q_timer_init(void)
  194. {
  195. mx6q_clocks_init();
  196. twd_local_timer_of_register();
  197. imx_print_silicon_rev("i.MX6Q", imx6q_revision());
  198. }
  199. static struct sys_timer imx6q_timer = {
  200. .init = imx6q_timer_init,
  201. };
  202. static const char *imx6q_dt_compat[] __initdata = {
  203. "fsl,imx6q",
  204. NULL,
  205. };
  206. DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
  207. .smp = smp_ops(imx_smp_ops),
  208. .map_io = imx6q_map_io,
  209. .init_irq = imx6q_init_irq,
  210. .handle_irq = imx6q_handle_irq,
  211. .timer = &imx6q_timer,
  212. .init_machine = imx6q_init_machine,
  213. .init_late = imx6q_init_late,
  214. .dt_compat = imx6q_dt_compat,
  215. .restart = imx6q_restart,
  216. MACHINE_END