i915_gem_context.c 15 KB

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  1. /*
  2. * Copyright © 2011-2012 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21. * IN THE SOFTWARE.
  22. *
  23. * Authors:
  24. * Ben Widawsky <ben@bwidawsk.net>
  25. *
  26. */
  27. /*
  28. * This file implements HW context support. On gen5+ a HW context consists of an
  29. * opaque GPU object which is referenced at times of context saves and restores.
  30. * With RC6 enabled, the context is also referenced as the GPU enters and exists
  31. * from RC6 (GPU has it's own internal power context, except on gen5). Though
  32. * something like a context does exist for the media ring, the code only
  33. * supports contexts for the render ring.
  34. *
  35. * In software, there is a distinction between contexts created by the user,
  36. * and the default HW context. The default HW context is used by GPU clients
  37. * that do not request setup of their own hardware context. The default
  38. * context's state is never restored to help prevent programming errors. This
  39. * would happen if a client ran and piggy-backed off another clients GPU state.
  40. * The default context only exists to give the GPU some offset to load as the
  41. * current to invoke a save of the context we actually care about. In fact, the
  42. * code could likely be constructed, albeit in a more complicated fashion, to
  43. * never use the default context, though that limits the driver's ability to
  44. * swap out, and/or destroy other contexts.
  45. *
  46. * All other contexts are created as a request by the GPU client. These contexts
  47. * store GPU state, and thus allow GPU clients to not re-emit state (and
  48. * potentially query certain state) at any time. The kernel driver makes
  49. * certain that the appropriate commands are inserted.
  50. *
  51. * The context life cycle is semi-complicated in that context BOs may live
  52. * longer than the context itself because of the way the hardware, and object
  53. * tracking works. Below is a very crude representation of the state machine
  54. * describing the context life.
  55. * refcount pincount active
  56. * S0: initial state 0 0 0
  57. * S1: context created 1 0 0
  58. * S2: context is currently running 2 1 X
  59. * S3: GPU referenced, but not current 2 0 1
  60. * S4: context is current, but destroyed 1 1 0
  61. * S5: like S3, but destroyed 1 0 1
  62. *
  63. * The most common (but not all) transitions:
  64. * S0->S1: client creates a context
  65. * S1->S2: client submits execbuf with context
  66. * S2->S3: other clients submits execbuf with context
  67. * S3->S1: context object was retired
  68. * S3->S2: clients submits another execbuf
  69. * S2->S4: context destroy called with current context
  70. * S3->S5->S0: destroy path
  71. * S4->S5->S0: destroy path on current context
  72. *
  73. * There are two confusing terms used above:
  74. * The "current context" means the context which is currently running on the
  75. * GPU. The GPU has loaded it's state already and has stored away the gtt
  76. * offset of the BO. The GPU is not actively referencing the data at this
  77. * offset, but it will on the next context switch. The only way to avoid this
  78. * is to do a GPU reset.
  79. *
  80. * An "active context' is one which was previously the "current context" and is
  81. * on the active list waiting for the next context switch to occur. Until this
  82. * happens, the object must remain at the same gtt offset. It is therefore
  83. * possible to destroy a context, but it is still active.
  84. *
  85. */
  86. #include "drmP.h"
  87. #include "i915_drm.h"
  88. #include "i915_drv.h"
  89. /* This is a HW constraint. The value below is the largest known requirement
  90. * I've seen in a spec to date, and that was a workaround for a non-shipping
  91. * part. It should be safe to decrease this, but it's more future proof as is.
  92. */
  93. #define CONTEXT_ALIGN (64<<10)
  94. static struct i915_hw_context *
  95. i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id);
  96. static int get_context_size(struct drm_device *dev)
  97. {
  98. struct drm_i915_private *dev_priv = dev->dev_private;
  99. int ret;
  100. u32 reg;
  101. switch (INTEL_INFO(dev)->gen) {
  102. case 6:
  103. reg = I915_READ(CXT_SIZE);
  104. ret = GEN6_CXT_TOTAL_SIZE(reg) * 64;
  105. break;
  106. case 7:
  107. reg = I915_READ(GEN7_CTX_SIZE);
  108. ret = GEN7_CTX_TOTAL_SIZE(reg) * 64;
  109. break;
  110. default:
  111. BUG();
  112. }
  113. return ret;
  114. }
  115. static void do_destroy(struct i915_hw_context *ctx)
  116. {
  117. struct drm_device *dev = ctx->obj->base.dev;
  118. struct drm_i915_private *dev_priv = dev->dev_private;
  119. if (ctx->file_priv)
  120. idr_remove(&ctx->file_priv->context_idr, ctx->id);
  121. else
  122. BUG_ON(ctx != dev_priv->ring[RCS].default_context);
  123. drm_gem_object_unreference(&ctx->obj->base);
  124. kfree(ctx);
  125. }
  126. static int
  127. create_hw_context(struct drm_device *dev,
  128. struct drm_i915_file_private *file_priv,
  129. struct i915_hw_context **ctx_out)
  130. {
  131. struct drm_i915_private *dev_priv = dev->dev_private;
  132. int ret, id;
  133. *ctx_out = kzalloc(sizeof(struct drm_i915_file_private), GFP_KERNEL);
  134. if (*ctx_out == NULL)
  135. return -ENOMEM;
  136. (*ctx_out)->obj = i915_gem_alloc_object(dev,
  137. dev_priv->hw_context_size);
  138. if ((*ctx_out)->obj == NULL) {
  139. kfree(*ctx_out);
  140. DRM_DEBUG_DRIVER("Context object allocated failed\n");
  141. return -ENOMEM;
  142. }
  143. /* The ring associated with the context object is handled by the normal
  144. * object tracking code. We give an initial ring value simple to pass an
  145. * assertion in the context switch code.
  146. */
  147. (*ctx_out)->ring = &dev_priv->ring[RCS];
  148. /* Default context will never have a file_priv */
  149. if (file_priv == NULL)
  150. return 0;
  151. (*ctx_out)->file_priv = file_priv;
  152. again:
  153. if (idr_pre_get(&file_priv->context_idr, GFP_KERNEL) == 0) {
  154. ret = -ENOMEM;
  155. DRM_DEBUG_DRIVER("idr allocation failed\n");
  156. goto err_out;
  157. }
  158. ret = idr_get_new_above(&file_priv->context_idr, *ctx_out,
  159. DEFAULT_CONTEXT_ID + 1, &id);
  160. if (ret == 0)
  161. (*ctx_out)->id = id;
  162. if (ret == -EAGAIN)
  163. goto again;
  164. else if (ret)
  165. goto err_out;
  166. return 0;
  167. err_out:
  168. do_destroy(*ctx_out);
  169. return ret;
  170. }
  171. static inline bool is_default_context(struct i915_hw_context *ctx)
  172. {
  173. return (ctx == ctx->ring->default_context);
  174. }
  175. /**
  176. * The default context needs to exist per ring that uses contexts. It stores the
  177. * context state of the GPU for applications that don't utilize HW contexts, as
  178. * well as an idle case.
  179. */
  180. static int create_default_context(struct drm_i915_private *dev_priv)
  181. {
  182. struct i915_hw_context *ctx;
  183. int ret;
  184. BUG_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
  185. ret = create_hw_context(dev_priv->dev, NULL,
  186. &dev_priv->ring[RCS].default_context);
  187. if (ret)
  188. return ret;
  189. /* We may need to do things with the shrinker which require us to
  190. * immediately switch back to the default context. This can cause a
  191. * problem as pinning the default context also requires GTT space which
  192. * may not be available. To avoid this we always pin the
  193. * default context.
  194. */
  195. ctx = dev_priv->ring[RCS].default_context;
  196. ret = i915_gem_object_pin(ctx->obj, CONTEXT_ALIGN, false);
  197. if (ret) {
  198. do_destroy(ctx);
  199. return ret;
  200. }
  201. return ret;
  202. }
  203. void i915_gem_context_init(struct drm_device *dev)
  204. {
  205. struct drm_i915_private *dev_priv = dev->dev_private;
  206. uint32_t ctx_size;
  207. if (!HAS_HW_CONTEXTS(dev))
  208. return;
  209. /* If called from reset, or thaw... we've been here already */
  210. if (dev_priv->hw_contexts_disabled ||
  211. dev_priv->ring[RCS].default_context)
  212. return;
  213. ctx_size = get_context_size(dev);
  214. dev_priv->hw_context_size = get_context_size(dev);
  215. dev_priv->hw_context_size = round_up(dev_priv->hw_context_size, 4096);
  216. if (ctx_size <= 0 || ctx_size > (1<<20)) {
  217. dev_priv->hw_contexts_disabled = true;
  218. return;
  219. }
  220. if (create_default_context(dev_priv)) {
  221. dev_priv->hw_contexts_disabled = true;
  222. return;
  223. }
  224. DRM_DEBUG_DRIVER("HW context support initialized\n");
  225. }
  226. void i915_gem_context_fini(struct drm_device *dev)
  227. {
  228. struct drm_i915_private *dev_priv = dev->dev_private;
  229. if (dev_priv->hw_contexts_disabled)
  230. return;
  231. i915_gem_object_unpin(dev_priv->ring[RCS].default_context->obj);
  232. do_destroy(dev_priv->ring[RCS].default_context);
  233. }
  234. void i915_gem_context_open(struct drm_device *dev, struct drm_file *file)
  235. {
  236. struct drm_i915_private *dev_priv = dev->dev_private;
  237. struct drm_i915_file_private *file_priv = file->driver_priv;
  238. if (dev_priv->hw_contexts_disabled)
  239. return;
  240. idr_init(&file_priv->context_idr);
  241. }
  242. static int context_idr_cleanup(int id, void *p, void *data)
  243. {
  244. struct drm_file *file = (struct drm_file *)data;
  245. struct drm_i915_file_private *file_priv = file->driver_priv;
  246. struct i915_hw_context *ctx;
  247. BUG_ON(id == DEFAULT_CONTEXT_ID);
  248. ctx = i915_gem_context_get(file_priv, id);
  249. if (WARN_ON(ctx == NULL))
  250. return -ENXIO;
  251. do_destroy(ctx);
  252. return 0;
  253. }
  254. void i915_gem_context_close(struct drm_device *dev, struct drm_file *file)
  255. {
  256. struct drm_i915_private *dev_priv = dev->dev_private;
  257. struct drm_i915_file_private *file_priv = file->driver_priv;
  258. if (dev_priv->hw_contexts_disabled)
  259. return;
  260. mutex_lock(&dev->struct_mutex);
  261. idr_for_each(&file_priv->context_idr, context_idr_cleanup, file);
  262. idr_destroy(&file_priv->context_idr);
  263. mutex_unlock(&dev->struct_mutex);
  264. }
  265. static struct i915_hw_context *
  266. i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id)
  267. {
  268. return (struct i915_hw_context *)idr_find(&file_priv->context_idr, id);
  269. }
  270. static inline int
  271. mi_set_context(struct intel_ring_buffer *ring,
  272. struct i915_hw_context *new_context,
  273. u32 hw_flags)
  274. {
  275. int ret;
  276. /* w/a: If Flush TLB Invalidation Mode is enabled, driver must do a TLB
  277. * invalidation prior to MI_SET_CONTEXT. On GEN6 we don't set the value
  278. * explicitly, so we rely on the value at ring init, stored in
  279. * itlb_before_ctx_switch.
  280. */
  281. if (IS_GEN6(ring->dev) && ring->itlb_before_ctx_switch) {
  282. ret = ring->flush(ring, 0, 0);
  283. if (ret)
  284. return ret;
  285. }
  286. ret = intel_ring_begin(ring, 6);
  287. if (ret)
  288. return ret;
  289. if (IS_GEN7(ring->dev))
  290. intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_DISABLE);
  291. else
  292. intel_ring_emit(ring, MI_NOOP);
  293. intel_ring_emit(ring, MI_NOOP);
  294. intel_ring_emit(ring, MI_SET_CONTEXT);
  295. intel_ring_emit(ring, new_context->obj->gtt_offset |
  296. MI_MM_SPACE_GTT |
  297. MI_SAVE_EXT_STATE_EN |
  298. MI_RESTORE_EXT_STATE_EN |
  299. hw_flags);
  300. /* w/a: MI_SET_CONTEXT must always be followed by MI_NOOP */
  301. intel_ring_emit(ring, MI_NOOP);
  302. if (IS_GEN7(ring->dev))
  303. intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_ENABLE);
  304. else
  305. intel_ring_emit(ring, MI_NOOP);
  306. intel_ring_advance(ring);
  307. return ret;
  308. }
  309. static int do_switch(struct drm_i915_gem_object *from_obj,
  310. struct i915_hw_context *to,
  311. u32 seqno)
  312. {
  313. struct intel_ring_buffer *ring = NULL;
  314. u32 hw_flags = 0;
  315. int ret;
  316. BUG_ON(to == NULL);
  317. BUG_ON(from_obj != NULL && from_obj->pin_count == 0);
  318. ret = i915_gem_object_pin(to->obj, CONTEXT_ALIGN, false);
  319. if (ret)
  320. return ret;
  321. if (!to->obj->has_global_gtt_mapping)
  322. i915_gem_gtt_bind_object(to->obj, to->obj->cache_level);
  323. if (!to->is_initialized || is_default_context(to))
  324. hw_flags |= MI_RESTORE_INHIBIT;
  325. else if (WARN_ON_ONCE(from_obj == to->obj)) /* not yet expected */
  326. hw_flags |= MI_FORCE_RESTORE;
  327. ring = to->ring;
  328. ret = mi_set_context(ring, to, hw_flags);
  329. if (ret) {
  330. i915_gem_object_unpin(to->obj);
  331. return ret;
  332. }
  333. /* The backing object for the context is done after switching to the
  334. * *next* context. Therefore we cannot retire the previous context until
  335. * the next context has already started running. In fact, the below code
  336. * is a bit suboptimal because the retiring can occur simply after the
  337. * MI_SET_CONTEXT instead of when the next seqno has completed.
  338. */
  339. if (from_obj != NULL) {
  340. from_obj->base.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
  341. i915_gem_object_move_to_active(from_obj, ring, seqno);
  342. /* As long as MI_SET_CONTEXT is serializing, ie. it flushes the
  343. * whole damn pipeline, we don't need to explicitly mark the
  344. * object dirty. The only exception is that the context must be
  345. * correct in case the object gets swapped out. Ideally we'd be
  346. * able to defer doing this until we know the object would be
  347. * swapped, but there is no way to do that yet.
  348. */
  349. from_obj->dirty = 1;
  350. BUG_ON(from_obj->ring != to->ring);
  351. i915_gem_object_unpin(from_obj);
  352. }
  353. ring->last_context_obj = to->obj;
  354. to->is_initialized = true;
  355. return 0;
  356. }
  357. /**
  358. * i915_switch_context() - perform a GPU context switch.
  359. * @ring: ring for which we'll execute the context switch
  360. * @file_priv: file_priv associated with the context, may be NULL
  361. * @id: context id number
  362. * @seqno: sequence number by which the new context will be switched to
  363. * @flags:
  364. *
  365. * The context life cycle is simple. The context refcount is incremented and
  366. * decremented by 1 and create and destroy. If the context is in use by the GPU,
  367. * it will have a refoucnt > 1. This allows us to destroy the context abstract
  368. * object while letting the normal object tracking destroy the backing BO.
  369. */
  370. int i915_switch_context(struct intel_ring_buffer *ring,
  371. struct drm_file *file,
  372. int to_id)
  373. {
  374. struct drm_i915_private *dev_priv = ring->dev->dev_private;
  375. struct drm_i915_file_private *file_priv = NULL;
  376. struct i915_hw_context *to;
  377. struct drm_i915_gem_object *from_obj = ring->last_context_obj;
  378. int ret;
  379. if (dev_priv->hw_contexts_disabled)
  380. return 0;
  381. if (ring != &dev_priv->ring[RCS])
  382. return 0;
  383. if (file)
  384. file_priv = file->driver_priv;
  385. if (to_id == DEFAULT_CONTEXT_ID) {
  386. to = ring->default_context;
  387. } else {
  388. to = i915_gem_context_get(file_priv, to_id);
  389. if (to == NULL)
  390. return -EINVAL;
  391. }
  392. if (from_obj == to->obj)
  393. return 0;
  394. ret = do_switch(from_obj, to, i915_gem_next_request_seqno(to->ring));
  395. if (ret)
  396. return ret;
  397. /* Just to make the code a little cleaner we take the object reference
  398. * after the switch was successful. It would be more intuitive to ref
  399. * the 'to' object before the switch but we know the refcount must be >0
  400. * if context_get() succeeded, and we hold struct mutex. So it's safe to
  401. * do this here/now
  402. */
  403. drm_gem_object_reference(&to->obj->base);
  404. if (from_obj != NULL)
  405. drm_gem_object_unreference(&from_obj->base);
  406. return ret;
  407. }