irq.h 15 KB

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  1. #ifndef _LINUX_IRQ_H
  2. #define _LINUX_IRQ_H
  3. /*
  4. * Please do not include this file in generic code. There is currently
  5. * no requirement for any architecture to implement anything held
  6. * within this file.
  7. *
  8. * Thanks. --rmk
  9. */
  10. #include <linux/smp.h>
  11. #ifndef CONFIG_S390
  12. #include <linux/linkage.h>
  13. #include <linux/cache.h>
  14. #include <linux/spinlock.h>
  15. #include <linux/cpumask.h>
  16. #include <linux/gfp.h>
  17. #include <linux/irqreturn.h>
  18. #include <linux/irqnr.h>
  19. #include <linux/errno.h>
  20. #include <linux/topology.h>
  21. #include <linux/wait.h>
  22. #include <asm/irq.h>
  23. #include <asm/ptrace.h>
  24. #include <asm/irq_regs.h>
  25. struct irq_desc;
  26. typedef void (*irq_flow_handler_t)(unsigned int irq,
  27. struct irq_desc *desc);
  28. /*
  29. * IRQ line status.
  30. *
  31. * Bits 0-7 are reserved for the IRQF_* bits in linux/interrupt.h
  32. *
  33. * IRQ types
  34. */
  35. #define IRQ_TYPE_NONE 0x00000000 /* Default, unspecified type */
  36. #define IRQ_TYPE_EDGE_RISING 0x00000001 /* Edge rising type */
  37. #define IRQ_TYPE_EDGE_FALLING 0x00000002 /* Edge falling type */
  38. #define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
  39. #define IRQ_TYPE_LEVEL_HIGH 0x00000004 /* Level high type */
  40. #define IRQ_TYPE_LEVEL_LOW 0x00000008 /* Level low type */
  41. #define IRQ_TYPE_SENSE_MASK 0x0000000f /* Mask of the above */
  42. #define IRQ_TYPE_PROBE 0x00000010 /* Probing in progress */
  43. /* Internal flags */
  44. #define IRQ_INPROGRESS 0x00000100 /* IRQ handler active - do not enter! */
  45. #define IRQ_DISABLED 0x00000200 /* IRQ disabled - do not enter! */
  46. #define IRQ_PENDING 0x00000400 /* IRQ pending - replay on enable */
  47. #define IRQ_REPLAY 0x00000800 /* IRQ has been replayed but not acked yet */
  48. #define IRQ_AUTODETECT 0x00001000 /* IRQ is being autodetected */
  49. #define IRQ_WAITING 0x00002000 /* IRQ not yet seen - for autodetection */
  50. #define IRQ_LEVEL 0x00004000 /* IRQ level triggered */
  51. #define IRQ_MASKED 0x00008000 /* IRQ masked - shouldn't be seen again */
  52. #define IRQ_PER_CPU 0x00010000 /* IRQ is per CPU */
  53. #define IRQ_NOPROBE 0x00020000 /* IRQ is not valid for probing */
  54. #define IRQ_NOREQUEST 0x00040000 /* IRQ cannot be requested */
  55. #define IRQ_NOAUTOEN 0x00080000 /* IRQ will not be enabled on request irq */
  56. #define IRQ_WAKEUP 0x00100000 /* IRQ triggers system wakeup */
  57. #define IRQ_MOVE_PENDING 0x00200000 /* need to re-target IRQ destination */
  58. #define IRQ_NO_BALANCING 0x00400000 /* IRQ is excluded from balancing */
  59. #define IRQ_SPURIOUS_DISABLED 0x00800000 /* IRQ was disabled by the spurious trap */
  60. #define IRQ_MOVE_PCNTXT 0x01000000 /* IRQ migration from process context */
  61. #define IRQ_AFFINITY_SET 0x02000000 /* IRQ affinity was set from userspace*/
  62. #define IRQ_SUSPENDED 0x04000000 /* IRQ has gone through suspend sequence */
  63. #ifdef CONFIG_IRQ_PER_CPU
  64. # define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU)
  65. # define IRQ_NO_BALANCING_MASK (IRQ_PER_CPU | IRQ_NO_BALANCING)
  66. #else
  67. # define CHECK_IRQ_PER_CPU(var) 0
  68. # define IRQ_NO_BALANCING_MASK IRQ_NO_BALANCING
  69. #endif
  70. struct proc_dir_entry;
  71. struct msi_desc;
  72. /**
  73. * struct irq_chip - hardware interrupt chip descriptor
  74. *
  75. * @name: name for /proc/interrupts
  76. * @startup: start up the interrupt (defaults to ->enable if NULL)
  77. * @shutdown: shut down the interrupt (defaults to ->disable if NULL)
  78. * @enable: enable the interrupt (defaults to chip->unmask if NULL)
  79. * @disable: disable the interrupt (defaults to chip->mask if NULL)
  80. * @ack: start of a new interrupt
  81. * @mask: mask an interrupt source
  82. * @mask_ack: ack and mask an interrupt source
  83. * @unmask: unmask an interrupt source
  84. * @eoi: end of interrupt - chip level
  85. * @end: end of interrupt - flow level
  86. * @set_affinity: set the CPU affinity on SMP machines
  87. * @retrigger: resend an IRQ to the CPU
  88. * @set_type: set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ
  89. * @set_wake: enable/disable power-management wake-on of an IRQ
  90. *
  91. * @release: release function solely used by UML
  92. * @typename: obsoleted by name, kept as migration helper
  93. */
  94. struct irq_chip {
  95. const char *name;
  96. unsigned int (*startup)(unsigned int irq);
  97. void (*shutdown)(unsigned int irq);
  98. void (*enable)(unsigned int irq);
  99. void (*disable)(unsigned int irq);
  100. void (*ack)(unsigned int irq);
  101. void (*mask)(unsigned int irq);
  102. void (*mask_ack)(unsigned int irq);
  103. void (*unmask)(unsigned int irq);
  104. void (*eoi)(unsigned int irq);
  105. void (*end)(unsigned int irq);
  106. int (*set_affinity)(unsigned int irq,
  107. const struct cpumask *dest);
  108. int (*retrigger)(unsigned int irq);
  109. int (*set_type)(unsigned int irq, unsigned int flow_type);
  110. int (*set_wake)(unsigned int irq, unsigned int on);
  111. /* Currently used only by UML, might disappear one day.*/
  112. #ifdef CONFIG_IRQ_RELEASE_METHOD
  113. void (*release)(unsigned int irq, void *dev_id);
  114. #endif
  115. /*
  116. * For compatibility, ->typename is copied into ->name.
  117. * Will disappear.
  118. */
  119. const char *typename;
  120. };
  121. struct timer_rand_state;
  122. struct irq_2_iommu;
  123. /**
  124. * struct irq_desc - interrupt descriptor
  125. * @irq: interrupt number for this descriptor
  126. * @timer_rand_state: pointer to timer rand state struct
  127. * @kstat_irqs: irq stats per cpu
  128. * @irq_2_iommu: iommu with this irq
  129. * @handle_irq: highlevel irq-events handler [if NULL, __do_IRQ()]
  130. * @chip: low level interrupt hardware access
  131. * @msi_desc: MSI descriptor
  132. * @handler_data: per-IRQ data for the irq_chip methods
  133. * @chip_data: platform-specific per-chip private data for the chip
  134. * methods, to allow shared chip implementations
  135. * @action: the irq action chain
  136. * @status: status information
  137. * @depth: disable-depth, for nested irq_disable() calls
  138. * @wake_depth: enable depth, for multiple set_irq_wake() callers
  139. * @irq_count: stats field to detect stalled irqs
  140. * @last_unhandled: aging timer for unhandled count
  141. * @irqs_unhandled: stats field for spurious unhandled interrupts
  142. * @lock: locking for SMP
  143. * @affinity: IRQ affinity on SMP
  144. * @node: node index useful for balancing
  145. * @pending_mask: pending rebalanced interrupts
  146. * @threads_active: number of irqaction threads currently running
  147. * @wait_for_threads: wait queue for sync_irq to wait for threaded handlers
  148. * @dir: /proc/irq/ procfs entry
  149. * @name: flow handler name for /proc/interrupts output
  150. */
  151. struct irq_desc {
  152. unsigned int irq;
  153. struct timer_rand_state *timer_rand_state;
  154. unsigned int *kstat_irqs;
  155. #ifdef CONFIG_INTR_REMAP
  156. struct irq_2_iommu *irq_2_iommu;
  157. #endif
  158. irq_flow_handler_t handle_irq;
  159. struct irq_chip *chip;
  160. struct msi_desc *msi_desc;
  161. void *handler_data;
  162. void *chip_data;
  163. struct irqaction *action; /* IRQ action list */
  164. unsigned int status; /* IRQ status */
  165. unsigned int depth; /* nested irq disables */
  166. unsigned int wake_depth; /* nested wake enables */
  167. unsigned int irq_count; /* For detecting broken IRQs */
  168. unsigned long last_unhandled; /* Aging timer for unhandled count */
  169. unsigned int irqs_unhandled;
  170. spinlock_t lock;
  171. #ifdef CONFIG_SMP
  172. cpumask_var_t affinity;
  173. unsigned int node;
  174. #ifdef CONFIG_GENERIC_PENDING_IRQ
  175. cpumask_var_t pending_mask;
  176. #endif
  177. #endif
  178. atomic_t threads_active;
  179. wait_queue_head_t wait_for_threads;
  180. #ifdef CONFIG_PROC_FS
  181. struct proc_dir_entry *dir;
  182. #endif
  183. const char *name;
  184. } ____cacheline_internodealigned_in_smp;
  185. extern void arch_init_copy_chip_data(struct irq_desc *old_desc,
  186. struct irq_desc *desc, int node);
  187. extern void arch_free_chip_data(struct irq_desc *old_desc, struct irq_desc *desc);
  188. #ifndef CONFIG_SPARSE_IRQ
  189. extern struct irq_desc irq_desc[NR_IRQS];
  190. #endif
  191. #ifdef CONFIG_NUMA_IRQ_DESC
  192. extern struct irq_desc *move_irq_desc(struct irq_desc *old_desc, int node);
  193. #else
  194. static inline struct irq_desc *move_irq_desc(struct irq_desc *desc, int node)
  195. {
  196. return desc;
  197. }
  198. #endif
  199. extern struct irq_desc *irq_to_desc_alloc_node(unsigned int irq, int node);
  200. /*
  201. * Pick up the arch-dependent methods:
  202. */
  203. #include <asm/hw_irq.h>
  204. extern int setup_irq(unsigned int irq, struct irqaction *new);
  205. extern void remove_irq(unsigned int irq, struct irqaction *act);
  206. #ifdef CONFIG_GENERIC_HARDIRQS
  207. #ifdef CONFIG_SMP
  208. #ifdef CONFIG_GENERIC_PENDING_IRQ
  209. void move_native_irq(int irq);
  210. void move_masked_irq(int irq);
  211. #else /* CONFIG_GENERIC_PENDING_IRQ */
  212. static inline void move_irq(int irq)
  213. {
  214. }
  215. static inline void move_native_irq(int irq)
  216. {
  217. }
  218. static inline void move_masked_irq(int irq)
  219. {
  220. }
  221. #endif /* CONFIG_GENERIC_PENDING_IRQ */
  222. #else /* CONFIG_SMP */
  223. #define move_native_irq(x)
  224. #define move_masked_irq(x)
  225. #endif /* CONFIG_SMP */
  226. extern int no_irq_affinity;
  227. static inline int irq_balancing_disabled(unsigned int irq)
  228. {
  229. struct irq_desc *desc;
  230. desc = irq_to_desc(irq);
  231. return desc->status & IRQ_NO_BALANCING_MASK;
  232. }
  233. /* Handle irq action chains: */
  234. extern irqreturn_t handle_IRQ_event(unsigned int irq, struct irqaction *action);
  235. /*
  236. * Built-in IRQ handlers for various IRQ types,
  237. * callable via desc->chip->handle_irq()
  238. */
  239. extern void handle_level_irq(unsigned int irq, struct irq_desc *desc);
  240. extern void handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc);
  241. extern void handle_edge_irq(unsigned int irq, struct irq_desc *desc);
  242. extern void handle_simple_irq(unsigned int irq, struct irq_desc *desc);
  243. extern void handle_percpu_irq(unsigned int irq, struct irq_desc *desc);
  244. extern void handle_bad_irq(unsigned int irq, struct irq_desc *desc);
  245. extern void handle_nested_irq(unsigned int irq);
  246. /*
  247. * Monolithic do_IRQ implementation.
  248. */
  249. #ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
  250. extern unsigned int __do_IRQ(unsigned int irq);
  251. #endif
  252. /*
  253. * Architectures call this to let the generic IRQ layer
  254. * handle an interrupt. If the descriptor is attached to an
  255. * irqchip-style controller then we call the ->handle_irq() handler,
  256. * and it calls __do_IRQ() if it's attached to an irqtype-style controller.
  257. */
  258. static inline void generic_handle_irq_desc(unsigned int irq, struct irq_desc *desc)
  259. {
  260. #ifdef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
  261. desc->handle_irq(irq, desc);
  262. #else
  263. if (likely(desc->handle_irq))
  264. desc->handle_irq(irq, desc);
  265. else
  266. __do_IRQ(irq);
  267. #endif
  268. }
  269. static inline void generic_handle_irq(unsigned int irq)
  270. {
  271. generic_handle_irq_desc(irq, irq_to_desc(irq));
  272. }
  273. /* Handling of unhandled and spurious interrupts: */
  274. extern void note_interrupt(unsigned int irq, struct irq_desc *desc,
  275. irqreturn_t action_ret);
  276. /* Resending of interrupts :*/
  277. void check_irq_resend(struct irq_desc *desc, unsigned int irq);
  278. /* Enable/disable irq debugging output: */
  279. extern int noirqdebug_setup(char *str);
  280. /* Checks whether the interrupt can be requested by request_irq(): */
  281. extern int can_request_irq(unsigned int irq, unsigned long irqflags);
  282. /* Dummy irq-chip implementations: */
  283. extern struct irq_chip no_irq_chip;
  284. extern struct irq_chip dummy_irq_chip;
  285. extern void
  286. set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
  287. irq_flow_handler_t handle);
  288. extern void
  289. set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
  290. irq_flow_handler_t handle, const char *name);
  291. extern void
  292. __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
  293. const char *name);
  294. /* caller has locked the irq_desc and both params are valid */
  295. static inline void __set_irq_handler_unlocked(int irq,
  296. irq_flow_handler_t handler)
  297. {
  298. struct irq_desc *desc;
  299. desc = irq_to_desc(irq);
  300. desc->handle_irq = handler;
  301. }
  302. /*
  303. * Set a highlevel flow handler for a given IRQ:
  304. */
  305. static inline void
  306. set_irq_handler(unsigned int irq, irq_flow_handler_t handle)
  307. {
  308. __set_irq_handler(irq, handle, 0, NULL);
  309. }
  310. /*
  311. * Set a highlevel chained flow handler for a given IRQ.
  312. * (a chained handler is automatically enabled and set to
  313. * IRQ_NOREQUEST and IRQ_NOPROBE)
  314. */
  315. static inline void
  316. set_irq_chained_handler(unsigned int irq,
  317. irq_flow_handler_t handle)
  318. {
  319. __set_irq_handler(irq, handle, 1, NULL);
  320. }
  321. extern void set_irq_noprobe(unsigned int irq);
  322. extern void set_irq_probe(unsigned int irq);
  323. /* Handle dynamic irq creation and destruction */
  324. extern unsigned int create_irq_nr(unsigned int irq_want, int node);
  325. extern int create_irq(void);
  326. extern void destroy_irq(unsigned int irq);
  327. /* Test to see if a driver has successfully requested an irq */
  328. static inline int irq_has_action(unsigned int irq)
  329. {
  330. struct irq_desc *desc = irq_to_desc(irq);
  331. return desc->action != NULL;
  332. }
  333. /* Dynamic irq helper functions */
  334. extern void dynamic_irq_init(unsigned int irq);
  335. extern void dynamic_irq_cleanup(unsigned int irq);
  336. /* Set/get chip/data for an IRQ: */
  337. extern int set_irq_chip(unsigned int irq, struct irq_chip *chip);
  338. extern int set_irq_data(unsigned int irq, void *data);
  339. extern int set_irq_chip_data(unsigned int irq, void *data);
  340. extern int set_irq_type(unsigned int irq, unsigned int type);
  341. extern int set_irq_msi(unsigned int irq, struct msi_desc *entry);
  342. #define get_irq_chip(irq) (irq_to_desc(irq)->chip)
  343. #define get_irq_chip_data(irq) (irq_to_desc(irq)->chip_data)
  344. #define get_irq_data(irq) (irq_to_desc(irq)->handler_data)
  345. #define get_irq_msi(irq) (irq_to_desc(irq)->msi_desc)
  346. #define get_irq_desc_chip(desc) ((desc)->chip)
  347. #define get_irq_desc_chip_data(desc) ((desc)->chip_data)
  348. #define get_irq_desc_data(desc) ((desc)->handler_data)
  349. #define get_irq_desc_msi(desc) ((desc)->msi_desc)
  350. #endif /* CONFIG_GENERIC_HARDIRQS */
  351. #endif /* !CONFIG_S390 */
  352. #ifdef CONFIG_SMP
  353. /**
  354. * alloc_desc_masks - allocate cpumasks for irq_desc
  355. * @desc: pointer to irq_desc struct
  356. * @node: node which will be handling the cpumasks
  357. * @boot: true if need bootmem
  358. *
  359. * Allocates affinity and pending_mask cpumask if required.
  360. * Returns true if successful (or not required).
  361. */
  362. static inline bool alloc_desc_masks(struct irq_desc *desc, int node,
  363. bool boot)
  364. {
  365. gfp_t gfp = GFP_ATOMIC;
  366. if (boot)
  367. gfp = GFP_NOWAIT;
  368. #ifdef CONFIG_CPUMASK_OFFSTACK
  369. if (!alloc_cpumask_var_node(&desc->affinity, gfp, node))
  370. return false;
  371. #ifdef CONFIG_GENERIC_PENDING_IRQ
  372. if (!alloc_cpumask_var_node(&desc->pending_mask, gfp, node)) {
  373. free_cpumask_var(desc->affinity);
  374. return false;
  375. }
  376. #endif
  377. #endif
  378. return true;
  379. }
  380. static inline void init_desc_masks(struct irq_desc *desc)
  381. {
  382. cpumask_setall(desc->affinity);
  383. #ifdef CONFIG_GENERIC_PENDING_IRQ
  384. cpumask_clear(desc->pending_mask);
  385. #endif
  386. }
  387. /**
  388. * init_copy_desc_masks - copy cpumasks for irq_desc
  389. * @old_desc: pointer to old irq_desc struct
  390. * @new_desc: pointer to new irq_desc struct
  391. *
  392. * Insures affinity and pending_masks are copied to new irq_desc.
  393. * If !CONFIG_CPUMASKS_OFFSTACK the cpumasks are embedded in the
  394. * irq_desc struct so the copy is redundant.
  395. */
  396. static inline void init_copy_desc_masks(struct irq_desc *old_desc,
  397. struct irq_desc *new_desc)
  398. {
  399. #ifdef CONFIG_CPUMASK_OFFSTACK
  400. cpumask_copy(new_desc->affinity, old_desc->affinity);
  401. #ifdef CONFIG_GENERIC_PENDING_IRQ
  402. cpumask_copy(new_desc->pending_mask, old_desc->pending_mask);
  403. #endif
  404. #endif
  405. }
  406. static inline void free_desc_masks(struct irq_desc *old_desc,
  407. struct irq_desc *new_desc)
  408. {
  409. free_cpumask_var(old_desc->affinity);
  410. #ifdef CONFIG_GENERIC_PENDING_IRQ
  411. free_cpumask_var(old_desc->pending_mask);
  412. #endif
  413. }
  414. #else /* !CONFIG_SMP */
  415. static inline bool alloc_desc_masks(struct irq_desc *desc, int node,
  416. bool boot)
  417. {
  418. return true;
  419. }
  420. static inline void init_desc_masks(struct irq_desc *desc)
  421. {
  422. }
  423. static inline void init_copy_desc_masks(struct irq_desc *old_desc,
  424. struct irq_desc *new_desc)
  425. {
  426. }
  427. static inline void free_desc_masks(struct irq_desc *old_desc,
  428. struct irq_desc *new_desc)
  429. {
  430. }
  431. #endif /* CONFIG_SMP */
  432. #endif /* _LINUX_IRQ_H */