ad1938.c 17 KB

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  1. /*
  2. * File: sound/soc/codecs/ad1938.c
  3. * Author: Barry Song <Barry.Song@analog.com>
  4. *
  5. * Created: June 04 2009
  6. * Description: Driver for AD1938 sound chip
  7. *
  8. * Modified:
  9. * Copyright 2009 Analog Devices Inc.
  10. *
  11. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License as published by
  15. * the Free Software Foundation; either version 2 of the License, or
  16. * (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, see the file COPYING, or write
  25. * to the Free Software Foundation, Inc.,
  26. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  27. */
  28. #include <linux/init.h>
  29. #include <linux/module.h>
  30. #include <linux/version.h>
  31. #include <linux/kernel.h>
  32. #include <linux/device.h>
  33. #include <sound/core.h>
  34. #include <sound/pcm.h>
  35. #include <sound/pcm_params.h>
  36. #include <sound/initval.h>
  37. #include <sound/soc.h>
  38. #include <sound/tlv.h>
  39. #include <sound/soc-dapm.h>
  40. #include <linux/spi/spi.h>
  41. #include "ad1938.h"
  42. /* codec private data */
  43. struct ad1938_priv {
  44. struct snd_soc_codec codec;
  45. u8 reg_cache[AD1938_NUM_REGS];
  46. };
  47. static struct snd_soc_codec *ad1938_codec;
  48. struct snd_soc_codec_device soc_codec_dev_ad1938;
  49. static int ad1938_register(struct ad1938_priv *ad1938);
  50. static void ad1938_unregister(struct ad1938_priv *ad1938);
  51. /*
  52. * AD1938 volume/mute/de-emphasis etc. controls
  53. */
  54. static const char *ad1938_deemp[] = {"None", "48kHz", "44.1kHz", "32kHz"};
  55. static const struct soc_enum ad1938_deemp_enum =
  56. SOC_ENUM_SINGLE(AD1938_DAC_CTRL2, 1, 4, ad1938_deemp);
  57. static const struct snd_kcontrol_new ad1938_snd_controls[] = {
  58. /* DAC volume control */
  59. SOC_DOUBLE_R("DAC1 Volume", AD1938_DAC_L1_VOL,
  60. AD1938_DAC_R1_VOL, 0, 0xFF, 1),
  61. SOC_DOUBLE_R("DAC2 Volume", AD1938_DAC_L2_VOL,
  62. AD1938_DAC_R2_VOL, 0, 0xFF, 1),
  63. SOC_DOUBLE_R("DAC3 Volume", AD1938_DAC_L3_VOL,
  64. AD1938_DAC_R3_VOL, 0, 0xFF, 1),
  65. SOC_DOUBLE_R("DAC4 Volume", AD1938_DAC_L4_VOL,
  66. AD1938_DAC_R4_VOL, 0, 0xFF, 1),
  67. /* ADC switch control */
  68. SOC_DOUBLE("ADC1 Switch", AD1938_ADC_CTRL0, AD1938_ADCL1_MUTE, AD1938_ADCR1_MUTE, 1, 1),
  69. SOC_DOUBLE("ADC2 Switch", AD1938_ADC_CTRL0, AD1938_ADCL2_MUTE, AD1938_ADCR2_MUTE, 1, 1),
  70. /* DAC switch control */
  71. SOC_DOUBLE("DAC1 Switch", AD1938_DAC_CHNL_MUTE, AD1938_DACL1_MUTE, AD1938_DACR1_MUTE, 1, 1),
  72. SOC_DOUBLE("DAC2 Switch", AD1938_DAC_CHNL_MUTE, AD1938_DACL2_MUTE, AD1938_DACR2_MUTE, 1, 1),
  73. SOC_DOUBLE("DAC3 Switch", AD1938_DAC_CHNL_MUTE, AD1938_DACL3_MUTE, AD1938_DACR3_MUTE, 1, 1),
  74. SOC_DOUBLE("DAC4 Switch", AD1938_DAC_CHNL_MUTE, AD1938_DACL4_MUTE, AD1938_DACR4_MUTE, 1, 1),
  75. /* ADC high-pass filter */
  76. SOC_SINGLE("ADC High Pass Filter Switch", AD1938_ADC_CTRL0,
  77. AD1938_ADC_HIGHPASS_FILTER, 1, 0),
  78. /* DAC de-emphasis */
  79. SOC_ENUM("Playback Deemphasis", ad1938_deemp_enum),
  80. };
  81. static const struct snd_soc_dapm_widget ad1938_dapm_widgets[] = {
  82. SND_SOC_DAPM_DAC("DAC", "Playback", AD1938_DAC_CTRL0, 0, 1),
  83. SND_SOC_DAPM_ADC("ADC", "Capture", SND_SOC_NOPM, 0, 0),
  84. SND_SOC_DAPM_SUPPLY("ADC_PWR", AD1938_ADC_CTRL0, 0, 1, NULL, 0),
  85. };
  86. static const struct snd_soc_dapm_route audio_paths[] = {
  87. { "DAC", NULL, "ADC_PWR" },
  88. { "ADC", NULL, "ADC_PWR" },
  89. };
  90. /*
  91. * DAI ops entries
  92. */
  93. static int ad1938_mute(struct snd_soc_dai *dai, int mute)
  94. {
  95. struct snd_soc_codec *codec = dai->codec;
  96. int reg;
  97. reg = codec->read(codec, AD1938_DAC_CTRL2);
  98. reg = (mute > 0) ? reg | AD1938_DAC_MASTER_MUTE : reg & (~AD1938_DAC_MASTER_MUTE);
  99. codec->write(codec, AD1938_DAC_CTRL2, reg);
  100. return 0;
  101. }
  102. static inline int ad1938_pll_powerctrl(struct snd_soc_codec *codec, int cmd)
  103. {
  104. int reg = codec->read(codec, AD1938_PLL_CLK_CTRL0);
  105. reg = (cmd > 0) ? reg & (~AD1938_PLL_POWERDOWN) : reg | AD1938_PLL_POWERDOWN;
  106. codec->write(codec, AD1938_PLL_CLK_CTRL0, reg);
  107. return 0;
  108. }
  109. static int ad1938_set_tdm_slot(struct snd_soc_dai *dai,
  110. unsigned int mask, int slots)
  111. {
  112. struct snd_soc_codec *codec = dai->codec;
  113. int dac_reg = codec->read(codec, AD1938_DAC_CTRL1);
  114. int adc_reg = codec->read(codec, AD1938_ADC_CTRL2);
  115. dac_reg &= ~AD1938_DAC_CHAN_MASK;
  116. adc_reg &= ~AD1938_ADC_CHAN_MASK;
  117. switch(slots) {
  118. case 2:
  119. dac_reg |= AD1938_DAC_2_CHANNELS << AD1938_DAC_CHAN_SHFT;
  120. adc_reg |= AD1938_ADC_2_CHANNELS << AD1938_ADC_CHAN_SHFT;
  121. break;
  122. case 4:
  123. dac_reg |= AD1938_DAC_4_CHANNELS << AD1938_DAC_CHAN_SHFT;
  124. adc_reg |= AD1938_ADC_4_CHANNELS << AD1938_ADC_CHAN_SHFT;
  125. break;
  126. case 8:
  127. dac_reg |= AD1938_DAC_8_CHANNELS << AD1938_DAC_CHAN_SHFT;
  128. adc_reg |= AD1938_ADC_8_CHANNELS << AD1938_ADC_CHAN_SHFT;
  129. break;
  130. case 16:
  131. dac_reg |= AD1938_DAC_16_CHANNELS << AD1938_DAC_CHAN_SHFT;
  132. adc_reg |= AD1938_ADC_16_CHANNELS << AD1938_ADC_CHAN_SHFT;
  133. break;
  134. default:
  135. return -EINVAL;
  136. }
  137. codec->write(codec, AD1938_DAC_CTRL1, dac_reg);
  138. codec->write(codec, AD1938_ADC_CTRL2, adc_reg);
  139. return 0;
  140. }
  141. static int ad1938_set_dai_fmt(struct snd_soc_dai *codec_dai,
  142. unsigned int fmt)
  143. {
  144. struct snd_soc_codec *codec = codec_dai->codec;
  145. int adc_reg, dac_reg;
  146. adc_reg = codec->read(codec, AD1938_ADC_CTRL2);
  147. dac_reg = codec->read(codec, AD1938_DAC_CTRL1);
  148. /* At present, the driver only support AUX ADC mode(SND_SOC_DAIFMT_I2S with TDM)
  149. * and ADC&DAC TDM mode(SND_SOC_DAIFMT_DSP_A)
  150. */
  151. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  152. case SND_SOC_DAIFMT_I2S:
  153. adc_reg &= ~AD1938_ADC_SERFMT_MASK;
  154. adc_reg |= AD1938_ADC_SERFMT_TDM;
  155. break;
  156. case SND_SOC_DAIFMT_DSP_A:
  157. adc_reg &= ~AD1938_ADC_SERFMT_MASK;
  158. adc_reg |= AD1938_ADC_SERFMT_AUX;
  159. break;
  160. default:
  161. return -EINVAL;
  162. }
  163. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  164. case SND_SOC_DAIFMT_NB_NF: /* normal bit clock + frame */
  165. adc_reg &= ~AD1938_ADC_LEFT_HIGH;
  166. adc_reg &= ~AD1938_ADC_BCLK_INV;
  167. dac_reg &= ~AD1938_DAC_LEFT_HIGH;
  168. dac_reg &= ~AD1938_DAC_BCLK_INV;
  169. break;
  170. case SND_SOC_DAIFMT_NB_IF: /* normal bclk + invert frm */
  171. adc_reg |= AD1938_ADC_LEFT_HIGH;
  172. adc_reg &= ~AD1938_ADC_BCLK_INV;
  173. dac_reg |= AD1938_DAC_LEFT_HIGH;
  174. dac_reg &= ~AD1938_DAC_BCLK_INV;
  175. break;
  176. case SND_SOC_DAIFMT_IB_NF: /* invert bclk + normal frm */
  177. adc_reg &= ~AD1938_ADC_LEFT_HIGH;
  178. adc_reg |= AD1938_ADC_BCLK_INV;
  179. dac_reg &= ~AD1938_DAC_LEFT_HIGH;
  180. dac_reg |= AD1938_DAC_BCLK_INV;
  181. break;
  182. case SND_SOC_DAIFMT_IB_IF: /* invert bclk + frm */
  183. adc_reg |= AD1938_ADC_LEFT_HIGH;
  184. adc_reg |= AD1938_ADC_BCLK_INV;
  185. dac_reg |= AD1938_DAC_LEFT_HIGH;
  186. dac_reg |= AD1938_DAC_BCLK_INV;
  187. break;
  188. default:
  189. return -EINVAL;
  190. }
  191. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  192. case SND_SOC_DAIFMT_CBM_CFM: /* codec clk & frm master */
  193. adc_reg |= AD1938_ADC_LCR_MASTER;
  194. adc_reg |= AD1938_ADC_BCLK_MASTER;
  195. dac_reg |= AD1938_DAC_LCR_MASTER;
  196. dac_reg |= AD1938_DAC_BCLK_MASTER;
  197. break;
  198. case SND_SOC_DAIFMT_CBS_CFM: /* codec clk slave & frm master */
  199. adc_reg |= AD1938_ADC_LCR_MASTER;
  200. adc_reg &= ~AD1938_ADC_BCLK_MASTER;
  201. dac_reg |= AD1938_DAC_LCR_MASTER;
  202. dac_reg &= ~AD1938_DAC_BCLK_MASTER;
  203. break;
  204. case SND_SOC_DAIFMT_CBM_CFS: /* codec clk master & frame slave */
  205. adc_reg &= ~AD1938_ADC_LCR_MASTER;
  206. adc_reg |= AD1938_ADC_BCLK_MASTER;
  207. dac_reg &= ~AD1938_DAC_LCR_MASTER;
  208. dac_reg |= AD1938_DAC_BCLK_MASTER;
  209. break;
  210. case SND_SOC_DAIFMT_CBS_CFS: /* codec clk & frm slave */
  211. adc_reg &= ~AD1938_ADC_LCR_MASTER;
  212. adc_reg &= ~AD1938_ADC_BCLK_MASTER;
  213. dac_reg &= ~AD1938_DAC_LCR_MASTER;
  214. dac_reg &= ~AD1938_DAC_BCLK_MASTER;
  215. break;
  216. default:
  217. return -EINVAL;
  218. }
  219. codec->write(codec, AD1938_ADC_CTRL2, adc_reg);
  220. codec->write(codec, AD1938_DAC_CTRL1, dac_reg);
  221. return 0;
  222. }
  223. static int ad1938_hw_params(struct snd_pcm_substream *substream,
  224. struct snd_pcm_hw_params *params,
  225. struct snd_soc_dai *dai)
  226. {
  227. int word_len = 0, reg = 0;
  228. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  229. struct snd_soc_device *socdev = rtd->socdev;
  230. struct snd_soc_codec *codec = socdev->card->codec;
  231. /* bit size */
  232. switch (params_format(params)) {
  233. case SNDRV_PCM_FORMAT_S16_LE:
  234. word_len = 3;
  235. break;
  236. case SNDRV_PCM_FORMAT_S20_3LE:
  237. word_len = 1;
  238. break;
  239. case SNDRV_PCM_FORMAT_S24_LE:
  240. case SNDRV_PCM_FORMAT_S32_LE:
  241. word_len = 0;
  242. break;
  243. }
  244. reg = codec->read(codec, AD1938_DAC_CTRL2);
  245. reg = (reg & (~AD1938_DAC_WORD_LEN_MASK)) | word_len;
  246. codec->write(codec, AD1938_DAC_CTRL2, reg);
  247. reg = codec->read(codec, AD1938_ADC_CTRL1);
  248. reg = (reg & (~AD1938_ADC_WORD_LEN_MASK)) | word_len;
  249. codec->write(codec, AD1938_ADC_CTRL1, reg);
  250. return 0;
  251. }
  252. static int ad1938_set_bias_level(struct snd_soc_codec *codec,
  253. enum snd_soc_bias_level level)
  254. {
  255. switch (level) {
  256. case SND_SOC_BIAS_ON:
  257. ad1938_pll_powerctrl(codec, 1);
  258. break;
  259. case SND_SOC_BIAS_PREPARE:
  260. break;
  261. case SND_SOC_BIAS_STANDBY:
  262. case SND_SOC_BIAS_OFF:
  263. ad1938_pll_powerctrl(codec, 0);
  264. break;
  265. }
  266. codec->bias_level = level;
  267. return 0;
  268. }
  269. /*
  270. * interface to read/write ad1938 register
  271. */
  272. #define AD1938_SPI_ADDR 0x4
  273. #define AD1938_SPI_READ 0x1
  274. #define AD1938_SPI_BUFLEN 3
  275. /*
  276. * write to the ad1938 register space
  277. */
  278. static int ad1938_write_reg(struct snd_soc_codec *codec, unsigned int reg,
  279. unsigned int value)
  280. {
  281. u8 *reg_cache = codec->reg_cache;
  282. int ret = 0;
  283. if(value != reg_cache[reg]) {
  284. uint8_t buf[AD1938_SPI_BUFLEN];
  285. struct spi_transfer t = {
  286. .tx_buf = buf,
  287. .len = AD1938_SPI_BUFLEN,
  288. };
  289. struct spi_message m;
  290. buf[0] = AD1938_SPI_ADDR << 1;
  291. buf[1] = reg;
  292. buf[2] = value;
  293. spi_message_init(&m);
  294. spi_message_add_tail(&t, &m);
  295. if((ret = spi_sync(codec->control_data, &m)) == 0)
  296. reg_cache[reg] = value;
  297. }
  298. return ret;
  299. }
  300. /*
  301. * read from the ad1938 register space cache
  302. */
  303. static unsigned int ad1938_read_reg_cache(struct snd_soc_codec *codec,
  304. unsigned int reg)
  305. {
  306. u8 *reg_cache = codec->reg_cache;
  307. if (reg >= codec->reg_cache_size)
  308. return -EINVAL;
  309. return reg_cache[reg];
  310. }
  311. /*
  312. * read from the ad1938 register space
  313. */
  314. static unsigned int ad1938_read_reg(struct snd_soc_codec *codec, unsigned int reg)
  315. {
  316. char w_buf[AD1938_SPI_BUFLEN];
  317. char r_buf[AD1938_SPI_BUFLEN];
  318. int ret;
  319. struct spi_transfer t = {
  320. .tx_buf = w_buf,
  321. .rx_buf = r_buf,
  322. .len = AD1938_SPI_BUFLEN,
  323. };
  324. struct spi_message m;
  325. w_buf[0] = (AD1938_SPI_ADDR << 1) | AD1938_SPI_READ;
  326. w_buf[1] = reg;
  327. w_buf[2] = 0;
  328. spi_message_init(&m);
  329. spi_message_add_tail(&t, &m);
  330. ret = spi_sync(codec->control_data, &m);
  331. if (ret == 0)
  332. return r_buf[2];
  333. else
  334. return -EIO;
  335. }
  336. static int ad1938_fill_cache(struct snd_soc_codec *codec)
  337. {
  338. int i;
  339. u8 *reg_cache = codec->reg_cache;
  340. struct spi_device *spi = codec->control_data;
  341. for (i = 0; i < codec->reg_cache_size; i++) {
  342. int ret = ad1938_read_reg(codec, i);
  343. if (ret == -EIO) {
  344. dev_err(&spi->dev, "AD1938 SPI read failure\n");
  345. return ret;
  346. }
  347. reg_cache[i] = ret;
  348. }
  349. return 0;
  350. }
  351. static int __devinit ad1938_spi_probe(struct spi_device *spi)
  352. {
  353. struct snd_soc_codec *codec;
  354. struct ad1938_priv *ad1938;
  355. ad1938 = kzalloc(sizeof(struct ad1938_priv), GFP_KERNEL);
  356. if (ad1938 == NULL)
  357. return -ENOMEM;
  358. codec = &ad1938->codec;
  359. codec->control_data = spi;
  360. codec->dev = &spi->dev;
  361. spi->dev.driver_data = ad1938;
  362. return ad1938_register(ad1938);
  363. }
  364. static int __devexit ad1938_spi_remove(struct spi_device *spi)
  365. {
  366. struct ad1938_priv *ad1938 = spi->dev.driver_data;
  367. ad1938_unregister(ad1938);
  368. return 0;
  369. }
  370. static struct spi_driver ad1938_spi_driver = {
  371. .driver = {
  372. .name = "ad1938-spi",
  373. .bus = &spi_bus_type,
  374. .owner = THIS_MODULE,
  375. },
  376. .probe = ad1938_spi_probe,
  377. .remove = __devexit_p(ad1938_spi_remove),
  378. };
  379. static struct snd_soc_dai_ops ad1938_dai_ops = {
  380. .hw_params = ad1938_hw_params,
  381. .digital_mute = ad1938_mute,
  382. .set_tdm_slot = ad1938_set_tdm_slot,
  383. .set_fmt = ad1938_set_dai_fmt,
  384. };
  385. /* codec DAI instance */
  386. struct snd_soc_dai ad1938_dai = {
  387. .name = "AD1938",
  388. .playback = {
  389. .stream_name = "Playback",
  390. .channels_min = 2,
  391. .channels_max = 8,
  392. .rates = SNDRV_PCM_RATE_48000,
  393. .formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S16_LE |
  394. SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S24_LE,
  395. },
  396. .capture = {
  397. .stream_name = "Capture",
  398. .channels_min = 2,
  399. .channels_max = 4,
  400. .rates = SNDRV_PCM_RATE_48000,
  401. .formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S16_LE |
  402. SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S24_LE,
  403. },
  404. .ops = &ad1938_dai_ops,
  405. };
  406. EXPORT_SYMBOL_GPL(ad1938_dai);
  407. static int ad1938_register(struct ad1938_priv *ad1938)
  408. {
  409. int ret;
  410. struct snd_soc_codec *codec = &ad1938->codec;
  411. if (ad1938_codec) {
  412. dev_err(codec->dev, "Another ad1938 is registered\n");
  413. return -EINVAL;
  414. }
  415. mutex_init(&codec->mutex);
  416. INIT_LIST_HEAD(&codec->dapm_widgets);
  417. INIT_LIST_HEAD(&codec->dapm_paths);
  418. codec->private_data = ad1938;
  419. codec->reg_cache = ad1938->reg_cache;
  420. codec->reg_cache_size = AD1938_NUM_REGS;
  421. codec->name = "AD1938";
  422. codec->owner = THIS_MODULE;
  423. codec->dai = &ad1938_dai;
  424. codec->num_dai = 1;
  425. codec->write = ad1938_write_reg;
  426. codec->read = ad1938_read_reg_cache;
  427. INIT_LIST_HEAD(&codec->dapm_widgets);
  428. INIT_LIST_HEAD(&codec->dapm_paths);
  429. ad1938_dai.dev = codec->dev;
  430. ad1938_codec = codec;
  431. /* default setting for ad1938 */
  432. codec->write(codec, AD1938_DAC_CHNL_MUTE, 0x0); /* unmute dac channels */
  433. codec->write(codec, AD1938_DAC_CTRL2, 0x1A); /* de-emphasis: 48kHz, powedown dac */
  434. codec->write(codec, AD1938_DAC_CTRL0, 0x21); /* powerdown dac, dac tdm mode */
  435. codec->write(codec, AD1938_ADC_CTRL0, 0x3); /* high-pass filter enable */
  436. codec->write(codec, AD1938_ADC_CTRL1, 0x43); /* sata delay=1, adc aux mode */
  437. codec->write(codec, AD1938_PLL_CLK_CTRL0, 0x9D); /* pll input:mclki/xi */
  438. codec->write(codec, AD1938_PLL_CLK_CTRL1, 0x04);
  439. ad1938_fill_cache(codec);
  440. ret = snd_soc_register_codec(codec);
  441. if (ret != 0) {
  442. dev_err(codec->dev, "Failed to register codec: %d\n", ret);
  443. return ret;
  444. }
  445. ret = snd_soc_register_dai(&ad1938_dai);
  446. if (ret != 0) {
  447. dev_err(codec->dev, "Failed to register DAI: %d\n", ret);
  448. snd_soc_unregister_codec(codec);
  449. return ret;
  450. }
  451. return 0;
  452. }
  453. static void ad1938_unregister(struct ad1938_priv *ad1938)
  454. {
  455. ad1938_set_bias_level(&ad1938->codec, SND_SOC_BIAS_OFF);
  456. snd_soc_unregister_dai(&ad1938_dai);
  457. snd_soc_unregister_codec(&ad1938->codec);
  458. kfree(ad1938);
  459. ad1938_codec = NULL;
  460. }
  461. static int ad1938_probe(struct platform_device *pdev)
  462. {
  463. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  464. struct snd_soc_codec *codec;
  465. int ret = 0;
  466. if (ad1938_codec == NULL) {
  467. dev_err(&pdev->dev, "Codec device not registered\n");
  468. return -ENODEV;
  469. }
  470. socdev->card->codec = ad1938_codec;
  471. codec = ad1938_codec;
  472. /* register pcms */
  473. ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
  474. if (ret < 0) {
  475. dev_err(codec->dev, "failed to create pcms: %d\n", ret);
  476. goto pcm_err;
  477. }
  478. snd_soc_add_controls(codec, ad1938_snd_controls,
  479. ARRAY_SIZE(ad1938_snd_controls));
  480. snd_soc_dapm_new_controls(codec, ad1938_dapm_widgets,
  481. ARRAY_SIZE(ad1938_dapm_widgets));
  482. snd_soc_dapm_add_routes(codec, audio_paths, ARRAY_SIZE(audio_paths));
  483. snd_soc_dapm_new_widgets(codec);
  484. ad1938_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  485. ret = snd_soc_init_card(socdev);
  486. if (ret < 0) {
  487. dev_err(codec->dev, "failed to register card: %d\n", ret);
  488. goto card_err;
  489. }
  490. return ret;
  491. card_err:
  492. snd_soc_free_pcms(socdev);
  493. snd_soc_dapm_free(socdev);
  494. pcm_err:
  495. return ret;
  496. }
  497. /* power down chip */
  498. static int ad1938_remove(struct platform_device *pdev)
  499. {
  500. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  501. snd_soc_free_pcms(socdev);
  502. snd_soc_dapm_free(socdev);
  503. return 0;
  504. }
  505. #ifdef CONFIG_PM
  506. static int ad1938_suspend(struct platform_device *pdev,
  507. pm_message_t state)
  508. {
  509. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  510. struct snd_soc_codec *codec = socdev->card->codec;
  511. ad1938_set_bias_level(codec, SND_SOC_BIAS_OFF);
  512. return 0;
  513. }
  514. static int ad1938_resume(struct platform_device *pdev)
  515. {
  516. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  517. struct snd_soc_codec *codec = socdev->card->codec;
  518. if (codec->suspend_bias_level == SND_SOC_BIAS_ON)
  519. ad1938_set_bias_level(codec, SND_SOC_BIAS_ON);
  520. return 0;
  521. }
  522. #else
  523. #define ad1938_suspend NULL
  524. #define ad1938_resume NULL
  525. #endif
  526. struct snd_soc_codec_device soc_codec_dev_ad1938 = {
  527. .probe = ad1938_probe,
  528. .remove = ad1938_remove,
  529. .suspend = ad1938_suspend,
  530. .resume = ad1938_resume,
  531. };
  532. EXPORT_SYMBOL_GPL(soc_codec_dev_ad1938);
  533. static int __init ad1938_init(void)
  534. {
  535. int ret;
  536. ret = spi_register_driver(&ad1938_spi_driver);
  537. if (ret != 0) {
  538. printk(KERN_ERR "Failed to register ad1938 SPI driver: %d\n",
  539. ret);
  540. }
  541. return ret;
  542. }
  543. module_init(ad1938_init);
  544. static void __exit ad1938_exit(void)
  545. {
  546. spi_unregister_driver(&ad1938_spi_driver);
  547. }
  548. module_exit(ad1938_exit);
  549. MODULE_DESCRIPTION("ASoC ad1938 driver");
  550. MODULE_AUTHOR("Barry Song ");
  551. MODULE_LICENSE("GPL");