ar933x_uart.c 18 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760
  1. /*
  2. * Atheros AR933X SoC built-in UART driver
  3. *
  4. * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
  5. *
  6. * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License version 2 as published
  10. * by the Free Software Foundation.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/ioport.h>
  14. #include <linux/init.h>
  15. #include <linux/console.h>
  16. #include <linux/sysrq.h>
  17. #include <linux/delay.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/tty.h>
  20. #include <linux/tty_flip.h>
  21. #include <linux/serial_core.h>
  22. #include <linux/serial.h>
  23. #include <linux/slab.h>
  24. #include <linux/io.h>
  25. #include <linux/irq.h>
  26. #include <linux/clk.h>
  27. #include <asm/div64.h>
  28. #include <asm/mach-ath79/ar933x_uart.h>
  29. #define DRIVER_NAME "ar933x-uart"
  30. #define AR933X_UART_MAX_SCALE 0xff
  31. #define AR933X_UART_MAX_STEP 0xffff
  32. #define AR933X_UART_MIN_BAUD 300
  33. #define AR933X_UART_MAX_BAUD 3000000
  34. #define AR933X_DUMMY_STATUS_RD 0x01
  35. static struct uart_driver ar933x_uart_driver;
  36. struct ar933x_uart_port {
  37. struct uart_port port;
  38. unsigned int ier; /* shadow Interrupt Enable Register */
  39. unsigned int min_baud;
  40. unsigned int max_baud;
  41. struct clk *clk;
  42. };
  43. static inline bool ar933x_uart_console_enabled(void)
  44. {
  45. return config_enabled(CONFIG_SERIAL_AR933X_CONSOLE);
  46. }
  47. static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up,
  48. int offset)
  49. {
  50. return readl(up->port.membase + offset);
  51. }
  52. static inline void ar933x_uart_write(struct ar933x_uart_port *up,
  53. int offset, unsigned int value)
  54. {
  55. writel(value, up->port.membase + offset);
  56. }
  57. static inline void ar933x_uart_rmw(struct ar933x_uart_port *up,
  58. unsigned int offset,
  59. unsigned int mask,
  60. unsigned int val)
  61. {
  62. unsigned int t;
  63. t = ar933x_uart_read(up, offset);
  64. t &= ~mask;
  65. t |= val;
  66. ar933x_uart_write(up, offset, t);
  67. }
  68. static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up,
  69. unsigned int offset,
  70. unsigned int val)
  71. {
  72. ar933x_uart_rmw(up, offset, 0, val);
  73. }
  74. static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up,
  75. unsigned int offset,
  76. unsigned int val)
  77. {
  78. ar933x_uart_rmw(up, offset, val, 0);
  79. }
  80. static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up)
  81. {
  82. up->ier |= AR933X_UART_INT_TX_EMPTY;
  83. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
  84. }
  85. static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up)
  86. {
  87. up->ier &= ~AR933X_UART_INT_TX_EMPTY;
  88. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
  89. }
  90. static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch)
  91. {
  92. unsigned int rdata;
  93. rdata = ch & AR933X_UART_DATA_TX_RX_MASK;
  94. rdata |= AR933X_UART_DATA_TX_CSR;
  95. ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata);
  96. }
  97. static unsigned int ar933x_uart_tx_empty(struct uart_port *port)
  98. {
  99. struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
  100. unsigned long flags;
  101. unsigned int rdata;
  102. spin_lock_irqsave(&up->port.lock, flags);
  103. rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
  104. spin_unlock_irqrestore(&up->port.lock, flags);
  105. return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT;
  106. }
  107. static unsigned int ar933x_uart_get_mctrl(struct uart_port *port)
  108. {
  109. return TIOCM_CAR;
  110. }
  111. static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
  112. {
  113. }
  114. static void ar933x_uart_start_tx(struct uart_port *port)
  115. {
  116. struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
  117. ar933x_uart_start_tx_interrupt(up);
  118. }
  119. static void ar933x_uart_stop_tx(struct uart_port *port)
  120. {
  121. struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
  122. ar933x_uart_stop_tx_interrupt(up);
  123. }
  124. static void ar933x_uart_stop_rx(struct uart_port *port)
  125. {
  126. struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
  127. up->ier &= ~AR933X_UART_INT_RX_VALID;
  128. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
  129. }
  130. static void ar933x_uart_break_ctl(struct uart_port *port, int break_state)
  131. {
  132. struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
  133. unsigned long flags;
  134. spin_lock_irqsave(&up->port.lock, flags);
  135. if (break_state == -1)
  136. ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
  137. AR933X_UART_CS_TX_BREAK);
  138. else
  139. ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
  140. AR933X_UART_CS_TX_BREAK);
  141. spin_unlock_irqrestore(&up->port.lock, flags);
  142. }
  143. static void ar933x_uart_enable_ms(struct uart_port *port)
  144. {
  145. }
  146. /*
  147. * baudrate = (clk / (scale + 1)) * (step * (1 / 2^17))
  148. */
  149. static unsigned long ar933x_uart_get_baud(unsigned int clk,
  150. unsigned int scale,
  151. unsigned int step)
  152. {
  153. u64 t;
  154. u32 div;
  155. div = (2 << 16) * (scale + 1);
  156. t = clk;
  157. t *= step;
  158. t += (div / 2);
  159. do_div(t, div);
  160. return t;
  161. }
  162. static void ar933x_uart_get_scale_step(unsigned int clk,
  163. unsigned int baud,
  164. unsigned int *scale,
  165. unsigned int *step)
  166. {
  167. unsigned int tscale;
  168. long min_diff;
  169. *scale = 0;
  170. *step = 0;
  171. min_diff = baud;
  172. for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) {
  173. u64 tstep;
  174. int diff;
  175. tstep = baud * (tscale + 1);
  176. tstep *= (2 << 16);
  177. do_div(tstep, clk);
  178. if (tstep > AR933X_UART_MAX_STEP)
  179. break;
  180. diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud);
  181. if (diff < min_diff) {
  182. min_diff = diff;
  183. *scale = tscale;
  184. *step = tstep;
  185. }
  186. }
  187. }
  188. static void ar933x_uart_set_termios(struct uart_port *port,
  189. struct ktermios *new,
  190. struct ktermios *old)
  191. {
  192. struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
  193. unsigned int cs;
  194. unsigned long flags;
  195. unsigned int baud, scale, step;
  196. /* Only CS8 is supported */
  197. new->c_cflag &= ~CSIZE;
  198. new->c_cflag |= CS8;
  199. /* Only one stop bit is supported */
  200. new->c_cflag &= ~CSTOPB;
  201. cs = 0;
  202. if (new->c_cflag & PARENB) {
  203. if (!(new->c_cflag & PARODD))
  204. cs |= AR933X_UART_CS_PARITY_EVEN;
  205. else
  206. cs |= AR933X_UART_CS_PARITY_ODD;
  207. } else {
  208. cs |= AR933X_UART_CS_PARITY_NONE;
  209. }
  210. /* Mark/space parity is not supported */
  211. new->c_cflag &= ~CMSPAR;
  212. baud = uart_get_baud_rate(port, new, old, up->min_baud, up->max_baud);
  213. ar933x_uart_get_scale_step(port->uartclk, baud, &scale, &step);
  214. /*
  215. * Ok, we're now changing the port state. Do it with
  216. * interrupts disabled.
  217. */
  218. spin_lock_irqsave(&up->port.lock, flags);
  219. /* disable the UART */
  220. ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
  221. AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S);
  222. /* Update the per-port timeout. */
  223. uart_update_timeout(port, new->c_cflag, baud);
  224. up->port.ignore_status_mask = 0;
  225. /* ignore all characters if CREAD is not set */
  226. if ((new->c_cflag & CREAD) == 0)
  227. up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD;
  228. ar933x_uart_write(up, AR933X_UART_CLOCK_REG,
  229. scale << AR933X_UART_CLOCK_SCALE_S | step);
  230. /* setup configuration register */
  231. ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs);
  232. /* enable host interrupt */
  233. ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
  234. AR933X_UART_CS_HOST_INT_EN);
  235. /* reenable the UART */
  236. ar933x_uart_rmw(up, AR933X_UART_CS_REG,
  237. AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S,
  238. AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S);
  239. spin_unlock_irqrestore(&up->port.lock, flags);
  240. if (tty_termios_baud_rate(new))
  241. tty_termios_encode_baud_rate(new, baud, baud);
  242. }
  243. static void ar933x_uart_rx_chars(struct ar933x_uart_port *up)
  244. {
  245. struct tty_port *port = &up->port.state->port;
  246. int max_count = 256;
  247. do {
  248. unsigned int rdata;
  249. unsigned char ch;
  250. rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
  251. if ((rdata & AR933X_UART_DATA_RX_CSR) == 0)
  252. break;
  253. /* remove the character from the FIFO */
  254. ar933x_uart_write(up, AR933X_UART_DATA_REG,
  255. AR933X_UART_DATA_RX_CSR);
  256. up->port.icount.rx++;
  257. ch = rdata & AR933X_UART_DATA_TX_RX_MASK;
  258. if (uart_handle_sysrq_char(&up->port, ch))
  259. continue;
  260. if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0)
  261. tty_insert_flip_char(port, ch, TTY_NORMAL);
  262. } while (max_count-- > 0);
  263. spin_unlock(&up->port.lock);
  264. tty_flip_buffer_push(port);
  265. spin_lock(&up->port.lock);
  266. }
  267. static void ar933x_uart_tx_chars(struct ar933x_uart_port *up)
  268. {
  269. struct circ_buf *xmit = &up->port.state->xmit;
  270. int count;
  271. if (uart_tx_stopped(&up->port))
  272. return;
  273. count = up->port.fifosize;
  274. do {
  275. unsigned int rdata;
  276. rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
  277. if ((rdata & AR933X_UART_DATA_TX_CSR) == 0)
  278. break;
  279. if (up->port.x_char) {
  280. ar933x_uart_putc(up, up->port.x_char);
  281. up->port.icount.tx++;
  282. up->port.x_char = 0;
  283. continue;
  284. }
  285. if (uart_circ_empty(xmit))
  286. break;
  287. ar933x_uart_putc(up, xmit->buf[xmit->tail]);
  288. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  289. up->port.icount.tx++;
  290. } while (--count > 0);
  291. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  292. uart_write_wakeup(&up->port);
  293. if (!uart_circ_empty(xmit))
  294. ar933x_uart_start_tx_interrupt(up);
  295. }
  296. static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id)
  297. {
  298. struct ar933x_uart_port *up = dev_id;
  299. unsigned int status;
  300. status = ar933x_uart_read(up, AR933X_UART_CS_REG);
  301. if ((status & AR933X_UART_CS_HOST_INT) == 0)
  302. return IRQ_NONE;
  303. spin_lock(&up->port.lock);
  304. status = ar933x_uart_read(up, AR933X_UART_INT_REG);
  305. status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
  306. if (status & AR933X_UART_INT_RX_VALID) {
  307. ar933x_uart_write(up, AR933X_UART_INT_REG,
  308. AR933X_UART_INT_RX_VALID);
  309. ar933x_uart_rx_chars(up);
  310. }
  311. if (status & AR933X_UART_INT_TX_EMPTY) {
  312. ar933x_uart_write(up, AR933X_UART_INT_REG,
  313. AR933X_UART_INT_TX_EMPTY);
  314. ar933x_uart_stop_tx_interrupt(up);
  315. ar933x_uart_tx_chars(up);
  316. }
  317. spin_unlock(&up->port.lock);
  318. return IRQ_HANDLED;
  319. }
  320. static int ar933x_uart_startup(struct uart_port *port)
  321. {
  322. struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
  323. unsigned long flags;
  324. int ret;
  325. ret = request_irq(up->port.irq, ar933x_uart_interrupt,
  326. up->port.irqflags, dev_name(up->port.dev), up);
  327. if (ret)
  328. return ret;
  329. spin_lock_irqsave(&up->port.lock, flags);
  330. /* Enable HOST interrupts */
  331. ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
  332. AR933X_UART_CS_HOST_INT_EN);
  333. /* Enable RX interrupts */
  334. up->ier = AR933X_UART_INT_RX_VALID;
  335. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
  336. spin_unlock_irqrestore(&up->port.lock, flags);
  337. return 0;
  338. }
  339. static void ar933x_uart_shutdown(struct uart_port *port)
  340. {
  341. struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
  342. /* Disable all interrupts */
  343. up->ier = 0;
  344. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
  345. /* Disable break condition */
  346. ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
  347. AR933X_UART_CS_TX_BREAK);
  348. free_irq(up->port.irq, up);
  349. }
  350. static const char *ar933x_uart_type(struct uart_port *port)
  351. {
  352. return (port->type == PORT_AR933X) ? "AR933X UART" : NULL;
  353. }
  354. static void ar933x_uart_release_port(struct uart_port *port)
  355. {
  356. /* Nothing to release ... */
  357. }
  358. static int ar933x_uart_request_port(struct uart_port *port)
  359. {
  360. /* UARTs always present */
  361. return 0;
  362. }
  363. static void ar933x_uart_config_port(struct uart_port *port, int flags)
  364. {
  365. if (flags & UART_CONFIG_TYPE)
  366. port->type = PORT_AR933X;
  367. }
  368. static int ar933x_uart_verify_port(struct uart_port *port,
  369. struct serial_struct *ser)
  370. {
  371. struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
  372. if (ser->type != PORT_UNKNOWN &&
  373. ser->type != PORT_AR933X)
  374. return -EINVAL;
  375. if (ser->irq < 0 || ser->irq >= NR_IRQS)
  376. return -EINVAL;
  377. if (ser->baud_base < up->min_baud ||
  378. ser->baud_base > up->max_baud)
  379. return -EINVAL;
  380. return 0;
  381. }
  382. static struct uart_ops ar933x_uart_ops = {
  383. .tx_empty = ar933x_uart_tx_empty,
  384. .set_mctrl = ar933x_uart_set_mctrl,
  385. .get_mctrl = ar933x_uart_get_mctrl,
  386. .stop_tx = ar933x_uart_stop_tx,
  387. .start_tx = ar933x_uart_start_tx,
  388. .stop_rx = ar933x_uart_stop_rx,
  389. .enable_ms = ar933x_uart_enable_ms,
  390. .break_ctl = ar933x_uart_break_ctl,
  391. .startup = ar933x_uart_startup,
  392. .shutdown = ar933x_uart_shutdown,
  393. .set_termios = ar933x_uart_set_termios,
  394. .type = ar933x_uart_type,
  395. .release_port = ar933x_uart_release_port,
  396. .request_port = ar933x_uart_request_port,
  397. .config_port = ar933x_uart_config_port,
  398. .verify_port = ar933x_uart_verify_port,
  399. };
  400. static struct ar933x_uart_port *
  401. ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS];
  402. static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up)
  403. {
  404. unsigned int status;
  405. unsigned int timeout = 60000;
  406. /* Wait up to 60ms for the character(s) to be sent. */
  407. do {
  408. status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
  409. if (--timeout == 0)
  410. break;
  411. udelay(1);
  412. } while ((status & AR933X_UART_DATA_TX_CSR) == 0);
  413. }
  414. static void ar933x_uart_console_putchar(struct uart_port *port, int ch)
  415. {
  416. struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
  417. ar933x_uart_wait_xmitr(up);
  418. ar933x_uart_putc(up, ch);
  419. }
  420. static void ar933x_uart_console_write(struct console *co, const char *s,
  421. unsigned int count)
  422. {
  423. struct ar933x_uart_port *up = ar933x_console_ports[co->index];
  424. unsigned long flags;
  425. unsigned int int_en;
  426. int locked = 1;
  427. local_irq_save(flags);
  428. if (up->port.sysrq)
  429. locked = 0;
  430. else if (oops_in_progress)
  431. locked = spin_trylock(&up->port.lock);
  432. else
  433. spin_lock(&up->port.lock);
  434. /*
  435. * First save the IER then disable the interrupts
  436. */
  437. int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
  438. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0);
  439. uart_console_write(&up->port, s, count, ar933x_uart_console_putchar);
  440. /*
  441. * Finally, wait for transmitter to become empty
  442. * and restore the IER
  443. */
  444. ar933x_uart_wait_xmitr(up);
  445. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en);
  446. ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS);
  447. if (locked)
  448. spin_unlock(&up->port.lock);
  449. local_irq_restore(flags);
  450. }
  451. static int ar933x_uart_console_setup(struct console *co, char *options)
  452. {
  453. struct ar933x_uart_port *up;
  454. int baud = 115200;
  455. int bits = 8;
  456. int parity = 'n';
  457. int flow = 'n';
  458. if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS)
  459. return -EINVAL;
  460. up = ar933x_console_ports[co->index];
  461. if (!up)
  462. return -ENODEV;
  463. if (options)
  464. uart_parse_options(options, &baud, &parity, &bits, &flow);
  465. return uart_set_options(&up->port, co, baud, parity, bits, flow);
  466. }
  467. static struct console ar933x_uart_console = {
  468. .name = "ttyATH",
  469. .write = ar933x_uart_console_write,
  470. .device = uart_console_device,
  471. .setup = ar933x_uart_console_setup,
  472. .flags = CON_PRINTBUFFER,
  473. .index = -1,
  474. .data = &ar933x_uart_driver,
  475. };
  476. static void ar933x_uart_add_console_port(struct ar933x_uart_port *up)
  477. {
  478. if (!ar933x_uart_console_enabled())
  479. return;
  480. ar933x_console_ports[up->port.line] = up;
  481. }
  482. static struct uart_driver ar933x_uart_driver = {
  483. .owner = THIS_MODULE,
  484. .driver_name = DRIVER_NAME,
  485. .dev_name = "ttyATH",
  486. .nr = CONFIG_SERIAL_AR933X_NR_UARTS,
  487. .cons = NULL, /* filled in runtime */
  488. };
  489. static int ar933x_uart_probe(struct platform_device *pdev)
  490. {
  491. struct ar933x_uart_port *up;
  492. struct uart_port *port;
  493. struct resource *mem_res;
  494. struct resource *irq_res;
  495. unsigned int baud;
  496. int id;
  497. int ret;
  498. id = pdev->id;
  499. if (id == -1)
  500. id = 0;
  501. if (id > CONFIG_SERIAL_AR933X_NR_UARTS)
  502. return -EINVAL;
  503. irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  504. if (!irq_res) {
  505. dev_err(&pdev->dev, "no IRQ resource\n");
  506. return -EINVAL;
  507. }
  508. up = devm_kzalloc(&pdev->dev, sizeof(struct ar933x_uart_port),
  509. GFP_KERNEL);
  510. if (!up)
  511. return -ENOMEM;
  512. up->clk = devm_clk_get(&pdev->dev, "uart");
  513. if (IS_ERR(up->clk)) {
  514. dev_err(&pdev->dev, "unable to get UART clock\n");
  515. return PTR_ERR(up->clk);
  516. }
  517. port = &up->port;
  518. mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  519. port->membase = devm_ioremap_resource(&pdev->dev, mem_res);
  520. if (IS_ERR(port->membase))
  521. return PTR_ERR(port->membase);
  522. ret = clk_prepare_enable(up->clk);
  523. if (ret)
  524. return ret;
  525. port->uartclk = clk_get_rate(up->clk);
  526. if (!port->uartclk) {
  527. ret = -EINVAL;
  528. goto err_disable_clk;
  529. }
  530. port->mapbase = mem_res->start;
  531. port->line = id;
  532. port->irq = irq_res->start;
  533. port->dev = &pdev->dev;
  534. port->type = PORT_AR933X;
  535. port->iotype = UPIO_MEM32;
  536. port->regshift = 2;
  537. port->fifosize = AR933X_UART_FIFO_SIZE;
  538. port->ops = &ar933x_uart_ops;
  539. baud = ar933x_uart_get_baud(port->uartclk, AR933X_UART_MAX_SCALE, 1);
  540. up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD);
  541. baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP);
  542. up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD);
  543. ar933x_uart_add_console_port(up);
  544. ret = uart_add_one_port(&ar933x_uart_driver, &up->port);
  545. if (ret)
  546. goto err_disable_clk;
  547. platform_set_drvdata(pdev, up);
  548. return 0;
  549. err_disable_clk:
  550. clk_disable_unprepare(up->clk);
  551. return ret;
  552. }
  553. static int ar933x_uart_remove(struct platform_device *pdev)
  554. {
  555. struct ar933x_uart_port *up;
  556. up = platform_get_drvdata(pdev);
  557. if (up) {
  558. uart_remove_one_port(&ar933x_uart_driver, &up->port);
  559. clk_disable_unprepare(up->clk);
  560. }
  561. return 0;
  562. }
  563. static struct platform_driver ar933x_uart_platform_driver = {
  564. .probe = ar933x_uart_probe,
  565. .remove = ar933x_uart_remove,
  566. .driver = {
  567. .name = DRIVER_NAME,
  568. .owner = THIS_MODULE,
  569. },
  570. };
  571. static int __init ar933x_uart_init(void)
  572. {
  573. int ret;
  574. if (ar933x_uart_console_enabled())
  575. ar933x_uart_driver.cons = &ar933x_uart_console;
  576. ret = uart_register_driver(&ar933x_uart_driver);
  577. if (ret)
  578. goto err_out;
  579. ret = platform_driver_register(&ar933x_uart_platform_driver);
  580. if (ret)
  581. goto err_unregister_uart_driver;
  582. return 0;
  583. err_unregister_uart_driver:
  584. uart_unregister_driver(&ar933x_uart_driver);
  585. err_out:
  586. return ret;
  587. }
  588. static void __exit ar933x_uart_exit(void)
  589. {
  590. platform_driver_unregister(&ar933x_uart_platform_driver);
  591. uart_unregister_driver(&ar933x_uart_driver);
  592. }
  593. module_init(ar933x_uart_init);
  594. module_exit(ar933x_uart_exit);
  595. MODULE_DESCRIPTION("Atheros AR933X UART driver");
  596. MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
  597. MODULE_LICENSE("GPL v2");
  598. MODULE_ALIAS("platform:" DRIVER_NAME);