i2c-algo-pca.c 15 KB

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  1. /*
  2. * i2c-algo-pca.c i2c driver algorithms for PCA9564 adapters
  3. * Copyright (C) 2004 Arcom Control Systems
  4. * Copyright (C) 2008 Pengutronix
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  19. * MA 02110-1301 USA.
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/module.h>
  23. #include <linux/moduleparam.h>
  24. #include <linux/delay.h>
  25. #include <linux/jiffies.h>
  26. #include <linux/init.h>
  27. #include <linux/errno.h>
  28. #include <linux/i2c.h>
  29. #include <linux/i2c-algo-pca.h>
  30. #define DEB1(fmt, args...) do { if (i2c_debug >= 1) \
  31. printk(KERN_DEBUG fmt, ## args); } while (0)
  32. #define DEB2(fmt, args...) do { if (i2c_debug >= 2) \
  33. printk(KERN_DEBUG fmt, ## args); } while (0)
  34. #define DEB3(fmt, args...) do { if (i2c_debug >= 3) \
  35. printk(KERN_DEBUG fmt, ## args); } while (0)
  36. static int i2c_debug;
  37. #define pca_outw(adap, reg, val) adap->write_byte(adap->data, reg, val)
  38. #define pca_inw(adap, reg) adap->read_byte(adap->data, reg)
  39. #define pca_status(adap) pca_inw(adap, I2C_PCA_STA)
  40. #define pca_clock(adap) adap->i2c_clock
  41. #define pca_set_con(adap, val) pca_outw(adap, I2C_PCA_CON, val)
  42. #define pca_get_con(adap) pca_inw(adap, I2C_PCA_CON)
  43. #define pca_wait(adap) adap->wait_for_completion(adap->data)
  44. static void pca_reset(struct i2c_algo_pca_data *adap)
  45. {
  46. if (adap->chip == I2C_PCA_CHIP_9665) {
  47. /* Ignore the reset function from the module,
  48. * we can use the parallel bus reset.
  49. */
  50. pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IPRESET);
  51. pca_outw(adap, I2C_PCA_IND, 0xA5);
  52. pca_outw(adap, I2C_PCA_IND, 0x5A);
  53. } else {
  54. adap->reset_chip(adap->data);
  55. }
  56. }
  57. /*
  58. * Generate a start condition on the i2c bus.
  59. *
  60. * returns after the start condition has occurred
  61. */
  62. static int pca_start(struct i2c_algo_pca_data *adap)
  63. {
  64. int sta = pca_get_con(adap);
  65. DEB2("=== START\n");
  66. sta |= I2C_PCA_CON_STA;
  67. sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
  68. pca_set_con(adap, sta);
  69. return pca_wait(adap);
  70. }
  71. /*
  72. * Generate a repeated start condition on the i2c bus
  73. *
  74. * return after the repeated start condition has occurred
  75. */
  76. static int pca_repeated_start(struct i2c_algo_pca_data *adap)
  77. {
  78. int sta = pca_get_con(adap);
  79. DEB2("=== REPEATED START\n");
  80. sta |= I2C_PCA_CON_STA;
  81. sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
  82. pca_set_con(adap, sta);
  83. return pca_wait(adap);
  84. }
  85. /*
  86. * Generate a stop condition on the i2c bus
  87. *
  88. * returns after the stop condition has been generated
  89. *
  90. * STOPs do not generate an interrupt or set the SI flag, since the
  91. * part returns the idle state (0xf8). Hence we don't need to
  92. * pca_wait here.
  93. */
  94. static void pca_stop(struct i2c_algo_pca_data *adap)
  95. {
  96. int sta = pca_get_con(adap);
  97. DEB2("=== STOP\n");
  98. sta |= I2C_PCA_CON_STO;
  99. sta &= ~(I2C_PCA_CON_STA|I2C_PCA_CON_SI);
  100. pca_set_con(adap, sta);
  101. }
  102. /*
  103. * Send the slave address and R/W bit
  104. *
  105. * returns after the address has been sent
  106. */
  107. static int pca_address(struct i2c_algo_pca_data *adap,
  108. struct i2c_msg *msg)
  109. {
  110. int sta = pca_get_con(adap);
  111. int addr;
  112. addr = ((0x7f & msg->addr) << 1);
  113. if (msg->flags & I2C_M_RD)
  114. addr |= 1;
  115. DEB2("=== SLAVE ADDRESS %#04x+%c=%#04x\n",
  116. msg->addr, msg->flags & I2C_M_RD ? 'R' : 'W', addr);
  117. pca_outw(adap, I2C_PCA_DAT, addr);
  118. sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
  119. pca_set_con(adap, sta);
  120. return pca_wait(adap);
  121. }
  122. /*
  123. * Transmit a byte.
  124. *
  125. * Returns after the byte has been transmitted
  126. */
  127. static int pca_tx_byte(struct i2c_algo_pca_data *adap,
  128. __u8 b)
  129. {
  130. int sta = pca_get_con(adap);
  131. DEB2("=== WRITE %#04x\n", b);
  132. pca_outw(adap, I2C_PCA_DAT, b);
  133. sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
  134. pca_set_con(adap, sta);
  135. return pca_wait(adap);
  136. }
  137. /*
  138. * Receive a byte
  139. *
  140. * returns immediately.
  141. */
  142. static void pca_rx_byte(struct i2c_algo_pca_data *adap,
  143. __u8 *b, int ack)
  144. {
  145. *b = pca_inw(adap, I2C_PCA_DAT);
  146. DEB2("=== READ %#04x %s\n", *b, ack ? "ACK" : "NACK");
  147. }
  148. /*
  149. * Setup ACK or NACK for next received byte and wait for it to arrive.
  150. *
  151. * Returns after next byte has arrived.
  152. */
  153. static int pca_rx_ack(struct i2c_algo_pca_data *adap,
  154. int ack)
  155. {
  156. int sta = pca_get_con(adap);
  157. sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI|I2C_PCA_CON_AA);
  158. if (ack)
  159. sta |= I2C_PCA_CON_AA;
  160. pca_set_con(adap, sta);
  161. return pca_wait(adap);
  162. }
  163. static int pca_xfer(struct i2c_adapter *i2c_adap,
  164. struct i2c_msg *msgs,
  165. int num)
  166. {
  167. struct i2c_algo_pca_data *adap = i2c_adap->algo_data;
  168. struct i2c_msg *msg = NULL;
  169. int curmsg;
  170. int numbytes = 0;
  171. int state;
  172. int ret;
  173. int completed = 1;
  174. unsigned long timeout = jiffies + i2c_adap->timeout;
  175. while ((state = pca_status(adap)) != 0xf8) {
  176. if (time_before(jiffies, timeout)) {
  177. msleep(10);
  178. } else {
  179. dev_dbg(&i2c_adap->dev, "bus is not idle. status is "
  180. "%#04x\n", state);
  181. return -EBUSY;
  182. }
  183. }
  184. DEB1("{{{ XFER %d messages\n", num);
  185. if (i2c_debug >= 2) {
  186. for (curmsg = 0; curmsg < num; curmsg++) {
  187. int addr, i;
  188. msg = &msgs[curmsg];
  189. addr = (0x7f & msg->addr) ;
  190. if (msg->flags & I2C_M_RD)
  191. printk(KERN_INFO " [%02d] RD %d bytes from %#02x [%#02x, ...]\n",
  192. curmsg, msg->len, addr, (addr << 1) | 1);
  193. else {
  194. printk(KERN_INFO " [%02d] WR %d bytes to %#02x [%#02x%s",
  195. curmsg, msg->len, addr, addr << 1,
  196. msg->len == 0 ? "" : ", ");
  197. for (i = 0; i < msg->len; i++)
  198. printk("%#04x%s", msg->buf[i], i == msg->len - 1 ? "" : ", ");
  199. printk("]\n");
  200. }
  201. }
  202. }
  203. curmsg = 0;
  204. ret = -EIO;
  205. while (curmsg < num) {
  206. state = pca_status(adap);
  207. DEB3("STATE is 0x%02x\n", state);
  208. msg = &msgs[curmsg];
  209. switch (state) {
  210. case 0xf8: /* On reset or stop the bus is idle */
  211. completed = pca_start(adap);
  212. break;
  213. case 0x08: /* A START condition has been transmitted */
  214. case 0x10: /* A repeated start condition has been transmitted */
  215. completed = pca_address(adap, msg);
  216. break;
  217. case 0x18: /* SLA+W has been transmitted; ACK has been received */
  218. case 0x28: /* Data byte in I2CDAT has been transmitted; ACK has been received */
  219. if (numbytes < msg->len) {
  220. completed = pca_tx_byte(adap,
  221. msg->buf[numbytes]);
  222. numbytes++;
  223. break;
  224. }
  225. curmsg++; numbytes = 0;
  226. if (curmsg == num)
  227. pca_stop(adap);
  228. else
  229. completed = pca_repeated_start(adap);
  230. break;
  231. case 0x20: /* SLA+W has been transmitted; NOT ACK has been received */
  232. DEB2("NOT ACK received after SLA+W\n");
  233. pca_stop(adap);
  234. ret = -ENXIO;
  235. goto out;
  236. case 0x40: /* SLA+R has been transmitted; ACK has been received */
  237. completed = pca_rx_ack(adap, msg->len > 1);
  238. break;
  239. case 0x50: /* Data bytes has been received; ACK has been returned */
  240. if (numbytes < msg->len) {
  241. pca_rx_byte(adap, &msg->buf[numbytes], 1);
  242. numbytes++;
  243. completed = pca_rx_ack(adap,
  244. numbytes < msg->len - 1);
  245. break;
  246. }
  247. curmsg++; numbytes = 0;
  248. if (curmsg == num)
  249. pca_stop(adap);
  250. else
  251. completed = pca_repeated_start(adap);
  252. break;
  253. case 0x48: /* SLA+R has been transmitted; NOT ACK has been received */
  254. DEB2("NOT ACK received after SLA+R\n");
  255. pca_stop(adap);
  256. ret = -ENXIO;
  257. goto out;
  258. case 0x30: /* Data byte in I2CDAT has been transmitted; NOT ACK has been received */
  259. DEB2("NOT ACK received after data byte\n");
  260. pca_stop(adap);
  261. goto out;
  262. case 0x38: /* Arbitration lost during SLA+W, SLA+R or data bytes */
  263. DEB2("Arbitration lost\n");
  264. /*
  265. * The PCA9564 data sheet (2006-09-01) says "A
  266. * START condition will be transmitted when the
  267. * bus becomes free (STOP or SCL and SDA high)"
  268. * when the STA bit is set (p. 11).
  269. *
  270. * In case this won't work, try pca_reset()
  271. * instead.
  272. */
  273. pca_start(adap);
  274. goto out;
  275. case 0x58: /* Data byte has been received; NOT ACK has been returned */
  276. if (numbytes == msg->len - 1) {
  277. pca_rx_byte(adap, &msg->buf[numbytes], 0);
  278. curmsg++; numbytes = 0;
  279. if (curmsg == num)
  280. pca_stop(adap);
  281. else
  282. completed = pca_repeated_start(adap);
  283. } else {
  284. DEB2("NOT ACK sent after data byte received. "
  285. "Not final byte. numbytes %d. len %d\n",
  286. numbytes, msg->len);
  287. pca_stop(adap);
  288. goto out;
  289. }
  290. break;
  291. case 0x70: /* Bus error - SDA stuck low */
  292. DEB2("BUS ERROR - SDA Stuck low\n");
  293. pca_reset(adap);
  294. goto out;
  295. case 0x90: /* Bus error - SCL stuck low */
  296. DEB2("BUS ERROR - SCL Stuck low\n");
  297. pca_reset(adap);
  298. goto out;
  299. case 0x00: /* Bus error during master or slave mode due to illegal START or STOP condition */
  300. DEB2("BUS ERROR - Illegal START or STOP\n");
  301. pca_reset(adap);
  302. goto out;
  303. default:
  304. dev_err(&i2c_adap->dev, "unhandled SIO state 0x%02x\n", state);
  305. break;
  306. }
  307. if (!completed)
  308. goto out;
  309. }
  310. ret = curmsg;
  311. out:
  312. DEB1("}}} transferred %d/%d messages. "
  313. "status is %#04x. control is %#04x\n",
  314. curmsg, num, pca_status(adap),
  315. pca_get_con(adap));
  316. return ret;
  317. }
  318. static u32 pca_func(struct i2c_adapter *adap)
  319. {
  320. return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
  321. }
  322. static const struct i2c_algorithm pca_algo = {
  323. .master_xfer = pca_xfer,
  324. .functionality = pca_func,
  325. };
  326. static unsigned int pca_probe_chip(struct i2c_adapter *adap)
  327. {
  328. struct i2c_algo_pca_data *pca_data = adap->algo_data;
  329. /* The trick here is to check if there is an indirect register
  330. * available. If there is one, we will read the value we first
  331. * wrote on I2C_PCA_IADR. Otherwise, we will read the last value
  332. * we wrote on I2C_PCA_ADR
  333. */
  334. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
  335. pca_outw(pca_data, I2C_PCA_IND, 0xAA);
  336. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ITO);
  337. pca_outw(pca_data, I2C_PCA_IND, 0x00);
  338. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
  339. if (pca_inw(pca_data, I2C_PCA_IND) == 0xAA) {
  340. printk(KERN_INFO "%s: PCA9665 detected.\n", adap->name);
  341. pca_data->chip = I2C_PCA_CHIP_9665;
  342. } else {
  343. printk(KERN_INFO "%s: PCA9564 detected.\n", adap->name);
  344. pca_data->chip = I2C_PCA_CHIP_9564;
  345. }
  346. return pca_data->chip;
  347. }
  348. static int pca_init(struct i2c_adapter *adap)
  349. {
  350. struct i2c_algo_pca_data *pca_data = adap->algo_data;
  351. adap->algo = &pca_algo;
  352. if (pca_probe_chip(adap) == I2C_PCA_CHIP_9564) {
  353. static int freqs[] = {330, 288, 217, 146, 88, 59, 44, 36};
  354. int clock;
  355. if (pca_data->i2c_clock > 7) {
  356. switch (pca_data->i2c_clock) {
  357. case 330000:
  358. pca_data->i2c_clock = I2C_PCA_CON_330kHz;
  359. break;
  360. case 288000:
  361. pca_data->i2c_clock = I2C_PCA_CON_288kHz;
  362. break;
  363. case 217000:
  364. pca_data->i2c_clock = I2C_PCA_CON_217kHz;
  365. break;
  366. case 146000:
  367. pca_data->i2c_clock = I2C_PCA_CON_146kHz;
  368. break;
  369. case 88000:
  370. pca_data->i2c_clock = I2C_PCA_CON_88kHz;
  371. break;
  372. case 59000:
  373. pca_data->i2c_clock = I2C_PCA_CON_59kHz;
  374. break;
  375. case 44000:
  376. pca_data->i2c_clock = I2C_PCA_CON_44kHz;
  377. break;
  378. case 36000:
  379. pca_data->i2c_clock = I2C_PCA_CON_36kHz;
  380. break;
  381. default:
  382. printk(KERN_WARNING
  383. "%s: Invalid I2C clock speed selected."
  384. " Using default 59kHz.\n", adap->name);
  385. pca_data->i2c_clock = I2C_PCA_CON_59kHz;
  386. }
  387. } else {
  388. printk(KERN_WARNING "%s: "
  389. "Choosing the clock frequency based on "
  390. "index is deprecated."
  391. " Use the nominal frequency.\n", adap->name);
  392. }
  393. pca_reset(pca_data);
  394. clock = pca_clock(pca_data);
  395. printk(KERN_INFO "%s: Clock frequency is %dkHz\n",
  396. adap->name, freqs[clock]);
  397. pca_set_con(pca_data, I2C_PCA_CON_ENSIO | clock);
  398. } else {
  399. int clock;
  400. int mode;
  401. int tlow, thi;
  402. /* Values can be found on PCA9665 datasheet section 7.3.2.6 */
  403. int min_tlow, min_thi;
  404. /* These values are the maximum raise and fall values allowed
  405. * by the I2C operation mode (Standard, Fast or Fast+)
  406. * They are used (added) below to calculate the clock dividers
  407. * of PCA9665. Note that they are slightly different of the
  408. * real maximum, to allow the change on mode exactly on the
  409. * maximum clock rate for each mode
  410. */
  411. int raise_fall_time;
  412. if (pca_data->i2c_clock > 1265800) {
  413. printk(KERN_WARNING "%s: I2C clock speed too high."
  414. " Using 1265.8kHz.\n", adap->name);
  415. pca_data->i2c_clock = 1265800;
  416. }
  417. if (pca_data->i2c_clock < 60300) {
  418. printk(KERN_WARNING "%s: I2C clock speed too low."
  419. " Using 60.3kHz.\n", adap->name);
  420. pca_data->i2c_clock = 60300;
  421. }
  422. /* To avoid integer overflow, use clock/100 for calculations */
  423. clock = pca_clock(pca_data) / 100;
  424. if (pca_data->i2c_clock > 1000000) {
  425. mode = I2C_PCA_MODE_TURBO;
  426. min_tlow = 14;
  427. min_thi = 5;
  428. raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
  429. } else if (pca_data->i2c_clock > 400000) {
  430. mode = I2C_PCA_MODE_FASTP;
  431. min_tlow = 17;
  432. min_thi = 9;
  433. raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
  434. } else if (pca_data->i2c_clock > 100000) {
  435. mode = I2C_PCA_MODE_FAST;
  436. min_tlow = 44;
  437. min_thi = 20;
  438. raise_fall_time = 58; /* Raise 29e-8s, Fall 29e-8s */
  439. } else {
  440. mode = I2C_PCA_MODE_STD;
  441. min_tlow = 157;
  442. min_thi = 134;
  443. raise_fall_time = 127; /* Raise 29e-8s, Fall 98e-8s */
  444. }
  445. /* The minimum clock that respects the thi/tlow = 134/157 is
  446. * 64800 Hz. Below that, we have to fix the tlow to 255 and
  447. * calculate the thi factor.
  448. */
  449. if (clock < 648) {
  450. tlow = 255;
  451. thi = 1000000 - clock * raise_fall_time;
  452. thi /= (I2C_PCA_OSC_PER * clock) - tlow;
  453. } else {
  454. tlow = (1000000 - clock * raise_fall_time) * min_tlow;
  455. tlow /= I2C_PCA_OSC_PER * clock * (min_thi + min_tlow);
  456. thi = tlow * min_thi / min_tlow;
  457. }
  458. pca_reset(pca_data);
  459. printk(KERN_INFO
  460. "%s: Clock frequency is %dHz\n", adap->name, clock * 100);
  461. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IMODE);
  462. pca_outw(pca_data, I2C_PCA_IND, mode);
  463. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLL);
  464. pca_outw(pca_data, I2C_PCA_IND, tlow);
  465. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLH);
  466. pca_outw(pca_data, I2C_PCA_IND, thi);
  467. pca_set_con(pca_data, I2C_PCA_CON_ENSIO);
  468. }
  469. udelay(500); /* 500 us for oscilator to stabilise */
  470. return 0;
  471. }
  472. /*
  473. * registering functions to load algorithms at runtime
  474. */
  475. int i2c_pca_add_bus(struct i2c_adapter *adap)
  476. {
  477. int rval;
  478. rval = pca_init(adap);
  479. if (rval)
  480. return rval;
  481. return i2c_add_adapter(adap);
  482. }
  483. EXPORT_SYMBOL(i2c_pca_add_bus);
  484. int i2c_pca_add_numbered_bus(struct i2c_adapter *adap)
  485. {
  486. int rval;
  487. rval = pca_init(adap);
  488. if (rval)
  489. return rval;
  490. return i2c_add_numbered_adapter(adap);
  491. }
  492. EXPORT_SYMBOL(i2c_pca_add_numbered_bus);
  493. MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>, "
  494. "Wolfram Sang <w.sang@pengutronix.de>");
  495. MODULE_DESCRIPTION("I2C-Bus PCA9564/PCA9665 algorithm");
  496. MODULE_LICENSE("GPL");
  497. module_param(i2c_debug, int, 0);