ioctl.h 6.3 KB

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  1. /*
  2. * Marvell Wireless LAN device driver: ioctl data structures & APIs
  3. *
  4. * Copyright (C) 2011, Marvell International Ltd.
  5. *
  6. * This software file (the "File") is distributed by Marvell International
  7. * Ltd. under the terms of the GNU General Public License Version 2, June 1991
  8. * (the "License"). You may use, redistribute and/or modify this File in
  9. * accordance with the terms and conditions of the License, a copy of which
  10. * is available by writing to the Free Software Foundation, Inc.,
  11. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
  12. * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
  13. *
  14. * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
  15. * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
  16. * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
  17. * this warranty disclaimer.
  18. */
  19. #ifndef _MWIFIEX_IOCTL_H_
  20. #define _MWIFIEX_IOCTL_H_
  21. #include <net/mac80211.h>
  22. enum {
  23. MWIFIEX_SCAN_TYPE_UNCHANGED = 0,
  24. MWIFIEX_SCAN_TYPE_ACTIVE,
  25. MWIFIEX_SCAN_TYPE_PASSIVE
  26. };
  27. struct mwifiex_user_scan {
  28. u32 scan_cfg_len;
  29. u8 scan_cfg_buf[1];
  30. };
  31. #define MWIFIEX_PROMISC_MODE 1
  32. #define MWIFIEX_MULTICAST_MODE 2
  33. #define MWIFIEX_ALL_MULTI_MODE 4
  34. #define MWIFIEX_MAX_MULTICAST_LIST_SIZE 32
  35. struct mwifiex_multicast_list {
  36. u32 mode;
  37. u32 num_multicast_addr;
  38. u8 mac_list[MWIFIEX_MAX_MULTICAST_LIST_SIZE][ETH_ALEN];
  39. };
  40. struct mwifiex_chan_freq {
  41. u32 channel;
  42. u32 freq;
  43. };
  44. struct mwifiex_ssid_bssid {
  45. struct cfg80211_ssid ssid;
  46. u8 bssid[ETH_ALEN];
  47. };
  48. enum {
  49. BAND_B = 1,
  50. BAND_G = 2,
  51. BAND_A = 4,
  52. BAND_GN = 8,
  53. BAND_AN = 16,
  54. };
  55. #define BAND_CONFIG_MANUAL 0x00
  56. struct mwifiex_uap_bss_param {
  57. u8 channel;
  58. u8 band_cfg;
  59. u16 rts_threshold;
  60. u16 frag_threshold;
  61. u8 retry_limit;
  62. struct mwifiex_802_11_ssid ssid;
  63. u8 bcast_ssid_ctl;
  64. u8 radio_ctl;
  65. u8 dtim_period;
  66. u16 beacon_period;
  67. };
  68. enum {
  69. ADHOC_IDLE,
  70. ADHOC_STARTED,
  71. ADHOC_JOINED,
  72. ADHOC_COALESCED
  73. };
  74. struct mwifiex_ds_get_stats {
  75. u32 mcast_tx_frame;
  76. u32 failed;
  77. u32 retry;
  78. u32 multi_retry;
  79. u32 frame_dup;
  80. u32 rts_success;
  81. u32 rts_failure;
  82. u32 ack_failure;
  83. u32 rx_frag;
  84. u32 mcast_rx_frame;
  85. u32 fcs_error;
  86. u32 tx_frame;
  87. u32 wep_icv_error[4];
  88. };
  89. #define MWIFIEX_MAX_VER_STR_LEN 128
  90. struct mwifiex_ver_ext {
  91. u32 version_str_sel;
  92. char version_str[MWIFIEX_MAX_VER_STR_LEN];
  93. };
  94. struct mwifiex_bss_info {
  95. u32 bss_mode;
  96. struct cfg80211_ssid ssid;
  97. u32 bss_chan;
  98. u8 country_code[3];
  99. u32 media_connected;
  100. u32 max_power_level;
  101. u32 min_power_level;
  102. u32 adhoc_state;
  103. signed int bcn_nf_last;
  104. u32 wep_status;
  105. u32 is_hs_configured;
  106. u32 is_deep_sleep;
  107. u8 bssid[ETH_ALEN];
  108. };
  109. #define MAX_NUM_TID 8
  110. #define MAX_RX_WINSIZE 64
  111. struct mwifiex_ds_rx_reorder_tbl {
  112. u16 tid;
  113. u8 ta[ETH_ALEN];
  114. u32 start_win;
  115. u32 win_size;
  116. u32 buffer[MAX_RX_WINSIZE];
  117. };
  118. struct mwifiex_ds_tx_ba_stream_tbl {
  119. u16 tid;
  120. u8 ra[ETH_ALEN];
  121. };
  122. #define DBG_CMD_NUM 5
  123. struct mwifiex_debug_info {
  124. u32 int_counter;
  125. u32 packets_out[MAX_NUM_TID];
  126. u32 max_tx_buf_size;
  127. u32 tx_buf_size;
  128. u32 curr_tx_buf_size;
  129. u32 tx_tbl_num;
  130. struct mwifiex_ds_tx_ba_stream_tbl
  131. tx_tbl[MWIFIEX_MAX_TX_BASTREAM_SUPPORTED];
  132. u32 rx_tbl_num;
  133. struct mwifiex_ds_rx_reorder_tbl rx_tbl
  134. [MWIFIEX_MAX_RX_BASTREAM_SUPPORTED];
  135. u16 ps_mode;
  136. u32 ps_state;
  137. u8 is_deep_sleep;
  138. u8 pm_wakeup_card_req;
  139. u32 pm_wakeup_fw_try;
  140. u8 is_hs_configured;
  141. u8 hs_activated;
  142. u32 num_cmd_host_to_card_failure;
  143. u32 num_cmd_sleep_cfm_host_to_card_failure;
  144. u32 num_tx_host_to_card_failure;
  145. u32 num_event_deauth;
  146. u32 num_event_disassoc;
  147. u32 num_event_link_lost;
  148. u32 num_cmd_deauth;
  149. u32 num_cmd_assoc_success;
  150. u32 num_cmd_assoc_failure;
  151. u32 num_tx_timeout;
  152. u32 num_cmd_timeout;
  153. u16 timeout_cmd_id;
  154. u16 timeout_cmd_act;
  155. u16 last_cmd_id[DBG_CMD_NUM];
  156. u16 last_cmd_act[DBG_CMD_NUM];
  157. u16 last_cmd_index;
  158. u16 last_cmd_resp_id[DBG_CMD_NUM];
  159. u16 last_cmd_resp_index;
  160. u16 last_event[DBG_CMD_NUM];
  161. u16 last_event_index;
  162. u8 data_sent;
  163. u8 cmd_sent;
  164. u8 cmd_resp_received;
  165. u8 event_received;
  166. };
  167. #define MWIFIEX_KEY_INDEX_UNICAST 0x40000000
  168. #define WAPI_RXPN_LEN 16
  169. struct mwifiex_ds_encrypt_key {
  170. u32 key_disable;
  171. u32 key_index;
  172. u32 key_len;
  173. u8 key_material[WLAN_MAX_KEY_LEN];
  174. u8 mac_addr[ETH_ALEN];
  175. u32 is_wapi_key;
  176. u8 wapi_rxpn[WAPI_RXPN_LEN];
  177. };
  178. struct mwifiex_rate_cfg {
  179. u32 action;
  180. u32 is_rate_auto;
  181. u32 rate;
  182. };
  183. struct mwifiex_power_cfg {
  184. u32 is_power_auto;
  185. u32 power_level;
  186. };
  187. struct mwifiex_ds_hs_cfg {
  188. u32 is_invoke_hostcmd;
  189. /* Bit0: non-unicast data
  190. * Bit1: unicast data
  191. * Bit2: mac events
  192. * Bit3: magic packet
  193. */
  194. u32 conditions;
  195. u32 gpio;
  196. u32 gap;
  197. };
  198. #define DEEP_SLEEP_ON 1
  199. #define DEEP_SLEEP_OFF 0
  200. #define DEEP_SLEEP_IDLE_TIME 100
  201. #define PS_MODE_AUTO 1
  202. struct mwifiex_ds_auto_ds {
  203. u16 auto_ds;
  204. u16 idle_time;
  205. };
  206. struct mwifiex_ds_pm_cfg {
  207. union {
  208. u32 ps_mode;
  209. struct mwifiex_ds_hs_cfg hs_cfg;
  210. struct mwifiex_ds_auto_ds auto_deep_sleep;
  211. u32 sleep_period;
  212. } param;
  213. };
  214. struct mwifiex_ds_11n_tx_cfg {
  215. u16 tx_htcap;
  216. u16 tx_htinfo;
  217. };
  218. struct mwifiex_ds_11n_amsdu_aggr_ctrl {
  219. u16 enable;
  220. u16 curr_buf_size;
  221. };
  222. #define MWIFIEX_NUM_OF_CMD_BUFFER 20
  223. #define MWIFIEX_SIZE_OF_CMD_BUFFER 2048
  224. enum {
  225. MWIFIEX_IE_TYPE_GEN_IE = 0,
  226. MWIFIEX_IE_TYPE_ARP_FILTER,
  227. };
  228. enum {
  229. MWIFIEX_REG_MAC = 1,
  230. MWIFIEX_REG_BBP,
  231. MWIFIEX_REG_RF,
  232. MWIFIEX_REG_PMIC,
  233. MWIFIEX_REG_CAU,
  234. };
  235. struct mwifiex_ds_reg_rw {
  236. __le32 type;
  237. __le32 offset;
  238. __le32 value;
  239. };
  240. #define MAX_EEPROM_DATA 256
  241. struct mwifiex_ds_read_eeprom {
  242. __le16 offset;
  243. __le16 byte_count;
  244. u8 value[MAX_EEPROM_DATA];
  245. };
  246. #define IEEE_MAX_IE_SIZE 256
  247. struct mwifiex_ds_misc_gen_ie {
  248. u32 type;
  249. u32 len;
  250. u8 ie_data[IEEE_MAX_IE_SIZE];
  251. };
  252. struct mwifiex_ds_misc_cmd {
  253. u32 len;
  254. u8 cmd[MWIFIEX_SIZE_OF_CMD_BUFFER];
  255. };
  256. #define BITMASK_BCN_RSSI_LOW BIT(0)
  257. #define BITMASK_BCN_RSSI_HIGH BIT(4)
  258. enum subsc_evt_rssi_state {
  259. EVENT_HANDLED,
  260. RSSI_LOW_RECVD,
  261. RSSI_HIGH_RECVD
  262. };
  263. struct subsc_evt_cfg {
  264. u8 abs_value;
  265. u8 evt_freq;
  266. };
  267. struct mwifiex_ds_misc_subsc_evt {
  268. u16 action;
  269. u16 events;
  270. struct subsc_evt_cfg bcn_l_rssi_cfg;
  271. struct subsc_evt_cfg bcn_h_rssi_cfg;
  272. };
  273. #define MWIFIEX_MAX_VSIE_LEN (256)
  274. #define MWIFIEX_MAX_VSIE_NUM (8)
  275. #define MWIFIEX_VSIE_MASK_CLEAR 0x00
  276. #define MWIFIEX_VSIE_MASK_SCAN 0x01
  277. #define MWIFIEX_VSIE_MASK_ASSOC 0x02
  278. #define MWIFIEX_VSIE_MASK_ADHOC 0x04
  279. enum {
  280. MWIFIEX_FUNC_INIT = 1,
  281. MWIFIEX_FUNC_SHUTDOWN,
  282. };
  283. #endif /* !_MWIFIEX_IOCTL_H_ */